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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_dac.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_dac.c
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief DAC HAL module driver.
<> 149:156823d33999 6 * This file provides firmware functions to manage the following
<> 149:156823d33999 7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
<> 149:156823d33999 8 * + Initialization and de-initialization functions
<> 149:156823d33999 9 * + IO operation functions
<> 149:156823d33999 10 * + Peripheral Control functions
<> 149:156823d33999 11 * + Peripheral State and Errors functions
<> 149:156823d33999 12 *
<> 149:156823d33999 13 *
<> 149:156823d33999 14 @verbatim
<> 149:156823d33999 15 ==============================================================================
<> 149:156823d33999 16 ##### DAC Peripheral features #####
<> 149:156823d33999 17 ==============================================================================
<> 149:156823d33999 18 [..]
<> 149:156823d33999 19 *** DAC Channels ***
<> 149:156823d33999 20 ====================
<> 149:156823d33999 21 [..]
<> 149:156823d33999 22 The device integrates two 12-bit Digital Analog Converters that can
<> 149:156823d33999 23 be used independently or simultaneously (dual mode):
<> 149:156823d33999 24 (#) DAC channel1 with DAC_OUT1 (PA4) as output
<> 149:156823d33999 25 (#) DAC channel2 with DAC_OUT2 (PA5) as output
<> 149:156823d33999 26
<> 149:156823d33999 27 *** DAC Triggers ***
<> 149:156823d33999 28 ====================
<> 149:156823d33999 29 [..]
<> 149:156823d33999 30 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
<> 149:156823d33999 31 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
<> 149:156823d33999 32 [..]
<> 149:156823d33999 33 Digital to Analog conversion can be triggered by:
<> 149:156823d33999 34 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
<> 149:156823d33999 35 The used pin (GPIOx_PIN_9) must be configured in input mode.
<> 149:156823d33999 36
<> 149:156823d33999 37 (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7, TIM9
<> 149:156823d33999 38 (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
<> 149:156823d33999 39
<> 149:156823d33999 40 (#) Software using DAC_TRIGGER_SOFTWARE
<> 149:156823d33999 41
<> 149:156823d33999 42 *** DAC Buffer mode feature ***
<> 149:156823d33999 43 ===============================
<> 149:156823d33999 44 [..]
<> 149:156823d33999 45 Each DAC channel integrates an output buffer that can be used to
<> 149:156823d33999 46 reduce the output impedance, and to drive external loads directly
<> 149:156823d33999 47 without having to add an external operational amplifier.
<> 149:156823d33999 48 To enable, the output buffer use
<> 149:156823d33999 49 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
<> 149:156823d33999 50 [..]
<> 149:156823d33999 51 (@) Refer to the device datasheet for more details about output
<> 149:156823d33999 52 impedance value with and without output buffer.
<> 149:156823d33999 53
<> 149:156823d33999 54 *** DAC connect feature ***
<> 149:156823d33999 55 ===============================
<> 149:156823d33999 56 [..]
<> 149:156823d33999 57 Each DAC channel can be connected internally.
<> 149:156823d33999 58 To connect, use
<> 149:156823d33999 59 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
<> 149:156823d33999 60
<> 149:156823d33999 61 *** GPIO configurations guidelines ***
<> 149:156823d33999 62 =====================
<> 149:156823d33999 63 [..]
<> 149:156823d33999 64 When a DAC channel is used (ex channel1 on PA4) and the other is not
<> 149:156823d33999 65 (ex channel1 on PA5 is configured in Analog and disabled).
<> 149:156823d33999 66 Channel1 may disturb channel2 as coupling effect.
<> 149:156823d33999 67 Note that there is no coupling on channel2 as soon as channel2 is turned on.
<> 149:156823d33999 68 Coupling on adjacent channel could be avoided as follows:
<> 149:156823d33999 69 when unused PA5 is configured as INPUT PULL-UP or DOWN.
<> 149:156823d33999 70 PA5 is configured in ANALOG just before it is turned on.
<> 149:156823d33999 71
<> 149:156823d33999 72 *** DAC wave generation feature ***
<> 149:156823d33999 73 ===================================
<> 149:156823d33999 74 [..]
<> 149:156823d33999 75 Both DAC channels can be used to generate
<> 149:156823d33999 76 (#) Noise wave using HAL_DACEx_NoiseWaveGenerate()
<> 149:156823d33999 77 (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate()
<> 149:156823d33999 78
<> 149:156823d33999 79 *** DAC data format ***
<> 149:156823d33999 80 =======================
<> 149:156823d33999 81 [..]
<> 149:156823d33999 82 The DAC data format can be:
<> 149:156823d33999 83 (#) 8-bit right alignment using DAC_ALIGN_8B_R
<> 149:156823d33999 84 (#) 12-bit left alignment using DAC_ALIGN_12B_L
<> 149:156823d33999 85 (#) 12-bit right alignment using DAC_ALIGN_12B_R
<> 149:156823d33999 86
<> 149:156823d33999 87 *** DAC data value to voltage correspondance ***
<> 149:156823d33999 88 ================================================
<> 149:156823d33999 89 [..]
<> 149:156823d33999 90 The analog output voltage on each DAC channel pin is determined
<> 149:156823d33999 91 by the following equation:
<> 149:156823d33999 92 [..]
<> 149:156823d33999 93 DAC_OUTx = VREF+ * DOR / 4095
<> 149:156823d33999 94 (+) with DOR is the Data Output Register
<> 149:156823d33999 95 [..]
<> 149:156823d33999 96 VEF+ is the input voltage reference (refer to the device datasheet)
<> 149:156823d33999 97 [..]
<> 149:156823d33999 98 e.g. To set DAC_OUT1 to 0.7V, use
<> 149:156823d33999 99 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
<> 149:156823d33999 100
<> 149:156823d33999 101 *** DMA requests ***
<> 149:156823d33999 102 =====================
<> 149:156823d33999 103 [..]
<> 149:156823d33999 104 A DMA1 request can be generated when an external trigger (but not
<> 149:156823d33999 105 a software trigger) occurs if DMA1 requests are enabled using
<> 149:156823d33999 106 HAL_DAC_Start_DMA()
<> 149:156823d33999 107 [..]
<> 149:156823d33999 108 DMA1 requests are mapped as following:
<> 149:156823d33999 109 (#) DAC channel1 :
<> 149:156823d33999 110 mapped on DMA1 channel2 which must be
<> 149:156823d33999 111 already configured
<> 149:156823d33999 112 (#) DAC channel2 :
<> 149:156823d33999 113 mapped on DMA1 channel3 which must be
<> 149:156823d33999 114 already configured
<> 149:156823d33999 115
<> 149:156823d33999 116 -@- For Dual mode and specific signal (Triangle and noise) generation please
<> 149:156823d33999 117 refer to Extension Features Driver description
<> 149:156823d33999 118
<> 149:156823d33999 119
<> 149:156823d33999 120 ##### How to use this driver #####
<> 149:156823d33999 121 ==============================================================================
<> 149:156823d33999 122 [..]
<> 149:156823d33999 123 (+) DAC APB clock must be enabled to get write access to DAC
<> 149:156823d33999 124 registers using HAL_DAC_Init()
<> 149:156823d33999 125 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
<> 149:156823d33999 126 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
<> 149:156823d33999 127 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
<> 149:156823d33999 128
<> 149:156823d33999 129 *** Polling mode IO operation ***
<> 149:156823d33999 130 =================================
<> 149:156823d33999 131 [..]
<> 149:156823d33999 132 (+) Start the DAC peripheral using HAL_DAC_Start()
<> 149:156823d33999 133 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
<> 149:156823d33999 134 (+) Stop the DAC peripheral using HAL_DAC_Stop()
<> 149:156823d33999 135
<> 149:156823d33999 136 *** DMA mode IO operation ***
<> 149:156823d33999 137 ==============================
<> 149:156823d33999 138 [..]
<> 149:156823d33999 139 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
<> 149:156823d33999 140 of data to be transferred at each end of conversion
<> 149:156823d33999 141 (+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
<> 149:156823d33999 142 function is executed and user can add his own code by customization of function pointer
<> 149:156823d33999 143 HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2
<> 149:156823d33999 144 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()
<> 149:156823d33999 145 function is executed and user can add his own code by customization of function pointer
<> 149:156823d33999 146 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
<> 149:156823d33999 147 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can
<> 149:156823d33999 148 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2
<> 149:156823d33999 149 (+) For STM32F100x devices with specific feature: DMA underrun.
<> 149:156823d33999 150 In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
<> 149:156823d33999 151 HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
<> 149:156823d33999 152 function is executed and user can add his own code by customization of function pointer
<> 149:156823d33999 153 HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2
<> 149:156823d33999 154 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
<> 149:156823d33999 155 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
<> 149:156823d33999 156
<> 149:156823d33999 157 *** DAC HAL driver macros list ***
<> 149:156823d33999 158 =============================================
<> 149:156823d33999 159 [..]
<> 149:156823d33999 160 Below the list of most used macros in DAC HAL driver.
<> 149:156823d33999 161
<> 149:156823d33999 162 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
<> 149:156823d33999 163 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
<> 149:156823d33999 164 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
<> 149:156823d33999 165 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
<> 149:156823d33999 166
<> 149:156823d33999 167 [..]
<> 149:156823d33999 168 (@) You can refer to the DAC HAL driver header file for more useful macros
<> 149:156823d33999 169
<> 149:156823d33999 170 @endverbatim
<> 149:156823d33999 171 ******************************************************************************
<> 149:156823d33999 172 * @attention
<> 149:156823d33999 173 *
AnnaBridge 184:08ed48f1de7f 174 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 175 *
<> 149:156823d33999 176 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 177 * are permitted provided that the following conditions are met:
<> 149:156823d33999 178 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 179 * this list of conditions and the following disclaimer.
<> 149:156823d33999 180 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 181 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 182 * and/or other materials provided with the distribution.
<> 149:156823d33999 183 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 184 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 185 * without specific prior written permission.
<> 149:156823d33999 186 *
<> 149:156823d33999 187 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 188 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 189 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 190 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 191 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 192 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 193 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 194 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 195 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 196 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 197 *
<> 149:156823d33999 198 ******************************************************************************
<> 149:156823d33999 199 */
<> 149:156823d33999 200
<> 149:156823d33999 201
<> 149:156823d33999 202 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 203 #include "stm32l1xx_hal.h"
<> 149:156823d33999 204
<> 149:156823d33999 205 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 206 * @{
<> 149:156823d33999 207 */
<> 149:156823d33999 208
<> 149:156823d33999 209 /** @defgroup DAC DAC
<> 149:156823d33999 210 * @brief DAC driver modules
<> 149:156823d33999 211 * @{
<> 149:156823d33999 212 */
<> 149:156823d33999 213
<> 149:156823d33999 214 #ifdef HAL_DAC_MODULE_ENABLED
<> 149:156823d33999 215
<> 149:156823d33999 216 /* Private typedef -----------------------------------------------------------*/
<> 149:156823d33999 217 /* Private define ------------------------------------------------------------*/
<> 149:156823d33999 218 /* Private macro -------------------------------------------------------------*/
<> 149:156823d33999 219 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 220 /* Private function prototypes -----------------------------------------------*/
<> 149:156823d33999 221 /** @defgroup DAC_Private_Functions DAC Private Functions
<> 149:156823d33999 222 * @{
<> 149:156823d33999 223 */
<> 149:156823d33999 224 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 225 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 226 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 227
<> 149:156823d33999 228 /**
<> 149:156823d33999 229 * @}
<> 149:156823d33999 230 */
<> 149:156823d33999 231 /* Private functions ---------------------------------------------------------*/
<> 149:156823d33999 232
<> 149:156823d33999 233 /** @defgroup DAC_Exported_Functions DAC Exported Functions
<> 149:156823d33999 234 * @{
<> 149:156823d33999 235 */
<> 149:156823d33999 236
<> 149:156823d33999 237 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
<> 149:156823d33999 238 * @brief Initialization and Configuration functions
<> 149:156823d33999 239 *
<> 149:156823d33999 240 @verbatim
<> 149:156823d33999 241 ==============================================================================
<> 149:156823d33999 242 ##### Initialization and de-initialization functions #####
<> 149:156823d33999 243 ==============================================================================
<> 149:156823d33999 244 [..] This section provides functions allowing to:
<> 149:156823d33999 245 (+) Initialize and configure the DAC.
<> 149:156823d33999 246 (+) De-initialize the DAC.
<> 149:156823d33999 247
<> 149:156823d33999 248 @endverbatim
<> 149:156823d33999 249 * @{
<> 149:156823d33999 250 */
<> 149:156823d33999 251
<> 149:156823d33999 252 /**
<> 149:156823d33999 253 * @brief Initializes the DAC peripheral according to the specified parameters
<> 149:156823d33999 254 * in the DAC_InitStruct.
<> 149:156823d33999 255 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 256 * the configuration information for the specified DAC.
<> 149:156823d33999 257 * @retval HAL status
<> 149:156823d33999 258 */
<> 149:156823d33999 259 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 260 {
<> 149:156823d33999 261 /* Check DAC handle */
<> 149:156823d33999 262 if(hdac == NULL)
<> 149:156823d33999 263 {
<> 149:156823d33999 264 return HAL_ERROR;
<> 149:156823d33999 265 }
<> 149:156823d33999 266 /* Check the parameters */
<> 149:156823d33999 267 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
<> 149:156823d33999 268
<> 149:156823d33999 269 if(hdac->State == HAL_DAC_STATE_RESET)
<> 149:156823d33999 270 {
<> 149:156823d33999 271 /* Allocate lock resource and initialize it */
<> 149:156823d33999 272 hdac->Lock = HAL_UNLOCKED;
<> 149:156823d33999 273
<> 149:156823d33999 274 /* Init the low level hardware */
<> 149:156823d33999 275 HAL_DAC_MspInit(hdac);
<> 149:156823d33999 276 }
<> 149:156823d33999 277
<> 149:156823d33999 278 /* Initialize the DAC state*/
<> 149:156823d33999 279 hdac->State = HAL_DAC_STATE_BUSY;
<> 149:156823d33999 280
<> 149:156823d33999 281 /* Set DAC error code to none */
<> 149:156823d33999 282 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
<> 149:156823d33999 283
<> 149:156823d33999 284 /* Initialize the DAC state*/
<> 149:156823d33999 285 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 286
<> 149:156823d33999 287 /* Return function status */
<> 149:156823d33999 288 return HAL_OK;
<> 149:156823d33999 289 }
<> 149:156823d33999 290
<> 149:156823d33999 291 /**
<> 149:156823d33999 292 * @brief Deinitializes the DAC peripheral registers to their default reset values.
<> 149:156823d33999 293 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 294 * the configuration information for the specified DAC.
<> 149:156823d33999 295 * @retval HAL status
<> 149:156823d33999 296 */
<> 149:156823d33999 297 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 298 {
<> 149:156823d33999 299 /* Check DAC handle */
<> 149:156823d33999 300 if(hdac == NULL)
<> 149:156823d33999 301 {
<> 149:156823d33999 302 return HAL_ERROR;
<> 149:156823d33999 303 }
<> 149:156823d33999 304
<> 149:156823d33999 305 /* Check the parameters */
<> 149:156823d33999 306 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
<> 149:156823d33999 307
<> 149:156823d33999 308 /* Change DAC state */
<> 149:156823d33999 309 hdac->State = HAL_DAC_STATE_BUSY;
<> 149:156823d33999 310
<> 149:156823d33999 311 /* DeInit the low level hardware */
<> 149:156823d33999 312 HAL_DAC_MspDeInit(hdac);
<> 149:156823d33999 313
<> 149:156823d33999 314 /* Set DAC error code to none */
<> 149:156823d33999 315 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
<> 149:156823d33999 316
<> 149:156823d33999 317 /* Change DAC state */
<> 149:156823d33999 318 hdac->State = HAL_DAC_STATE_RESET;
<> 149:156823d33999 319
<> 149:156823d33999 320 /* Release Lock */
<> 149:156823d33999 321 __HAL_UNLOCK(hdac);
<> 149:156823d33999 322
<> 149:156823d33999 323 /* Return function status */
<> 149:156823d33999 324 return HAL_OK;
<> 149:156823d33999 325 }
<> 149:156823d33999 326
<> 149:156823d33999 327 /**
<> 149:156823d33999 328 * @brief Initializes the DAC MSP.
<> 149:156823d33999 329 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 330 * the configuration information for the specified DAC.
<> 149:156823d33999 331 * @retval None
<> 149:156823d33999 332 */
<> 149:156823d33999 333 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 334 {
<> 149:156823d33999 335 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 336 UNUSED(hdac);
<> 149:156823d33999 337
<> 149:156823d33999 338 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 339 the HAL_DAC_MspInit could be implemented in the user file
<> 149:156823d33999 340 */
<> 149:156823d33999 341 }
<> 149:156823d33999 342
<> 149:156823d33999 343 /**
<> 149:156823d33999 344 * @brief DeInitializes the DAC MSP.
<> 149:156823d33999 345 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 346 * the configuration information for the specified DAC.
<> 149:156823d33999 347 * @retval None
<> 149:156823d33999 348 */
<> 149:156823d33999 349 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 350 {
<> 149:156823d33999 351 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 352 UNUSED(hdac);
<> 149:156823d33999 353
<> 149:156823d33999 354 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 355 the HAL_DAC_MspDeInit could be implemented in the user file
<> 149:156823d33999 356 */
<> 149:156823d33999 357 }
<> 149:156823d33999 358
<> 149:156823d33999 359 /**
<> 149:156823d33999 360 * @}
<> 149:156823d33999 361 */
<> 149:156823d33999 362
<> 149:156823d33999 363 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
<> 149:156823d33999 364 * @brief IO operation functions
<> 149:156823d33999 365 *
<> 149:156823d33999 366 @verbatim
<> 149:156823d33999 367 ==============================================================================
<> 149:156823d33999 368 ##### IO operation functions #####
<> 149:156823d33999 369 ==============================================================================
<> 149:156823d33999 370 [..] This section provides functions allowing to:
<> 149:156823d33999 371 (+) Start conversion.
<> 149:156823d33999 372 (+) Stop conversion.
<> 149:156823d33999 373 (+) Start conversion and enable DMA transfer.
<> 149:156823d33999 374 (+) Stop conversion and disable DMA transfer.
<> 149:156823d33999 375 (+) Get result of conversion.
<> 149:156823d33999 376
<> 149:156823d33999 377 @endverbatim
<> 149:156823d33999 378 * @{
<> 149:156823d33999 379 */
<> 149:156823d33999 380
<> 149:156823d33999 381 /**
<> 149:156823d33999 382 * @brief Enables DAC and starts conversion of channel.
<> 149:156823d33999 383 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 384 * the configuration information for the specified DAC.
<> 149:156823d33999 385 * @param Channel: The selected DAC channel.
<> 149:156823d33999 386 * This parameter can be one of the following values:
<> 149:156823d33999 387 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 388 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 389 * @retval HAL status
<> 149:156823d33999 390 */
<> 149:156823d33999 391 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
<> 149:156823d33999 392 {
<> 149:156823d33999 393 /* Check the parameters */
<> 149:156823d33999 394 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 395
<> 149:156823d33999 396 /* Process locked */
<> 149:156823d33999 397 __HAL_LOCK(hdac);
<> 149:156823d33999 398
<> 149:156823d33999 399 /* Change DAC state */
<> 149:156823d33999 400 hdac->State = HAL_DAC_STATE_BUSY;
<> 149:156823d33999 401
<> 149:156823d33999 402 /* Enable the Peripharal */
<> 149:156823d33999 403 __HAL_DAC_ENABLE(hdac, Channel);
<> 149:156823d33999 404
<> 149:156823d33999 405 if(Channel == DAC_CHANNEL_1)
<> 149:156823d33999 406 {
<> 149:156823d33999 407 /* Check if software trigger enabled */
<> 149:156823d33999 408 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
<> 149:156823d33999 409 {
<> 149:156823d33999 410 /* Enable the selected DAC software conversion */
<> 149:156823d33999 411 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
<> 149:156823d33999 412 }
<> 149:156823d33999 413 }
<> 149:156823d33999 414 else
<> 149:156823d33999 415 {
<> 149:156823d33999 416 /* Check if software trigger enabled */
<> 149:156823d33999 417 if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
<> 149:156823d33999 418 {
<> 149:156823d33999 419 /* Enable the selected DAC software conversion*/
<> 149:156823d33999 420 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
<> 149:156823d33999 421 }
<> 149:156823d33999 422 }
<> 149:156823d33999 423
<> 149:156823d33999 424 /* Change DAC state */
<> 149:156823d33999 425 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 426
<> 149:156823d33999 427 /* Process unlocked */
<> 149:156823d33999 428 __HAL_UNLOCK(hdac);
<> 149:156823d33999 429
<> 149:156823d33999 430 /* Return function status */
<> 149:156823d33999 431 return HAL_OK;
<> 149:156823d33999 432 }
<> 149:156823d33999 433
<> 149:156823d33999 434 /**
<> 149:156823d33999 435 * @brief Disables DAC and stop conversion of channel.
<> 149:156823d33999 436 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 437 * the configuration information for the specified DAC.
<> 149:156823d33999 438 * @param Channel: The selected DAC channel.
<> 149:156823d33999 439 * This parameter can be one of the following values:
<> 149:156823d33999 440 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 441 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 442 * @retval HAL status
<> 149:156823d33999 443 */
<> 149:156823d33999 444 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
<> 149:156823d33999 445 {
<> 149:156823d33999 446 /* Check the parameters */
<> 149:156823d33999 447 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 448
<> 149:156823d33999 449 /* Disable the Peripheral */
<> 149:156823d33999 450 __HAL_DAC_DISABLE(hdac, Channel);
<> 149:156823d33999 451
<> 149:156823d33999 452 /* Change DAC state */
<> 149:156823d33999 453 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 454
<> 149:156823d33999 455 /* Return function status */
<> 149:156823d33999 456 return HAL_OK;
<> 149:156823d33999 457 }
<> 149:156823d33999 458
<> 149:156823d33999 459 /**
<> 149:156823d33999 460 * @brief Enables DAC and starts conversion of channel.
<> 149:156823d33999 461 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 462 * the configuration information for the specified DAC.
<> 149:156823d33999 463 * @param Channel: The selected DAC channel.
<> 149:156823d33999 464 * This parameter can be one of the following values:
<> 149:156823d33999 465 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 466 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 467 * @param pData: The destination peripheral Buffer address.
<> 149:156823d33999 468 * @param Length: The length of data to be transferred from memory to DAC peripheral
<> 149:156823d33999 469 * @param Alignment: Specifies the data alignment for DAC channel.
<> 149:156823d33999 470 * This parameter can be one of the following values:
<> 149:156823d33999 471 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
<> 149:156823d33999 472 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
<> 149:156823d33999 473 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
<> 149:156823d33999 474 * @retval HAL status
<> 149:156823d33999 475 */
<> 149:156823d33999 476 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
<> 149:156823d33999 477 {
<> 149:156823d33999 478 uint32_t tmpreg = 0;
<> 149:156823d33999 479
<> 149:156823d33999 480 /* Check the parameters */
<> 149:156823d33999 481 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 482 assert_param(IS_DAC_ALIGN(Alignment));
<> 149:156823d33999 483
<> 149:156823d33999 484 /* Process locked */
<> 149:156823d33999 485 __HAL_LOCK(hdac);
<> 149:156823d33999 486
<> 149:156823d33999 487 /* Change DAC state */
<> 149:156823d33999 488 hdac->State = HAL_DAC_STATE_BUSY;
<> 149:156823d33999 489
<> 149:156823d33999 490 if(Channel == DAC_CHANNEL_1)
<> 149:156823d33999 491 {
<> 149:156823d33999 492 /* Set the DMA transfer complete callback for channel1 */
<> 149:156823d33999 493 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
<> 149:156823d33999 494
<> 149:156823d33999 495 /* Set the DMA half transfer complete callback for channel1 */
<> 149:156823d33999 496 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
<> 149:156823d33999 497
<> 149:156823d33999 498 /* Set the DMA error callback for channel1 */
<> 149:156823d33999 499 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
<> 149:156823d33999 500
<> 149:156823d33999 501 /* Enable the selected DAC channel1 DMA request */
<> 149:156823d33999 502 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
<> 149:156823d33999 503
<> 149:156823d33999 504 /* Case of use of channel 1 */
<> 149:156823d33999 505 switch(Alignment)
<> 149:156823d33999 506 {
<> 149:156823d33999 507 case DAC_ALIGN_12B_R:
<> 149:156823d33999 508 /* Get DHR12R1 address */
<> 149:156823d33999 509 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
<> 149:156823d33999 510 break;
<> 149:156823d33999 511 case DAC_ALIGN_12B_L:
<> 149:156823d33999 512 /* Get DHR12L1 address */
<> 149:156823d33999 513 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
<> 149:156823d33999 514 break;
<> 149:156823d33999 515 case DAC_ALIGN_8B_R:
<> 149:156823d33999 516 /* Get DHR8R1 address */
<> 149:156823d33999 517 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
<> 149:156823d33999 518 break;
<> 149:156823d33999 519 default:
<> 149:156823d33999 520 break;
<> 149:156823d33999 521 }
<> 149:156823d33999 522 }
<> 149:156823d33999 523 else
<> 149:156823d33999 524 {
<> 149:156823d33999 525 /* Set the DMA transfer complete callback for channel2 */
<> 149:156823d33999 526 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
<> 149:156823d33999 527
<> 149:156823d33999 528 /* Set the DMA half transfer complete callback for channel2 */
<> 149:156823d33999 529 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
<> 149:156823d33999 530
<> 149:156823d33999 531 /* Set the DMA error callback for channel2 */
<> 149:156823d33999 532 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
<> 149:156823d33999 533
<> 149:156823d33999 534 /* Enable the selected DAC channel2 DMA request */
<> 149:156823d33999 535 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
<> 149:156823d33999 536
<> 149:156823d33999 537 /* Case of use of channel 2 */
<> 149:156823d33999 538 switch(Alignment)
<> 149:156823d33999 539 {
<> 149:156823d33999 540 case DAC_ALIGN_12B_R:
<> 149:156823d33999 541 /* Get DHR12R2 address */
<> 149:156823d33999 542 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
<> 149:156823d33999 543 break;
<> 149:156823d33999 544 case DAC_ALIGN_12B_L:
<> 149:156823d33999 545 /* Get DHR12L2 address */
<> 149:156823d33999 546 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
<> 149:156823d33999 547 break;
<> 149:156823d33999 548 case DAC_ALIGN_8B_R:
<> 149:156823d33999 549 /* Get DHR8R2 address */
<> 149:156823d33999 550 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
<> 149:156823d33999 551 break;
<> 149:156823d33999 552 default:
<> 149:156823d33999 553 break;
<> 149:156823d33999 554 }
<> 149:156823d33999 555 }
<> 149:156823d33999 556
<> 149:156823d33999 557 /* Enable the DMA channel */
<> 149:156823d33999 558 if(Channel == DAC_CHANNEL_1)
<> 149:156823d33999 559 {
<> 149:156823d33999 560 /* Enable the DAC DMA underrun interrupt */
<> 149:156823d33999 561 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
<> 149:156823d33999 562
<> 149:156823d33999 563 /* Enable the DMA channel */
<> 149:156823d33999 564 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
<> 149:156823d33999 565 }
<> 149:156823d33999 566 else
<> 149:156823d33999 567 {
<> 149:156823d33999 568 /* Enable the DAC DMA underrun interrupt */
<> 149:156823d33999 569 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
<> 149:156823d33999 570
<> 149:156823d33999 571 /* Enable the DMA channel */
<> 149:156823d33999 572 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
<> 149:156823d33999 573 }
<> 149:156823d33999 574
<> 149:156823d33999 575 /* Process Unlocked */
<> 149:156823d33999 576 __HAL_UNLOCK(hdac);
<> 149:156823d33999 577
<> 149:156823d33999 578 /* Enable the Peripharal */
<> 149:156823d33999 579 __HAL_DAC_ENABLE(hdac, Channel);
<> 149:156823d33999 580
<> 149:156823d33999 581 /* Return function status */
<> 149:156823d33999 582 return HAL_OK;
<> 149:156823d33999 583 }
<> 149:156823d33999 584
<> 149:156823d33999 585 /**
<> 149:156823d33999 586 * @brief Disables DAC and stop conversion of channel.
<> 149:156823d33999 587 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 588 * the configuration information for the specified DAC.
<> 149:156823d33999 589 * @param Channel: The selected DAC channel.
<> 149:156823d33999 590 * This parameter can be one of the following values:
<> 149:156823d33999 591 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 592 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 593 * @retval HAL status
<> 149:156823d33999 594 */
<> 149:156823d33999 595 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
<> 149:156823d33999 596 {
<> 149:156823d33999 597 HAL_StatusTypeDef status = HAL_OK;
<> 149:156823d33999 598
<> 149:156823d33999 599 /* Check the parameters */
<> 149:156823d33999 600 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 601
<> 149:156823d33999 602 /* Disable the selected DAC channel DMA request */
<> 149:156823d33999 603 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel);
<> 149:156823d33999 604
<> 149:156823d33999 605 /* Disable the Peripharal */
<> 149:156823d33999 606 __HAL_DAC_DISABLE(hdac, Channel);
<> 149:156823d33999 607
<> 149:156823d33999 608 /* Disable the DMA Channel */
<> 149:156823d33999 609 /* Channel1 is used */
<> 149:156823d33999 610 if (Channel == DAC_CHANNEL_1)
<> 149:156823d33999 611 {
<> 149:156823d33999 612 status = HAL_DMA_Abort(hdac->DMA_Handle1);
<> 149:156823d33999 613 }
<> 149:156823d33999 614 else /* Channel2 is used for */
<> 149:156823d33999 615 {
<> 149:156823d33999 616 status = HAL_DMA_Abort(hdac->DMA_Handle2);
<> 149:156823d33999 617 }
<> 149:156823d33999 618
<> 149:156823d33999 619 /* Check if DMA Channel effectively disabled */
<> 149:156823d33999 620 if (status != HAL_OK)
<> 149:156823d33999 621 {
<> 149:156823d33999 622 /* Update ADC state machine to error */
<> 149:156823d33999 623 hdac->State = HAL_DAC_STATE_ERROR;
<> 149:156823d33999 624 }
<> 149:156823d33999 625 else
<> 149:156823d33999 626 {
<> 149:156823d33999 627 /* Change DAC state */
<> 149:156823d33999 628 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 629 }
<> 149:156823d33999 630
<> 149:156823d33999 631 /* Return function status */
<> 149:156823d33999 632 return status;
<> 149:156823d33999 633 }
<> 149:156823d33999 634
<> 149:156823d33999 635 /**
<> 149:156823d33999 636 * @brief Returns the last data output value of the selected DAC channel.
<> 149:156823d33999 637 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 638 * the configuration information for the specified DAC.
<> 149:156823d33999 639 * @param Channel: The selected DAC channel.
<> 149:156823d33999 640 * This parameter can be one of the following values:
<> 149:156823d33999 641 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 642 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 643 * @retval The selected DAC channel data output value.
<> 149:156823d33999 644 */
<> 149:156823d33999 645 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
<> 149:156823d33999 646 {
<> 149:156823d33999 647 /* Check the parameters */
<> 149:156823d33999 648 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 649
<> 149:156823d33999 650 /* Returns the DAC channel data output register value */
<> 149:156823d33999 651 if(Channel == DAC_CHANNEL_1)
<> 149:156823d33999 652 {
<> 149:156823d33999 653 return hdac->Instance->DOR1;
<> 149:156823d33999 654 }
<> 149:156823d33999 655 else
<> 149:156823d33999 656 {
<> 149:156823d33999 657 return hdac->Instance->DOR2;
<> 149:156823d33999 658 }
<> 149:156823d33999 659 }
<> 149:156823d33999 660
<> 149:156823d33999 661 /**
<> 149:156823d33999 662 * @brief Handles DAC interrupt request
<> 149:156823d33999 663 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 664 * the configuration information for the specified DAC.
<> 149:156823d33999 665 * @retval None
<> 149:156823d33999 666 */
<> 149:156823d33999 667 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 668 {
<> 149:156823d33999 669 /* Check underrun flag of DAC channel 1 */
<> 149:156823d33999 670 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
<> 149:156823d33999 671 {
<> 149:156823d33999 672 /* Change DAC state to error state */
<> 149:156823d33999 673 hdac->State = HAL_DAC_STATE_ERROR;
<> 149:156823d33999 674
<> 149:156823d33999 675 /* Set DAC error code to chanel1 DMA underrun error */
<> 149:156823d33999 676 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
<> 149:156823d33999 677
<> 149:156823d33999 678 /* Clear the underrun flag */
<> 149:156823d33999 679 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
<> 149:156823d33999 680
<> 149:156823d33999 681 /* Disable the selected DAC channel1 DMA request */
<> 149:156823d33999 682 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
<> 149:156823d33999 683
<> 149:156823d33999 684 /* Error callback */
<> 149:156823d33999 685 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
<> 149:156823d33999 686 }
<> 149:156823d33999 687
<> 149:156823d33999 688 /* Check underrun flag of DAC channel 2 */
<> 149:156823d33999 689 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
<> 149:156823d33999 690 {
<> 149:156823d33999 691 /* Change DAC state to error state */
<> 149:156823d33999 692 hdac->State = HAL_DAC_STATE_ERROR;
<> 149:156823d33999 693
<> 149:156823d33999 694 /* Set DAC error code to channel2 DMA underrun error */
<> 149:156823d33999 695 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
<> 149:156823d33999 696
<> 149:156823d33999 697 /* Clear the underrun flag */
<> 149:156823d33999 698 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
<> 149:156823d33999 699
<> 149:156823d33999 700 /* Disable the selected DAC channel1 DMA request */
<> 149:156823d33999 701 hdac->Instance->CR &= ~DAC_CR_DMAEN2;
<> 149:156823d33999 702
<> 149:156823d33999 703 /* Error callback */
<> 149:156823d33999 704 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
<> 149:156823d33999 705 }
<> 149:156823d33999 706 }
<> 149:156823d33999 707
<> 149:156823d33999 708 /**
<> 149:156823d33999 709 * @brief Conversion complete callback in non blocking mode for Channel1
<> 149:156823d33999 710 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 711 * the configuration information for the specified DAC.
<> 149:156823d33999 712 * @retval None
<> 149:156823d33999 713 */
<> 149:156823d33999 714 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 715 {
<> 149:156823d33999 716 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 717 UNUSED(hdac);
<> 149:156823d33999 718
<> 149:156823d33999 719 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 720 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
<> 149:156823d33999 721 */
<> 149:156823d33999 722 }
<> 149:156823d33999 723
<> 149:156823d33999 724 /**
<> 149:156823d33999 725 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1
<> 149:156823d33999 726 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 727 * the configuration information for the specified DAC.
<> 149:156823d33999 728 * @retval None
<> 149:156823d33999 729 */
<> 149:156823d33999 730 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 731 {
<> 149:156823d33999 732 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 733 UNUSED(hdac);
<> 149:156823d33999 734
<> 149:156823d33999 735 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 736 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
<> 149:156823d33999 737 */
<> 149:156823d33999 738 }
<> 149:156823d33999 739
<> 149:156823d33999 740 /**
<> 149:156823d33999 741 * @brief Error DAC callback for Channel1.
<> 149:156823d33999 742 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 743 * the configuration information for the specified DAC.
<> 149:156823d33999 744 * @retval None
<> 149:156823d33999 745 */
<> 149:156823d33999 746 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
<> 149:156823d33999 747 {
<> 149:156823d33999 748 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 749 UNUSED(hdac);
<> 149:156823d33999 750
<> 149:156823d33999 751 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 752 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
<> 149:156823d33999 753 */
<> 149:156823d33999 754 }
<> 149:156823d33999 755
<> 149:156823d33999 756 /**
<> 149:156823d33999 757 * @brief DMA underrun DAC callback for channel1.
<> 149:156823d33999 758 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 759 * the configuration information for the specified DAC.
<> 149:156823d33999 760 * @retval None
<> 149:156823d33999 761 */
<> 149:156823d33999 762 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
<> 149:156823d33999 763 {
<> 149:156823d33999 764 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 765 UNUSED(hdac);
<> 149:156823d33999 766
<> 149:156823d33999 767 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 768 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
<> 149:156823d33999 769 */
<> 149:156823d33999 770 }
<> 149:156823d33999 771
<> 149:156823d33999 772 /**
<> 149:156823d33999 773 * @}
<> 149:156823d33999 774 */
<> 149:156823d33999 775
<> 149:156823d33999 776 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
<> 149:156823d33999 777 * @brief Peripheral Control functions
<> 149:156823d33999 778 *
<> 149:156823d33999 779 @verbatim
<> 149:156823d33999 780 ==============================================================================
<> 149:156823d33999 781 ##### Peripheral Control functions #####
<> 149:156823d33999 782 ==============================================================================
<> 149:156823d33999 783 [..] This section provides functions allowing to:
<> 149:156823d33999 784 (+) Configure channels.
<> 149:156823d33999 785 (+) Set the specified data holding register value for DAC channel.
<> 149:156823d33999 786
<> 149:156823d33999 787 @endverbatim
<> 149:156823d33999 788 * @{
<> 149:156823d33999 789 */
<> 149:156823d33999 790
<> 149:156823d33999 791 /**
<> 149:156823d33999 792 * @brief Configures the selected DAC channel.
<> 149:156823d33999 793 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 794 * the configuration information for the specified DAC.
<> 149:156823d33999 795 * @param sConfig: DAC configuration structure.
<> 149:156823d33999 796 * @param Channel: The selected DAC channel.
<> 149:156823d33999 797 * This parameter can be one of the following values:
<> 149:156823d33999 798 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 799 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 800 * @retval HAL status
<> 149:156823d33999 801 */
<> 149:156823d33999 802 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
<> 149:156823d33999 803 {
<> 149:156823d33999 804 uint32_t tmpreg1 = 0;
<> 149:156823d33999 805
<> 149:156823d33999 806 /* Check the DAC parameters */
<> 149:156823d33999 807 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
<> 149:156823d33999 808 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
<> 149:156823d33999 809 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 810
<> 149:156823d33999 811 /* Process locked */
<> 149:156823d33999 812 __HAL_LOCK(hdac);
<> 149:156823d33999 813
<> 149:156823d33999 814 /* Change DAC state */
<> 149:156823d33999 815 hdac->State = HAL_DAC_STATE_BUSY;
<> 149:156823d33999 816
<> 149:156823d33999 817 /* Configure for the selected DAC channel: buffer output, trigger */
<> 149:156823d33999 818 /* Set TSELx and TENx bits according to DAC_Trigger value */
<> 149:156823d33999 819 /* Set BOFFx bit according to DAC_OutputBuffer value */
<> 149:156823d33999 820 SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer));
<> 149:156823d33999 821
<> 149:156823d33999 822 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
<> 149:156823d33999 823 /* Calculate CR register value depending on DAC_Channel */
<> 149:156823d33999 824 MODIFY_REG(hdac->Instance->CR,
<> 149:156823d33999 825 ((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel,
<> 149:156823d33999 826 tmpreg1 << Channel);
<> 149:156823d33999 827
<> 149:156823d33999 828 /* Disable wave generation */
<> 149:156823d33999 829 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
<> 149:156823d33999 830
<> 149:156823d33999 831 /* Change DAC state */
<> 149:156823d33999 832 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 833
<> 149:156823d33999 834 /* Process unlocked */
<> 149:156823d33999 835 __HAL_UNLOCK(hdac);
<> 149:156823d33999 836
<> 149:156823d33999 837 /* Return function status */
<> 149:156823d33999 838 return HAL_OK;
<> 149:156823d33999 839 }
<> 149:156823d33999 840
<> 149:156823d33999 841 /**
<> 149:156823d33999 842 * @brief Set the specified data holding register value for DAC channel.
<> 149:156823d33999 843 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 844 * the configuration information for the specified DAC.
<> 149:156823d33999 845 * @param Channel: The selected DAC channel.
<> 149:156823d33999 846 * This parameter can be one of the following values:
<> 149:156823d33999 847 * @arg DAC_CHANNEL_1: DAC Channel1 selected
<> 149:156823d33999 848 * @arg DAC_CHANNEL_2: DAC Channel2 selected
<> 149:156823d33999 849 * @param Alignment: Specifies the data alignment.
<> 149:156823d33999 850 * This parameter can be one of the following values:
<> 149:156823d33999 851 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
<> 149:156823d33999 852 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
<> 149:156823d33999 853 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
<> 149:156823d33999 854 * @param Data: Data to be loaded in the selected data holding register.
<> 149:156823d33999 855 * @retval HAL status
<> 149:156823d33999 856 */
<> 149:156823d33999 857 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
<> 149:156823d33999 858 {
<> 149:156823d33999 859 __IO uint32_t tmp = 0;
<> 149:156823d33999 860
<> 149:156823d33999 861 /* Check the parameters */
<> 149:156823d33999 862 assert_param(IS_DAC_CHANNEL(Channel));
<> 149:156823d33999 863 assert_param(IS_DAC_ALIGN(Alignment));
<> 149:156823d33999 864 assert_param(IS_DAC_DATA(Data));
<> 149:156823d33999 865
<> 149:156823d33999 866 tmp = (uint32_t)hdac->Instance;
<> 149:156823d33999 867 if(Channel == DAC_CHANNEL_1)
<> 149:156823d33999 868 {
<> 149:156823d33999 869 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
<> 149:156823d33999 870 }
<> 149:156823d33999 871 else
<> 149:156823d33999 872 {
<> 149:156823d33999 873 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
<> 149:156823d33999 874 }
<> 149:156823d33999 875
<> 149:156823d33999 876 /* Set the DAC channel selected data holding register */
<> 149:156823d33999 877 *(__IO uint32_t *) tmp = Data;
<> 149:156823d33999 878
<> 149:156823d33999 879 /* Return function status */
<> 149:156823d33999 880 return HAL_OK;
<> 149:156823d33999 881 }
<> 149:156823d33999 882
<> 149:156823d33999 883 /**
<> 149:156823d33999 884 * @}
<> 149:156823d33999 885 */
<> 149:156823d33999 886
<> 149:156823d33999 887 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
<> 149:156823d33999 888 * @brief Peripheral State and Errors functions
<> 149:156823d33999 889 *
<> 149:156823d33999 890 @verbatim
<> 149:156823d33999 891 ==============================================================================
<> 149:156823d33999 892 ##### Peripheral State and Errors functions #####
<> 149:156823d33999 893 ==============================================================================
<> 149:156823d33999 894 [..]
<> 149:156823d33999 895 This subsection provides functions allowing to
<> 149:156823d33999 896 (+) Check the DAC state.
<> 149:156823d33999 897 (+) Check the DAC Errors.
<> 149:156823d33999 898
<> 149:156823d33999 899 @endverbatim
<> 149:156823d33999 900 * @{
<> 149:156823d33999 901 */
<> 149:156823d33999 902
<> 149:156823d33999 903 /**
<> 149:156823d33999 904 * @brief return the DAC state
<> 149:156823d33999 905 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 906 * the configuration information for the specified DAC.
<> 149:156823d33999 907 * @retval HAL state
<> 149:156823d33999 908 */
<> 149:156823d33999 909 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
<> 149:156823d33999 910 {
<> 149:156823d33999 911 /* Return DAC state */
<> 149:156823d33999 912 return hdac->State;
<> 149:156823d33999 913 }
<> 149:156823d33999 914
<> 149:156823d33999 915
<> 149:156823d33999 916 /**
<> 149:156823d33999 917 * @brief Return the DAC error code
<> 149:156823d33999 918 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
<> 149:156823d33999 919 * the configuration information for the specified DAC.
<> 149:156823d33999 920 * @retval DAC Error Code
<> 149:156823d33999 921 */
<> 149:156823d33999 922 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
<> 149:156823d33999 923 {
<> 149:156823d33999 924 return hdac->ErrorCode;
<> 149:156823d33999 925 }
<> 149:156823d33999 926
<> 149:156823d33999 927 /**
<> 149:156823d33999 928 * @}
<> 149:156823d33999 929 */
<> 149:156823d33999 930
<> 149:156823d33999 931 /**
<> 149:156823d33999 932 * @}
<> 149:156823d33999 933 */
<> 149:156823d33999 934
<> 149:156823d33999 935 /** @addtogroup DAC_Private_Functions
<> 149:156823d33999 936 * @{
<> 149:156823d33999 937 */
<> 149:156823d33999 938
<> 149:156823d33999 939 /**
<> 149:156823d33999 940 * @brief DMA conversion complete callback.
<> 149:156823d33999 941 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 149:156823d33999 942 * the configuration information for the specified DMA module.
<> 149:156823d33999 943 * @retval None
<> 149:156823d33999 944 */
<> 149:156823d33999 945 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 946 {
<> 149:156823d33999 947 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 149:156823d33999 948
<> 149:156823d33999 949 HAL_DAC_ConvCpltCallbackCh1(hdac);
<> 149:156823d33999 950
<> 149:156823d33999 951 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 952 }
<> 149:156823d33999 953
<> 149:156823d33999 954 /**
<> 149:156823d33999 955 * @brief DMA half transfer complete callback.
<> 149:156823d33999 956 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 149:156823d33999 957 * the configuration information for the specified DMA module.
<> 149:156823d33999 958 * @retval None
<> 149:156823d33999 959 */
<> 149:156823d33999 960 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 961 {
<> 149:156823d33999 962 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 149:156823d33999 963 /* Conversion complete callback */
<> 149:156823d33999 964 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
<> 149:156823d33999 965 }
<> 149:156823d33999 966
<> 149:156823d33999 967 /**
<> 149:156823d33999 968 * @brief DMA error callback
<> 149:156823d33999 969 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 149:156823d33999 970 * the configuration information for the specified DMA module.
<> 149:156823d33999 971 * @retval None
<> 149:156823d33999 972 */
<> 149:156823d33999 973 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 974 {
<> 149:156823d33999 975 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 149:156823d33999 976
<> 149:156823d33999 977 /* Set DAC error code to DMA error */
<> 149:156823d33999 978 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
<> 149:156823d33999 979
<> 149:156823d33999 980 HAL_DAC_ErrorCallbackCh1(hdac);
<> 149:156823d33999 981
<> 149:156823d33999 982 hdac->State = HAL_DAC_STATE_READY;
<> 149:156823d33999 983 }
<> 149:156823d33999 984
<> 149:156823d33999 985 /**
<> 149:156823d33999 986 * @}
<> 149:156823d33999 987 */
<> 149:156823d33999 988
<> 149:156823d33999 989 #endif /* HAL_DAC_MODULE_ENABLED */
<> 149:156823d33999 990
<> 149:156823d33999 991 /**
<> 149:156823d33999 992 * @}
<> 149:156823d33999 993 */
<> 149:156823d33999 994
<> 149:156823d33999 995 /**
<> 149:156823d33999 996 * @}
<> 149:156823d33999 997 */
<> 149:156823d33999 998
<> 149:156823d33999 999 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/