mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_rtc_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 180:96ed750bd169
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f0xx_hal_rtc_ex.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @brief Extended RTC HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 6 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 7 | * functionalities of the Real Time Clock (RTC) Extended peripheral: |
<> | 144:ef7eb2e8f9f7 | 8 | * + RTC Time Stamp functions |
<> | 144:ef7eb2e8f9f7 | 9 | * + RTC Tamper functions |
<> | 144:ef7eb2e8f9f7 | 10 | * + RTC Wake-up functions |
<> | 144:ef7eb2e8f9f7 | 11 | * + Extended Control functions |
<> | 144:ef7eb2e8f9f7 | 12 | * + Extended RTC features functions |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 15 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 16 | ##### How to use this driver ##### |
<> | 144:ef7eb2e8f9f7 | 17 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 18 | [..] |
<> | 144:ef7eb2e8f9f7 | 19 | (+) Enable the RTC domain access. |
<> | 144:ef7eb2e8f9f7 | 20 | (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour |
<> | 144:ef7eb2e8f9f7 | 21 | format using the HAL_RTC_Init() function. |
<> | 144:ef7eb2e8f9f7 | 22 | |
<> | 144:ef7eb2e8f9f7 | 23 | *** RTC Wake-up configuration *** |
<> | 144:ef7eb2e8f9f7 | 24 | ================================ |
<> | 144:ef7eb2e8f9f7 | 25 | [..] |
<> | 144:ef7eb2e8f9f7 | 26 | (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer() |
<> | 144:ef7eb2e8f9f7 | 27 | function. You can also configure the RTC Wakeup timer with interrupt mode |
<> | 144:ef7eb2e8f9f7 | 28 | using the HAL_RTCEx_SetWakeUpTimer_IT() function. |
<> | 144:ef7eb2e8f9f7 | 29 | (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer() |
<> | 144:ef7eb2e8f9f7 | 30 | function. |
<> | 144:ef7eb2e8f9f7 | 31 | (@) Not available on F030x4/x6/x8 and F070x6 |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | *** TimeStamp configuration *** |
<> | 144:ef7eb2e8f9f7 | 34 | =============================== |
<> | 144:ef7eb2e8f9f7 | 35 | [..] |
<> | 144:ef7eb2e8f9f7 | 36 | (+) Configure the RTC_AF trigger and enable the RTC TimeStamp using the |
<> | 144:ef7eb2e8f9f7 | 37 | HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with |
<> | 144:ef7eb2e8f9f7 | 38 | interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function. |
<> | 144:ef7eb2e8f9f7 | 39 | (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() |
<> | 144:ef7eb2e8f9f7 | 40 | function. |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | *** Tamper configuration *** |
<> | 144:ef7eb2e8f9f7 | 43 | ============================ |
<> | 144:ef7eb2e8f9f7 | 44 | [..] |
<> | 144:ef7eb2e8f9f7 | 45 | (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge |
<> | 144:ef7eb2e8f9f7 | 46 | or Level according to the Tamper filter (if equal to 0 Edge else Level) |
<> | 144:ef7eb2e8f9f7 | 47 | value, sampling frequency, precharge or discharge and Pull-UP using the |
<> | 144:ef7eb2e8f9f7 | 48 | HAL_RTCEx_SetTamper() function. You can configure RTC Tamper in interrupt |
<> | 144:ef7eb2e8f9f7 | 49 | mode using HAL_RTCEx_SetTamper_IT() function. |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | *** Backup Data Registers configuration *** |
<> | 144:ef7eb2e8f9f7 | 52 | =========================================== |
<> | 144:ef7eb2e8f9f7 | 53 | [..] |
<> | 144:ef7eb2e8f9f7 | 54 | (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite() |
<> | 144:ef7eb2e8f9f7 | 55 | function. |
<> | 144:ef7eb2e8f9f7 | 56 | (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead() |
<> | 144:ef7eb2e8f9f7 | 57 | function. |
<> | 144:ef7eb2e8f9f7 | 58 | (@) Not available on F030x6/x8/xC and F070x6/xB (F0xx Value Line devices) |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 62 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 63 | * @attention |
<> | 144:ef7eb2e8f9f7 | 64 | * |
<> | 144:ef7eb2e8f9f7 | 65 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 66 | * |
<> | 144:ef7eb2e8f9f7 | 67 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 68 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 69 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 70 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 71 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 72 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 73 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 74 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 75 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 76 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 77 | * |
<> | 144:ef7eb2e8f9f7 | 78 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 79 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 80 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 81 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 82 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 83 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 84 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 85 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 86 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 87 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 88 | * |
<> | 144:ef7eb2e8f9f7 | 89 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 90 | */ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 93 | #include "stm32f0xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 94 | |
<> | 144:ef7eb2e8f9f7 | 95 | /** @addtogroup STM32F0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 96 | * @{ |
<> | 144:ef7eb2e8f9f7 | 97 | */ |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | /** @addtogroup RTCEx |
<> | 144:ef7eb2e8f9f7 | 102 | * @brief RTC Extended HAL module driver |
<> | 144:ef7eb2e8f9f7 | 103 | * @{ |
<> | 144:ef7eb2e8f9f7 | 104 | */ |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | #ifdef HAL_RTC_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 107 | |
<> | 144:ef7eb2e8f9f7 | 108 | /* Private typedef -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 109 | /* Private define ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 110 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 111 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 112 | /* Private function prototypes -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 113 | /* Exported functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | /** @addtogroup RTCEx_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 116 | * @{ |
<> | 144:ef7eb2e8f9f7 | 117 | */ |
<> | 144:ef7eb2e8f9f7 | 118 | |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | /** @addtogroup RTCEx_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 121 | * @brief RTC TimeStamp and Tamper functions |
<> | 144:ef7eb2e8f9f7 | 122 | * |
<> | 144:ef7eb2e8f9f7 | 123 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 124 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 125 | ##### RTC TimeStamp and Tamper functions ##### |
<> | 144:ef7eb2e8f9f7 | 126 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 127 | |
<> | 144:ef7eb2e8f9f7 | 128 | [..] This section provides functions allowing to configure TimeStamp feature |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 131 | * @{ |
<> | 144:ef7eb2e8f9f7 | 132 | */ |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | /** |
<> | 144:ef7eb2e8f9f7 | 135 | * @brief Set TimeStamp. |
<> | 144:ef7eb2e8f9f7 | 136 | * @note This API must be called before enabling the TimeStamp feature. |
Anna Bridge |
180:96ed750bd169 | 137 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 138 | * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is |
<> | 144:ef7eb2e8f9f7 | 139 | * activated. |
<> | 144:ef7eb2e8f9f7 | 140 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 141 | * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the |
<> | 144:ef7eb2e8f9f7 | 142 | * rising edge of the related pin. |
<> | 144:ef7eb2e8f9f7 | 143 | * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the |
<> | 144:ef7eb2e8f9f7 | 144 | * falling edge of the related pin. |
Anna Bridge |
180:96ed750bd169 | 145 | * @param RTC_TimeStampPin specifies the RTC TimeStamp Pin. |
<> | 144:ef7eb2e8f9f7 | 146 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 147 | * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. |
<> | 144:ef7eb2e8f9f7 | 148 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 149 | */ |
<> | 144:ef7eb2e8f9f7 | 150 | HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) |
<> | 144:ef7eb2e8f9f7 | 151 | { |
<> | 156:95d6b41a828b | 152 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 153 | |
<> | 144:ef7eb2e8f9f7 | 154 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 155 | assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); |
<> | 144:ef7eb2e8f9f7 | 156 | assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); |
<> | 144:ef7eb2e8f9f7 | 157 | |
<> | 144:ef7eb2e8f9f7 | 158 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 159 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 162 | |
<> | 144:ef7eb2e8f9f7 | 163 | /* Get the RTC_CR register and clear the bits to be configured */ |
<> | 144:ef7eb2e8f9f7 | 164 | tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); |
<> | 144:ef7eb2e8f9f7 | 165 | |
<> | 144:ef7eb2e8f9f7 | 166 | tmpreg|= TimeStampEdge; |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 169 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 170 | |
<> | 144:ef7eb2e8f9f7 | 171 | /* Configure the Time Stamp TSEDGE and Enable bits */ |
<> | 144:ef7eb2e8f9f7 | 172 | hrtc->Instance->CR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 173 | |
<> | 144:ef7eb2e8f9f7 | 174 | __HAL_RTC_TIMESTAMP_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 177 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 178 | |
<> | 144:ef7eb2e8f9f7 | 179 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 180 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 183 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 186 | } |
<> | 144:ef7eb2e8f9f7 | 187 | |
<> | 144:ef7eb2e8f9f7 | 188 | /** |
<> | 144:ef7eb2e8f9f7 | 189 | * @brief Set TimeStamp with Interrupt. |
Anna Bridge |
180:96ed750bd169 | 190 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 191 | * @note This API must be called before enabling the TimeStamp feature. |
Anna Bridge |
180:96ed750bd169 | 192 | * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is |
<> | 144:ef7eb2e8f9f7 | 193 | * activated. |
<> | 144:ef7eb2e8f9f7 | 194 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 195 | * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the |
<> | 144:ef7eb2e8f9f7 | 196 | * rising edge of the related pin. |
<> | 144:ef7eb2e8f9f7 | 197 | * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the |
<> | 144:ef7eb2e8f9f7 | 198 | * falling edge of the related pin. |
Anna Bridge |
180:96ed750bd169 | 199 | * @param RTC_TimeStampPin Specifies the RTC TimeStamp Pin. |
<> | 144:ef7eb2e8f9f7 | 200 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 201 | * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. |
<> | 144:ef7eb2e8f9f7 | 202 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 203 | */ |
<> | 144:ef7eb2e8f9f7 | 204 | HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) |
<> | 144:ef7eb2e8f9f7 | 205 | { |
<> | 156:95d6b41a828b | 206 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 209 | assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); |
<> | 144:ef7eb2e8f9f7 | 210 | assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 213 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 216 | |
<> | 144:ef7eb2e8f9f7 | 217 | /* Get the RTC_CR register and clear the bits to be configured */ |
<> | 144:ef7eb2e8f9f7 | 218 | tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); |
<> | 144:ef7eb2e8f9f7 | 219 | |
<> | 144:ef7eb2e8f9f7 | 220 | tmpreg |= TimeStampEdge; |
<> | 144:ef7eb2e8f9f7 | 221 | |
<> | 144:ef7eb2e8f9f7 | 222 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 223 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 224 | |
<> | 144:ef7eb2e8f9f7 | 225 | /* Configure the Time Stamp TSEDGE and Enable bits */ |
<> | 144:ef7eb2e8f9f7 | 226 | hrtc->Instance->CR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | __HAL_RTC_TIMESTAMP_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | /* Enable IT timestamp */ |
<> | 144:ef7eb2e8f9f7 | 231 | __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS); |
<> | 144:ef7eb2e8f9f7 | 232 | |
<> | 144:ef7eb2e8f9f7 | 233 | /* RTC timestamp Interrupt Configuration: EXTI configuration */ |
<> | 144:ef7eb2e8f9f7 | 234 | __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); |
<> | 144:ef7eb2e8f9f7 | 235 | |
<> | 144:ef7eb2e8f9f7 | 236 | __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 239 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 240 | |
<> | 144:ef7eb2e8f9f7 | 241 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 244 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 245 | |
<> | 144:ef7eb2e8f9f7 | 246 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 247 | } |
<> | 144:ef7eb2e8f9f7 | 248 | |
<> | 144:ef7eb2e8f9f7 | 249 | /** |
<> | 144:ef7eb2e8f9f7 | 250 | * @brief Deactivate TimeStamp. |
Anna Bridge |
180:96ed750bd169 | 251 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 252 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 253 | */ |
<> | 144:ef7eb2e8f9f7 | 254 | HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 255 | { |
<> | 156:95d6b41a828b | 256 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 257 | |
<> | 144:ef7eb2e8f9f7 | 258 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 259 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 260 | |
<> | 144:ef7eb2e8f9f7 | 261 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 262 | |
<> | 144:ef7eb2e8f9f7 | 263 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 264 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 265 | |
<> | 144:ef7eb2e8f9f7 | 266 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 267 | __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); |
<> | 144:ef7eb2e8f9f7 | 268 | |
<> | 144:ef7eb2e8f9f7 | 269 | /* Get the RTC_CR register and clear the bits to be configured */ |
<> | 144:ef7eb2e8f9f7 | 270 | tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); |
<> | 144:ef7eb2e8f9f7 | 271 | |
<> | 144:ef7eb2e8f9f7 | 272 | /* Configure the Time Stamp TSEDGE and Enable bits */ |
<> | 144:ef7eb2e8f9f7 | 273 | hrtc->Instance->CR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 274 | |
<> | 144:ef7eb2e8f9f7 | 275 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 276 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 277 | |
<> | 144:ef7eb2e8f9f7 | 278 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 279 | |
<> | 144:ef7eb2e8f9f7 | 280 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 281 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 284 | } |
<> | 144:ef7eb2e8f9f7 | 285 | |
<> | 144:ef7eb2e8f9f7 | 286 | /** |
<> | 144:ef7eb2e8f9f7 | 287 | * @brief Get the RTC TimeStamp value. |
Anna Bridge |
180:96ed750bd169 | 288 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 289 | |
Anna Bridge |
180:96ed750bd169 | 290 | * @param sTimeStamp Pointer to Time structure |
Anna Bridge |
180:96ed750bd169 | 291 | * @param sTimeStampDate Pointer to Date structure |
Anna Bridge |
180:96ed750bd169 | 292 | * @param Format specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 293 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 294 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 295 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 296 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 297 | */ |
<> | 144:ef7eb2e8f9f7 | 298 | HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 299 | { |
<> | 156:95d6b41a828b | 300 | uint32_t tmptime = 0U, tmpdate = 0U; |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 303 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 304 | |
<> | 144:ef7eb2e8f9f7 | 305 | /* Get the TimeStamp time and date registers values */ |
<> | 144:ef7eb2e8f9f7 | 306 | tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 307 | tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 308 | |
<> | 144:ef7eb2e8f9f7 | 309 | /* Fill the Time structure fields with the read parameters */ |
<> | 156:95d6b41a828b | 310 | sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U); |
<> | 156:95d6b41a828b | 311 | sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 312 | sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU)); |
<> | 156:95d6b41a828b | 313 | sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 314 | sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR; |
<> | 144:ef7eb2e8f9f7 | 315 | |
<> | 144:ef7eb2e8f9f7 | 316 | /* Fill the Date structure fields with the read parameters */ |
<> | 144:ef7eb2e8f9f7 | 317 | sTimeStampDate->Year = 0; |
<> | 156:95d6b41a828b | 318 | sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 319 | sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU)); |
<> | 156:95d6b41a828b | 320 | sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U); |
<> | 144:ef7eb2e8f9f7 | 321 | |
<> | 144:ef7eb2e8f9f7 | 322 | /* Check the input parameters format */ |
<> | 144:ef7eb2e8f9f7 | 323 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 324 | { |
<> | 144:ef7eb2e8f9f7 | 325 | /* Convert the TimeStamp structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 326 | sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours); |
<> | 144:ef7eb2e8f9f7 | 327 | sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes); |
<> | 144:ef7eb2e8f9f7 | 328 | sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds); |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | /* Convert the DateTimeStamp structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 331 | sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month); |
<> | 144:ef7eb2e8f9f7 | 332 | sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date); |
<> | 144:ef7eb2e8f9f7 | 333 | sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay); |
<> | 144:ef7eb2e8f9f7 | 334 | } |
<> | 144:ef7eb2e8f9f7 | 335 | |
<> | 144:ef7eb2e8f9f7 | 336 | /* Clear the TIMESTAMP Flag */ |
<> | 144:ef7eb2e8f9f7 | 337 | __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); |
<> | 144:ef7eb2e8f9f7 | 338 | |
<> | 144:ef7eb2e8f9f7 | 339 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 340 | } |
<> | 144:ef7eb2e8f9f7 | 341 | |
<> | 144:ef7eb2e8f9f7 | 342 | /** |
<> | 144:ef7eb2e8f9f7 | 343 | * @brief Set Tamper |
<> | 144:ef7eb2e8f9f7 | 344 | * @note By calling this API we disable the tamper interrupt for all tampers. |
Anna Bridge |
180:96ed750bd169 | 345 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 346 | * @param sTamper Pointer to Tamper Structure. |
<> | 144:ef7eb2e8f9f7 | 347 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 348 | */ |
<> | 144:ef7eb2e8f9f7 | 349 | HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) |
<> | 144:ef7eb2e8f9f7 | 350 | { |
<> | 156:95d6b41a828b | 351 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 352 | |
<> | 144:ef7eb2e8f9f7 | 353 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 354 | assert_param(IS_RTC_TAMPER(sTamper->Tamper)); |
<> | 144:ef7eb2e8f9f7 | 355 | assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); |
<> | 144:ef7eb2e8f9f7 | 356 | assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); |
<> | 144:ef7eb2e8f9f7 | 357 | assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); |
<> | 144:ef7eb2e8f9f7 | 358 | assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); |
<> | 144:ef7eb2e8f9f7 | 359 | assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); |
<> | 144:ef7eb2e8f9f7 | 360 | assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); |
<> | 144:ef7eb2e8f9f7 | 361 | |
<> | 144:ef7eb2e8f9f7 | 362 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 363 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 364 | |
<> | 144:ef7eb2e8f9f7 | 365 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 366 | |
<> | 144:ef7eb2e8f9f7 | 367 | if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) |
<> | 144:ef7eb2e8f9f7 | 368 | { |
<> | 156:95d6b41a828b | 369 | sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U); |
<> | 144:ef7eb2e8f9f7 | 370 | } |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->Filter |\ |
<> | 144:ef7eb2e8f9f7 | 373 | (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\ |
<> | 144:ef7eb2e8f9f7 | 374 | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); |
<> | 144:ef7eb2e8f9f7 | 375 | |
<> | 156:95d6b41a828b | 376 | hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\ |
<> | 144:ef7eb2e8f9f7 | 377 | (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\ |
<> | 144:ef7eb2e8f9f7 | 378 | (uint32_t)RTC_TAFCR_TAMPPUDIS | (uint32_t)RTC_TAFCR_TAMPIE); |
<> | 144:ef7eb2e8f9f7 | 379 | |
<> | 144:ef7eb2e8f9f7 | 380 | hrtc->Instance->TAFCR |= tmpreg; |
<> | 144:ef7eb2e8f9f7 | 381 | |
<> | 144:ef7eb2e8f9f7 | 382 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 383 | |
<> | 144:ef7eb2e8f9f7 | 384 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 385 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 386 | |
<> | 144:ef7eb2e8f9f7 | 387 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 388 | } |
<> | 144:ef7eb2e8f9f7 | 389 | |
<> | 144:ef7eb2e8f9f7 | 390 | /** |
<> | 144:ef7eb2e8f9f7 | 391 | * @brief Sets Tamper with interrupt. |
<> | 144:ef7eb2e8f9f7 | 392 | * @note By calling this API we force the tamper interrupt for all tampers. |
Anna Bridge |
180:96ed750bd169 | 393 | * @param hrtc pointer to a RTC_HandleTypeDef structure that contains |
<> | 144:ef7eb2e8f9f7 | 394 | * the configuration information for RTC. |
Anna Bridge |
180:96ed750bd169 | 395 | * @param sTamper Pointer to RTC Tamper. |
<> | 144:ef7eb2e8f9f7 | 396 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 397 | */ |
<> | 144:ef7eb2e8f9f7 | 398 | HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) |
<> | 144:ef7eb2e8f9f7 | 399 | { |
<> | 156:95d6b41a828b | 400 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 401 | |
<> | 144:ef7eb2e8f9f7 | 402 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 403 | assert_param(IS_RTC_TAMPER(sTamper->Tamper)); |
<> | 144:ef7eb2e8f9f7 | 404 | assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); |
<> | 144:ef7eb2e8f9f7 | 405 | assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); |
<> | 144:ef7eb2e8f9f7 | 406 | assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); |
<> | 144:ef7eb2e8f9f7 | 407 | assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); |
<> | 144:ef7eb2e8f9f7 | 408 | assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); |
<> | 144:ef7eb2e8f9f7 | 409 | assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 412 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 413 | |
<> | 144:ef7eb2e8f9f7 | 414 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 415 | |
<> | 144:ef7eb2e8f9f7 | 416 | /* Configure the tamper trigger */ |
<> | 144:ef7eb2e8f9f7 | 417 | if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) |
<> | 144:ef7eb2e8f9f7 | 418 | { |
<> | 156:95d6b41a828b | 419 | sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U); |
<> | 144:ef7eb2e8f9f7 | 420 | } |
<> | 144:ef7eb2e8f9f7 | 421 | |
<> | 144:ef7eb2e8f9f7 | 422 | tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->Filter |\ |
<> | 144:ef7eb2e8f9f7 | 423 | (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\ |
<> | 144:ef7eb2e8f9f7 | 424 | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); |
<> | 144:ef7eb2e8f9f7 | 425 | |
<> | 156:95d6b41a828b | 426 | hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\ |
<> | 144:ef7eb2e8f9f7 | 427 | (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\ |
<> | 144:ef7eb2e8f9f7 | 428 | (uint32_t)RTC_TAFCR_TAMPPUDIS); |
<> | 144:ef7eb2e8f9f7 | 429 | |
<> | 144:ef7eb2e8f9f7 | 430 | hrtc->Instance->TAFCR |= tmpreg; |
<> | 144:ef7eb2e8f9f7 | 431 | |
<> | 144:ef7eb2e8f9f7 | 432 | /* Configure the Tamper Interrupt in the RTC_TAFCR */ |
<> | 144:ef7eb2e8f9f7 | 433 | hrtc->Instance->TAFCR |= (uint32_t)RTC_TAFCR_TAMPIE; |
<> | 144:ef7eb2e8f9f7 | 434 | |
<> | 144:ef7eb2e8f9f7 | 435 | /* RTC Tamper Interrupt Configuration: EXTI configuration */ |
<> | 144:ef7eb2e8f9f7 | 436 | __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); |
<> | 144:ef7eb2e8f9f7 | 437 | |
<> | 144:ef7eb2e8f9f7 | 438 | __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); |
<> | 144:ef7eb2e8f9f7 | 439 | |
<> | 144:ef7eb2e8f9f7 | 440 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 441 | |
<> | 144:ef7eb2e8f9f7 | 442 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 443 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 444 | |
<> | 144:ef7eb2e8f9f7 | 445 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 446 | } |
<> | 144:ef7eb2e8f9f7 | 447 | |
<> | 144:ef7eb2e8f9f7 | 448 | /** |
<> | 144:ef7eb2e8f9f7 | 449 | * @brief Deactivate Tamper. |
Anna Bridge |
180:96ed750bd169 | 450 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 451 | * @param Tamper Selected tamper pin. |
<> | 144:ef7eb2e8f9f7 | 452 | * This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3. |
<> | 144:ef7eb2e8f9f7 | 453 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 454 | */ |
<> | 144:ef7eb2e8f9f7 | 455 | HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) |
<> | 144:ef7eb2e8f9f7 | 456 | { |
<> | 144:ef7eb2e8f9f7 | 457 | assert_param(IS_RTC_TAMPER(Tamper)); |
<> | 144:ef7eb2e8f9f7 | 458 | |
<> | 144:ef7eb2e8f9f7 | 459 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 460 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 461 | |
<> | 144:ef7eb2e8f9f7 | 462 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 463 | |
<> | 144:ef7eb2e8f9f7 | 464 | /* Disable the selected Tamper pin */ |
<> | 144:ef7eb2e8f9f7 | 465 | hrtc->Instance->TAFCR &= (uint32_t)~Tamper; |
<> | 144:ef7eb2e8f9f7 | 466 | |
<> | 144:ef7eb2e8f9f7 | 467 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 468 | |
<> | 144:ef7eb2e8f9f7 | 469 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 470 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 471 | |
<> | 144:ef7eb2e8f9f7 | 472 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 473 | } |
<> | 144:ef7eb2e8f9f7 | 474 | |
<> | 144:ef7eb2e8f9f7 | 475 | /** |
<> | 144:ef7eb2e8f9f7 | 476 | * @brief Handle TimeStamp interrupt request. |
Anna Bridge |
180:96ed750bd169 | 477 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 478 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 479 | */ |
<> | 144:ef7eb2e8f9f7 | 480 | void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 481 | { |
<> | 144:ef7eb2e8f9f7 | 482 | /* Get the TimeStamp interrupt source enable status */ |
<> | 144:ef7eb2e8f9f7 | 483 | if(__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET) |
<> | 144:ef7eb2e8f9f7 | 484 | { |
<> | 144:ef7eb2e8f9f7 | 485 | /* Get the pending status of the TIMESTAMP Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 486 | if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 487 | { |
<> | 144:ef7eb2e8f9f7 | 488 | /* TIMESTAMP callback */ |
<> | 144:ef7eb2e8f9f7 | 489 | HAL_RTCEx_TimeStampEventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 490 | |
<> | 144:ef7eb2e8f9f7 | 491 | /* Clear the TIMESTAMP interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 492 | __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); |
<> | 144:ef7eb2e8f9f7 | 493 | } |
<> | 144:ef7eb2e8f9f7 | 494 | } |
<> | 144:ef7eb2e8f9f7 | 495 | |
<> | 144:ef7eb2e8f9f7 | 496 | /* Get the Tamper interrupts source enable status */ |
<> | 144:ef7eb2e8f9f7 | 497 | if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP)) |
<> | 144:ef7eb2e8f9f7 | 498 | { |
<> | 144:ef7eb2e8f9f7 | 499 | /* Get the pending status of the Tamper1 Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 500 | if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET) |
<> | 144:ef7eb2e8f9f7 | 501 | { |
<> | 144:ef7eb2e8f9f7 | 502 | /* Tamper1 callback */ |
<> | 144:ef7eb2e8f9f7 | 503 | HAL_RTCEx_Tamper1EventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 504 | |
<> | 144:ef7eb2e8f9f7 | 505 | /* Clear the Tamper1 interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 506 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F); |
<> | 144:ef7eb2e8f9f7 | 507 | } |
<> | 144:ef7eb2e8f9f7 | 508 | } |
<> | 144:ef7eb2e8f9f7 | 509 | |
<> | 144:ef7eb2e8f9f7 | 510 | /* Get the Tamper interrupts source enable status */ |
<> | 144:ef7eb2e8f9f7 | 511 | if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP)) |
<> | 144:ef7eb2e8f9f7 | 512 | { |
<> | 144:ef7eb2e8f9f7 | 513 | /* Get the pending status of the Tamper2 Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 514 | if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET) |
<> | 144:ef7eb2e8f9f7 | 515 | { |
<> | 144:ef7eb2e8f9f7 | 516 | /* Tamper2 callback */ |
<> | 144:ef7eb2e8f9f7 | 517 | HAL_RTCEx_Tamper2EventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 518 | |
<> | 144:ef7eb2e8f9f7 | 519 | /* Clear the Tamper2 interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 520 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F); |
<> | 144:ef7eb2e8f9f7 | 521 | } |
<> | 144:ef7eb2e8f9f7 | 522 | } |
<> | 144:ef7eb2e8f9f7 | 523 | |
<> | 144:ef7eb2e8f9f7 | 524 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 525 | /* Get the Tamper interrupts source enable status */ |
<> | 144:ef7eb2e8f9f7 | 526 | if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP)) |
<> | 144:ef7eb2e8f9f7 | 527 | { |
<> | 144:ef7eb2e8f9f7 | 528 | /* Get the pending status of the Tamper3 Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 529 | if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET) |
<> | 144:ef7eb2e8f9f7 | 530 | { |
<> | 144:ef7eb2e8f9f7 | 531 | /* Tamper3 callback */ |
<> | 144:ef7eb2e8f9f7 | 532 | HAL_RTCEx_Tamper3EventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 533 | |
<> | 144:ef7eb2e8f9f7 | 534 | /* Clear the Tamper3 interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 535 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F); |
<> | 144:ef7eb2e8f9f7 | 536 | } |
<> | 144:ef7eb2e8f9f7 | 537 | } |
<> | 144:ef7eb2e8f9f7 | 538 | #endif |
<> | 144:ef7eb2e8f9f7 | 539 | |
<> | 144:ef7eb2e8f9f7 | 540 | /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */ |
<> | 144:ef7eb2e8f9f7 | 541 | __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); |
<> | 144:ef7eb2e8f9f7 | 542 | |
<> | 144:ef7eb2e8f9f7 | 543 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 544 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 545 | } |
<> | 144:ef7eb2e8f9f7 | 546 | |
<> | 144:ef7eb2e8f9f7 | 547 | /** |
<> | 144:ef7eb2e8f9f7 | 548 | * @brief TimeStamp callback. |
Anna Bridge |
180:96ed750bd169 | 549 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 550 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 551 | */ |
<> | 144:ef7eb2e8f9f7 | 552 | __weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 553 | { |
<> | 144:ef7eb2e8f9f7 | 554 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 555 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 556 | |
<> | 144:ef7eb2e8f9f7 | 557 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 558 | the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 559 | */ |
<> | 144:ef7eb2e8f9f7 | 560 | } |
<> | 144:ef7eb2e8f9f7 | 561 | |
<> | 144:ef7eb2e8f9f7 | 562 | /** |
<> | 144:ef7eb2e8f9f7 | 563 | * @brief Tamper 1 callback. |
Anna Bridge |
180:96ed750bd169 | 564 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 565 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 566 | */ |
<> | 144:ef7eb2e8f9f7 | 567 | __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 568 | { |
<> | 144:ef7eb2e8f9f7 | 569 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 570 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 571 | |
<> | 144:ef7eb2e8f9f7 | 572 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 573 | the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 574 | */ |
<> | 144:ef7eb2e8f9f7 | 575 | } |
<> | 144:ef7eb2e8f9f7 | 576 | |
<> | 144:ef7eb2e8f9f7 | 577 | /** |
<> | 144:ef7eb2e8f9f7 | 578 | * @brief Tamper 2 callback. |
Anna Bridge |
180:96ed750bd169 | 579 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 580 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 581 | */ |
<> | 144:ef7eb2e8f9f7 | 582 | __weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 583 | { |
<> | 144:ef7eb2e8f9f7 | 584 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 585 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 586 | |
<> | 144:ef7eb2e8f9f7 | 587 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 588 | the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 589 | */ |
<> | 144:ef7eb2e8f9f7 | 590 | } |
<> | 144:ef7eb2e8f9f7 | 591 | |
<> | 144:ef7eb2e8f9f7 | 592 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 593 | /** |
<> | 144:ef7eb2e8f9f7 | 594 | * @brief Tamper 3 callback. |
Anna Bridge |
180:96ed750bd169 | 595 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 596 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 597 | */ |
<> | 144:ef7eb2e8f9f7 | 598 | __weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 599 | { |
<> | 144:ef7eb2e8f9f7 | 600 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 601 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 602 | |
<> | 144:ef7eb2e8f9f7 | 603 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 604 | the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 605 | */ |
<> | 144:ef7eb2e8f9f7 | 606 | } |
<> | 144:ef7eb2e8f9f7 | 607 | #endif |
<> | 144:ef7eb2e8f9f7 | 608 | |
<> | 144:ef7eb2e8f9f7 | 609 | /** |
<> | 144:ef7eb2e8f9f7 | 610 | * @brief Handle TimeStamp polling request. |
Anna Bridge |
180:96ed750bd169 | 611 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 612 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 613 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 614 | */ |
<> | 144:ef7eb2e8f9f7 | 615 | HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 616 | { |
<> | 144:ef7eb2e8f9f7 | 617 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 618 | |
<> | 144:ef7eb2e8f9f7 | 619 | while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 620 | { |
<> | 144:ef7eb2e8f9f7 | 621 | if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 622 | { |
<> | 144:ef7eb2e8f9f7 | 623 | /* Clear the TIMESTAMP OverRun Flag */ |
<> | 144:ef7eb2e8f9f7 | 624 | __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF); |
<> | 144:ef7eb2e8f9f7 | 625 | |
<> | 144:ef7eb2e8f9f7 | 626 | /* Change TIMESTAMP state */ |
<> | 144:ef7eb2e8f9f7 | 627 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 628 | |
<> | 144:ef7eb2e8f9f7 | 629 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 630 | } |
<> | 144:ef7eb2e8f9f7 | 631 | |
<> | 144:ef7eb2e8f9f7 | 632 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 633 | { |
<> | 156:95d6b41a828b | 634 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 635 | { |
<> | 144:ef7eb2e8f9f7 | 636 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 637 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 638 | } |
<> | 144:ef7eb2e8f9f7 | 639 | } |
<> | 144:ef7eb2e8f9f7 | 640 | } |
<> | 144:ef7eb2e8f9f7 | 641 | |
<> | 144:ef7eb2e8f9f7 | 642 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 643 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 644 | |
<> | 144:ef7eb2e8f9f7 | 645 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 646 | } |
<> | 144:ef7eb2e8f9f7 | 647 | |
<> | 144:ef7eb2e8f9f7 | 648 | /** |
<> | 144:ef7eb2e8f9f7 | 649 | * @brief Handle Tamper 1 Polling. |
Anna Bridge |
180:96ed750bd169 | 650 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 651 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 652 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 653 | */ |
<> | 144:ef7eb2e8f9f7 | 654 | HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 655 | { |
<> | 144:ef7eb2e8f9f7 | 656 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 657 | |
<> | 144:ef7eb2e8f9f7 | 658 | /* Get the status of the Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 659 | while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP1F)== RESET) |
<> | 144:ef7eb2e8f9f7 | 660 | { |
<> | 144:ef7eb2e8f9f7 | 661 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 662 | { |
<> | 156:95d6b41a828b | 663 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 664 | { |
<> | 144:ef7eb2e8f9f7 | 665 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 666 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 667 | } |
<> | 144:ef7eb2e8f9f7 | 668 | } |
<> | 144:ef7eb2e8f9f7 | 669 | } |
<> | 144:ef7eb2e8f9f7 | 670 | |
<> | 144:ef7eb2e8f9f7 | 671 | /* Clear the Tamper Flag */ |
<> | 144:ef7eb2e8f9f7 | 672 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F); |
<> | 144:ef7eb2e8f9f7 | 673 | |
<> | 144:ef7eb2e8f9f7 | 674 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 675 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 676 | |
<> | 144:ef7eb2e8f9f7 | 677 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 678 | } |
<> | 144:ef7eb2e8f9f7 | 679 | |
<> | 144:ef7eb2e8f9f7 | 680 | /** |
<> | 144:ef7eb2e8f9f7 | 681 | * @brief Handle Tamper 2 Polling. |
Anna Bridge |
180:96ed750bd169 | 682 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 683 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 684 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 685 | */ |
<> | 144:ef7eb2e8f9f7 | 686 | HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 687 | { |
<> | 144:ef7eb2e8f9f7 | 688 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 689 | |
<> | 144:ef7eb2e8f9f7 | 690 | /* Get the status of the Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 691 | while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP2F) == RESET) |
<> | 144:ef7eb2e8f9f7 | 692 | { |
<> | 144:ef7eb2e8f9f7 | 693 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 694 | { |
<> | 156:95d6b41a828b | 695 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 696 | { |
<> | 144:ef7eb2e8f9f7 | 697 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 698 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 699 | } |
<> | 144:ef7eb2e8f9f7 | 700 | } |
<> | 144:ef7eb2e8f9f7 | 701 | } |
<> | 144:ef7eb2e8f9f7 | 702 | |
<> | 144:ef7eb2e8f9f7 | 703 | /* Clear the Tamper Flag */ |
<> | 144:ef7eb2e8f9f7 | 704 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F); |
<> | 144:ef7eb2e8f9f7 | 705 | |
<> | 144:ef7eb2e8f9f7 | 706 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 707 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 708 | |
<> | 144:ef7eb2e8f9f7 | 709 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 710 | } |
<> | 144:ef7eb2e8f9f7 | 711 | |
<> | 144:ef7eb2e8f9f7 | 712 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 713 | /** |
<> | 144:ef7eb2e8f9f7 | 714 | * @brief Handle Tamper 3 Polling. |
Anna Bridge |
180:96ed750bd169 | 715 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 716 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 717 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 718 | */ |
<> | 144:ef7eb2e8f9f7 | 719 | HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 720 | { |
<> | 144:ef7eb2e8f9f7 | 721 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 722 | |
<> | 144:ef7eb2e8f9f7 | 723 | /* Get the status of the Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 724 | while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP3F) == RESET) |
<> | 144:ef7eb2e8f9f7 | 725 | { |
<> | 144:ef7eb2e8f9f7 | 726 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 727 | { |
<> | 156:95d6b41a828b | 728 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 729 | { |
<> | 144:ef7eb2e8f9f7 | 730 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 731 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 732 | } |
<> | 144:ef7eb2e8f9f7 | 733 | } |
<> | 144:ef7eb2e8f9f7 | 734 | } |
<> | 144:ef7eb2e8f9f7 | 735 | |
<> | 144:ef7eb2e8f9f7 | 736 | /* Clear the Tamper Flag */ |
<> | 144:ef7eb2e8f9f7 | 737 | __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP3F); |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 740 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 741 | |
<> | 144:ef7eb2e8f9f7 | 742 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 743 | } |
<> | 144:ef7eb2e8f9f7 | 744 | #endif |
<> | 144:ef7eb2e8f9f7 | 745 | |
<> | 144:ef7eb2e8f9f7 | 746 | /** |
<> | 144:ef7eb2e8f9f7 | 747 | * @} |
<> | 144:ef7eb2e8f9f7 | 748 | */ |
<> | 144:ef7eb2e8f9f7 | 749 | |
<> | 144:ef7eb2e8f9f7 | 750 | #if defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
<> | 144:ef7eb2e8f9f7 | 751 | /** @addtogroup RTCEx_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 752 | * @brief RTC Wake-up functions |
<> | 144:ef7eb2e8f9f7 | 753 | * |
<> | 144:ef7eb2e8f9f7 | 754 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 755 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 756 | ##### RTC Wake-up functions ##### |
<> | 144:ef7eb2e8f9f7 | 757 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 758 | |
<> | 144:ef7eb2e8f9f7 | 759 | [..] This section provides functions allowing to configure Wake-up feature |
<> | 144:ef7eb2e8f9f7 | 760 | |
<> | 144:ef7eb2e8f9f7 | 761 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 762 | * @{ |
<> | 144:ef7eb2e8f9f7 | 763 | */ |
<> | 144:ef7eb2e8f9f7 | 764 | |
<> | 144:ef7eb2e8f9f7 | 765 | /** |
<> | 144:ef7eb2e8f9f7 | 766 | * @brief Set wake up timer. |
Anna Bridge |
180:96ed750bd169 | 767 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 768 | * @param WakeUpCounter Wake up counter |
Anna Bridge |
180:96ed750bd169 | 769 | * @param WakeUpClock Wake up clock |
<> | 144:ef7eb2e8f9f7 | 770 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 771 | */ |
<> | 144:ef7eb2e8f9f7 | 772 | HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) |
<> | 144:ef7eb2e8f9f7 | 773 | { |
<> | 156:95d6b41a828b | 774 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 775 | |
<> | 144:ef7eb2e8f9f7 | 776 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 777 | assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); |
<> | 144:ef7eb2e8f9f7 | 778 | assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); |
<> | 144:ef7eb2e8f9f7 | 779 | |
<> | 144:ef7eb2e8f9f7 | 780 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 781 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 782 | |
<> | 144:ef7eb2e8f9f7 | 783 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 784 | |
<> | 144:ef7eb2e8f9f7 | 785 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 786 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 787 | |
<> | 144:ef7eb2e8f9f7 | 788 | /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ |
<> | 144:ef7eb2e8f9f7 | 789 | if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){ |
<> | 144:ef7eb2e8f9f7 | 790 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 791 | |
<> | 144:ef7eb2e8f9f7 | 792 | /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 793 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) |
<> | 144:ef7eb2e8f9f7 | 794 | { |
<> | 144:ef7eb2e8f9f7 | 795 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 796 | { |
<> | 144:ef7eb2e8f9f7 | 797 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 798 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 799 | |
<> | 144:ef7eb2e8f9f7 | 800 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 801 | |
<> | 144:ef7eb2e8f9f7 | 802 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 803 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 804 | |
<> | 144:ef7eb2e8f9f7 | 805 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 806 | } |
<> | 144:ef7eb2e8f9f7 | 807 | } |
<> | 144:ef7eb2e8f9f7 | 808 | } |
<> | 144:ef7eb2e8f9f7 | 809 | |
<> | 144:ef7eb2e8f9f7 | 810 | __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 811 | |
<> | 144:ef7eb2e8f9f7 | 812 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 813 | |
<> | 144:ef7eb2e8f9f7 | 814 | /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 815 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 816 | { |
<> | 144:ef7eb2e8f9f7 | 817 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 818 | { |
<> | 144:ef7eb2e8f9f7 | 819 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 820 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 821 | |
<> | 144:ef7eb2e8f9f7 | 822 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 823 | |
<> | 144:ef7eb2e8f9f7 | 824 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 825 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 826 | |
<> | 144:ef7eb2e8f9f7 | 827 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 828 | } |
<> | 144:ef7eb2e8f9f7 | 829 | } |
<> | 144:ef7eb2e8f9f7 | 830 | |
<> | 144:ef7eb2e8f9f7 | 831 | /* Clear the Wakeup Timer clock source bits in CR register */ |
<> | 144:ef7eb2e8f9f7 | 832 | hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; |
<> | 144:ef7eb2e8f9f7 | 833 | |
<> | 144:ef7eb2e8f9f7 | 834 | /* Configure the clock source */ |
<> | 144:ef7eb2e8f9f7 | 835 | hrtc->Instance->CR |= (uint32_t)WakeUpClock; |
<> | 144:ef7eb2e8f9f7 | 836 | |
<> | 144:ef7eb2e8f9f7 | 837 | /* Configure the Wakeup Timer counter */ |
<> | 144:ef7eb2e8f9f7 | 838 | hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; |
<> | 144:ef7eb2e8f9f7 | 839 | |
<> | 144:ef7eb2e8f9f7 | 840 | /* Enable the Wakeup Timer */ |
<> | 144:ef7eb2e8f9f7 | 841 | __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 842 | |
<> | 144:ef7eb2e8f9f7 | 843 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 844 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 845 | |
<> | 144:ef7eb2e8f9f7 | 846 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 847 | |
<> | 144:ef7eb2e8f9f7 | 848 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 849 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 850 | |
<> | 144:ef7eb2e8f9f7 | 851 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 852 | } |
<> | 144:ef7eb2e8f9f7 | 853 | |
<> | 144:ef7eb2e8f9f7 | 854 | /** |
<> | 144:ef7eb2e8f9f7 | 855 | * @brief Set wake up timer with interrupt. |
Anna Bridge |
180:96ed750bd169 | 856 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 857 | * @param WakeUpCounter Wake up counter |
Anna Bridge |
180:96ed750bd169 | 858 | * @param WakeUpClock Wake up clock |
<> | 144:ef7eb2e8f9f7 | 859 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 860 | */ |
<> | 144:ef7eb2e8f9f7 | 861 | HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) |
<> | 144:ef7eb2e8f9f7 | 862 | { |
<> | 156:95d6b41a828b | 863 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 864 | |
<> | 144:ef7eb2e8f9f7 | 865 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 866 | assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); |
<> | 144:ef7eb2e8f9f7 | 867 | assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); |
<> | 144:ef7eb2e8f9f7 | 868 | |
<> | 144:ef7eb2e8f9f7 | 869 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 870 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 871 | |
<> | 144:ef7eb2e8f9f7 | 872 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 873 | |
<> | 144:ef7eb2e8f9f7 | 874 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 875 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 876 | |
<> | 144:ef7eb2e8f9f7 | 877 | /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ |
<> | 144:ef7eb2e8f9f7 | 878 | if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){ |
<> | 144:ef7eb2e8f9f7 | 879 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 880 | |
<> | 144:ef7eb2e8f9f7 | 881 | /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 882 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) |
<> | 144:ef7eb2e8f9f7 | 883 | { |
<> | 144:ef7eb2e8f9f7 | 884 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 885 | { |
<> | 144:ef7eb2e8f9f7 | 886 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 887 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 888 | |
<> | 144:ef7eb2e8f9f7 | 889 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 890 | |
<> | 144:ef7eb2e8f9f7 | 891 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 892 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 893 | |
<> | 144:ef7eb2e8f9f7 | 894 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 895 | } |
<> | 144:ef7eb2e8f9f7 | 896 | } |
<> | 144:ef7eb2e8f9f7 | 897 | } |
<> | 144:ef7eb2e8f9f7 | 898 | |
<> | 156:95d6b41a828b | 899 | /* Disable the Wake-Up timer */ |
<> | 144:ef7eb2e8f9f7 | 900 | __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 901 | |
<> | 156:95d6b41a828b | 902 | /* Clear flag Wake-Up */ |
<> | 156:95d6b41a828b | 903 | __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); |
<> | 156:95d6b41a828b | 904 | |
<> | 144:ef7eb2e8f9f7 | 905 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 906 | |
<> | 144:ef7eb2e8f9f7 | 907 | /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 908 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 909 | { |
<> | 144:ef7eb2e8f9f7 | 910 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 911 | { |
<> | 144:ef7eb2e8f9f7 | 912 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 913 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 914 | |
<> | 144:ef7eb2e8f9f7 | 915 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 916 | |
<> | 144:ef7eb2e8f9f7 | 917 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 918 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 919 | |
<> | 144:ef7eb2e8f9f7 | 920 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 921 | } |
<> | 144:ef7eb2e8f9f7 | 922 | } |
<> | 144:ef7eb2e8f9f7 | 923 | |
<> | 144:ef7eb2e8f9f7 | 924 | /* Configure the Wakeup Timer counter */ |
<> | 144:ef7eb2e8f9f7 | 925 | hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; |
<> | 144:ef7eb2e8f9f7 | 926 | |
<> | 144:ef7eb2e8f9f7 | 927 | /* Clear the Wakeup Timer clock source bits in CR register */ |
<> | 144:ef7eb2e8f9f7 | 928 | hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; |
<> | 144:ef7eb2e8f9f7 | 929 | |
<> | 144:ef7eb2e8f9f7 | 930 | /* Configure the clock source */ |
<> | 144:ef7eb2e8f9f7 | 931 | hrtc->Instance->CR |= (uint32_t)WakeUpClock; |
<> | 144:ef7eb2e8f9f7 | 932 | |
<> | 144:ef7eb2e8f9f7 | 933 | /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */ |
<> | 144:ef7eb2e8f9f7 | 934 | __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); |
<> | 144:ef7eb2e8f9f7 | 935 | |
<> | 144:ef7eb2e8f9f7 | 936 | __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); |
<> | 144:ef7eb2e8f9f7 | 937 | |
<> | 144:ef7eb2e8f9f7 | 938 | /* Configure the Interrupt in the RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 939 | __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT); |
<> | 144:ef7eb2e8f9f7 | 940 | |
<> | 144:ef7eb2e8f9f7 | 941 | /* Enable the Wakeup Timer */ |
<> | 144:ef7eb2e8f9f7 | 942 | __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 943 | |
<> | 144:ef7eb2e8f9f7 | 944 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 945 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 946 | |
<> | 144:ef7eb2e8f9f7 | 947 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 948 | |
<> | 144:ef7eb2e8f9f7 | 949 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 950 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 951 | |
<> | 144:ef7eb2e8f9f7 | 952 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 953 | } |
<> | 144:ef7eb2e8f9f7 | 954 | |
<> | 144:ef7eb2e8f9f7 | 955 | /** |
<> | 144:ef7eb2e8f9f7 | 956 | * @brief Deactivate wake up timer counter. |
Anna Bridge |
180:96ed750bd169 | 957 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 958 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 959 | */ |
<> | 144:ef7eb2e8f9f7 | 960 | uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 961 | { |
<> | 156:95d6b41a828b | 962 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 963 | |
<> | 144:ef7eb2e8f9f7 | 964 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 965 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 966 | |
<> | 144:ef7eb2e8f9f7 | 967 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 968 | |
<> | 144:ef7eb2e8f9f7 | 969 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 970 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 971 | |
<> | 144:ef7eb2e8f9f7 | 972 | /* Disable the Wakeup Timer */ |
<> | 144:ef7eb2e8f9f7 | 973 | __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 974 | |
<> | 144:ef7eb2e8f9f7 | 975 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 976 | __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT); |
<> | 144:ef7eb2e8f9f7 | 977 | |
<> | 144:ef7eb2e8f9f7 | 978 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 979 | /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 980 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 981 | { |
<> | 144:ef7eb2e8f9f7 | 982 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 983 | { |
<> | 144:ef7eb2e8f9f7 | 984 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 985 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 986 | |
<> | 144:ef7eb2e8f9f7 | 987 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 988 | |
<> | 144:ef7eb2e8f9f7 | 989 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 990 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 991 | |
<> | 144:ef7eb2e8f9f7 | 992 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 993 | } |
<> | 144:ef7eb2e8f9f7 | 994 | } |
<> | 144:ef7eb2e8f9f7 | 995 | |
<> | 144:ef7eb2e8f9f7 | 996 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 997 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 998 | |
<> | 144:ef7eb2e8f9f7 | 999 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1000 | |
<> | 144:ef7eb2e8f9f7 | 1001 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1002 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1003 | |
<> | 144:ef7eb2e8f9f7 | 1004 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1005 | } |
<> | 144:ef7eb2e8f9f7 | 1006 | |
<> | 144:ef7eb2e8f9f7 | 1007 | /** |
<> | 144:ef7eb2e8f9f7 | 1008 | * @brief Get wake up timer counter. |
Anna Bridge |
180:96ed750bd169 | 1009 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1010 | * @retval Counter value |
<> | 144:ef7eb2e8f9f7 | 1011 | */ |
<> | 144:ef7eb2e8f9f7 | 1012 | uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 1013 | { |
<> | 144:ef7eb2e8f9f7 | 1014 | /* Get the counter value */ |
<> | 144:ef7eb2e8f9f7 | 1015 | return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT)); |
<> | 144:ef7eb2e8f9f7 | 1016 | } |
<> | 144:ef7eb2e8f9f7 | 1017 | |
<> | 144:ef7eb2e8f9f7 | 1018 | /** |
<> | 144:ef7eb2e8f9f7 | 1019 | * @brief Handle Wake Up Timer interrupt request. |
Anna Bridge |
180:96ed750bd169 | 1020 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1021 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1022 | */ |
<> | 144:ef7eb2e8f9f7 | 1023 | void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 1024 | { |
<> | 144:ef7eb2e8f9f7 | 1025 | /* Get the WAKEUPTIMER interrupt source enable status */ |
<> | 144:ef7eb2e8f9f7 | 1026 | if(__HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(hrtc, RTC_IT_WUT) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1027 | { |
<> | 144:ef7eb2e8f9f7 | 1028 | /* Get the pending status of the WAKEUPTIMER Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1029 | if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1030 | { |
<> | 144:ef7eb2e8f9f7 | 1031 | /* WAKEUPTIMER callback */ |
<> | 144:ef7eb2e8f9f7 | 1032 | HAL_RTCEx_WakeUpTimerEventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1033 | |
<> | 144:ef7eb2e8f9f7 | 1034 | /* Clear the WAKEUPTIMER interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1035 | __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); |
<> | 144:ef7eb2e8f9f7 | 1036 | } |
<> | 144:ef7eb2e8f9f7 | 1037 | } |
<> | 144:ef7eb2e8f9f7 | 1038 | |
<> | 144:ef7eb2e8f9f7 | 1039 | /* Clear the EXTI's line Flag for RTC WakeUpTimer */ |
<> | 144:ef7eb2e8f9f7 | 1040 | __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); |
<> | 144:ef7eb2e8f9f7 | 1041 | |
<> | 144:ef7eb2e8f9f7 | 1042 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1043 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1044 | } |
<> | 144:ef7eb2e8f9f7 | 1045 | |
<> | 144:ef7eb2e8f9f7 | 1046 | /** |
<> | 144:ef7eb2e8f9f7 | 1047 | * @brief Wake Up Timer callback. |
Anna Bridge |
180:96ed750bd169 | 1048 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1049 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1050 | */ |
<> | 144:ef7eb2e8f9f7 | 1051 | __weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 1052 | { |
<> | 144:ef7eb2e8f9f7 | 1053 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1054 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1055 | |
<> | 144:ef7eb2e8f9f7 | 1056 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1057 | the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1058 | */ |
<> | 144:ef7eb2e8f9f7 | 1059 | } |
<> | 144:ef7eb2e8f9f7 | 1060 | |
<> | 144:ef7eb2e8f9f7 | 1061 | |
<> | 144:ef7eb2e8f9f7 | 1062 | /** |
<> | 144:ef7eb2e8f9f7 | 1063 | * @brief Handle Wake Up Timer Polling. |
Anna Bridge |
180:96ed750bd169 | 1064 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1065 | * @param Timeout Timeout duration |
<> | 144:ef7eb2e8f9f7 | 1066 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1067 | */ |
<> | 144:ef7eb2e8f9f7 | 1068 | HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1069 | { |
<> | 144:ef7eb2e8f9f7 | 1070 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1071 | |
<> | 144:ef7eb2e8f9f7 | 1072 | while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1073 | { |
<> | 144:ef7eb2e8f9f7 | 1074 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 1075 | { |
<> | 156:95d6b41a828b | 1076 | if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 1077 | { |
<> | 144:ef7eb2e8f9f7 | 1078 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1079 | |
<> | 144:ef7eb2e8f9f7 | 1080 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1081 | } |
<> | 144:ef7eb2e8f9f7 | 1082 | } |
<> | 144:ef7eb2e8f9f7 | 1083 | } |
<> | 144:ef7eb2e8f9f7 | 1084 | |
<> | 144:ef7eb2e8f9f7 | 1085 | /* Clear the WAKEUPTIMER Flag */ |
<> | 144:ef7eb2e8f9f7 | 1086 | __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); |
<> | 144:ef7eb2e8f9f7 | 1087 | |
<> | 144:ef7eb2e8f9f7 | 1088 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1089 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1090 | |
<> | 144:ef7eb2e8f9f7 | 1091 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1092 | } |
<> | 144:ef7eb2e8f9f7 | 1093 | |
<> | 144:ef7eb2e8f9f7 | 1094 | /** |
<> | 144:ef7eb2e8f9f7 | 1095 | * @} |
<> | 144:ef7eb2e8f9f7 | 1096 | */ |
<> | 144:ef7eb2e8f9f7 | 1097 | #endif /* defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) | defined(STM32F030xC) */ |
<> | 144:ef7eb2e8f9f7 | 1098 | |
<> | 144:ef7eb2e8f9f7 | 1099 | /** @addtogroup RTCEx_Exported_Functions_Group3 |
<> | 144:ef7eb2e8f9f7 | 1100 | * @brief Extended Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 1101 | * |
<> | 144:ef7eb2e8f9f7 | 1102 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1103 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1104 | ##### Extended Peripheral Control functions ##### |
<> | 144:ef7eb2e8f9f7 | 1105 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1106 | [..] |
<> | 144:ef7eb2e8f9f7 | 1107 | This subsection provides functions allowing to |
<> | 144:ef7eb2e8f9f7 | 1108 | (+) Write a data in a specified RTC Backup data register |
<> | 144:ef7eb2e8f9f7 | 1109 | (+) Read a data in a specified RTC Backup data register |
<> | 144:ef7eb2e8f9f7 | 1110 | (+) Set the Coarse calibration parameters. |
<> | 144:ef7eb2e8f9f7 | 1111 | (+) Deactivate the Coarse calibration parameters |
<> | 144:ef7eb2e8f9f7 | 1112 | (+) Set the Smooth calibration parameters. |
<> | 144:ef7eb2e8f9f7 | 1113 | (+) Configure the Synchronization Shift Control Settings. |
<> | 144:ef7eb2e8f9f7 | 1114 | (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). |
<> | 144:ef7eb2e8f9f7 | 1115 | (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). |
<> | 144:ef7eb2e8f9f7 | 1116 | (+) Enable the RTC reference clock detection. |
<> | 144:ef7eb2e8f9f7 | 1117 | (+) Disable the RTC reference clock detection. |
<> | 144:ef7eb2e8f9f7 | 1118 | (+) Enable the Bypass Shadow feature. |
<> | 144:ef7eb2e8f9f7 | 1119 | (+) Disable the Bypass Shadow feature. |
<> | 144:ef7eb2e8f9f7 | 1120 | |
<> | 144:ef7eb2e8f9f7 | 1121 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1122 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1123 | */ |
<> | 144:ef7eb2e8f9f7 | 1124 | |
<> | 144:ef7eb2e8f9f7 | 1125 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
<> | 144:ef7eb2e8f9f7 | 1126 | /** |
<> | 144:ef7eb2e8f9f7 | 1127 | * @brief Write a data in a specified RTC Backup data register. |
Anna Bridge |
180:96ed750bd169 | 1128 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1129 | * @param BackupRegister RTC Backup data Register number. |
<> | 144:ef7eb2e8f9f7 | 1130 | * This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to |
<> | 144:ef7eb2e8f9f7 | 1131 | * specify the register. |
Anna Bridge |
180:96ed750bd169 | 1132 | * @param Data Data to be written in the specified RTC Backup data register. |
<> | 144:ef7eb2e8f9f7 | 1133 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1134 | */ |
<> | 144:ef7eb2e8f9f7 | 1135 | void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) |
<> | 144:ef7eb2e8f9f7 | 1136 | { |
<> | 156:95d6b41a828b | 1137 | uint32_t tmp = 0U; |
<> | 144:ef7eb2e8f9f7 | 1138 | |
<> | 144:ef7eb2e8f9f7 | 1139 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1140 | assert_param(IS_RTC_BKP(BackupRegister)); |
<> | 144:ef7eb2e8f9f7 | 1141 | |
<> | 144:ef7eb2e8f9f7 | 1142 | tmp = (uint32_t)&(hrtc->Instance->BKP0R); |
<> | 156:95d6b41a828b | 1143 | tmp += (BackupRegister * 4U); |
<> | 144:ef7eb2e8f9f7 | 1144 | |
<> | 144:ef7eb2e8f9f7 | 1145 | /* Write the specified register */ |
<> | 144:ef7eb2e8f9f7 | 1146 | *(__IO uint32_t *)tmp = (uint32_t)Data; |
<> | 144:ef7eb2e8f9f7 | 1147 | } |
<> | 144:ef7eb2e8f9f7 | 1148 | |
<> | 144:ef7eb2e8f9f7 | 1149 | /** |
<> | 144:ef7eb2e8f9f7 | 1150 | * @brief Reads data from the specified RTC Backup data Register. |
Anna Bridge |
180:96ed750bd169 | 1151 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1152 | * @param BackupRegister RTC Backup data Register number. |
<> | 144:ef7eb2e8f9f7 | 1153 | * This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to |
<> | 144:ef7eb2e8f9f7 | 1154 | * specify the register. |
<> | 144:ef7eb2e8f9f7 | 1155 | * @retval Read value |
<> | 144:ef7eb2e8f9f7 | 1156 | */ |
<> | 144:ef7eb2e8f9f7 | 1157 | uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) |
<> | 144:ef7eb2e8f9f7 | 1158 | { |
<> | 156:95d6b41a828b | 1159 | uint32_t tmp = 0U; |
<> | 144:ef7eb2e8f9f7 | 1160 | |
<> | 144:ef7eb2e8f9f7 | 1161 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1162 | assert_param(IS_RTC_BKP(BackupRegister)); |
<> | 144:ef7eb2e8f9f7 | 1163 | |
<> | 144:ef7eb2e8f9f7 | 1164 | tmp = (uint32_t)&(hrtc->Instance->BKP0R); |
<> | 156:95d6b41a828b | 1165 | tmp += (BackupRegister * 4U); |
<> | 144:ef7eb2e8f9f7 | 1166 | |
<> | 144:ef7eb2e8f9f7 | 1167 | /* Read the specified register */ |
<> | 144:ef7eb2e8f9f7 | 1168 | return (*(__IO uint32_t *)tmp); |
<> | 144:ef7eb2e8f9f7 | 1169 | } |
<> | 144:ef7eb2e8f9f7 | 1170 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
<> | 144:ef7eb2e8f9f7 | 1171 | |
<> | 144:ef7eb2e8f9f7 | 1172 | /** |
<> | 144:ef7eb2e8f9f7 | 1173 | * @brief Set the Smooth calibration parameters. |
Anna Bridge |
180:96ed750bd169 | 1174 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1175 | * @param SmoothCalibPeriod Select the Smooth Calibration Period. |
<> | 144:ef7eb2e8f9f7 | 1176 | * This parameter can be can be one of the following values : |
<> | 144:ef7eb2e8f9f7 | 1177 | * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s. |
<> | 144:ef7eb2e8f9f7 | 1178 | * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s. |
<> | 144:ef7eb2e8f9f7 | 1179 | * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s. |
Anna Bridge |
180:96ed750bd169 | 1180 | * @param SmoothCalibPlusPulses Select to Set or reset the CALP bit. |
<> | 144:ef7eb2e8f9f7 | 1181 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1182 | * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses. |
<> | 144:ef7eb2e8f9f7 | 1183 | * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added. |
Anna Bridge |
180:96ed750bd169 | 1184 | * @param SmoothCalibMinusPulsesValue Select the value of CALM[8:0] bits. |
<> | 144:ef7eb2e8f9f7 | 1185 | * This parameter can be one any value from 0 to 0x000001FF. |
<> | 144:ef7eb2e8f9f7 | 1186 | * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses |
<> | 144:ef7eb2e8f9f7 | 1187 | * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field |
<> | 144:ef7eb2e8f9f7 | 1188 | * SmoothCalibMinusPulsesValue mut be equal to 0. |
<> | 144:ef7eb2e8f9f7 | 1189 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1190 | */ |
<> | 144:ef7eb2e8f9f7 | 1191 | HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue) |
<> | 144:ef7eb2e8f9f7 | 1192 | { |
<> | 156:95d6b41a828b | 1193 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1194 | |
<> | 144:ef7eb2e8f9f7 | 1195 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1196 | assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod)); |
<> | 144:ef7eb2e8f9f7 | 1197 | assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses)); |
<> | 144:ef7eb2e8f9f7 | 1198 | assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue)); |
<> | 144:ef7eb2e8f9f7 | 1199 | |
<> | 144:ef7eb2e8f9f7 | 1200 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1201 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1202 | |
<> | 144:ef7eb2e8f9f7 | 1203 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1204 | |
<> | 144:ef7eb2e8f9f7 | 1205 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1206 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1207 | |
<> | 144:ef7eb2e8f9f7 | 1208 | /* check if a calibration is pending*/ |
<> | 144:ef7eb2e8f9f7 | 1209 | if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1210 | { |
<> | 144:ef7eb2e8f9f7 | 1211 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1212 | |
<> | 144:ef7eb2e8f9f7 | 1213 | /* check if a calibration is pending*/ |
<> | 144:ef7eb2e8f9f7 | 1214 | while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1215 | { |
<> | 144:ef7eb2e8f9f7 | 1216 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1217 | { |
<> | 144:ef7eb2e8f9f7 | 1218 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1219 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1220 | |
<> | 144:ef7eb2e8f9f7 | 1221 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1222 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1223 | |
<> | 144:ef7eb2e8f9f7 | 1224 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1225 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1226 | |
<> | 144:ef7eb2e8f9f7 | 1227 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1228 | } |
<> | 144:ef7eb2e8f9f7 | 1229 | } |
<> | 144:ef7eb2e8f9f7 | 1230 | } |
<> | 144:ef7eb2e8f9f7 | 1231 | |
<> | 144:ef7eb2e8f9f7 | 1232 | /* Configure the Smooth calibration settings */ |
<> | 144:ef7eb2e8f9f7 | 1233 | hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue); |
<> | 144:ef7eb2e8f9f7 | 1234 | |
<> | 144:ef7eb2e8f9f7 | 1235 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1236 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1237 | |
<> | 144:ef7eb2e8f9f7 | 1238 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1239 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1240 | |
<> | 144:ef7eb2e8f9f7 | 1241 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1242 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1243 | |
<> | 144:ef7eb2e8f9f7 | 1244 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1245 | } |
<> | 144:ef7eb2e8f9f7 | 1246 | |
<> | 144:ef7eb2e8f9f7 | 1247 | /** |
<> | 144:ef7eb2e8f9f7 | 1248 | * @brief Configure the Synchronization Shift Control Settings. |
<> | 144:ef7eb2e8f9f7 | 1249 | * @note When REFCKON is set, firmware must not write to Shift control register. |
Anna Bridge |
180:96ed750bd169 | 1250 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1251 | * @param ShiftAdd1S Select to add or not 1 second to the time calendar. |
<> | 144:ef7eb2e8f9f7 | 1252 | * This parameter can be one of the following values : |
<> | 144:ef7eb2e8f9f7 | 1253 | * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar. |
<> | 144:ef7eb2e8f9f7 | 1254 | * @arg RTC_SHIFTADD1S_RESET: No effect. |
Anna Bridge |
180:96ed750bd169 | 1255 | * @param ShiftSubFS Select the number of Second Fractions to substitute. |
<> | 144:ef7eb2e8f9f7 | 1256 | * This parameter can be one any value from 0 to 0x7FFF. |
<> | 144:ef7eb2e8f9f7 | 1257 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1258 | */ |
<> | 144:ef7eb2e8f9f7 | 1259 | HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS) |
<> | 144:ef7eb2e8f9f7 | 1260 | { |
<> | 156:95d6b41a828b | 1261 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1262 | |
<> | 144:ef7eb2e8f9f7 | 1263 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1264 | assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S)); |
<> | 144:ef7eb2e8f9f7 | 1265 | assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS)); |
<> | 144:ef7eb2e8f9f7 | 1266 | |
<> | 144:ef7eb2e8f9f7 | 1267 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1268 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1269 | |
<> | 144:ef7eb2e8f9f7 | 1270 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1271 | |
<> | 144:ef7eb2e8f9f7 | 1272 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1273 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1274 | |
<> | 144:ef7eb2e8f9f7 | 1275 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1276 | |
<> | 144:ef7eb2e8f9f7 | 1277 | /* Wait until the shift is completed*/ |
<> | 144:ef7eb2e8f9f7 | 1278 | while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1279 | { |
<> | 144:ef7eb2e8f9f7 | 1280 | if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1281 | { |
<> | 144:ef7eb2e8f9f7 | 1282 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1283 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1284 | |
<> | 144:ef7eb2e8f9f7 | 1285 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1286 | |
<> | 144:ef7eb2e8f9f7 | 1287 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1288 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1289 | |
<> | 144:ef7eb2e8f9f7 | 1290 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1291 | } |
<> | 144:ef7eb2e8f9f7 | 1292 | } |
<> | 144:ef7eb2e8f9f7 | 1293 | |
<> | 144:ef7eb2e8f9f7 | 1294 | /* Check if the reference clock detection is disabled */ |
<> | 144:ef7eb2e8f9f7 | 1295 | if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1296 | { |
<> | 144:ef7eb2e8f9f7 | 1297 | /* Configure the Shift settings */ |
<> | 144:ef7eb2e8f9f7 | 1298 | hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S); |
<> | 144:ef7eb2e8f9f7 | 1299 | |
<> | 144:ef7eb2e8f9f7 | 1300 | /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 1301 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1302 | { |
<> | 144:ef7eb2e8f9f7 | 1303 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1304 | { |
<> | 144:ef7eb2e8f9f7 | 1305 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1306 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1307 | |
<> | 144:ef7eb2e8f9f7 | 1308 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1309 | |
<> | 144:ef7eb2e8f9f7 | 1310 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1311 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1312 | |
<> | 144:ef7eb2e8f9f7 | 1313 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1314 | } |
<> | 144:ef7eb2e8f9f7 | 1315 | } |
<> | 144:ef7eb2e8f9f7 | 1316 | } |
<> | 144:ef7eb2e8f9f7 | 1317 | else |
<> | 144:ef7eb2e8f9f7 | 1318 | { |
<> | 144:ef7eb2e8f9f7 | 1319 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1320 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1321 | |
<> | 144:ef7eb2e8f9f7 | 1322 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1323 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1324 | |
<> | 144:ef7eb2e8f9f7 | 1325 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1326 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1327 | |
<> | 144:ef7eb2e8f9f7 | 1328 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1329 | } |
<> | 144:ef7eb2e8f9f7 | 1330 | |
<> | 144:ef7eb2e8f9f7 | 1331 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1332 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1333 | |
<> | 144:ef7eb2e8f9f7 | 1334 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1335 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1336 | |
<> | 144:ef7eb2e8f9f7 | 1337 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1338 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1339 | |
<> | 144:ef7eb2e8f9f7 | 1340 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1341 | } |
<> | 144:ef7eb2e8f9f7 | 1342 | |
<> | 144:ef7eb2e8f9f7 | 1343 | /** |
<> | 144:ef7eb2e8f9f7 | 1344 | * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). |
Anna Bridge |
180:96ed750bd169 | 1345 | * @param hrtc RTC handle |
Anna Bridge |
180:96ed750bd169 | 1346 | * @param CalibOutput Select the Calibration output Selection . |
<> | 144:ef7eb2e8f9f7 | 1347 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1348 | * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz. |
<> | 144:ef7eb2e8f9f7 | 1349 | * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz. |
<> | 144:ef7eb2e8f9f7 | 1350 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1351 | */ |
<> | 144:ef7eb2e8f9f7 | 1352 | HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput) |
<> | 144:ef7eb2e8f9f7 | 1353 | { |
<> | 144:ef7eb2e8f9f7 | 1354 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1355 | assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput)); |
<> | 144:ef7eb2e8f9f7 | 1356 | |
<> | 144:ef7eb2e8f9f7 | 1357 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1358 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1359 | |
<> | 144:ef7eb2e8f9f7 | 1360 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1361 | |
<> | 144:ef7eb2e8f9f7 | 1362 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1363 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1364 | |
<> | 144:ef7eb2e8f9f7 | 1365 | /* Clear flags before config */ |
<> | 144:ef7eb2e8f9f7 | 1366 | hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL; |
<> | 144:ef7eb2e8f9f7 | 1367 | |
<> | 144:ef7eb2e8f9f7 | 1368 | /* Configure the RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 1369 | hrtc->Instance->CR |= (uint32_t)CalibOutput; |
<> | 144:ef7eb2e8f9f7 | 1370 | |
<> | 144:ef7eb2e8f9f7 | 1371 | __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1372 | |
<> | 144:ef7eb2e8f9f7 | 1373 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1374 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1375 | |
<> | 144:ef7eb2e8f9f7 | 1376 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1377 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1378 | |
<> | 144:ef7eb2e8f9f7 | 1379 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1380 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1381 | |
<> | 144:ef7eb2e8f9f7 | 1382 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1383 | } |
<> | 144:ef7eb2e8f9f7 | 1384 | |
<> | 144:ef7eb2e8f9f7 | 1385 | /** |
<> | 144:ef7eb2e8f9f7 | 1386 | * @brief Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). |
Anna Bridge |
180:96ed750bd169 | 1387 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1388 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1389 | */ |
<> | 144:ef7eb2e8f9f7 | 1390 | HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1391 | { |
<> | 144:ef7eb2e8f9f7 | 1392 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1393 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1394 | |
<> | 144:ef7eb2e8f9f7 | 1395 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1396 | |
<> | 144:ef7eb2e8f9f7 | 1397 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1398 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1399 | |
<> | 144:ef7eb2e8f9f7 | 1400 | __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1401 | |
<> | 144:ef7eb2e8f9f7 | 1402 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1403 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1404 | |
<> | 144:ef7eb2e8f9f7 | 1405 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1406 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1407 | |
<> | 144:ef7eb2e8f9f7 | 1408 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1409 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1410 | |
<> | 144:ef7eb2e8f9f7 | 1411 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1412 | } |
<> | 144:ef7eb2e8f9f7 | 1413 | |
<> | 144:ef7eb2e8f9f7 | 1414 | /** |
<> | 144:ef7eb2e8f9f7 | 1415 | * @brief Enable the RTC reference clock detection. |
Anna Bridge |
180:96ed750bd169 | 1416 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1417 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1418 | */ |
<> | 144:ef7eb2e8f9f7 | 1419 | HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1420 | { |
<> | 144:ef7eb2e8f9f7 | 1421 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1422 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1423 | |
<> | 144:ef7eb2e8f9f7 | 1424 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1425 | |
<> | 144:ef7eb2e8f9f7 | 1426 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1427 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1428 | |
<> | 144:ef7eb2e8f9f7 | 1429 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1430 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1431 | { |
<> | 144:ef7eb2e8f9f7 | 1432 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1433 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1434 | |
<> | 144:ef7eb2e8f9f7 | 1435 | /* Set RTC state*/ |
<> | 144:ef7eb2e8f9f7 | 1436 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1437 | |
<> | 144:ef7eb2e8f9f7 | 1438 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1439 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1440 | |
<> | 144:ef7eb2e8f9f7 | 1441 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1442 | } |
<> | 144:ef7eb2e8f9f7 | 1443 | else |
<> | 144:ef7eb2e8f9f7 | 1444 | { |
<> | 144:ef7eb2e8f9f7 | 1445 | __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1446 | |
<> | 144:ef7eb2e8f9f7 | 1447 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1448 | hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; |
<> | 144:ef7eb2e8f9f7 | 1449 | } |
<> | 144:ef7eb2e8f9f7 | 1450 | |
<> | 144:ef7eb2e8f9f7 | 1451 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1452 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1453 | |
<> | 144:ef7eb2e8f9f7 | 1454 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1455 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1456 | |
<> | 144:ef7eb2e8f9f7 | 1457 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1458 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1459 | |
<> | 144:ef7eb2e8f9f7 | 1460 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1461 | } |
<> | 144:ef7eb2e8f9f7 | 1462 | |
<> | 144:ef7eb2e8f9f7 | 1463 | /** |
<> | 144:ef7eb2e8f9f7 | 1464 | * @brief Disable the RTC reference clock detection. |
Anna Bridge |
180:96ed750bd169 | 1465 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1466 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1467 | */ |
<> | 144:ef7eb2e8f9f7 | 1468 | HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1469 | { |
<> | 144:ef7eb2e8f9f7 | 1470 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1471 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1472 | |
<> | 144:ef7eb2e8f9f7 | 1473 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1474 | |
<> | 144:ef7eb2e8f9f7 | 1475 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1476 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1477 | |
<> | 144:ef7eb2e8f9f7 | 1478 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1479 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 1480 | { |
<> | 144:ef7eb2e8f9f7 | 1481 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1482 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1483 | |
<> | 144:ef7eb2e8f9f7 | 1484 | /* Set RTC state*/ |
<> | 144:ef7eb2e8f9f7 | 1485 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1486 | |
<> | 144:ef7eb2e8f9f7 | 1487 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1488 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1489 | |
<> | 144:ef7eb2e8f9f7 | 1490 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1491 | } |
<> | 144:ef7eb2e8f9f7 | 1492 | else |
<> | 144:ef7eb2e8f9f7 | 1493 | { |
<> | 144:ef7eb2e8f9f7 | 1494 | __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1495 | |
<> | 144:ef7eb2e8f9f7 | 1496 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1497 | hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; |
<> | 144:ef7eb2e8f9f7 | 1498 | } |
<> | 144:ef7eb2e8f9f7 | 1499 | |
<> | 144:ef7eb2e8f9f7 | 1500 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1501 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1502 | |
<> | 144:ef7eb2e8f9f7 | 1503 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1504 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1505 | |
<> | 144:ef7eb2e8f9f7 | 1506 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1507 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1508 | |
<> | 144:ef7eb2e8f9f7 | 1509 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1510 | } |
<> | 144:ef7eb2e8f9f7 | 1511 | |
<> | 144:ef7eb2e8f9f7 | 1512 | /** |
<> | 144:ef7eb2e8f9f7 | 1513 | * @brief Enable the Bypass Shadow feature. |
Anna Bridge |
180:96ed750bd169 | 1514 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1515 | * @note When the Bypass Shadow is enabled the calendar value are taken |
<> | 144:ef7eb2e8f9f7 | 1516 | * directly from the Calendar counter. |
<> | 144:ef7eb2e8f9f7 | 1517 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1518 | */ |
<> | 144:ef7eb2e8f9f7 | 1519 | HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1520 | { |
<> | 144:ef7eb2e8f9f7 | 1521 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1522 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1523 | |
<> | 144:ef7eb2e8f9f7 | 1524 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1525 | |
<> | 144:ef7eb2e8f9f7 | 1526 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1527 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1528 | |
<> | 144:ef7eb2e8f9f7 | 1529 | /* Set the BYPSHAD bit */ |
<> | 144:ef7eb2e8f9f7 | 1530 | hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; |
<> | 144:ef7eb2e8f9f7 | 1531 | |
<> | 144:ef7eb2e8f9f7 | 1532 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1533 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1534 | |
<> | 144:ef7eb2e8f9f7 | 1535 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1536 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1537 | |
<> | 144:ef7eb2e8f9f7 | 1538 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1539 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1540 | |
<> | 144:ef7eb2e8f9f7 | 1541 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1542 | } |
<> | 144:ef7eb2e8f9f7 | 1543 | |
<> | 144:ef7eb2e8f9f7 | 1544 | /** |
<> | 144:ef7eb2e8f9f7 | 1545 | * @brief Disable the Bypass Shadow feature. |
Anna Bridge |
180:96ed750bd169 | 1546 | * @param hrtc RTC handle |
<> | 144:ef7eb2e8f9f7 | 1547 | * @note When the Bypass Shadow is enabled the calendar value are taken |
<> | 144:ef7eb2e8f9f7 | 1548 | * directly from the Calendar counter. |
<> | 144:ef7eb2e8f9f7 | 1549 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1550 | */ |
<> | 144:ef7eb2e8f9f7 | 1551 | HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1552 | { |
<> | 144:ef7eb2e8f9f7 | 1553 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1554 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1555 | |
<> | 144:ef7eb2e8f9f7 | 1556 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1557 | |
<> | 144:ef7eb2e8f9f7 | 1558 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1559 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1560 | |
<> | 144:ef7eb2e8f9f7 | 1561 | /* Reset the BYPSHAD bit */ |
<> | 144:ef7eb2e8f9f7 | 1562 | hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD); |
<> | 144:ef7eb2e8f9f7 | 1563 | |
<> | 144:ef7eb2e8f9f7 | 1564 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1565 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1566 | |
<> | 144:ef7eb2e8f9f7 | 1567 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1568 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1569 | |
<> | 144:ef7eb2e8f9f7 | 1570 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1571 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1572 | |
<> | 144:ef7eb2e8f9f7 | 1573 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1574 | } |
<> | 144:ef7eb2e8f9f7 | 1575 | |
<> | 144:ef7eb2e8f9f7 | 1576 | /** |
<> | 144:ef7eb2e8f9f7 | 1577 | * @} |
<> | 144:ef7eb2e8f9f7 | 1578 | */ |
<> | 144:ef7eb2e8f9f7 | 1579 | |
<> | 144:ef7eb2e8f9f7 | 1580 | /** |
<> | 144:ef7eb2e8f9f7 | 1581 | * @} |
<> | 144:ef7eb2e8f9f7 | 1582 | */ |
<> | 144:ef7eb2e8f9f7 | 1583 | |
<> | 144:ef7eb2e8f9f7 | 1584 | #endif /* HAL_RTC_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 1585 | |
<> | 144:ef7eb2e8f9f7 | 1586 | /** |
<> | 144:ef7eb2e8f9f7 | 1587 | * @} |
<> | 144:ef7eb2e8f9f7 | 1588 | */ |
<> | 144:ef7eb2e8f9f7 | 1589 | |
<> | 144:ef7eb2e8f9f7 | 1590 | /** |
<> | 144:ef7eb2e8f9f7 | 1591 | * @} |
<> | 144:ef7eb2e8f9f7 | 1592 | */ |
<> | 144:ef7eb2e8f9f7 | 1593 | |
<> | 144:ef7eb2e8f9f7 | 1594 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |