mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_pcd.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 180:96ed750bd169
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f0xx_hal_pcd.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @brief Header file of PCD HAL module. |
<> | 144:ef7eb2e8f9f7 | 6 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 7 | * @attention |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 12 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 14 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 17 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 19 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 20 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 21 | * |
<> | 144:ef7eb2e8f9f7 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 32 | * |
<> | 144:ef7eb2e8f9f7 | 33 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 34 | */ |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 37 | #ifndef __STM32F0xx_HAL_PCD_H |
<> | 144:ef7eb2e8f9f7 | 38 | #define __STM32F0xx_HAL_PCD_H |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 41 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 42 | #endif |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6) |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 47 | #include "stm32f0xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 50 | * @{ |
<> | 144:ef7eb2e8f9f7 | 51 | */ |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /** @addtogroup PCD |
<> | 144:ef7eb2e8f9f7 | 54 | * @{ |
<> | 144:ef7eb2e8f9f7 | 55 | */ |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 58 | /** @defgroup PCD_Exported_Types PCD Exported Types |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /** |
<> | 144:ef7eb2e8f9f7 | 63 | * @brief PCD State structure definition |
<> | 144:ef7eb2e8f9f7 | 64 | */ |
<> | 144:ef7eb2e8f9f7 | 65 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 66 | { |
<> | 156:95d6b41a828b | 67 | HAL_PCD_STATE_RESET = 0x00U, |
<> | 156:95d6b41a828b | 68 | HAL_PCD_STATE_READY = 0x01U, |
<> | 156:95d6b41a828b | 69 | HAL_PCD_STATE_ERROR = 0x02U, |
<> | 156:95d6b41a828b | 70 | HAL_PCD_STATE_BUSY = 0x03U, |
<> | 156:95d6b41a828b | 71 | HAL_PCD_STATE_TIMEOUT = 0x04U |
<> | 144:ef7eb2e8f9f7 | 72 | } PCD_StateTypeDef; |
<> | 144:ef7eb2e8f9f7 | 73 | |
<> | 144:ef7eb2e8f9f7 | 74 | /** |
<> | 144:ef7eb2e8f9f7 | 75 | * @brief PCD double buffered endpoint direction |
<> | 144:ef7eb2e8f9f7 | 76 | */ |
<> | 144:ef7eb2e8f9f7 | 77 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 78 | { |
<> | 144:ef7eb2e8f9f7 | 79 | PCD_EP_DBUF_OUT, |
<> | 144:ef7eb2e8f9f7 | 80 | PCD_EP_DBUF_IN, |
<> | 144:ef7eb2e8f9f7 | 81 | PCD_EP_DBUF_ERR, |
<> | 144:ef7eb2e8f9f7 | 82 | }PCD_EP_DBUF_DIR; |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | /** |
<> | 144:ef7eb2e8f9f7 | 85 | * @brief PCD endpoint buffer number |
<> | 144:ef7eb2e8f9f7 | 86 | */ |
<> | 144:ef7eb2e8f9f7 | 87 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 88 | { |
<> | 144:ef7eb2e8f9f7 | 89 | PCD_EP_NOBUF, |
<> | 144:ef7eb2e8f9f7 | 90 | PCD_EP_BUF0, |
<> | 144:ef7eb2e8f9f7 | 91 | PCD_EP_BUF1 |
<> | 144:ef7eb2e8f9f7 | 92 | }PCD_EP_BUF_NUM; |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | /** |
<> | 144:ef7eb2e8f9f7 | 95 | * @brief PCD Initialization Structure definition |
<> | 144:ef7eb2e8f9f7 | 96 | */ |
<> | 144:ef7eb2e8f9f7 | 97 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 98 | { |
<> | 144:ef7eb2e8f9f7 | 99 | uint32_t dev_endpoints; /*!< Device Endpoints number. |
<> | 144:ef7eb2e8f9f7 | 100 | This parameter depends on the used USB core. |
<> | 144:ef7eb2e8f9f7 | 101 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | uint32_t speed; /*!< USB Core speed. |
<> | 144:ef7eb2e8f9f7 | 104 | This parameter can be any value of @ref PCD_Core_Speed */ |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. |
<> | 144:ef7eb2e8f9f7 | 107 | This parameter can be any value of @ref PCD_EP0_MPS */ |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | uint32_t phy_itface; /*!< Select the used PHY interface. |
<> | 144:ef7eb2e8f9f7 | 110 | This parameter can be any value of @ref PCD_Core_PHY */ |
<> | 144:ef7eb2e8f9f7 | 111 | |
<> | 144:ef7eb2e8f9f7 | 112 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. |
<> | 144:ef7eb2e8f9f7 | 113 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | uint32_t low_power_enable; /*!< Enable or disable Low Power mode |
<> | 144:ef7eb2e8f9f7 | 116 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 117 | |
<> | 144:ef7eb2e8f9f7 | 118 | uint32_t lpm_enable; /*!< Enable or disable the Link Power Management . |
<> | 144:ef7eb2e8f9f7 | 119 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. |
<> | 144:ef7eb2e8f9f7 | 122 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 123 | |
<> | 144:ef7eb2e8f9f7 | 124 | }PCD_InitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 127 | { |
<> | 144:ef7eb2e8f9f7 | 128 | uint8_t num; /*!< Endpoint number |
<> | 144:ef7eb2e8f9f7 | 129 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | uint8_t is_in; /*!< Endpoint direction |
<> | 144:ef7eb2e8f9f7 | 132 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | uint8_t is_stall; /*!< Endpoint stall condition |
<> | 144:ef7eb2e8f9f7 | 135 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | uint8_t type; /*!< Endpoint type |
<> | 144:ef7eb2e8f9f7 | 138 | This parameter can be any value of @ref PCD_EP_Type */ |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | uint16_t pmaadress; /*!< PMA Address |
<> | 144:ef7eb2e8f9f7 | 141 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | uint16_t pmaaddr0; /*!< PMA Address0 |
<> | 144:ef7eb2e8f9f7 | 144 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | uint16_t pmaaddr1; /*!< PMA Address1 |
<> | 144:ef7eb2e8f9f7 | 147 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 148 | |
<> | 144:ef7eb2e8f9f7 | 149 | uint8_t doublebuffer; /*!< Double buffer enable |
<> | 144:ef7eb2e8f9f7 | 150 | This parameter can be 0 or 1 */ |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | uint32_t maxpacket; /*!< Endpoint Max packet size |
<> | 144:ef7eb2e8f9f7 | 153 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
<> | 144:ef7eb2e8f9f7 | 154 | |
<> | 144:ef7eb2e8f9f7 | 155 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | uint32_t xfer_len; /*!< Current transfer length */ |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | }PCD_EPTypeDef; |
<> | 144:ef7eb2e8f9f7 | 162 | |
<> | 144:ef7eb2e8f9f7 | 163 | typedef USB_TypeDef PCD_TypeDef; |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | /** |
<> | 144:ef7eb2e8f9f7 | 166 | * @brief PCD Handle Structure definition |
<> | 144:ef7eb2e8f9f7 | 167 | */ |
<> | 144:ef7eb2e8f9f7 | 168 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 169 | { |
<> | 144:ef7eb2e8f9f7 | 170 | PCD_TypeDef *Instance; /*!< Register base address */ |
<> | 144:ef7eb2e8f9f7 | 171 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
<> | 144:ef7eb2e8f9f7 | 172 | __IO uint8_t USB_Address; /*!< USB Address */ |
<> | 144:ef7eb2e8f9f7 | 173 | PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
<> | 144:ef7eb2e8f9f7 | 174 | PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
<> | 144:ef7eb2e8f9f7 | 175 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
<> | 144:ef7eb2e8f9f7 | 176 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
<> | 144:ef7eb2e8f9f7 | 177 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
<> | 144:ef7eb2e8f9f7 | 178 | void *pData; /*!< Pointer to upper stack Handler */ |
<> | 144:ef7eb2e8f9f7 | 179 | |
<> | 144:ef7eb2e8f9f7 | 180 | } PCD_HandleTypeDef; |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | /** |
<> | 144:ef7eb2e8f9f7 | 183 | * @} |
<> | 144:ef7eb2e8f9f7 | 184 | */ |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | /* Include PCD HAL Extension module */ |
<> | 144:ef7eb2e8f9f7 | 187 | #include "stm32f0xx_hal_pcd_ex.h" |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 190 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
<> | 144:ef7eb2e8f9f7 | 191 | * @{ |
<> | 144:ef7eb2e8f9f7 | 192 | */ |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | /** @defgroup PCD_Core_Speed PCD Core Speed |
<> | 144:ef7eb2e8f9f7 | 195 | * @{ |
<> | 144:ef7eb2e8f9f7 | 196 | */ |
<> | 144:ef7eb2e8f9f7 | 197 | #define PCD_SPEED_HIGH 0 /* Not Supported */ |
<> | 144:ef7eb2e8f9f7 | 198 | #define PCD_SPEED_FULL 2 |
<> | 144:ef7eb2e8f9f7 | 199 | /** |
<> | 144:ef7eb2e8f9f7 | 200 | * @} |
<> | 144:ef7eb2e8f9f7 | 201 | */ |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | /** @defgroup PCD_Core_PHY PCD Core PHY |
<> | 144:ef7eb2e8f9f7 | 204 | * @{ |
<> | 144:ef7eb2e8f9f7 | 205 | */ |
<> | 144:ef7eb2e8f9f7 | 206 | #define PCD_PHY_EMBEDDED 2 |
<> | 144:ef7eb2e8f9f7 | 207 | /** |
<> | 144:ef7eb2e8f9f7 | 208 | * @} |
<> | 144:ef7eb2e8f9f7 | 209 | */ |
<> | 144:ef7eb2e8f9f7 | 210 | /** |
<> | 144:ef7eb2e8f9f7 | 211 | * @} |
<> | 144:ef7eb2e8f9f7 | 212 | */ |
<> | 144:ef7eb2e8f9f7 | 213 | |
<> | 144:ef7eb2e8f9f7 | 214 | /* Exported macros -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 215 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
<> | 144:ef7eb2e8f9f7 | 216 | * @brief macros to handle interrupts and specific clock configurations |
<> | 144:ef7eb2e8f9f7 | 217 | * @{ |
<> | 144:ef7eb2e8f9f7 | 218 | */ |
<> | 144:ef7eb2e8f9f7 | 219 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 220 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))) |
<> | 144:ef7eb2e8f9f7 | 221 | |
<> | 144:ef7eb2e8f9f7 | 222 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
<> | 144:ef7eb2e8f9f7 | 223 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
<> | 144:ef7eb2e8f9f7 | 224 | #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__)) |
<> | 144:ef7eb2e8f9f7 | 225 | |
<> | 144:ef7eb2e8f9f7 | 226 | /** |
<> | 144:ef7eb2e8f9f7 | 227 | * @} |
<> | 144:ef7eb2e8f9f7 | 228 | */ |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 231 | /** @addtogroup PCD_Exported_Functions PCD Exported Functions |
<> | 144:ef7eb2e8f9f7 | 232 | * @{ |
<> | 144:ef7eb2e8f9f7 | 233 | */ |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | /* Initialization/de-initialization functions ********************************/ |
<> | 144:ef7eb2e8f9f7 | 236 | /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 237 | * @{ |
<> | 144:ef7eb2e8f9f7 | 238 | */ |
<> | 144:ef7eb2e8f9f7 | 239 | HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 240 | HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 241 | void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 242 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 243 | /** |
<> | 144:ef7eb2e8f9f7 | 244 | * @} |
<> | 144:ef7eb2e8f9f7 | 245 | */ |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /* I/O operation functions ***************************************************/ |
<> | 144:ef7eb2e8f9f7 | 248 | /* Non-Blocking mode: Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 249 | /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions |
<> | 144:ef7eb2e8f9f7 | 250 | * @{ |
<> | 144:ef7eb2e8f9f7 | 251 | */ |
<> | 144:ef7eb2e8f9f7 | 252 | HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 253 | HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 254 | void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 257 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 258 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 259 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 260 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 261 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 262 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 263 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 264 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 265 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 266 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 267 | /** |
<> | 144:ef7eb2e8f9f7 | 268 | * @} |
<> | 144:ef7eb2e8f9f7 | 269 | */ |
<> | 144:ef7eb2e8f9f7 | 270 | |
<> | 144:ef7eb2e8f9f7 | 271 | /* Peripheral Control functions **********************************************/ |
<> | 144:ef7eb2e8f9f7 | 272 | /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 273 | * @{ |
<> | 144:ef7eb2e8f9f7 | 274 | */ |
<> | 144:ef7eb2e8f9f7 | 275 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 276 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 277 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
<> | 144:ef7eb2e8f9f7 | 278 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
<> | 144:ef7eb2e8f9f7 | 279 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 280 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 281 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 282 | uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 283 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 284 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 285 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 286 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 287 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 288 | /** |
<> | 144:ef7eb2e8f9f7 | 289 | * @} |
<> | 144:ef7eb2e8f9f7 | 290 | */ |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | /* Peripheral State functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 293 | /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 294 | * @{ |
<> | 144:ef7eb2e8f9f7 | 295 | */ |
<> | 144:ef7eb2e8f9f7 | 296 | PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 297 | /** |
<> | 144:ef7eb2e8f9f7 | 298 | * @} |
<> | 144:ef7eb2e8f9f7 | 299 | */ |
<> | 144:ef7eb2e8f9f7 | 300 | |
<> | 144:ef7eb2e8f9f7 | 301 | /** |
<> | 144:ef7eb2e8f9f7 | 302 | * @} |
<> | 144:ef7eb2e8f9f7 | 303 | */ |
<> | 144:ef7eb2e8f9f7 | 304 | |
<> | 144:ef7eb2e8f9f7 | 305 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 306 | /** @defgroup PCD_Private_Constants PCD Private Constants |
<> | 144:ef7eb2e8f9f7 | 307 | * @{ |
<> | 144:ef7eb2e8f9f7 | 308 | */ |
<> | 144:ef7eb2e8f9f7 | 309 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
<> | 144:ef7eb2e8f9f7 | 310 | * @{ |
<> | 144:ef7eb2e8f9f7 | 311 | */ |
<> | 144:ef7eb2e8f9f7 | 312 | #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */ |
<> | 144:ef7eb2e8f9f7 | 313 | /** |
<> | 144:ef7eb2e8f9f7 | 314 | * @} |
<> | 144:ef7eb2e8f9f7 | 315 | */ |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
<> | 144:ef7eb2e8f9f7 | 318 | * @{ |
<> | 144:ef7eb2e8f9f7 | 319 | */ |
<> | 144:ef7eb2e8f9f7 | 320 | #define DEP0CTL_MPS_64 0 |
<> | 144:ef7eb2e8f9f7 | 321 | #define DEP0CTL_MPS_32 1 |
<> | 144:ef7eb2e8f9f7 | 322 | #define DEP0CTL_MPS_16 2 |
<> | 144:ef7eb2e8f9f7 | 323 | #define DEP0CTL_MPS_8 3 |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | #define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
<> | 144:ef7eb2e8f9f7 | 326 | #define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
<> | 144:ef7eb2e8f9f7 | 327 | #define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
<> | 144:ef7eb2e8f9f7 | 328 | #define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
<> | 144:ef7eb2e8f9f7 | 329 | /** |
<> | 144:ef7eb2e8f9f7 | 330 | * @} |
<> | 144:ef7eb2e8f9f7 | 331 | */ |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | /** @defgroup PCD_EP_Type PCD EP Type |
<> | 144:ef7eb2e8f9f7 | 334 | * @{ |
<> | 144:ef7eb2e8f9f7 | 335 | */ |
<> | 144:ef7eb2e8f9f7 | 336 | #define PCD_EP_TYPE_CTRL 0 |
<> | 144:ef7eb2e8f9f7 | 337 | #define PCD_EP_TYPE_ISOC 1 |
<> | 144:ef7eb2e8f9f7 | 338 | #define PCD_EP_TYPE_BULK 2 |
<> | 144:ef7eb2e8f9f7 | 339 | #define PCD_EP_TYPE_INTR 3 |
<> | 144:ef7eb2e8f9f7 | 340 | /** |
<> | 144:ef7eb2e8f9f7 | 341 | * @} |
<> | 144:ef7eb2e8f9f7 | 342 | */ |
<> | 144:ef7eb2e8f9f7 | 343 | |
<> | 144:ef7eb2e8f9f7 | 344 | /** @defgroup PCD_ENDP PCD ENDP |
<> | 144:ef7eb2e8f9f7 | 345 | * @{ |
<> | 144:ef7eb2e8f9f7 | 346 | */ |
<> | 156:95d6b41a828b | 347 | #define PCD_ENDP0 ((uint8_t)0U) |
<> | 156:95d6b41a828b | 348 | #define PCD_ENDP1 ((uint8_t)1U) |
<> | 156:95d6b41a828b | 349 | #define PCD_ENDP2 ((uint8_t)2U) |
<> | 156:95d6b41a828b | 350 | #define PCD_ENDP3 ((uint8_t)3U) |
<> | 156:95d6b41a828b | 351 | #define PCD_ENDP4 ((uint8_t)4U) |
<> | 156:95d6b41a828b | 352 | #define PCD_ENDP5 ((uint8_t)5U) |
<> | 156:95d6b41a828b | 353 | #define PCD_ENDP6 ((uint8_t)6U) |
<> | 156:95d6b41a828b | 354 | #define PCD_ENDP7 ((uint8_t)7U) |
<> | 144:ef7eb2e8f9f7 | 355 | /** |
<> | 144:ef7eb2e8f9f7 | 356 | * @} |
<> | 144:ef7eb2e8f9f7 | 357 | */ |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
<> | 144:ef7eb2e8f9f7 | 360 | * @{ |
<> | 144:ef7eb2e8f9f7 | 361 | */ |
<> | 144:ef7eb2e8f9f7 | 362 | #define PCD_SNG_BUF 0 |
<> | 144:ef7eb2e8f9f7 | 363 | #define PCD_DBL_BUF 1 |
<> | 144:ef7eb2e8f9f7 | 364 | /** |
<> | 144:ef7eb2e8f9f7 | 365 | * @} |
<> | 144:ef7eb2e8f9f7 | 366 | */ |
<> | 144:ef7eb2e8f9f7 | 367 | |
<> | 144:ef7eb2e8f9f7 | 368 | /** |
<> | 144:ef7eb2e8f9f7 | 369 | * @} |
<> | 144:ef7eb2e8f9f7 | 370 | */ |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 373 | /** @addtogroup PCD_Private_Macros PCD Private Macros |
<> | 144:ef7eb2e8f9f7 | 374 | * @{ |
<> | 144:ef7eb2e8f9f7 | 375 | */ |
<> | 144:ef7eb2e8f9f7 | 376 | |
<> | 144:ef7eb2e8f9f7 | 377 | /* SetENDPOINT */ |
<> | 156:95d6b41a828b | 378 | #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue)) |
<> | 144:ef7eb2e8f9f7 | 379 | |
<> | 144:ef7eb2e8f9f7 | 380 | /* GetENDPOINT */ |
<> | 156:95d6b41a828b | 381 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))) |
<> | 144:ef7eb2e8f9f7 | 382 | |
<> | 144:ef7eb2e8f9f7 | 383 | |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | /** |
<> | 144:ef7eb2e8f9f7 | 386 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
Anna Bridge |
180:96ed750bd169 | 387 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 388 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 389 | * @param wType Endpoint Type. |
<> | 144:ef7eb2e8f9f7 | 390 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 391 | */ |
<> | 144:ef7eb2e8f9f7 | 392 | #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 393 | ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) ))) |
<> | 144:ef7eb2e8f9f7 | 394 | |
<> | 144:ef7eb2e8f9f7 | 395 | /** |
<> | 144:ef7eb2e8f9f7 | 396 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
Anna Bridge |
180:96ed750bd169 | 397 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 398 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 399 | * @retval Endpoint Type |
<> | 144:ef7eb2e8f9f7 | 400 | */ |
<> | 144:ef7eb2e8f9f7 | 401 | #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD) |
<> | 144:ef7eb2e8f9f7 | 402 | |
<> | 144:ef7eb2e8f9f7 | 403 | |
<> | 144:ef7eb2e8f9f7 | 404 | /** |
<> | 144:ef7eb2e8f9f7 | 405 | * @brief free buffer used from the application realizing it to the line |
<> | 144:ef7eb2e8f9f7 | 406 | toggles bit SW_BUF in the double buffered endpoint register |
Anna Bridge |
180:96ed750bd169 | 407 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 408 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 409 | * @param bDir Direction |
<> | 144:ef7eb2e8f9f7 | 410 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 411 | */ |
<> | 144:ef7eb2e8f9f7 | 412 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
<> | 144:ef7eb2e8f9f7 | 413 | {\ |
<> | 144:ef7eb2e8f9f7 | 414 | if ((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 415 | { /* OUT double buffered endpoint */\ |
<> | 144:ef7eb2e8f9f7 | 416 | PCD_TX_DTOG((USBx), (bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 417 | }\ |
<> | 144:ef7eb2e8f9f7 | 418 | else if ((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 419 | { /* IN double buffered endpoint */\ |
<> | 144:ef7eb2e8f9f7 | 420 | PCD_RX_DTOG((USBx), (bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 421 | }\ |
<> | 144:ef7eb2e8f9f7 | 422 | } |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | /** |
<> | 144:ef7eb2e8f9f7 | 425 | * @brief gets direction of the double buffered endpoint |
Anna Bridge |
180:96ed750bd169 | 426 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 427 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 428 | * @retval EP_DBUF_OUT, EP_DBUF_IN, |
<> | 144:ef7eb2e8f9f7 | 429 | * EP_DBUF_ERR if the endpoint counter not yet programmed. |
<> | 144:ef7eb2e8f9f7 | 430 | */ |
<> | 144:ef7eb2e8f9f7 | 431 | #define PCD_GET_DB_DIR(USBx, bEpNum)\ |
<> | 144:ef7eb2e8f9f7 | 432 | {\ |
<> | 156:95d6b41a828b | 433 | if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\ |
<> | 144:ef7eb2e8f9f7 | 434 | return(PCD_EP_DBUF_OUT);\ |
<> | 156:95d6b41a828b | 435 | else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\ |
<> | 144:ef7eb2e8f9f7 | 436 | return(PCD_EP_DBUF_IN);\ |
<> | 144:ef7eb2e8f9f7 | 437 | else\ |
<> | 144:ef7eb2e8f9f7 | 438 | return(PCD_EP_DBUF_ERR);\ |
<> | 144:ef7eb2e8f9f7 | 439 | } |
<> | 144:ef7eb2e8f9f7 | 440 | |
<> | 144:ef7eb2e8f9f7 | 441 | /** |
<> | 144:ef7eb2e8f9f7 | 442 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
Anna Bridge |
180:96ed750bd169 | 443 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 444 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 445 | * @param wState new state |
<> | 144:ef7eb2e8f9f7 | 446 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 447 | */ |
<> | 144:ef7eb2e8f9f7 | 448 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ |
<> | 144:ef7eb2e8f9f7 | 449 | \ |
<> | 144:ef7eb2e8f9f7 | 450 | _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\ |
<> | 144:ef7eb2e8f9f7 | 451 | /* toggle first bit ? */ \ |
<> | 156:95d6b41a828b | 452 | if((USB_EPTX_DTOG1 & (wState))!= 0U)\ |
<> | 144:ef7eb2e8f9f7 | 453 | { \ |
<> | 144:ef7eb2e8f9f7 | 454 | _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 455 | } \ |
<> | 144:ef7eb2e8f9f7 | 456 | /* toggle second bit ? */ \ |
<> | 156:95d6b41a828b | 457 | if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 458 | { \ |
<> | 144:ef7eb2e8f9f7 | 459 | _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 460 | } \ |
<> | 144:ef7eb2e8f9f7 | 461 | PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\ |
<> | 144:ef7eb2e8f9f7 | 462 | } /* PCD_SET_EP_TX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 463 | |
<> | 144:ef7eb2e8f9f7 | 464 | /** |
<> | 144:ef7eb2e8f9f7 | 465 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
Anna Bridge |
180:96ed750bd169 | 466 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 467 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 468 | * @param wState new state |
<> | 144:ef7eb2e8f9f7 | 469 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 470 | */ |
<> | 144:ef7eb2e8f9f7 | 471 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ |
<> | 144:ef7eb2e8f9f7 | 472 | register uint16_t _wRegVal; \ |
<> | 144:ef7eb2e8f9f7 | 473 | \ |
<> | 144:ef7eb2e8f9f7 | 474 | _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\ |
<> | 144:ef7eb2e8f9f7 | 475 | /* toggle first bit ? */ \ |
<> | 156:95d6b41a828b | 476 | if((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 477 | { \ |
<> | 144:ef7eb2e8f9f7 | 478 | _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 479 | } \ |
<> | 144:ef7eb2e8f9f7 | 480 | /* toggle second bit ? */ \ |
<> | 156:95d6b41a828b | 481 | if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 482 | { \ |
<> | 144:ef7eb2e8f9f7 | 483 | _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 484 | } \ |
<> | 144:ef7eb2e8f9f7 | 485 | PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
<> | 144:ef7eb2e8f9f7 | 486 | } /* PCD_SET_EP_RX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 487 | |
<> | 144:ef7eb2e8f9f7 | 488 | /** |
<> | 144:ef7eb2e8f9f7 | 489 | * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
Anna Bridge |
180:96ed750bd169 | 490 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 491 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 492 | * @param wStaterx new state. |
Anna Bridge |
180:96ed750bd169 | 493 | * @param wStatetx new state. |
<> | 144:ef7eb2e8f9f7 | 494 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 495 | */ |
<> | 144:ef7eb2e8f9f7 | 496 | #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ |
<> | 144:ef7eb2e8f9f7 | 497 | register uint32_t _wRegVal; \ |
<> | 144:ef7eb2e8f9f7 | 498 | \ |
<> | 144:ef7eb2e8f9f7 | 499 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ |
<> | 144:ef7eb2e8f9f7 | 500 | /* toggle first bit ? */ \ |
<> | 156:95d6b41a828b | 501 | if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 502 | { \ |
<> | 144:ef7eb2e8f9f7 | 503 | _wRegVal ^= USB_EPRX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 504 | } \ |
<> | 144:ef7eb2e8f9f7 | 505 | /* toggle second bit ? */ \ |
<> | 156:95d6b41a828b | 506 | if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 507 | { \ |
<> | 144:ef7eb2e8f9f7 | 508 | _wRegVal ^= USB_EPRX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 509 | } \ |
<> | 144:ef7eb2e8f9f7 | 510 | /* toggle first bit ? */ \ |
<> | 156:95d6b41a828b | 511 | if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 512 | { \ |
<> | 144:ef7eb2e8f9f7 | 513 | _wRegVal ^= USB_EPTX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 514 | } \ |
<> | 144:ef7eb2e8f9f7 | 515 | /* toggle second bit ? */ \ |
<> | 156:95d6b41a828b | 516 | if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
<> | 144:ef7eb2e8f9f7 | 517 | { \ |
<> | 144:ef7eb2e8f9f7 | 518 | _wRegVal ^= USB_EPTX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 519 | } \ |
<> | 144:ef7eb2e8f9f7 | 520 | PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ |
<> | 144:ef7eb2e8f9f7 | 521 | } /* PCD_SET_EP_TXRX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 522 | |
<> | 144:ef7eb2e8f9f7 | 523 | /** |
<> | 144:ef7eb2e8f9f7 | 524 | * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
<> | 144:ef7eb2e8f9f7 | 525 | * /STAT_RX[1:0]) |
Anna Bridge |
180:96ed750bd169 | 526 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 527 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 528 | * @retval status |
<> | 144:ef7eb2e8f9f7 | 529 | */ |
<> | 144:ef7eb2e8f9f7 | 530 | #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT) |
<> | 144:ef7eb2e8f9f7 | 531 | #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT) |
<> | 144:ef7eb2e8f9f7 | 532 | |
<> | 144:ef7eb2e8f9f7 | 533 | /** |
<> | 144:ef7eb2e8f9f7 | 534 | * @brief sets directly the VALID tx/rx-status into the endpoint register |
Anna Bridge |
180:96ed750bd169 | 535 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 536 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 537 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 538 | */ |
<> | 144:ef7eb2e8f9f7 | 539 | #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
<> | 144:ef7eb2e8f9f7 | 540 | #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
<> | 144:ef7eb2e8f9f7 | 541 | |
<> | 144:ef7eb2e8f9f7 | 542 | /** |
<> | 144:ef7eb2e8f9f7 | 543 | * @brief checks stall condition in an endpoint. |
Anna Bridge |
180:96ed750bd169 | 544 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 545 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 546 | * @retval TRUE = endpoint in stall condition. |
<> | 144:ef7eb2e8f9f7 | 547 | */ |
<> | 144:ef7eb2e8f9f7 | 548 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
<> | 144:ef7eb2e8f9f7 | 549 | == USB_EP_TX_STALL) |
<> | 144:ef7eb2e8f9f7 | 550 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
<> | 144:ef7eb2e8f9f7 | 551 | == USB_EP_RX_STALL) |
<> | 144:ef7eb2e8f9f7 | 552 | |
<> | 144:ef7eb2e8f9f7 | 553 | /** |
<> | 144:ef7eb2e8f9f7 | 554 | * @brief set & clear EP_KIND bit. |
Anna Bridge |
180:96ed750bd169 | 555 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 556 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 557 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 558 | */ |
<> | 144:ef7eb2e8f9f7 | 559 | #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 560 | (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK)))) |
<> | 144:ef7eb2e8f9f7 | 561 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 562 | (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK)))) |
<> | 144:ef7eb2e8f9f7 | 563 | |
<> | 144:ef7eb2e8f9f7 | 564 | /** |
<> | 144:ef7eb2e8f9f7 | 565 | * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
Anna Bridge |
180:96ed750bd169 | 566 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 567 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 568 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 569 | */ |
<> | 144:ef7eb2e8f9f7 | 570 | #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 571 | #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 572 | |
<> | 144:ef7eb2e8f9f7 | 573 | /** |
<> | 144:ef7eb2e8f9f7 | 574 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
Anna Bridge |
180:96ed750bd169 | 575 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 576 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 577 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 578 | */ |
<> | 144:ef7eb2e8f9f7 | 579 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 580 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 581 | |
<> | 144:ef7eb2e8f9f7 | 582 | /** |
<> | 144:ef7eb2e8f9f7 | 583 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
Anna Bridge |
180:96ed750bd169 | 584 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 585 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 586 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 587 | */ |
<> | 144:ef7eb2e8f9f7 | 588 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 589 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK)) |
<> | 144:ef7eb2e8f9f7 | 590 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 591 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK)) |
<> | 144:ef7eb2e8f9f7 | 592 | |
<> | 144:ef7eb2e8f9f7 | 593 | /** |
<> | 144:ef7eb2e8f9f7 | 594 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
Anna Bridge |
180:96ed750bd169 | 595 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 596 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 597 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 598 | */ |
<> | 144:ef7eb2e8f9f7 | 599 | #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 600 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK))) |
<> | 144:ef7eb2e8f9f7 | 601 | #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 602 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK))) |
<> | 144:ef7eb2e8f9f7 | 603 | |
<> | 144:ef7eb2e8f9f7 | 604 | /** |
<> | 144:ef7eb2e8f9f7 | 605 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
Anna Bridge |
180:96ed750bd169 | 606 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 607 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 608 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 609 | */ |
<> | 144:ef7eb2e8f9f7 | 610 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 611 | { \ |
<> | 144:ef7eb2e8f9f7 | 612 | PCD_RX_DTOG((USBx),(bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 613 | } |
<> | 144:ef7eb2e8f9f7 | 614 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 615 | {\ |
<> | 144:ef7eb2e8f9f7 | 616 | PCD_TX_DTOG((USBx),(bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 617 | } |
<> | 144:ef7eb2e8f9f7 | 618 | |
<> | 144:ef7eb2e8f9f7 | 619 | /** |
<> | 144:ef7eb2e8f9f7 | 620 | * @brief Sets address in an endpoint register. |
Anna Bridge |
180:96ed750bd169 | 621 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 622 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 623 | * @param bAddr Address. |
<> | 144:ef7eb2e8f9f7 | 624 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 625 | */ |
<> | 144:ef7eb2e8f9f7 | 626 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 627 | USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr)) |
<> | 144:ef7eb2e8f9f7 | 628 | |
<> | 144:ef7eb2e8f9f7 | 629 | /** |
<> | 144:ef7eb2e8f9f7 | 630 | * @brief Gets address in an endpoint register. |
Anna Bridge |
180:96ed750bd169 | 631 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 632 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 633 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 634 | */ |
<> | 144:ef7eb2e8f9f7 | 635 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
<> | 144:ef7eb2e8f9f7 | 636 | |
<> | 156:95d6b41a828b | 637 | #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400U))))) |
<> | 156:95d6b41a828b | 638 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400U))))) |
<> | 156:95d6b41a828b | 639 | #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400U))))) |
<> | 144:ef7eb2e8f9f7 | 640 | |
<> | 156:95d6b41a828b | 641 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400U))))) |
<> | 144:ef7eb2e8f9f7 | 642 | |
<> | 144:ef7eb2e8f9f7 | 643 | /** |
<> | 144:ef7eb2e8f9f7 | 644 | * @brief sets address of the tx/rx buffer. |
Anna Bridge |
180:96ed750bd169 | 645 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 646 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 647 | * @param wAddr address to be set (must be word aligned). |
<> | 144:ef7eb2e8f9f7 | 648 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 649 | */ |
<> | 156:95d6b41a828b | 650 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
<> | 156:95d6b41a828b | 651 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
<> | 144:ef7eb2e8f9f7 | 652 | |
<> | 144:ef7eb2e8f9f7 | 653 | /** |
<> | 144:ef7eb2e8f9f7 | 654 | * @brief Gets address of the tx/rx buffer. |
Anna Bridge |
180:96ed750bd169 | 655 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 656 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 657 | * @retval address of the buffer. |
<> | 144:ef7eb2e8f9f7 | 658 | */ |
<> | 144:ef7eb2e8f9f7 | 659 | #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 660 | #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 661 | |
<> | 144:ef7eb2e8f9f7 | 662 | /** |
<> | 144:ef7eb2e8f9f7 | 663 | * @brief Sets counter of rx buffer with no. of blocks. |
Anna Bridge |
180:96ed750bd169 | 664 | * @param dwReg Register |
Anna Bridge |
180:96ed750bd169 | 665 | * @param wCount Counter. |
Anna Bridge |
180:96ed750bd169 | 666 | * @param wNBlocks no. of Blocks. |
<> | 144:ef7eb2e8f9f7 | 667 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 668 | */ |
<> | 144:ef7eb2e8f9f7 | 669 | #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ |
<> | 156:95d6b41a828b | 670 | (wNBlocks) = (wCount) >> 5U;\ |
<> | 156:95d6b41a828b | 671 | if(((wCount) & 0x1fU) == 0U)\ |
<> | 144:ef7eb2e8f9f7 | 672 | { \ |
<> | 144:ef7eb2e8f9f7 | 673 | (wNBlocks)--;\ |
<> | 144:ef7eb2e8f9f7 | 674 | } \ |
<> | 156:95d6b41a828b | 675 | *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \ |
<> | 144:ef7eb2e8f9f7 | 676 | }/* PCD_CALC_BLK32 */ |
<> | 144:ef7eb2e8f9f7 | 677 | |
<> | 144:ef7eb2e8f9f7 | 678 | |
<> | 144:ef7eb2e8f9f7 | 679 | #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ |
<> | 156:95d6b41a828b | 680 | (wNBlocks) = (wCount) >> 1U;\ |
<> | 156:95d6b41a828b | 681 | if(((wCount) & 0x1U) != 0U)\ |
<> | 144:ef7eb2e8f9f7 | 682 | { \ |
<> | 144:ef7eb2e8f9f7 | 683 | (wNBlocks)++;\ |
<> | 144:ef7eb2e8f9f7 | 684 | } \ |
<> | 156:95d6b41a828b | 685 | *pdwReg = (uint16_t)((wNBlocks) << 10U);\ |
<> | 144:ef7eb2e8f9f7 | 686 | }/* PCD_CALC_BLK2 */ |
<> | 144:ef7eb2e8f9f7 | 687 | |
<> | 144:ef7eb2e8f9f7 | 688 | |
<> | 144:ef7eb2e8f9f7 | 689 | #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 690 | uint16_t wNBlocks;\ |
<> | 156:95d6b41a828b | 691 | if((wCount) > 62U) \ |
<> | 144:ef7eb2e8f9f7 | 692 | { \ |
<> | 144:ef7eb2e8f9f7 | 693 | PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \ |
<> | 144:ef7eb2e8f9f7 | 694 | } \ |
<> | 144:ef7eb2e8f9f7 | 695 | else \ |
<> | 144:ef7eb2e8f9f7 | 696 | { \ |
<> | 144:ef7eb2e8f9f7 | 697 | PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \ |
<> | 144:ef7eb2e8f9f7 | 698 | } \ |
<> | 144:ef7eb2e8f9f7 | 699 | }/* PCD_SET_EP_CNT_RX_REG */ |
<> | 144:ef7eb2e8f9f7 | 700 | |
<> | 144:ef7eb2e8f9f7 | 701 | |
<> | 144:ef7eb2e8f9f7 | 702 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 703 | uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ |
<> | 144:ef7eb2e8f9f7 | 704 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\ |
<> | 144:ef7eb2e8f9f7 | 705 | } |
<> | 144:ef7eb2e8f9f7 | 706 | |
<> | 144:ef7eb2e8f9f7 | 707 | /** |
<> | 144:ef7eb2e8f9f7 | 708 | * @brief sets counter for the tx/rx buffer. |
Anna Bridge |
180:96ed750bd169 | 709 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 710 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 711 | * @param wCount Counter value. |
<> | 144:ef7eb2e8f9f7 | 712 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 713 | */ |
<> | 144:ef7eb2e8f9f7 | 714 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) |
<> | 144:ef7eb2e8f9f7 | 715 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 716 | uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \ |
<> | 144:ef7eb2e8f9f7 | 717 | PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\ |
<> | 144:ef7eb2e8f9f7 | 718 | } |
<> | 144:ef7eb2e8f9f7 | 719 | |
<> | 144:ef7eb2e8f9f7 | 720 | /** |
<> | 144:ef7eb2e8f9f7 | 721 | * @brief gets counter of the tx buffer. |
Anna Bridge |
180:96ed750bd169 | 722 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 723 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 724 | * @retval Counter value |
<> | 144:ef7eb2e8f9f7 | 725 | */ |
<> | 156:95d6b41a828b | 726 | #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) |
<> | 156:95d6b41a828b | 727 | #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) |
<> | 144:ef7eb2e8f9f7 | 728 | |
<> | 144:ef7eb2e8f9f7 | 729 | /** |
<> | 144:ef7eb2e8f9f7 | 730 | * @brief Sets buffer 0/1 address in a double buffer endpoint. |
Anna Bridge |
180:96ed750bd169 | 731 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 732 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 733 | * @param wBuf0Addr buffer 0 address. |
<> | 144:ef7eb2e8f9f7 | 734 | * @retval Counter value |
<> | 144:ef7eb2e8f9f7 | 735 | */ |
<> | 144:ef7eb2e8f9f7 | 736 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr))) |
<> | 144:ef7eb2e8f9f7 | 737 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr))) |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | /** |
<> | 144:ef7eb2e8f9f7 | 740 | * @brief Sets addresses in a double buffer endpoint. |
Anna Bridge |
180:96ed750bd169 | 741 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 742 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 743 | * @param wBuf0Addr buffer 0 address. |
Anna Bridge |
180:96ed750bd169 | 744 | * @param wBuf1Addr buffer 1 address. |
<> | 144:ef7eb2e8f9f7 | 745 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 746 | */ |
<> | 144:ef7eb2e8f9f7 | 747 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
<> | 144:ef7eb2e8f9f7 | 748 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ |
<> | 144:ef7eb2e8f9f7 | 749 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ |
<> | 144:ef7eb2e8f9f7 | 750 | } /* PCD_SET_EP_DBUF_ADDR */ |
<> | 144:ef7eb2e8f9f7 | 751 | |
<> | 144:ef7eb2e8f9f7 | 752 | /** |
<> | 144:ef7eb2e8f9f7 | 753 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
Anna Bridge |
180:96ed750bd169 | 754 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 755 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 756 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 757 | */ |
<> | 144:ef7eb2e8f9f7 | 758 | #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 759 | #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 760 | |
<> | 144:ef7eb2e8f9f7 | 761 | /** |
<> | 144:ef7eb2e8f9f7 | 762 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
Anna Bridge |
180:96ed750bd169 | 763 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 764 | * @param bEpNum Endpoint Number. |
Anna Bridge |
180:96ed750bd169 | 765 | * @param bDir endpoint dir EP_DBUF_OUT = OUT |
<> | 144:ef7eb2e8f9f7 | 766 | * EP_DBUF_IN = IN |
Anna Bridge |
180:96ed750bd169 | 767 | * @param wCount Counter value |
<> | 144:ef7eb2e8f9f7 | 768 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 769 | */ |
<> | 144:ef7eb2e8f9f7 | 770 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 144:ef7eb2e8f9f7 | 771 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 772 | /* OUT endpoint */ \ |
<> | 144:ef7eb2e8f9f7 | 773 | {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \ |
<> | 144:ef7eb2e8f9f7 | 774 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 775 | { \ |
<> | 144:ef7eb2e8f9f7 | 776 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 144:ef7eb2e8f9f7 | 777 | } \ |
<> | 144:ef7eb2e8f9f7 | 778 | } /* SetEPDblBuf0Count*/ |
<> | 144:ef7eb2e8f9f7 | 779 | |
<> | 144:ef7eb2e8f9f7 | 780 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 144:ef7eb2e8f9f7 | 781 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 782 | {/* OUT endpoint */ \ |
<> | 144:ef7eb2e8f9f7 | 783 | PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \ |
<> | 144:ef7eb2e8f9f7 | 784 | } \ |
<> | 144:ef7eb2e8f9f7 | 785 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 786 | {/* IN endpoint */ \ |
<> | 156:95d6b41a828b | 787 | *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 144:ef7eb2e8f9f7 | 788 | } \ |
<> | 144:ef7eb2e8f9f7 | 789 | } /* SetEPDblBuf1Count */ |
<> | 144:ef7eb2e8f9f7 | 790 | |
<> | 144:ef7eb2e8f9f7 | 791 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 792 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \ |
<> | 144:ef7eb2e8f9f7 | 793 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \ |
<> | 144:ef7eb2e8f9f7 | 794 | } /* PCD_SET_EP_DBUF_CNT */ |
<> | 144:ef7eb2e8f9f7 | 795 | |
<> | 144:ef7eb2e8f9f7 | 796 | /** |
<> | 144:ef7eb2e8f9f7 | 797 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
Anna Bridge |
180:96ed750bd169 | 798 | * @param USBx USB peripheral instance register address. |
Anna Bridge |
180:96ed750bd169 | 799 | * @param bEpNum Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 800 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 801 | */ |
<> | 144:ef7eb2e8f9f7 | 802 | #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 803 | #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 804 | |
<> | 144:ef7eb2e8f9f7 | 805 | /** @defgroup PCD_Instance_definition PCD Instance definition |
<> | 144:ef7eb2e8f9f7 | 806 | * @{ |
<> | 144:ef7eb2e8f9f7 | 807 | */ |
<> | 144:ef7eb2e8f9f7 | 808 | #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
<> | 144:ef7eb2e8f9f7 | 809 | /** |
<> | 144:ef7eb2e8f9f7 | 810 | * @} |
<> | 144:ef7eb2e8f9f7 | 811 | */ |
<> | 144:ef7eb2e8f9f7 | 812 | |
<> | 144:ef7eb2e8f9f7 | 813 | /** |
<> | 144:ef7eb2e8f9f7 | 814 | * @} |
<> | 144:ef7eb2e8f9f7 | 815 | */ |
<> | 144:ef7eb2e8f9f7 | 816 | |
<> | 144:ef7eb2e8f9f7 | 817 | /** |
<> | 144:ef7eb2e8f9f7 | 818 | * @} |
<> | 144:ef7eb2e8f9f7 | 819 | */ |
<> | 144:ef7eb2e8f9f7 | 820 | |
<> | 144:ef7eb2e8f9f7 | 821 | /** |
<> | 144:ef7eb2e8f9f7 | 822 | * @} |
<> | 144:ef7eb2e8f9f7 | 823 | */ |
<> | 144:ef7eb2e8f9f7 | 824 | |
<> | 144:ef7eb2e8f9f7 | 825 | #endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ |
<> | 144:ef7eb2e8f9f7 | 826 | |
<> | 144:ef7eb2e8f9f7 | 827 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 828 | } |
<> | 144:ef7eb2e8f9f7 | 829 | #endif |
<> | 144:ef7eb2e8f9f7 | 830 | |
<> | 144:ef7eb2e8f9f7 | 831 | |
<> | 144:ef7eb2e8f9f7 | 832 | #endif /* __STM32F0xx_HAL_PCD_H */ |
<> | 144:ef7eb2e8f9f7 | 833 | |
<> | 144:ef7eb2e8f9f7 | 834 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 835 |