mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_pcd.h@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_pcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of PCD HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F0xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F0xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 49 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /** @addtogroup PCD
<> 144:ef7eb2e8f9f7 56 * @{
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup PCD_Exported_Types PCD Exported Types
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @brief PCD State structure definition
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67 typedef enum
<> 144:ef7eb2e8f9f7 68 {
<> 156:95d6b41a828b 69 HAL_PCD_STATE_RESET = 0x00U,
<> 156:95d6b41a828b 70 HAL_PCD_STATE_READY = 0x01U,
<> 156:95d6b41a828b 71 HAL_PCD_STATE_ERROR = 0x02U,
<> 156:95d6b41a828b 72 HAL_PCD_STATE_BUSY = 0x03U,
<> 156:95d6b41a828b 73 HAL_PCD_STATE_TIMEOUT = 0x04U
<> 144:ef7eb2e8f9f7 74 } PCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /**
<> 144:ef7eb2e8f9f7 77 * @brief PCD double buffered endpoint direction
<> 144:ef7eb2e8f9f7 78 */
<> 144:ef7eb2e8f9f7 79 typedef enum
<> 144:ef7eb2e8f9f7 80 {
<> 144:ef7eb2e8f9f7 81 PCD_EP_DBUF_OUT,
<> 144:ef7eb2e8f9f7 82 PCD_EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 83 PCD_EP_DBUF_ERR,
<> 144:ef7eb2e8f9f7 84 }PCD_EP_DBUF_DIR;
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 /**
<> 144:ef7eb2e8f9f7 87 * @brief PCD endpoint buffer number
<> 144:ef7eb2e8f9f7 88 */
<> 144:ef7eb2e8f9f7 89 typedef enum
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 PCD_EP_NOBUF,
<> 144:ef7eb2e8f9f7 92 PCD_EP_BUF0,
<> 144:ef7eb2e8f9f7 93 PCD_EP_BUF1
<> 144:ef7eb2e8f9f7 94 }PCD_EP_BUF_NUM;
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /**
<> 144:ef7eb2e8f9f7 97 * @brief PCD Initialization Structure definition
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 typedef struct
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 102 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 103 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 106 This parameter can be any value of @ref PCD_Core_Speed */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 109 This parameter can be any value of @ref PCD_EP0_MPS */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 uint32_t phy_itface; /*!< Select the used PHY interface.
<> 144:ef7eb2e8f9f7 112 This parameter can be any value of @ref PCD_Core_PHY */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
<> 144:ef7eb2e8f9f7 115 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint32_t low_power_enable; /*!< Enable or disable Low Power mode
<> 144:ef7eb2e8f9f7 118 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
<> 144:ef7eb2e8f9f7 121 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
<> 144:ef7eb2e8f9f7 124 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 }PCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 typedef struct
<> 144:ef7eb2e8f9f7 129 {
<> 144:ef7eb2e8f9f7 130 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 131 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 134 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 137 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 140 This parameter can be any value of @ref PCD_EP_Type */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 uint16_t pmaadress; /*!< PMA Address
<> 144:ef7eb2e8f9f7 143 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 uint16_t pmaaddr0; /*!< PMA Address0
<> 144:ef7eb2e8f9f7 146 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 uint16_t pmaaddr1; /*!< PMA Address1
<> 144:ef7eb2e8f9f7 149 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 uint8_t doublebuffer; /*!< Double buffer enable
<> 144:ef7eb2e8f9f7 152 This parameter can be 0 or 1 */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 155 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 }PCD_EPTypeDef;
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 typedef USB_TypeDef PCD_TypeDef;
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 /**
<> 144:ef7eb2e8f9f7 168 * @brief PCD Handle Structure definition
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170 typedef struct
<> 144:ef7eb2e8f9f7 171 {
<> 144:ef7eb2e8f9f7 172 PCD_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 173 PCD_InitTypeDef Init; /*!< PCD required parameters */
<> 144:ef7eb2e8f9f7 174 __IO uint8_t USB_Address; /*!< USB Address */
<> 144:ef7eb2e8f9f7 175 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
<> 144:ef7eb2e8f9f7 176 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
<> 144:ef7eb2e8f9f7 177 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
<> 144:ef7eb2e8f9f7 178 __IO PCD_StateTypeDef State; /*!< PCD communication state */
<> 144:ef7eb2e8f9f7 179 uint32_t Setup[12]; /*!< Setup packet buffer */
<> 144:ef7eb2e8f9f7 180 void *pData; /*!< Pointer to upper stack Handler */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 } PCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /* Include PCD HAL Extension module */
<> 144:ef7eb2e8f9f7 189 #include "stm32f0xx_hal_pcd_ex.h"
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 192 /** @defgroup PCD_Exported_Constants PCD Exported Constants
<> 144:ef7eb2e8f9f7 193 * @{
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /** @defgroup PCD_Core_Speed PCD Core Speed
<> 144:ef7eb2e8f9f7 197 * @{
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199 #define PCD_SPEED_HIGH 0 /* Not Supported */
<> 144:ef7eb2e8f9f7 200 #define PCD_SPEED_FULL 2
<> 144:ef7eb2e8f9f7 201 /**
<> 144:ef7eb2e8f9f7 202 * @}
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /** @defgroup PCD_Core_PHY PCD Core PHY
<> 144:ef7eb2e8f9f7 206 * @{
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208 #define PCD_PHY_EMBEDDED 2
<> 144:ef7eb2e8f9f7 209 /**
<> 144:ef7eb2e8f9f7 210 * @}
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212 /**
<> 144:ef7eb2e8f9f7 213 * @}
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 217 /** @defgroup PCD_Exported_Macros PCD Exported Macros
<> 144:ef7eb2e8f9f7 218 * @brief macros to handle interrupts and specific clock configurations
<> 144:ef7eb2e8f9f7 219 * @{
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 222 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))))
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 225 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 226 #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /**
<> 144:ef7eb2e8f9f7 229 * @}
<> 144:ef7eb2e8f9f7 230 */
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 233 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
<> 144:ef7eb2e8f9f7 234 * @{
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /* Initialization/de-initialization functions ********************************/
<> 144:ef7eb2e8f9f7 238 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 239 * @{
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 242 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 243 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 244 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @}
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /* I/O operation functions ***************************************************/
<> 144:ef7eb2e8f9f7 250 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 251 /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 252 * @{
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 255 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 256 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 259 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 260 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 261 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 262 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 263 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 264 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 265 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 266 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 267 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 268 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @}
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /* Peripheral Control functions **********************************************/
<> 144:ef7eb2e8f9f7 274 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 275 * @{
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 278 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 279 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
<> 144:ef7eb2e8f9f7 280 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
<> 144:ef7eb2e8f9f7 281 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 282 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 283 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 284 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 285 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 286 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 287 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 288 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 289 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 290 /**
<> 144:ef7eb2e8f9f7 291 * @}
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 295 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * @}
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @}
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 308 /** @defgroup PCD_Private_Constants PCD Private Constants
<> 144:ef7eb2e8f9f7 309 * @{
<> 144:ef7eb2e8f9f7 310 */
<> 144:ef7eb2e8f9f7 311 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
<> 144:ef7eb2e8f9f7 312 * @{
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @}
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
<> 144:ef7eb2e8f9f7 320 * @{
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322 #define DEP0CTL_MPS_64 0
<> 144:ef7eb2e8f9f7 323 #define DEP0CTL_MPS_32 1
<> 144:ef7eb2e8f9f7 324 #define DEP0CTL_MPS_16 2
<> 144:ef7eb2e8f9f7 325 #define DEP0CTL_MPS_8 3
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 #define PCD_EP0MPS_64 DEP0CTL_MPS_64
<> 144:ef7eb2e8f9f7 328 #define PCD_EP0MPS_32 DEP0CTL_MPS_32
<> 144:ef7eb2e8f9f7 329 #define PCD_EP0MPS_16 DEP0CTL_MPS_16
<> 144:ef7eb2e8f9f7 330 #define PCD_EP0MPS_08 DEP0CTL_MPS_8
<> 144:ef7eb2e8f9f7 331 /**
<> 144:ef7eb2e8f9f7 332 * @}
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** @defgroup PCD_EP_Type PCD EP Type
<> 144:ef7eb2e8f9f7 336 * @{
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338 #define PCD_EP_TYPE_CTRL 0
<> 144:ef7eb2e8f9f7 339 #define PCD_EP_TYPE_ISOC 1
<> 144:ef7eb2e8f9f7 340 #define PCD_EP_TYPE_BULK 2
<> 144:ef7eb2e8f9f7 341 #define PCD_EP_TYPE_INTR 3
<> 144:ef7eb2e8f9f7 342 /**
<> 144:ef7eb2e8f9f7 343 * @}
<> 144:ef7eb2e8f9f7 344 */
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /** @defgroup PCD_ENDP PCD ENDP
<> 144:ef7eb2e8f9f7 347 * @{
<> 144:ef7eb2e8f9f7 348 */
<> 156:95d6b41a828b 349 #define PCD_ENDP0 ((uint8_t)0U)
<> 156:95d6b41a828b 350 #define PCD_ENDP1 ((uint8_t)1U)
<> 156:95d6b41a828b 351 #define PCD_ENDP2 ((uint8_t)2U)
<> 156:95d6b41a828b 352 #define PCD_ENDP3 ((uint8_t)3U)
<> 156:95d6b41a828b 353 #define PCD_ENDP4 ((uint8_t)4U)
<> 156:95d6b41a828b 354 #define PCD_ENDP5 ((uint8_t)5U)
<> 156:95d6b41a828b 355 #define PCD_ENDP6 ((uint8_t)6U)
<> 156:95d6b41a828b 356 #define PCD_ENDP7 ((uint8_t)7U)
<> 144:ef7eb2e8f9f7 357 /**
<> 144:ef7eb2e8f9f7 358 * @}
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
<> 144:ef7eb2e8f9f7 362 * @{
<> 144:ef7eb2e8f9f7 363 */
<> 144:ef7eb2e8f9f7 364 #define PCD_SNG_BUF 0
<> 144:ef7eb2e8f9f7 365 #define PCD_DBL_BUF 1
<> 144:ef7eb2e8f9f7 366 /**
<> 144:ef7eb2e8f9f7 367 * @}
<> 144:ef7eb2e8f9f7 368 */
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /**
<> 144:ef7eb2e8f9f7 371 * @}
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 375 /** @addtogroup PCD_Private_Macros PCD Private Macros
<> 144:ef7eb2e8f9f7 376 * @{
<> 144:ef7eb2e8f9f7 377 */
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /* SetENDPOINT */
<> 156:95d6b41a828b 380 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 /* GetENDPOINT */
<> 156:95d6b41a828b 383 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /**
<> 144:ef7eb2e8f9f7 388 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 389 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 390 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 391 * @param wType: Endpoint Type.
<> 144:ef7eb2e8f9f7 392 * @retval None
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 144:ef7eb2e8f9f7 395 ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /**
<> 144:ef7eb2e8f9f7 398 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
<> 144:ef7eb2e8f9f7 399 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 400 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 401 * @retval Endpoint Type
<> 144:ef7eb2e8f9f7 402 */
<> 144:ef7eb2e8f9f7 403 #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /**
<> 144:ef7eb2e8f9f7 407 * @brief free buffer used from the application realizing it to the line
<> 144:ef7eb2e8f9f7 408 toggles bit SW_BUF in the double buffered endpoint register
<> 144:ef7eb2e8f9f7 409 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 410 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 411 * @param bDir: Direction
<> 144:ef7eb2e8f9f7 412 * @retval None
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
<> 144:ef7eb2e8f9f7 415 {\
<> 144:ef7eb2e8f9f7 416 if ((bDir) == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 417 { /* OUT double buffered endpoint */\
<> 144:ef7eb2e8f9f7 418 PCD_TX_DTOG((USBx), (bEpNum));\
<> 144:ef7eb2e8f9f7 419 }\
<> 144:ef7eb2e8f9f7 420 else if ((bDir) == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 421 { /* IN double buffered endpoint */\
<> 144:ef7eb2e8f9f7 422 PCD_RX_DTOG((USBx), (bEpNum));\
<> 144:ef7eb2e8f9f7 423 }\
<> 144:ef7eb2e8f9f7 424 }
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /**
<> 144:ef7eb2e8f9f7 427 * @brief gets direction of the double buffered endpoint
<> 144:ef7eb2e8f9f7 428 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 429 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 430 * @retval EP_DBUF_OUT, EP_DBUF_IN,
<> 144:ef7eb2e8f9f7 431 * EP_DBUF_ERR if the endpoint counter not yet programmed.
<> 144:ef7eb2e8f9f7 432 */
<> 144:ef7eb2e8f9f7 433 #define PCD_GET_DB_DIR(USBx, bEpNum)\
<> 144:ef7eb2e8f9f7 434 {\
<> 156:95d6b41a828b 435 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
<> 144:ef7eb2e8f9f7 436 return(PCD_EP_DBUF_OUT);\
<> 156:95d6b41a828b 437 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
<> 144:ef7eb2e8f9f7 438 return(PCD_EP_DBUF_IN);\
<> 144:ef7eb2e8f9f7 439 else\
<> 144:ef7eb2e8f9f7 440 return(PCD_EP_DBUF_ERR);\
<> 144:ef7eb2e8f9f7 441 }
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 /**
<> 144:ef7eb2e8f9f7 444 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
<> 144:ef7eb2e8f9f7 445 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 446 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 447 * @param wState: new state
<> 144:ef7eb2e8f9f7 448 * @retval None
<> 144:ef7eb2e8f9f7 449 */
<> 144:ef7eb2e8f9f7 450 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
<> 144:ef7eb2e8f9f7 451 \
<> 144:ef7eb2e8f9f7 452 _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
<> 144:ef7eb2e8f9f7 453 /* toggle first bit ? */ \
<> 156:95d6b41a828b 454 if((USB_EPTX_DTOG1 & (wState))!= 0U)\
<> 144:ef7eb2e8f9f7 455 { \
<> 144:ef7eb2e8f9f7 456 _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
<> 144:ef7eb2e8f9f7 457 } \
<> 144:ef7eb2e8f9f7 458 /* toggle second bit ? */ \
<> 156:95d6b41a828b 459 if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
<> 144:ef7eb2e8f9f7 460 { \
<> 144:ef7eb2e8f9f7 461 _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
<> 144:ef7eb2e8f9f7 462 } \
<> 144:ef7eb2e8f9f7 463 PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
<> 144:ef7eb2e8f9f7 464 } /* PCD_SET_EP_TX_STATUS */
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /**
<> 144:ef7eb2e8f9f7 467 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
<> 144:ef7eb2e8f9f7 468 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 469 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 470 * @param wState: new state
<> 144:ef7eb2e8f9f7 471 * @retval None
<> 144:ef7eb2e8f9f7 472 */
<> 144:ef7eb2e8f9f7 473 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
<> 144:ef7eb2e8f9f7 474 register uint16_t _wRegVal; \
<> 144:ef7eb2e8f9f7 475 \
<> 144:ef7eb2e8f9f7 476 _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
<> 144:ef7eb2e8f9f7 477 /* toggle first bit ? */ \
<> 156:95d6b41a828b 478 if((USB_EPRX_DTOG1 & (wState))!= 0U) \
<> 144:ef7eb2e8f9f7 479 { \
<> 144:ef7eb2e8f9f7 480 _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
<> 144:ef7eb2e8f9f7 481 } \
<> 144:ef7eb2e8f9f7 482 /* toggle second bit ? */ \
<> 156:95d6b41a828b 483 if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
<> 144:ef7eb2e8f9f7 484 { \
<> 144:ef7eb2e8f9f7 485 _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
<> 144:ef7eb2e8f9f7 486 } \
<> 144:ef7eb2e8f9f7 487 PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
<> 144:ef7eb2e8f9f7 488 } /* PCD_SET_EP_RX_STATUS */
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 /**
<> 144:ef7eb2e8f9f7 491 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 492 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 493 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 494 * @param wStaterx: new state.
<> 144:ef7eb2e8f9f7 495 * @param wStatetx: new state.
<> 144:ef7eb2e8f9f7 496 * @retval None
<> 144:ef7eb2e8f9f7 497 */
<> 144:ef7eb2e8f9f7 498 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
<> 144:ef7eb2e8f9f7 499 register uint32_t _wRegVal; \
<> 144:ef7eb2e8f9f7 500 \
<> 144:ef7eb2e8f9f7 501 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
<> 144:ef7eb2e8f9f7 502 /* toggle first bit ? */ \
<> 156:95d6b41a828b 503 if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
<> 144:ef7eb2e8f9f7 504 { \
<> 144:ef7eb2e8f9f7 505 _wRegVal ^= USB_EPRX_DTOG1; \
<> 144:ef7eb2e8f9f7 506 } \
<> 144:ef7eb2e8f9f7 507 /* toggle second bit ? */ \
<> 156:95d6b41a828b 508 if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
<> 144:ef7eb2e8f9f7 509 { \
<> 144:ef7eb2e8f9f7 510 _wRegVal ^= USB_EPRX_DTOG2; \
<> 144:ef7eb2e8f9f7 511 } \
<> 144:ef7eb2e8f9f7 512 /* toggle first bit ? */ \
<> 156:95d6b41a828b 513 if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
<> 144:ef7eb2e8f9f7 514 { \
<> 144:ef7eb2e8f9f7 515 _wRegVal ^= USB_EPTX_DTOG1; \
<> 144:ef7eb2e8f9f7 516 } \
<> 144:ef7eb2e8f9f7 517 /* toggle second bit ? */ \
<> 156:95d6b41a828b 518 if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
<> 144:ef7eb2e8f9f7 519 { \
<> 144:ef7eb2e8f9f7 520 _wRegVal ^= USB_EPTX_DTOG2; \
<> 144:ef7eb2e8f9f7 521 } \
<> 144:ef7eb2e8f9f7 522 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
<> 144:ef7eb2e8f9f7 523 } /* PCD_SET_EP_TXRX_STATUS */
<> 144:ef7eb2e8f9f7 524
<> 144:ef7eb2e8f9f7 525 /**
<> 144:ef7eb2e8f9f7 526 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
<> 144:ef7eb2e8f9f7 527 * /STAT_RX[1:0])
<> 144:ef7eb2e8f9f7 528 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 529 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 530 * @retval status
<> 144:ef7eb2e8f9f7 531 */
<> 144:ef7eb2e8f9f7 532 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
<> 144:ef7eb2e8f9f7 533 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /**
<> 144:ef7eb2e8f9f7 536 * @brief sets directly the VALID tx/rx-status into the endpoint register
<> 144:ef7eb2e8f9f7 537 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 538 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 539 * @retval None
<> 144:ef7eb2e8f9f7 540 */
<> 144:ef7eb2e8f9f7 541 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
<> 144:ef7eb2e8f9f7 542 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
<> 144:ef7eb2e8f9f7 543
<> 144:ef7eb2e8f9f7 544 /**
<> 144:ef7eb2e8f9f7 545 * @brief checks stall condition in an endpoint.
<> 144:ef7eb2e8f9f7 546 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 547 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 548 * @retval TRUE = endpoint in stall condition.
<> 144:ef7eb2e8f9f7 549 */
<> 144:ef7eb2e8f9f7 550 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
<> 144:ef7eb2e8f9f7 551 == USB_EP_TX_STALL)
<> 144:ef7eb2e8f9f7 552 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
<> 144:ef7eb2e8f9f7 553 == USB_EP_RX_STALL)
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 /**
<> 144:ef7eb2e8f9f7 556 * @brief set & clear EP_KIND bit.
<> 144:ef7eb2e8f9f7 557 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 558 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 559 * @retval None
<> 144:ef7eb2e8f9f7 560 */
<> 144:ef7eb2e8f9f7 561 #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 144:ef7eb2e8f9f7 562 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
<> 144:ef7eb2e8f9f7 563 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 144:ef7eb2e8f9f7 564 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
<> 144:ef7eb2e8f9f7 565
<> 144:ef7eb2e8f9f7 566 /**
<> 144:ef7eb2e8f9f7 567 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
<> 144:ef7eb2e8f9f7 568 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 569 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 570 * @retval None
<> 144:ef7eb2e8f9f7 571 */
<> 144:ef7eb2e8f9f7 572 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 573 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 574
<> 144:ef7eb2e8f9f7 575 /**
<> 144:ef7eb2e8f9f7 576 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
<> 144:ef7eb2e8f9f7 577 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 578 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 579 * @retval None
<> 144:ef7eb2e8f9f7 580 */
<> 144:ef7eb2e8f9f7 581 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 582 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
<> 144:ef7eb2e8f9f7 583
<> 144:ef7eb2e8f9f7 584 /**
<> 144:ef7eb2e8f9f7 585 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
<> 144:ef7eb2e8f9f7 586 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 587 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 588 * @retval None
<> 144:ef7eb2e8f9f7 589 */
<> 144:ef7eb2e8f9f7 590 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 144:ef7eb2e8f9f7 591 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 592 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 144:ef7eb2e8f9f7 593 PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /**
<> 144:ef7eb2e8f9f7 596 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 597 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 598 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 599 * @retval None
<> 144:ef7eb2e8f9f7 600 */
<> 144:ef7eb2e8f9f7 601 #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 144:ef7eb2e8f9f7 602 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 603 #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
<> 144:ef7eb2e8f9f7 604 USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
<> 144:ef7eb2e8f9f7 605
<> 144:ef7eb2e8f9f7 606 /**
<> 144:ef7eb2e8f9f7 607 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
<> 144:ef7eb2e8f9f7 608 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 609 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 610 * @retval None
<> 144:ef7eb2e8f9f7 611 */
<> 144:ef7eb2e8f9f7 612 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
<> 144:ef7eb2e8f9f7 613 { \
<> 144:ef7eb2e8f9f7 614 PCD_RX_DTOG((USBx),(bEpNum));\
<> 144:ef7eb2e8f9f7 615 }
<> 144:ef7eb2e8f9f7 616 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
<> 144:ef7eb2e8f9f7 617 {\
<> 144:ef7eb2e8f9f7 618 PCD_TX_DTOG((USBx),(bEpNum));\
<> 144:ef7eb2e8f9f7 619 }
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 /**
<> 144:ef7eb2e8f9f7 622 * @brief Sets address in an endpoint register.
<> 144:ef7eb2e8f9f7 623 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 624 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 625 * @param bAddr: Address.
<> 144:ef7eb2e8f9f7 626 * @retval None
<> 144:ef7eb2e8f9f7 627 */
<> 144:ef7eb2e8f9f7 628 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
<> 144:ef7eb2e8f9f7 629 USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /**
<> 144:ef7eb2e8f9f7 632 * @brief Gets address in an endpoint register.
<> 144:ef7eb2e8f9f7 633 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 634 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 635 * @retval None
<> 144:ef7eb2e8f9f7 636 */
<> 144:ef7eb2e8f9f7 637 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
<> 144:ef7eb2e8f9f7 638
<> 156:95d6b41a828b 639 #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400U)))))
<> 156:95d6b41a828b 640 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400U)))))
<> 156:95d6b41a828b 641 #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400U)))))
<> 144:ef7eb2e8f9f7 642
<> 156:95d6b41a828b 643 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400U)))))
<> 144:ef7eb2e8f9f7 644
<> 144:ef7eb2e8f9f7 645 /**
<> 144:ef7eb2e8f9f7 646 * @brief sets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 647 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 648 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 649 * @param wAddr: address to be set (must be word aligned).
<> 144:ef7eb2e8f9f7 650 * @retval None
<> 144:ef7eb2e8f9f7 651 */
<> 156:95d6b41a828b 652 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
<> 156:95d6b41a828b 653 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
<> 144:ef7eb2e8f9f7 654
<> 144:ef7eb2e8f9f7 655 /**
<> 144:ef7eb2e8f9f7 656 * @brief Gets address of the tx/rx buffer.
<> 144:ef7eb2e8f9f7 657 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 658 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 659 * @retval address of the buffer.
<> 144:ef7eb2e8f9f7 660 */
<> 144:ef7eb2e8f9f7 661 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 662 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 663
<> 144:ef7eb2e8f9f7 664 /**
<> 144:ef7eb2e8f9f7 665 * @brief Sets counter of rx buffer with no. of blocks.
<> 144:ef7eb2e8f9f7 666 * @param dwReg: Register
<> 144:ef7eb2e8f9f7 667 * @param wCount: Counter.
<> 144:ef7eb2e8f9f7 668 * @param wNBlocks: no. of Blocks.
<> 144:ef7eb2e8f9f7 669 * @retval None
<> 144:ef7eb2e8f9f7 670 */
<> 144:ef7eb2e8f9f7 671 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
<> 156:95d6b41a828b 672 (wNBlocks) = (wCount) >> 5U;\
<> 156:95d6b41a828b 673 if(((wCount) & 0x1fU) == 0U)\
<> 144:ef7eb2e8f9f7 674 { \
<> 144:ef7eb2e8f9f7 675 (wNBlocks)--;\
<> 144:ef7eb2e8f9f7 676 } \
<> 156:95d6b41a828b 677 *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
<> 144:ef7eb2e8f9f7 678 }/* PCD_CALC_BLK32 */
<> 144:ef7eb2e8f9f7 679
<> 144:ef7eb2e8f9f7 680
<> 144:ef7eb2e8f9f7 681 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
<> 156:95d6b41a828b 682 (wNBlocks) = (wCount) >> 1U;\
<> 156:95d6b41a828b 683 if(((wCount) & 0x1U) != 0U)\
<> 144:ef7eb2e8f9f7 684 { \
<> 144:ef7eb2e8f9f7 685 (wNBlocks)++;\
<> 144:ef7eb2e8f9f7 686 } \
<> 156:95d6b41a828b 687 *pdwReg = (uint16_t)((wNBlocks) << 10U);\
<> 144:ef7eb2e8f9f7 688 }/* PCD_CALC_BLK2 */
<> 144:ef7eb2e8f9f7 689
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
<> 144:ef7eb2e8f9f7 692 uint16_t wNBlocks;\
<> 156:95d6b41a828b 693 if((wCount) > 62U) \
<> 144:ef7eb2e8f9f7 694 { \
<> 144:ef7eb2e8f9f7 695 PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
<> 144:ef7eb2e8f9f7 696 } \
<> 144:ef7eb2e8f9f7 697 else \
<> 144:ef7eb2e8f9f7 698 { \
<> 144:ef7eb2e8f9f7 699 PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
<> 144:ef7eb2e8f9f7 700 } \
<> 144:ef7eb2e8f9f7 701 }/* PCD_SET_EP_CNT_RX_REG */
<> 144:ef7eb2e8f9f7 702
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
<> 144:ef7eb2e8f9f7 705 uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
<> 144:ef7eb2e8f9f7 706 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
<> 144:ef7eb2e8f9f7 707 }
<> 144:ef7eb2e8f9f7 708
<> 144:ef7eb2e8f9f7 709 /**
<> 144:ef7eb2e8f9f7 710 * @brief sets counter for the tx/rx buffer.
<> 144:ef7eb2e8f9f7 711 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 712 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 713 * @param wCount: Counter value.
<> 144:ef7eb2e8f9f7 714 * @retval None
<> 144:ef7eb2e8f9f7 715 */
<> 144:ef7eb2e8f9f7 716 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
<> 144:ef7eb2e8f9f7 717 #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
<> 144:ef7eb2e8f9f7 718 uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
<> 144:ef7eb2e8f9f7 719 PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
<> 144:ef7eb2e8f9f7 720 }
<> 144:ef7eb2e8f9f7 721
<> 144:ef7eb2e8f9f7 722 /**
<> 144:ef7eb2e8f9f7 723 * @brief gets counter of the tx buffer.
<> 144:ef7eb2e8f9f7 724 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 725 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 726 * @retval Counter value
<> 144:ef7eb2e8f9f7 727 */
<> 156:95d6b41a828b 728 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
<> 156:95d6b41a828b 729 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
<> 144:ef7eb2e8f9f7 730
<> 144:ef7eb2e8f9f7 731 /**
<> 144:ef7eb2e8f9f7 732 * @brief Sets buffer 0/1 address in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 733 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 734 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 735 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 736 * @retval Counter value
<> 144:ef7eb2e8f9f7 737 */
<> 144:ef7eb2e8f9f7 738 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
<> 144:ef7eb2e8f9f7 739 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
<> 144:ef7eb2e8f9f7 740
<> 144:ef7eb2e8f9f7 741 /**
<> 144:ef7eb2e8f9f7 742 * @brief Sets addresses in a double buffer endpoint.
<> 144:ef7eb2e8f9f7 743 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 744 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 745 * @param wBuf0Addr: buffer 0 address.
<> 144:ef7eb2e8f9f7 746 * @param wBuf1Addr = buffer 1 address.
<> 144:ef7eb2e8f9f7 747 * @retval None
<> 144:ef7eb2e8f9f7 748 */
<> 144:ef7eb2e8f9f7 749 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
<> 144:ef7eb2e8f9f7 750 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
<> 144:ef7eb2e8f9f7 751 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
<> 144:ef7eb2e8f9f7 752 } /* PCD_SET_EP_DBUF_ADDR */
<> 144:ef7eb2e8f9f7 753
<> 144:ef7eb2e8f9f7 754 /**
<> 144:ef7eb2e8f9f7 755 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 756 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 757 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 758 * @retval None
<> 144:ef7eb2e8f9f7 759 */
<> 144:ef7eb2e8f9f7 760 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 761 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 /**
<> 144:ef7eb2e8f9f7 764 * @brief Gets buffer 0/1 address of a double buffer endpoint.
<> 144:ef7eb2e8f9f7 765 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 766 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 767 * @param bDir: endpoint dir EP_DBUF_OUT = OUT
<> 144:ef7eb2e8f9f7 768 * EP_DBUF_IN = IN
<> 144:ef7eb2e8f9f7 769 * @param wCount: Counter value
<> 144:ef7eb2e8f9f7 770 * @retval None
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 773 if((bDir) == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 774 /* OUT endpoint */ \
<> 144:ef7eb2e8f9f7 775 {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
<> 144:ef7eb2e8f9f7 776 else if((bDir) == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 777 { \
<> 144:ef7eb2e8f9f7 778 *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
<> 144:ef7eb2e8f9f7 779 } \
<> 144:ef7eb2e8f9f7 780 } /* SetEPDblBuf0Count*/
<> 144:ef7eb2e8f9f7 781
<> 144:ef7eb2e8f9f7 782 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
<> 144:ef7eb2e8f9f7 783 if((bDir) == PCD_EP_DBUF_OUT)\
<> 144:ef7eb2e8f9f7 784 {/* OUT endpoint */ \
<> 144:ef7eb2e8f9f7 785 PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
<> 144:ef7eb2e8f9f7 786 } \
<> 144:ef7eb2e8f9f7 787 else if((bDir) == PCD_EP_DBUF_IN)\
<> 144:ef7eb2e8f9f7 788 {/* IN endpoint */ \
<> 156:95d6b41a828b 789 *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
<> 144:ef7eb2e8f9f7 790 } \
<> 144:ef7eb2e8f9f7 791 } /* SetEPDblBuf1Count */
<> 144:ef7eb2e8f9f7 792
<> 144:ef7eb2e8f9f7 793 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
<> 144:ef7eb2e8f9f7 794 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
<> 144:ef7eb2e8f9f7 795 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
<> 144:ef7eb2e8f9f7 796 } /* PCD_SET_EP_DBUF_CNT */
<> 144:ef7eb2e8f9f7 797
<> 144:ef7eb2e8f9f7 798 /**
<> 144:ef7eb2e8f9f7 799 * @brief Gets buffer 0/1 rx/tx counter for double buffering.
<> 144:ef7eb2e8f9f7 800 * @param USBx: USB peripheral instance register address.
<> 144:ef7eb2e8f9f7 801 * @param bEpNum: Endpoint Number.
<> 144:ef7eb2e8f9f7 802 * @retval None
<> 144:ef7eb2e8f9f7 803 */
<> 144:ef7eb2e8f9f7 804 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 805 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
<> 144:ef7eb2e8f9f7 806
<> 144:ef7eb2e8f9f7 807 /** @defgroup PCD_Instance_definition PCD Instance definition
<> 144:ef7eb2e8f9f7 808 * @{
<> 144:ef7eb2e8f9f7 809 */
<> 144:ef7eb2e8f9f7 810 #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
<> 144:ef7eb2e8f9f7 811 /**
<> 144:ef7eb2e8f9f7 812 * @}
<> 144:ef7eb2e8f9f7 813 */
<> 144:ef7eb2e8f9f7 814
<> 144:ef7eb2e8f9f7 815 /**
<> 144:ef7eb2e8f9f7 816 * @}
<> 144:ef7eb2e8f9f7 817 */
<> 144:ef7eb2e8f9f7 818
<> 144:ef7eb2e8f9f7 819 /**
<> 144:ef7eb2e8f9f7 820 * @}
<> 144:ef7eb2e8f9f7 821 */
<> 144:ef7eb2e8f9f7 822
<> 144:ef7eb2e8f9f7 823 /**
<> 144:ef7eb2e8f9f7 824 * @}
<> 144:ef7eb2e8f9f7 825 */
<> 144:ef7eb2e8f9f7 826
<> 144:ef7eb2e8f9f7 827 #endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
<> 144:ef7eb2e8f9f7 828
<> 144:ef7eb2e8f9f7 829 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 830 }
<> 144:ef7eb2e8f9f7 831 #endif
<> 144:ef7eb2e8f9f7 832
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834 #endif /* __STM32F0xx_HAL_PCD_H */
<> 144:ef7eb2e8f9f7 835
<> 144:ef7eb2e8f9f7 836 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 837