mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/xdot_low_power.c@175:af195413fb11, 2017-10-11 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Oct 11 12:45:49 2017 +0100
- Revision:
- 175:af195413fb11
- Parent:
- 173:e131a1973e81
- Child:
- 187:0387e8f68319
This updates the lib to the mbed lib v 153
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 148:21d94c44109e | 1 | /* mbed Microcontroller Library |
<> | 148:21d94c44109e | 2 | ******************************************************************************* |
<> | 148:21d94c44109e | 3 | * Copyright (c) 2016, MultiTech Systems |
<> | 148:21d94c44109e | 4 | * All rights reserved. |
<> | 148:21d94c44109e | 5 | * |
<> | 148:21d94c44109e | 6 | * Redistribution and use in source and binary forms, with or without |
<> | 148:21d94c44109e | 7 | * modification, are permitted provided that the following conditions are met: |
<> | 148:21d94c44109e | 8 | * |
<> | 148:21d94c44109e | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 148:21d94c44109e | 10 | * this list of conditions and the following disclaimer. |
<> | 148:21d94c44109e | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 148:21d94c44109e | 12 | * this list of conditions and the following disclaimer in the documentation |
<> | 148:21d94c44109e | 13 | * and/or other materials provided with the distribution. |
<> | 148:21d94c44109e | 14 | * 3. Neither the name of MultiTech nor the names of its contributors |
<> | 148:21d94c44109e | 15 | * may be used to endorse or promote products derived from this software |
<> | 148:21d94c44109e | 16 | * without specific prior written permission. |
<> | 148:21d94c44109e | 17 | * |
<> | 148:21d94c44109e | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 148:21d94c44109e | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 148:21d94c44109e | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 148:21d94c44109e | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 148:21d94c44109e | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 148:21d94c44109e | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 148:21d94c44109e | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 148:21d94c44109e | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 148:21d94c44109e | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 148:21d94c44109e | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 148:21d94c44109e | 28 | ******************************************************************************* |
<> | 148:21d94c44109e | 29 | */ |
<> | 148:21d94c44109e | 30 | |
<> | 148:21d94c44109e | 31 | #include "xdot_low_power.h" |
<> | 148:21d94c44109e | 32 | #include "stdio.h" |
AnnaBridge | 175:af195413fb11 | 33 | #include "mbed_debug.h" |
AnnaBridge | 173:e131a1973e81 | 34 | |
<> | 148:21d94c44109e | 35 | static uint32_t portA[6]; |
<> | 148:21d94c44109e | 36 | static uint32_t portB[6]; |
<> | 148:21d94c44109e | 37 | static uint32_t portC[6]; |
<> | 148:21d94c44109e | 38 | static uint32_t portH[6]; |
<> | 148:21d94c44109e | 39 | |
<> | 148:21d94c44109e | 40 | void xdot_disable_systick_int() { |
<> | 148:21d94c44109e | 41 | SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; |
<> | 148:21d94c44109e | 42 | } |
<> | 148:21d94c44109e | 43 | |
<> | 148:21d94c44109e | 44 | void xdot_enable_systick_int() { |
<> | 148:21d94c44109e | 45 | SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; |
<> | 148:21d94c44109e | 46 | } |
<> | 148:21d94c44109e | 47 | |
<> | 148:21d94c44109e | 48 | void xdot_save_gpio_state() { |
<> | 148:21d94c44109e | 49 | portA[0] = GPIOA->MODER; |
<> | 148:21d94c44109e | 50 | portA[1] = GPIOA->OTYPER; |
<> | 148:21d94c44109e | 51 | portA[2] = GPIOA->OSPEEDR; |
<> | 148:21d94c44109e | 52 | portA[3] = GPIOA->PUPDR; |
<> | 148:21d94c44109e | 53 | portA[4] = GPIOA->AFR[0]; |
<> | 148:21d94c44109e | 54 | portA[5] = GPIOA->AFR[1]; |
<> | 148:21d94c44109e | 55 | |
<> | 148:21d94c44109e | 56 | portB[0] = GPIOB->MODER; |
<> | 148:21d94c44109e | 57 | portB[1] = GPIOB->OTYPER; |
<> | 148:21d94c44109e | 58 | portB[2] = GPIOB->OSPEEDR; |
<> | 148:21d94c44109e | 59 | portB[3] = GPIOB->PUPDR; |
<> | 148:21d94c44109e | 60 | portB[4] = GPIOB->AFR[0]; |
<> | 148:21d94c44109e | 61 | portB[5] = GPIOB->AFR[1]; |
<> | 148:21d94c44109e | 62 | |
<> | 148:21d94c44109e | 63 | portC[0] = GPIOC->MODER; |
<> | 148:21d94c44109e | 64 | portC[1] = GPIOC->OTYPER; |
<> | 148:21d94c44109e | 65 | portC[2] = GPIOC->OSPEEDR; |
<> | 148:21d94c44109e | 66 | portC[3] = GPIOC->PUPDR; |
<> | 148:21d94c44109e | 67 | portC[4] = GPIOC->AFR[0]; |
<> | 148:21d94c44109e | 68 | portC[5] = GPIOC->AFR[1]; |
<> | 148:21d94c44109e | 69 | |
<> | 148:21d94c44109e | 70 | portH[0] = GPIOH->MODER; |
<> | 148:21d94c44109e | 71 | portH[1] = GPIOH->OTYPER; |
<> | 148:21d94c44109e | 72 | portH[2] = GPIOH->OSPEEDR; |
<> | 148:21d94c44109e | 73 | portH[3] = GPIOH->PUPDR; |
<> | 148:21d94c44109e | 74 | portH[4] = GPIOH->AFR[0]; |
<> | 148:21d94c44109e | 75 | portH[5] = GPIOH->AFR[1]; |
<> | 148:21d94c44109e | 76 | } |
<> | 148:21d94c44109e | 77 | |
<> | 148:21d94c44109e | 78 | void xdot_restore_gpio_state() { |
<> | 148:21d94c44109e | 79 | GPIOA->MODER = portA[0]; |
<> | 148:21d94c44109e | 80 | GPIOA->OTYPER = portA[1]; |
<> | 148:21d94c44109e | 81 | GPIOA->OSPEEDR = portA[2]; |
<> | 148:21d94c44109e | 82 | GPIOA->PUPDR = portA[3]; |
<> | 148:21d94c44109e | 83 | GPIOA->AFR[0] = portA[4]; |
<> | 148:21d94c44109e | 84 | GPIOA->AFR[1] = portA[5]; |
<> | 148:21d94c44109e | 85 | |
<> | 148:21d94c44109e | 86 | GPIOB->MODER = portB[0]; |
<> | 148:21d94c44109e | 87 | GPIOB->OTYPER = portB[1]; |
<> | 148:21d94c44109e | 88 | GPIOB->OSPEEDR = portB[2]; |
<> | 148:21d94c44109e | 89 | GPIOB->PUPDR = portB[3]; |
<> | 148:21d94c44109e | 90 | GPIOB->AFR[0] = portB[4]; |
<> | 148:21d94c44109e | 91 | GPIOB->AFR[1] = portB[5]; |
<> | 148:21d94c44109e | 92 | |
<> | 148:21d94c44109e | 93 | GPIOC->MODER = portC[0]; |
<> | 148:21d94c44109e | 94 | GPIOC->OTYPER = portC[1]; |
<> | 148:21d94c44109e | 95 | GPIOC->OSPEEDR = portC[2]; |
<> | 148:21d94c44109e | 96 | GPIOC->PUPDR = portC[3]; |
<> | 148:21d94c44109e | 97 | GPIOC->AFR[0] = portC[4]; |
<> | 148:21d94c44109e | 98 | GPIOC->AFR[1] = portC[5]; |
<> | 148:21d94c44109e | 99 | |
<> | 148:21d94c44109e | 100 | GPIOH->MODER = portH[0]; |
<> | 148:21d94c44109e | 101 | GPIOH->OTYPER = portH[1]; |
<> | 148:21d94c44109e | 102 | GPIOH->OSPEEDR = portH[2]; |
<> | 148:21d94c44109e | 103 | GPIOH->PUPDR = portH[3]; |
<> | 148:21d94c44109e | 104 | GPIOH->AFR[0] = portH[4]; |
<> | 148:21d94c44109e | 105 | GPIOH->AFR[1] = portH[5]; |
<> | 148:21d94c44109e | 106 | } |
<> | 148:21d94c44109e | 107 | |
<> | 148:21d94c44109e | 108 | void xdot_enter_stop_mode() { |
<> | 148:21d94c44109e | 109 | GPIO_InitTypeDef GPIO_InitStruct; |
<> | 148:21d94c44109e | 110 | |
<> | 148:21d94c44109e | 111 | // disable ADC and DAC - they can consume power in stop mode |
<> | 148:21d94c44109e | 112 | ADC1->CR2 &= ~ADC_CR2_ADON; |
<> | 148:21d94c44109e | 113 | ADC->CCR &= ~ADC_CCR_TSVREFE; |
<> | 148:21d94c44109e | 114 | DAC->CR &= ~DAC_CR_EN1; |
<> | 148:21d94c44109e | 115 | DAC->CR &= ~DAC_CR_EN2; |
<> | 148:21d94c44109e | 116 | |
<> | 148:21d94c44109e | 117 | // enable ULP and enable fast wakeup |
<> | 148:21d94c44109e | 118 | HAL_PWREx_EnableUltraLowPower(); |
<> | 148:21d94c44109e | 119 | HAL_PWREx_EnableFastWakeUp(); |
<> | 148:21d94c44109e | 120 | |
<> | 148:21d94c44109e | 121 | // disable HSI, MSI, and LSI if they are running |
<> | 148:21d94c44109e | 122 | if (RCC->CR & RCC_CR_HSION) { |
<> | 148:21d94c44109e | 123 | RCC->CR &= ~RCC_CR_HSION; |
<> | 148:21d94c44109e | 124 | } |
<> | 148:21d94c44109e | 125 | if (RCC->CR & RCC_CR_MSION) { |
<> | 148:21d94c44109e | 126 | RCC->CR &= ~RCC_CR_MSION; |
<> | 148:21d94c44109e | 127 | } |
<> | 148:21d94c44109e | 128 | if (RCC->CSR & RCC_CSR_LSION) { |
<> | 148:21d94c44109e | 129 | RCC->CSR &= ~RCC_CSR_LSION; |
<> | 148:21d94c44109e | 130 | } |
<> | 148:21d94c44109e | 131 | |
<> | 148:21d94c44109e | 132 | // configure USBTX & USBRX, LORA SPI, LORA_DIO, LORA_RESET, Secure Element, crystal pins, and SWD pins to analog nopull |
<> | 148:21d94c44109e | 133 | // the application must do the same with WAKE, GPIO*, UART1_*, I2C_*, and SPI_* |
<> | 148:21d94c44109e | 134 | |
<> | 148:21d94c44109e | 135 | // GPIO Ports Clock Enable |
<> | 148:21d94c44109e | 136 | __GPIOA_CLK_ENABLE(); |
<> | 148:21d94c44109e | 137 | __GPIOB_CLK_ENABLE(); |
<> | 148:21d94c44109e | 138 | __GPIOC_CLK_ENABLE(); |
<> | 148:21d94c44109e | 139 | __GPIOH_CLK_ENABLE(); |
<> | 148:21d94c44109e | 140 | |
<> | 148:21d94c44109e | 141 | // USBTX & USBRX to analog nopull |
<> | 148:21d94c44109e | 142 | GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3; |
<> | 148:21d94c44109e | 143 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 144 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 145 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 146 | |
<> | 148:21d94c44109e | 147 | // LORA_RESET to analog nopull |
<> | 148:21d94c44109e | 148 | GPIO_InitStruct.Pin = GPIO_PIN_1; |
<> | 148:21d94c44109e | 149 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 150 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 151 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 152 | |
<> | 148:21d94c44109e | 153 | // LORA_MISO to analog nopull |
<> | 148:21d94c44109e | 154 | GPIO_InitStruct.Pin = GPIO_PIN_4; |
<> | 148:21d94c44109e | 155 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 156 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 157 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 158 | |
<> | 148:21d94c44109e | 159 | // LORA_SCK & LORA_MOSI to input pulldown - additional current draw if left floating |
<> | 148:21d94c44109e | 160 | GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_5; |
<> | 148:21d94c44109e | 161 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; |
<> | 148:21d94c44109e | 162 | GPIO_InitStruct.Pull = GPIO_PULLDOWN; |
<> | 148:21d94c44109e | 163 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 164 | |
<> | 148:21d94c44109e | 165 | // LORA_NSS to analog nopull |
<> | 148:21d94c44109e | 166 | GPIO_InitStruct.Pin = GPIO_PIN_15; |
<> | 148:21d94c44109e | 167 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 168 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 169 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 170 | |
<> | 148:21d94c44109e | 171 | // LORA_DIO0 - LORA_DIO2 to analog nopull |
<> | 148:21d94c44109e | 172 | GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8; |
<> | 148:21d94c44109e | 173 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 174 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 175 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 176 | |
<> | 148:21d94c44109e | 177 | // LORA_DIO3 - LORA_DIO4 to analog nopull |
<> | 148:21d94c44109e | 178 | GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7; |
<> | 148:21d94c44109e | 179 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 180 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 181 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 182 | |
<> | 148:21d94c44109e | 183 | // SE_CTRL, SE_IO, & SE_CLK to analog nopull |
<> | 148:21d94c44109e | 184 | GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11; |
<> | 148:21d94c44109e | 185 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 186 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 187 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 188 | |
<> | 148:21d94c44109e | 189 | // SE_RESET to analog nopull |
<> | 148:21d94c44109e | 190 | GPIO_InitStruct.Pin = GPIO_PIN_13; |
<> | 148:21d94c44109e | 191 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 192 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 193 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 194 | |
<> | 148:21d94c44109e | 195 | // SWDIO & SWCLK to analog nopull |
<> | 148:21d94c44109e | 196 | GPIO_InitStruct.Pin = GPIO_PIN_13 | GPIO_PIN_14; |
<> | 148:21d94c44109e | 197 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 198 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 199 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 200 | |
<> | 148:21d94c44109e | 201 | // OSC32_IN & OSC32_OUT to analog nopull |
<> | 148:21d94c44109e | 202 | GPIO_InitStruct.Pin = GPIO_PIN_14 | GPIO_PIN_15; |
<> | 148:21d94c44109e | 203 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 204 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 205 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 206 | |
<> | 148:21d94c44109e | 207 | // OSC_IN & OSC_OUT to analog nopull |
<> | 148:21d94c44109e | 208 | GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1; |
<> | 148:21d94c44109e | 209 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
<> | 148:21d94c44109e | 210 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
<> | 148:21d94c44109e | 211 | HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); |
<> | 148:21d94c44109e | 212 | |
<> | 148:21d94c44109e | 213 | // done configuring pins to analog nopull |
<> | 148:21d94c44109e | 214 | |
<> | 148:21d94c44109e | 215 | // make sure wakeup flag is cleared |
<> | 148:21d94c44109e | 216 | PWR->CR |= PWR_CR_CWUF; |
<> | 148:21d94c44109e | 217 | |
<> | 148:21d94c44109e | 218 | // enter stop mode - don't execute past here until woken up |
<> | 148:21d94c44109e | 219 | HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); |
<> | 148:21d94c44109e | 220 | |
<> | 148:21d94c44109e | 221 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
AnnaBridge | 168:9672193075cf | 222 | RCC_OscInitTypeDef HSERCC_OscInitStruct; |
<> | 148:21d94c44109e | 223 | /* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */ |
AnnaBridge | 168:9672193075cf | 224 | HSERCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI; |
AnnaBridge | 168:9672193075cf | 225 | HSERCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 24 MHz xtal on OSC_IN/OSC_OUT */ |
AnnaBridge | 168:9672193075cf | 226 | HSERCC_OscInitStruct.HSIState = RCC_HSI_OFF; |
<> | 148:21d94c44109e | 227 | // SYSCLK = 32 MHz ((24 MHz * 4) / 3) |
<> | 148:21d94c44109e | 228 | // USBCLK = 48 MHz ((24 MHz * 4) / 2) --> USB OK |
AnnaBridge | 168:9672193075cf | 229 | HSERCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
AnnaBridge | 168:9672193075cf | 230 | HSERCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
AnnaBridge | 168:9672193075cf | 231 | HSERCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; |
AnnaBridge | 168:9672193075cf | 232 | HSERCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; |
AnnaBridge | 168:9672193075cf | 233 | if (HAL_RCC_OscConfig(&HSERCC_OscInitStruct) != HAL_OK) { |
AnnaBridge | 175:af195413fb11 | 234 | debug("OSC initialization failed - initiating soft reset\r\n"); |
<> | 148:21d94c44109e | 235 | NVIC_SystemReset(); |
<> | 148:21d94c44109e | 236 | } |
<> | 148:21d94c44109e | 237 | |
<> | 148:21d94c44109e | 238 | /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ |
<> | 148:21d94c44109e | 239 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
<> | 148:21d94c44109e | 240 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz |
<> | 148:21d94c44109e | 241 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz |
<> | 148:21d94c44109e | 242 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz |
<> | 148:21d94c44109e | 243 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz |
<> | 148:21d94c44109e | 244 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { |
AnnaBridge | 175:af195413fb11 | 245 | debug("PLL initialization failed - initiating soft reset\r\n"); |
<> | 148:21d94c44109e | 246 | NVIC_SystemReset(); |
<> | 148:21d94c44109e | 247 | } |
<> | 148:21d94c44109e | 248 | |
AnnaBridge | 168:9672193075cf | 249 | /* Enable the HSI for ADC peripherals */ |
AnnaBridge | 168:9672193075cf | 250 | RCC_OscInitTypeDef HSIRCC_OscInitStruct; |
AnnaBridge | 168:9672193075cf | 251 | HAL_RCC_GetOscConfig(&HSIRCC_OscInitStruct); |
AnnaBridge | 168:9672193075cf | 252 | if ( HSIRCC_OscInitStruct.HSIState != RCC_HSI_ON ) { |
AnnaBridge | 168:9672193075cf | 253 | HSIRCC_OscInitStruct.HSIState = RCC_HSI_ON; |
AnnaBridge | 168:9672193075cf | 254 | HSIRCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; |
AnnaBridge | 168:9672193075cf | 255 | HSIRCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; |
AnnaBridge | 168:9672193075cf | 256 | HAL_StatusTypeDef ret = HAL_RCC_OscConfig(&HSIRCC_OscInitStruct); |
AnnaBridge | 168:9672193075cf | 257 | if ( ret != HAL_OK ) { |
AnnaBridge | 175:af195413fb11 | 258 | debug("HSI initialization failed - ADC will not function properly\r\n"); |
AnnaBridge | 168:9672193075cf | 259 | } |
AnnaBridge | 168:9672193075cf | 260 | } |
AnnaBridge | 168:9672193075cf | 261 | |
<> | 148:21d94c44109e | 262 | SystemCoreClockUpdate(); |
<> | 148:21d94c44109e | 263 | |
<> | 148:21d94c44109e | 264 | // clear wakeup flag in power control register |
<> | 148:21d94c44109e | 265 | PWR->CR |= PWR_CR_CWUF; |
<> | 148:21d94c44109e | 266 | |
<> | 148:21d94c44109e | 267 | // enable the ADC and DAC |
<> | 148:21d94c44109e | 268 | ADC->CCR |= ADC_CCR_TSVREFE; |
<> | 148:21d94c44109e | 269 | ADC1->CR2 |= ADC_CR2_ADON; |
<> | 148:21d94c44109e | 270 | DAC->CR |= DAC_CR_EN1; |
<> | 148:21d94c44109e | 271 | DAC->CR |= DAC_CR_EN2; |
<> | 148:21d94c44109e | 272 | } |
<> | 148:21d94c44109e | 273 | |
<> | 148:21d94c44109e | 274 | void xdot_enter_standby_mode() { |
<> | 148:21d94c44109e | 275 | // enable ULP and enable fast wakeup |
<> | 148:21d94c44109e | 276 | HAL_PWREx_EnableUltraLowPower(); |
<> | 148:21d94c44109e | 277 | HAL_PWREx_EnableFastWakeUp(); |
<> | 148:21d94c44109e | 278 | |
<> | 148:21d94c44109e | 279 | // disable HSI, MSI, and LSI if they are running |
<> | 148:21d94c44109e | 280 | if (RCC->CR & RCC_CR_HSION) |
<> | 148:21d94c44109e | 281 | RCC->CR &= ~RCC_CR_HSION; |
<> | 148:21d94c44109e | 282 | if (RCC->CR & RCC_CR_MSION) |
<> | 148:21d94c44109e | 283 | RCC->CR &= ~RCC_CR_MSION; |
<> | 148:21d94c44109e | 284 | if (RCC->CSR & RCC_CSR_LSION) |
<> | 148:21d94c44109e | 285 | RCC->CSR &= ~RCC_CSR_LSION; |
<> | 148:21d94c44109e | 286 | |
<> | 148:21d94c44109e | 287 | |
<> | 148:21d94c44109e | 288 | // make sure wakeup and standby flags are cleared |
<> | 148:21d94c44109e | 289 | PWR->CR |= PWR_CR_CWUF; |
<> | 148:21d94c44109e | 290 | PWR->CR |= PWR_CR_CSBF; |
<> | 148:21d94c44109e | 291 | |
<> | 148:21d94c44109e | 292 | // enter standby mode |
<> | 148:21d94c44109e | 293 | HAL_PWR_EnterSTANDBYMode(); |
<> | 148:21d94c44109e | 294 | } |
<> | 148:21d94c44109e | 295 | |
<> | 148:21d94c44109e | 296 | void xdot_enable_standby_wake_pin() { |
<> | 148:21d94c44109e | 297 | HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1); |
<> | 148:21d94c44109e | 298 | } |
<> | 148:21d94c44109e | 299 | |
<> | 148:21d94c44109e | 300 | void xdot_disable_standby_wake_pin() { |
<> | 148:21d94c44109e | 301 | HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1); |
<> | 148:21d94c44109e | 302 | } |
<> | 148:21d94c44109e | 303 |