Diff: targets/TARGET_Cypress/TARGET_PSOC6/psoc6_utils.c

Revision:

189:f392fc9709a3

Parent:

188:bcfe06ba3d64

--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6_utils.c	Thu Nov 08 11:46:34 2018 +0000
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6_utils.c	Wed Feb 20 22:31:08 2019 +0000
@@ -1,6 +1,8 @@
 /*
  * mbed Microcontroller Library
  * Copyright (c) 2017-2018 Future Electronics
+ * Copyright (c) 2018-2019 Cypress Semiconductor Corporation
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -43,6 +45,7 @@
 
 #endif /* defined(__MBED__) */
 
+#include "cy_crypto_core_hw.h"
 
 #define CY_NUM_PSOC6_PORTS      14
 #define CY_NUM_DIVIDER_TYPES    4
@@ -101,6 +104,7 @@
 
 #define DEFAULT_PORT_RES        0xff
 #define DEFAULT_DIVIDER_RES     0xffff
+#define DEFAULT_DIVIDER8_RES    0xffff
 #define DEFAULT_SCM_RES         1
 #define DEFAULT_TCPWM_RES       1
 
@@ -139,7 +143,7 @@
 } divider_alloc_t;
 
 static divider_alloc_t divider_allocations[CY_NUM_DIVIDER_TYPES] = {
-    { PERI_DIV_8_NR - 1,    2,  DEFAULT_DIVIDER8_RES },   // CY_SYSCLK_DIV_8_BIT
+    { PERI_DIV_8_NR - 1,    0,  DEFAULT_DIVIDER8_RES },   // CY_SYSCLK_DIV_8_BIT
     { PERI_DIV_16_NR - 1,   0,  DEFAULT_DIVIDER_RES },    // CY_SYSCLK_DIV_16_BIT
     { PERI_DIV_16_5_NR - 1, 0,  DEFAULT_DIVIDER_RES },    // CY_SYSCLK_DIV_16_5_BIT
     { PERI_DIV_24_5_NR - 1, 0,  DEFAULT_DIVIDER_RES }     // CY_SYSCLK_DIV_24_5_BIT
@@ -245,20 +249,35 @@
     divider_alloc_t *p_alloc = &divider_allocations[div_type];
 
     MBED_ASSERT(div_type < CY_NUM_DIVIDER_TYPES);
+    MBED_ASSERT(p_alloc->current_index < p_alloc->max_index);
 
     core_util_critical_section_enter();
 
-    MBED_ASSERT(p_alloc->current_index < p_alloc->max_index);
+    // Try to reserve current divider
+    divider = cy_clk_reserve_divider(div_type, p_alloc->current_index);
 
+    if (CY_INVALID_DIVIDER == divider) {
 
-    for ( uint32_t first_index = p_alloc->current_index;
-            CY_INVALID_DIVIDER == (divider = cy_clk_reserve_divider(div_type, p_alloc->current_index));
-            ++p_alloc->current_index) {
+        // Store current index
+        uint32_t first_index = p_alloc->current_index;
+
+        // Move index forward before start circular search
+        ++p_alloc->current_index;
         if (p_alloc->current_index > p_alloc->max_index) {
             p_alloc->current_index = 0;
         }
-        if (p_alloc->current_index == first_index) {
-            break;
+
+        // Execute circular divider search
+        for (; (CY_INVALID_DIVIDER == (divider = cy_clk_reserve_divider(div_type, p_alloc->current_index)));
+                ++p_alloc->current_index) {
+
+            if (p_alloc->current_index > p_alloc->max_index) {
+                p_alloc->current_index = 0;
+            }
+
+            if (p_alloc->current_index == first_index) {
+                break;
+            }
         }
     }
 
@@ -276,6 +295,7 @@
         core_util_critical_section_enter();
         if (scb_reservations[scb_num] == 0) {
             scb_reservations[scb_num] = 1;
+            result = 0;
         }
         core_util_critical_section_exit();
     }
@@ -291,6 +311,7 @@
         core_util_critical_section_enter();
         if (scb_reservations[scb_num] == 1) {
             scb_reservations[scb_num] = 0;
+            result = 0;
         }
         core_util_critical_section_exit();
     }
@@ -334,6 +355,80 @@
 }
 
 
+static uint8_t  crypto_reservations[NUM_CRYPTO_HW] = { 0u };
+
+static int cy_crypto_reserved_status(void)
+{
+    return ((int)(crypto_reservations[CY_CRYPTO_TRNG_HW] |
+             crypto_reservations[CY_CRYPTO_CRC_HW]  |
+             crypto_reservations[CY_CRYPTO_VU_HW]  |
+             crypto_reservations[CY_CRYPTO_COMMON_HW]));
+}
+
+
+int cy_reserve_crypto(cy_en_crypto_submodule_t module_num)
+{
+    int result = (-1);
+
+    if (module_num < NUM_CRYPTO_HW)
+    {
+        core_util_critical_section_enter();
+
+        if (cy_crypto_reserved_status() == 0)
+        {
+            /* Enable Crypto IP on demand */
+            Cy_Crypto_Core_Enable(CRYPTO);
+        }
+
+        if (module_num == CY_CRYPTO_COMMON_HW)
+        {
+            if (crypto_reservations[module_num] != 1)
+            {
+                crypto_reservations[module_num] = 1;
+                result = 0;
+            }
+        }
+        else
+        {
+            crypto_reservations[module_num] = 1;
+            result = 0;
+        }
+
+        core_util_critical_section_exit();
+    }
+
+    return result;
+}
+
+
+void cy_free_crypto(cy_en_crypto_submodule_t module_num)
+{
+    int result = (-1);
+
+    if (module_num < NUM_CRYPTO_HW)
+    {
+        core_util_critical_section_enter();
+
+        if (crypto_reservations[module_num] == 1)
+        {
+            crypto_reservations[module_num] = 0;
+
+            if (cy_crypto_reserved_status() == 0)
+            {
+                /* Crypto hardware is still in enabled state; to disable:
+                   Cy_Crypto_Core_Disable(CRYPTO) */
+            }
+
+            result = 0;
+        }
+        core_util_critical_section_exit();
+    }
+    if (result) {
+        error("Trying to release wrong CRYPTO hardware submodule.");
+    }
+}
+
+
 /*
  * NVIC channel dynamic allocation (multiplexing) is used only on M0.
  * On M4 IRQs are statically pre-assigned to NVIC channels.
@@ -375,7 +470,7 @@
 
     core_util_critical_section_enter();
     if (irq_channels[chn]) {
-        channel =  (IRQn_Type)(-1);
+        channel = (IRQn_Type)(-1);
     } else {
         irq_channels[chn] = channel_id;
     }
@@ -438,19 +533,35 @@
 
 void cy_srm_initialize(void)
 {
+#if defined(TARGET_MCU_PSOC6_M0) || PSOC6_DYNSRM_DISABLE || !defined(__MBED__)
+    uint32_t    i;
+
+    for (i = 0; i < CY_NUM_PSOC6_PORTS; ++i) {
+        port_reservations[i] = DEFAULT_PORT_RES;
+    }
+
+    for (i = 0; i < NUM_SCB; ++i) {
+        scb_reservations[i] = DEFAULT_SCM_RES;
+    }
+
+    for (i = 0; i < NUM_TCPWM; ++i) {
+        tcpwm_reservations[i] = DEFAULT_TCPWM_RES;
+    }
+
 #if PSOC6_DYNSRM_DISABLE
-#ifdef M0_ASSIGNED_PORTS
-    SRM_INIT_RESOURCE(uint8_t, port_reservations,, M0_ASSIGNED_PORTS);
+#ifdef CYCFG_ASSIGNED_PORTS
+    SRM_INIT_RESOURCE(uint8_t, port_reservations,, CYCFG_ASSIGNED_PORTS);
 #endif
-#ifdef M0_ASSIGNED_DIVIDERS
-    SRM_INIT_RESOURCE(uint32_t, divider_allocations, .reservations, M0_ASSIGNED_DIVIDERS);
+#ifdef CYCFG_ASSIGNED_DIVIDERS
+    SRM_INIT_RESOURCE(uint32_t, divider_allocations, .reservations, CYCFG_ASSIGNED_DIVIDERS);
 #endif
-#ifdef M0_ASSIGNED_SCBS
-    SRM_INIT_RESOURCE(uint8_t, scb_reservations,, M0_ASSIGNED_SCBS);
+#ifdef CYCFG_ASSIGNED_SCBS
+    SRM_INIT_RESOURCE(uint8_t, scb_reservations,, CYCFG_ASSIGNED_SCBS);
 #endif
-#ifdef M0_ASSIGNED_TCPWMS
-    SRM_INIT_RESOURCE(uint8_t, tcpwm_reservations,,  M0_ASSIGNED_TCPWMS);
+#ifdef CYCFG_ASSIGNED_TCPWMS
+    SRM_INIT_RESOURCE(uint8_t, tcpwm_reservations,,  CYCFG_ASSIGNED_TCPWMS);
 #endif
 #endif // PSOC6_DYNSRM_DISABLE
+#endif // defined(TARGET_MCU_PSOC6_M0) || PSOC6_DSRM_DISABLE || !defined(__MBED__)
 }