mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: cmsis/BUILD/mbed/targets.json
- Revision:
- 189:f392fc9709a3
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/cmsis/BUILD/mbed/targets.json Wed Feb 20 22:31:08 2019 +0000 @@ -0,0 +1,8203 @@ +{ + "Target": { + "core": null, + "default_toolchain": "ARM", + "supported_toolchains": null, + "extra_labels": [], + "components": ["PSA_SRV_IMPL", "PSA_SRV_EMUL", "NSPE"], + "is_disk_virtual": false, + "macros": [], + "device_has": [], + "features": [], + "detect_code": [], + "public": false, + "default_lib": "std", + "bootloader_supported": false, + "static_memory_defines": true, + "config": { + "console-uart-flow-control": { + "help": "Console hardware flow control. Options: null, RTS, CTS, RTSCTS.", + "value": null + }, + "network-default-interface-type": { + "help": "Default network interface type. Typical options: null, ETHERNET, WIFI, CELLULAR, MESH", + "value": null + }, + "deep-sleep-latency": { + "help": "Time in ms required to go to and wake up from deep sleep (max 10)", + "value": 0 + }, + "boot-stack-size": { + "help": "Define the boot stack size in bytes. This value must be a multiple of 8", + "value": "0x1000" + }, + "mpu-rom-end": { + "help": "Last address of ROM protected by the MPU", + "value": "0x0fffffff" + } + } + }, + "PSA_Target": { + "public": false, + "config": { + "secure-rom-start": { + "help": "Starting address of Secure ROM", + "value": null, + "macro_name": "PSA_SECURE_ROM_START", + "conflicts": ["target.mbed_rom_start"] + }, + "secure-rom-size": { + "help": "Size in bytes of Secure ROM", + "value": null, + "macro_name": "PSA_SECURE_ROM_SIZE", + "conflicts": ["target.mbed_rom_size"] + }, + "non-secure-rom-start": { + "help": "Starting address of Non-secure ROM", + "value": null, + "macro_name": "PSA_NON_SECURE_ROM_START", + "conflicts": ["target.mbed_rom_start"] + }, + "non-secure-rom-size": { + "help": "Size in bytes of Non-secure ROM", + "value": null, + "macro_name": "PSA_NON_SECURE_ROM_SIZE", + "conflicts": ["target.mbed_rom_size"] + }, + "secure-ram-start": { + "help": "Starting address of Secure RAM", + "value": null, + "macro_name": "PSA_SECURE_RAM_START", + "conflicts": ["target.mbed_ram_start"] + }, + "secure-ram-size": { + "help": "Size in bytes of Secure RAM", + "value": null, + "macro_name": "PSA_SECURE_RAM_SIZE", + "conflicts": ["target.mbed_ram_size"] + }, + "non-secure-ram-start": { + "help": "Starting address of Non-secure RAM", + "value": null, + "macro_name": "PSA_NON_SECURE_RAM_START", + "conflicts": ["target.mbed_ram_start"] + }, + "non-secure-ram-size": { + "help": "Size in bytes of Non-secure RAM", + "value": null, + "macro_name": "PSA_NON_SECURE_RAM_SIZE", + "conflicts": ["target.mbed_ram_size"] + }, + "shared-ram-start": { + "help": "Starting address of Shared RAM between Secure and Non-secure worlds", + "value": null, + "macro_name": "PSA_SHARED_RAM_START" + }, + "shared-ram-size": { + "help": "Size in bytes of Shared RAM between Secure and Non-secure worlds", + "value": null, + "macro_name": "PSA_SHARED_RAM_SIZE" + } + } + }, + "NSPE_Target": { + "inherits": ["PSA_Target"], + "components": ["PSA_SRV_IPC", "NSPE"], + "device_has_add": ["TRNG"], + "public": false + }, + "SPE_Target": { + "inherits": ["PSA_Target"], + "components": ["PSA_SRV_IMPL", "PSA_SRV_IPC", "SPE"], + "public": false + }, + "CM4_UARM": { + "inherits": ["Target"], + "core": "Cortex-M4", + "default_toolchain": "uARM", + "public": false, + "supported_toolchains": ["uARM"], + "default_lib": "small" + }, + "CM4_ARM": { + "inherits": ["Target"], + "core": "Cortex-M4", + "public": false, + "supported_toolchains": ["ARM"] + }, + "CM4F_UARM": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "default_toolchain": "uARM", + "public": false, + "supported_toolchains": ["uARM"], + "default_lib": "small" + }, + "CM4F_ARM": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "public": false, + "supported_toolchains": ["ARM"] + }, + "LPCTarget": { + "inherits": ["Target"], + "post_binary_hook": { "function": "LPCTargetCode.lpc_patch" }, + "public": false + }, + "LPC11C24": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"], + "OUTPUT_EXT": "hex", + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "CAN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "device_name": "LPC11C24FBD48/301" + }, + "LPC1114": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC1114FN28/102" + }, + "LPC11U24": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "detect_code": ["1040"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "LOCALFILESYSTEM", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SEMIHOST", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U24FBD48/401" + }, + "OC_MBUINO": { + "inherits": ["LPC11U24"], + "macros": [ + "TARGET_LPC11U24", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "extra_labels": ["NXP", "LPC11UXX"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2"] + }, + "LPC11U24_301": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "LOCALFILESYSTEM", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SEMIHOST", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "device_name": "LPC11U24FHI33/301" + }, + "LPC11U34_421": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "device_name": "LPC11U34FBD48/311" + }, + "MICRONFCBOARD": { + "inherits": ["LPC11U34_421"], + "macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"], + "extra_labels_add": ["APPNEARME_MICRONFCBOARD"], + "release_versions": ["2"], + "device_name": "LPC11U34FBD48/311" + }, + "LPC11U35_401": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U35FBD48/401" + }, + "LPC11U35_501": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U35FHI33/501" + }, + "LPC11U35_501_IBDAP": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "device_name": "LPC11U35FHI33/501" + }, + "XADOW_M0": { + "inherits": ["LPC11U35_501"] + }, + "LPC11U35_Y5_MBUG": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "device_name": "LPC11U35FHI33/501" + }, + "LPC11U37_501": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "default_lib": "small", + "device_name": "LPC11U37FBD64/501" + }, + "LPCCAPPUCCINO": { + "inherits": ["LPC11U37_501"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "device_name": "LPC11U37FBD64/501" + }, + "ARCH_GPRS": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U37FBD64/501" + }, + "LPC11U68": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC11U6X"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "detect_code": ["1168"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC11U68JBD100" + }, + "LPC1347": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "extra_labels": ["NXP", "LPC13XX"], + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2"], + "device_name": "LPC1347FBD48" + }, + "LPC1549": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC15XX"], + "supported_toolchains": ["uARM", "GCC_ARM", "IAR"], + "inherits": ["LPCTarget"], + "detect_code": ["1549"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "CAN", + "I2C", + "INTERRUPTIN", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "LPC1549JBD64" + }, + "LPC1768": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768", "NXP_EMAC"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "detect_code": ["1010"], + "device_has": [ + "RTC", + "USTICKER", + "ANALOGIN", + "ANALOGOUT", + "CAN", + "DEBUG_AWARENESS", + "EMAC", + "ETHERNET", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "LOCALFILESYSTEM", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SEMIHOST", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "LPC1768", + "bootloader_supported": true, + "config": { + "us-ticker-timer": { + "help": "Chooses which timer (0-3) to use for us_ticker.c", + "value": 3 + } + }, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "LPC1769": { + "inherits": ["LPC1768"], + "device_name": "LPC1769" + }, + "ARCH_PRO": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "extra_labels": ["NXP", "LPC176X", "NXP_EMAC"], + "macros": ["TARGET_LPC1768"], + "inherits": ["LPCTarget"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "CAN", + "DEBUG_AWARENESS", + "EMAC", + "ETHERNET", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "LPC1768", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "UBLOX_C027": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "extra_labels": ["NXP", "LPC176X", "NXP_EMAC"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "macros": ["TARGET_LPC1768"], + "inherits": ["LPCTarget"], + "device_has": [ + "USTICKER", + "ANALOGIN", + "ANALOGOUT", + "CAN", + "DEBUG_AWARENESS", + "EMAC", + "ETHERNET", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "LPC1768", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "CELLULAR" + } + }, + "XBED_LPC1768": { + "inherits": ["LPCTarget"], + "core": "Cortex-M3", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"], + "macros": ["TARGET_LPC1768"], + "detect_code": ["1010"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "CAN", + "DEBUG_AWARENESS", + "ETHERNET", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "LOCALFILESYSTEM", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SEMIHOST", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "MPU" + ], + "device_name": "LPC1768" + }, + "LPC810": { + "inherits": ["LPCTarget"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC81X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "IAR", "GCC_ARM"], + "device_has": [ + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "device_name": "LPC810M021FN8" + }, + "LPC812": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "extra_labels": ["NXP", "LPC81X"], + "is_disk_virtual": true, + "supported_toolchains": ["uARM", "IAR", "GCC_ARM"], + "inherits": ["LPCTarget"], + "detect_code": ["1050"], + "device_has": [ + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": 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"is_disk_virtual": true, + "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0311"], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "ANALOGOUT", + "EMAC", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "TRNG", + "FLASH" + ], + "release_versions": ["2", "5"], + "device_name": "MK66FN2M0xxx18", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "K82F": { + "supported_form_factors": ["ARDUINO"], + "components_add": ["SPIF", "FLASHIAP"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], + "is_disk_virtual": true, + "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["0217"], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "TRNG", + "FLASH", + "QSPI" + ], + "release_versions": ["2", "5"], + "device_name": "MK82FN256xxx15" + }, + "UBRIDGE": { + "inherits": ["K82F"], + "extra_labels_remove": ["FRDM"], + "components_remove": ["SPIF"], + "device_has_remove": ["QSPI"], + "supported_form_factors": [] + }, + "FAMILY_STM32": { + "inherits": ["Target"], + "public": false, + "extra_labels": ["STM"], + "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], + "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"], + "config": { + "lse_available": { + "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used", + "value": "1" + }, + "lpuart_clock_source": { + "help": "Define the LPUART clock source. Mask values: USE_LPUART_CLK_LSE, USE_LPUART_CLK_PCLK1, USE_LPUART_CLK_HSI", + "value": "USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1" + }, + "stdio_uart_tx": { + "help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden" + }, + "stdio_uart_rx": { + "help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden" + }, + "lpticker_delay_ticks": { + "help": "https://os.mbed.com/docs/latest/porting/low-power-ticker.html", + "value": 1, + "macro_name": "LPTICKER_DELAY_TICKS" + }, + "lpticker_lptim_clock": { + "help": "Default value for LPTIM clock (lpticker_lptim == 1). Value is the dividing factor. Choose 1, 2 or 4", + "value": 1 + } + }, + "overrides": { + "deep-sleep-latency": 3 + }, + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES" + ] + }, + "MIMXRT1050_EVK": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M7FD", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels": ["NXP", "MCUXpresso_MCUS", "EVK", "MIMXRT1050", "IMX", "NXP_EMAC"], + "is_disk_virtual": true, + "macros": [ + "CPU_MIMXRT1052DVL6B", + "FSL_RTOS_MBED", + "XIP_BOOT_HEADER_ENABLE=1", + "XIP_EXTERNAL_FLASH=1", + "XIP_BOOT_HEADER_DCD_ENABLE=1", + "SKIP_SYSCLK_INIT", + "FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE", + "SDRAM_IS_SHAREABLE", + "MBED_MPU_CUSTOM" + ], + "inherits": ["Target"], + "detect_code": ["0227"], + "device_has": [ + "RTC", + "SLEEP", + "USTICKER", + "LPTICKER", + "ANALOGIN", + "EMAC", + "I2C", + "I2CSLAVE", + "ERROR_RED", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2", "5"], + "features": ["LWIP"], + "device_name": "MIMXRT1052", + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "LPC54114": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "IAR", "GCC_ARM"], + "extra_labels": [ + "NXP", + "MCUXpresso_MCUS", + "LPC54114_M4", + "LPCXpresso", + "LPC" + ], + "is_disk_virtual": true, + "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "detect_code": ["1054"], + "device_has": [ + "USTICKER", + "RTC", + "ANALOGIN", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "post_binary_hook": { "function": "LPCTargetCode.lpc_patch" }, + "device_name": "LPC54114J256BD64" + }, + "MCU_LPC546XX": { + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "IAR", "GCC_ARM"], + "extra_labels": [ + "NXP", + "MCUXpresso_MCUS", + "LPC", + "NXP_EMAC" + ], + "is_disk_virtual": true, + "public": false, + "macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"], + "inherits": ["Target"], + "device_has": [ + "USTICKER", + "RTC", + "ANALOGIN", + "EMAC", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES", + "FLASH", + "TRNG", + "QSPI", + "MPU" + ], + "device_name": "LPC54628J512ET180", + "post_binary_hook": { "function": "LPCTargetCode.lpc_patch" }, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "LPC546XX": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_LPC546XX"], + "extra_labels_add": ["LPCXpresso"], + "detect_code": ["1056"], + "release_versions": ["2", "5"], + "components_add": ["QSPIF"] + }, + "FF_LPC546XX": { + "inherits": ["MCU_LPC546XX"], + "detect_code": ["8081"], + "device_has_remove": ["QSPI"], + "release_versions": ["2", "5"] + }, + "NUCLEO_F030R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F030R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0725"], + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": ["CRC"], + "device_has_remove": ["LPTICKER"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F030R8" + }, + "NUCLEO_F031K6": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F0", "STM32F031K6"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0791"], + "overrides": { "lse_available": 0 }, + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": ["CRC"], + "device_has_remove": ["LPTICKER"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F031K6" + }, + "NUCLEO_F042K6": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F0", "STM32F042K6"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0785"], + "overrides": { "lse_available": 0 }, + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": [ + "CAN", + "CRC" + ], + "device_has_remove": ["LPTICKER"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F042K6" + }, + "NUCLEO_F070RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F070RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0755"], + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": [ + "CRC", + "SERIAL_ASYNCH", + "FLASH" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F070RB" + }, + "NUCLEO_F072RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F072RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0730"], + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "FLASH" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F072RB" + }, + "NUCLEO_F091RC": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F091RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0750"], + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "FLASH" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F091RC" + }, + "NUCLEO_F103RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F1", "STM32F103RB"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)", + "value": "0", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "detect_code": ["0700"], + "device_has_add": [ + "CAN", + "SERIAL_ASYNCH", + "FLASH" + ], + "device_has_remove": ["LPTICKER"], + "release_versions": ["2", "5"], + "device_name": "STM32F103RB" + }, + "NUCLEO_F207ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F2", "STM32F207ZG", "STM_EMAC"], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0835"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "EMAC", + "SERIAL_ASYNCH", + "FLASH", + "TRNG", + "MPU" + ], + "device_has_remove": ["LPTICKER"], + "release_versions": ["2", "5"], + "device_name": "STM32F207ZG", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_F302R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0705"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F302R8" + }, + "NUCLEO_F303K8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { "lse_available": 0 }, + "detect_code": ["0775"], + "default_lib": "small", + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC" + ], + "release_versions": ["2"], + "device_name": "STM32F303K8" + }, + "NUCLEO_F303RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0745"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "bootloader_supported": true, + "device_name": "STM32F303RE" + }, + "NUCLEO_F303ZE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0747"], + "device_has_add": ["ANALOGOUT", "CAN", "CRC", "FLASH", "MPU"], + "release_versions": ["2", "5"], + "device_name": "STM32F303ZE" + }, + "NUCLEO_F334R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0735"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F334R8" + }, + "NUCLEO_F401RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0720"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F401RE" + }, + "STEVAL_3DP001V1": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401VE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"], + "device_has_add": [ + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "overrides": { "lse_available": 0 }, + "release_versions": ["2", "5"], + "device_name": "STM32F401VE" + }, + "NUCLEO_F410RB": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F410RB", + "STM32F410xB", + "STM32F410Rx" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0744"], + "device_has_add": [ + "ANALOGOUT", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F410RB" + }, + "NUCLEO_F411RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE", "PSA"], + "components_add": ["FLASHIAP"], + "detect_code": ["0740"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)", + "value": "0", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE", + "bootloader_supported": true + }, + "NUCLEO_F412ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0826"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true + }, + "MTB_MXCHIP_EMW3166": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F412xG", + "STM32F412ZG", + "WICED", + "CYW43362" + ], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "USI_WM_BN_BM_22": { + "inherits": ["FAMILY_STM32"], + "components_add": ["SPIF", "FLASHIAP"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F412xG", + "STM32F412ZG", + "WICED", + "CYW4343X", + "CORDIO" + ], + "features": ["BLE", "STORAGE"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["5"], + "device_name": "STM32F412ZG", + "bootloader_supported": true, + "public": false, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "MTB_USI_WM_BN_BM_22": { + "overrides": { + "lse_available": 0 + }, + "inherits": ["USI_WM_BN_BM_22"] + }, + "MTB_ADV_WISE_1530": { + "inherits": ["USI_WM_BN_BM_22"], + "config": { + "led1": "PA_4", + "led2": "PC_12", + "led3": "NC" + }, + "overrides": { + "stdio_uart_tx": "PB_10", + "stdio_uart_rx": "PC_11" + } + }, + "DISCO_F413ZH": { + "components_add": ["QSPIF"], + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F413xx", + "STM32F413ZH", + "STM32F413xH" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0743"], + "macros_add": [ + "MBED_TICKLESS", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "QSPI", + "MPU" + ], + "bootloader_supported": true, + "release_versions": ["2", "5"], + "device_name": "STM32F413ZH" + }, + "NUCLEO_F413ZH": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F413xx", + "STM32F413ZH", + "STM32F413xH" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0743"], + "macros_add": [ + "MBED_TICKLESS", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "bootloader_supported": true, + "release_versions": ["2", "5"], + "device_name": "STM32F413ZH" + }, + "ELMO_F411RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "default_toolchain": "uARM", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "detect_code": ["----"], + "device_has_add": ["MPU"], + "device_has_remove": ["SERIAL_FC"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F411RE" + }, + "NUCLEO_F429ZI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "extra_labels_add": [ + "STM32F4", + "STM32F429", + "STM32F429ZI", + "STM32F429xx", + "STM32F429xI", + "STM_EMAC", + "PSA" + ], + "components_add": ["FLASHIAP"], + "macros_add": [ + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "detect_code": ["0796"], + "release_versions": ["2", "5"], + "device_name": "STM32F429ZI", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_F439ZI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "extra_labels_add": [ + "STM32F4", + "STM32F439", + "STM32F439ZI", + "STM32F439xx", + "STM32F439xI", + "STM_EMAC" + ], + "macros_add": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "detect_code": ["0797"], + "release_versions": ["2", "5"], + "device_name": "STM32F439ZI", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_F446RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0777"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F446RE", + "bootloader_supported": true + }, + "NUCLEO_F446ZE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0778"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F446ZE" + }, + "B96B_F446VE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"], + "detect_code": ["0840"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F446VE" + }, + "NUCLEO_F746ZG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": [ + "STM32F7", + "STM32F746", + "STM32F746xG", + "STM32F746ZG", + "STM_EMAC" + ], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER" + ], + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0816"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F746ZG", + "bootloader_supported": true, + "overrides": { + "lpticker_delay_ticks": 4, + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_F756ZG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": [ + "STM32F7", + "STM32F756", + "STM32F756xG", + "STM32F756ZG", + "STM_EMAC" + ], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER", + "MBEDTLS_CONFIG_HW_SUPPORT" + ], + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0819"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F756ZG", + "overrides": { + "lpticker_delay_ticks": 4, + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_F767ZI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7FD", + "extra_labels_add": [ + "STM32F7", + "STM32F767", + "STM32F767xI", + "STM32F767ZI", + "STM_EMAC" + ], + "config": { + "flash_dual_bank": { + "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1", + "value": "0" + }, + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "supported_form_factors": ["ARDUINO"], + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER" + ], + "detect_code": ["0818"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F767ZI", + "bootloader_supported": true, + "overrides": { + "lpticker_delay_ticks": 4, + "network-default-interface-type": "ETHERNET" + } + }, + "NUCLEO_H743ZI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7FD", + "extra_labels_add": [ + "STM32H7", + "STM32H743", + "STM32H743xI", + "STM32H743ZI" + ], + "config": { + "d11_configuration": { + "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)", + "value": "PA_7", + "macro_name": "STM32_D11_SPI_ETHERNET_PIN" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + }, + "hse_value": { + "help": "HSE default value is 25MHz in HAL", + "value": "8000000", + "macro_name": "HSE_VALUE" + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0813"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32H743ZI", + "bootloader_supported": true + }, + "NUCLEO_L011K4": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L011K4"], + "supported_toolchains": ["uARM"], + "default_toolchain": "uARM", + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0780"], + "device_has_add": [ + "CRC", + "FLASH" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L011K4" + }, + "NUCLEO_L031K6": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L031K6"], + "default_toolchain": "uARM", + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0790"], + "device_has_add": [ + "CRC", + "FLASH" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L031K6" + }, + "NUCLEO_L053R8": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0715"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L053R8" + }, + "NUCLEO_L073RZ": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0760"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L073RZ" + }, + "NUCLEO_L152RE": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32L1", "STM32L152RE"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0710"], + "device_has_add": [ + "ANALOGOUT", + "SERIAL_ASYNCH", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L152RE" + }, + "NUCLEO_L432KC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0770"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "CAN", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L432KC", + "bootloader_supported": true + }, + "NUCLEO_L433RC_P": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L433xC", "STM32L433RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0779"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "CAN", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L433RC", + "bootloader_supported": true + }, + "MTB_ADV_WISE_1510": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L443xC", "STM32L443RC"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { "lse_available": 0 }, + "release_versions": ["5"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "CAN", + "TRNG", + "FLASH", + "MPU" + ], + "device_has_remove": ["LPTICKER"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "device_name": "STM32L443RC", + "detect_code": ["0458"], + "bootloader_supported": true + }, + "NUCLEO_L476RG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0765"], + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER", + "TWO_RAM_REGIONS" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L476RG", + "bootloader_supported": true + }, + "SILICA_SENSOR_NODE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "default_toolchain": "GCC_ARM", + "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0766"], + "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["5"], + "device_name": "STM32L476JG" + }, + "NUCLEO_L486RG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0827"], + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER", + "MBEDTLS_CONFIG_HW_SUPPORT", + "TWO_RAM_REGIONS" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L486RG" + }, + "MTB_ADV_WISE_1570": { + "components_add": ["FLASHIAP"], + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32L4", + "STM32L486RG", + "STM32L486xG", + "WISE_1570" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_HSE_XTAL", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { "lpuart_clock_source": "USE_LPUART_CLK_HSI" }, + "detect_code": ["0460"], + "macros_add": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "WISE_1570", + "TWO_RAM_REGIONS" + ], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "device_has_remove": ["LPTICKER"], + "release_versions": ["5"], + "device_name": "STM32L486RG", + "bootloader_supported": true, + "OUTPUT_EXT": "hex" + }, + "ARCH_MAX": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "program_cycle_s": 2, + "extra_labels_add": [ + "STM32F4", + "STM32F407", + "STM32F407xG", + "STM32F407VG", + "STM_EMAC" + ], + "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "EMAC", "MPU"], + "device_has_remove": [ + "LPTICKER", + "SERIAL_FC" + ], + "macros_add": ["USB_STM_HAL"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_HSE_XTAL", + "macro_name": "CLOCK_SOURCE" + } + }, + "release_versions": ["2", "5"], + "overrides": {"lse_available": 0}, + "device_name": "STM32F407VG", + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "WIO_3G": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + }, + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "extra_labels_add": [ + "STM32F4", + "STM32F439", + "STM32F439VI", + "STM32F439xx", + "STM32F439xI" + ], + "macros_add": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "TRNG", + "FLASH", + "MPU" + ], + "detect_code": ["9014"], + "release_versions": ["2", "5"], + "device_name" : "STM32F439VI", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "CELLULAR" + } + }, + "WIO_BG96": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "0", + "macro_name": "CLOCK_SOURCE_USB" + }, + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439VI", "STM32F439xx", "STM32F439xI"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "device_has_add": [ + "ANALOGOUT", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "detect_code": ["9015"], + "release_versions": ["2", "5"], + "device_name" : "STM32F439VI", + "components_add": ["SD"], + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "CELLULAR" + } + }, + "DISCO_F051R8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0", + "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"], + "supported_toolchains": ["GCC_ARM"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "device_has_add": [ + "CRC", + "MPU" + ], + "device_has_remove": ["LPTICKER"], + "device_name": "STM32F051R8" + }, + "DISCO_F100RB": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "extra_labels_add": ["STM32F1", "STM32F100RB"], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": [], + "device_has_remove": ["LPTICKER"], + "device_name": "STM32F100RB" + }, + "DISCO_F303VC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F3", + "STM32F303", + "STM32F303xC", + "STM32F303VC" + ], + "overrides": { "lse_available": 0 }, + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "release_versions": ["2", "5"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "MPU" + ], + "device_name": "STM32F303VC" + }, + "DISCO_F334C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334C8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "overrides": { "lse_available": 0 }, + "detect_code": ["0810"], + "device_has_add": [ + "ANALOGOUT", + "CRC", + "SERIAL_ASYNCH" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32F334C8" + }, + "DISCO_F407VG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F407", + "STM32F407xG", + "STM32F407VG" + ], + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "macros_add": ["USB_STM_HAL"], + "overrides": { "lse_available": 0 }, + "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU"], + "release_versions": ["2", "5"], + "device_name": "STM32F407VG" + }, + "DISCO_F429ZI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F429", + "STM32F429ZI", + "STM32F429xI", + "STM32F429xx" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "clock_source_usb": { + "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", + "value": "1", + "macro_name": "CLOCK_SOURCE_USB" + } + }, + "overrides": { "lse_available": 0 }, + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F429ZI", + "bootloader_supported": true + }, + "DISCO_F469NI": { + "components_add": ["QSPIF"], + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F469", + "STM32F469NI", + "STM32F469xI", + "STM32F469xx" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "detect_code": ["0788"], + "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "TRNG", + "FLASH", + "QSPI", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F469NI", + "bootloader_supported": true + }, + "DISCO_L053C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { + "lse_available": 0, + "lpticker_delay_ticks": 4 + }, + "device_has_add": [ + "ANALOGOUT", + "CRC", + "FLASH", + "MPU" + ], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "STM32L053C8" + }, + "DISCO_L072CZ_LRWAN1": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": [ + "STM32L0", + "STM32L072CZ", + "STM32L072xZ", + "STM32L072xx" + ], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0833"], + "device_has_add": [ + "ANALOGOUT", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L072CZ" + }, + "MTB_MURATA_ABZ": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M0+", + "extra_labels_add": [ + "STM32L0", + "STM32L0x2xZ", + "STM32L082CZ", + "STM32L082xx" + ], + "detect_code": ["0456"], + "device_has_add": [ + "ANALOGOUT", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "device_has_remove": ["LPTICKER"], + "release_versions": ["5"], + "device_name": "STM32L082CZ" + }, + "DISCO_F746NG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7F", + "extra_labels_add": [ + "STM32F7", + "STM32F746", + "STM32F746xG", + "STM32F746NG", + "STM_EMAC" + ], + "components_add": ["QSPIF"], + "supported_form_factors": ["ARDUINO"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "usb_speed": { + "help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)", + "value": "1" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0815"], + "macros_add": [ + "MBED_TICKLESS", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "QSPI", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F746NG", + "bootloader_supported": true, + "overrides": { + "lpticker_delay_ticks": 4, + "network-default-interface-type": "ETHERNET" + } + }, + "DISCO_F769NI": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M7FD", + "extra_labels_add": [ + "STM32F7", + "STM32F769", + "STM32F769xI", + "STM32F769NI", + "STM_EMAC" + ], + "components_add": ["QSPIF"], + "supported_form_factors": ["ARDUINO"], + "config": { + "flash_dual_bank": { + "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1", + "value": "0" + }, + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI", + "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "detect_code": ["0817"], + "macros_add": [ + "MBED_TICKLESS", + "USB_STM_HAL", + "USBHOST_OTHER" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "EMAC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU", + "QSPI" + ], + "bootloader_supported": true, + "release_versions": ["2", "5"], + "device_name": "STM32F769NI", + "overrides": { + "lpticker_delay_ticks": 4, + "network-default-interface-type": "ETHERNET" + } + }, + "DISCO_L475VG_IOT01A": { + "components_add": ["QSPIF", "FLASHIAP"], + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "supported_form_factors": ["ARDUINO"], + "detect_code": ["0764"], + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER", + "TWO_RAM_REGIONS" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "TRNG", + "FLASH", + "QSPI", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L475VG", + "bootloader_supported": true + }, + "DISCO_L476VG": { + "components_add": ["QSPIF", "FLASHIAP"], + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0820"], + "macros_add": [ + "MBED_TICKLESS", + "USBHOST_OTHER", + "TWO_RAM_REGIONS" + ], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "TRNG", + "FLASH", + "QSPI", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L476VG", + "bootloader_supported": true + }, + "MTS_MDOT_F405RG": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F405RG"], + "is_disk_virtual": true, + "macros_add": ["HSE_VALUE=26000000"], + "device_has_add": ["ANALOGOUT", "MPU"], + "release_versions": ["2"], + "device_name": "STM32F405RG" + }, + "MTS_MDOT_F411RE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "macros_add": [ + "HSE_VALUE=26000000", + "USE_PLL_HSE_EXTC=0", + "VECT_TAB_OFFSET=0x00010000" + ], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mts_dot", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "device_has_add": ["MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE" + }, + "MTS_DRAGONFLY_F411RE": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "overrides": { "lse_available": 0 }, + "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mts_dragonfly", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "device_has_add": ["MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "release_versions": ["2", "5"], + "device_name": "STM32F411RE" + }, + "MTS_DRAGONFLY_L471QG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32L4", + "STM32L471QG", + "STM32L471xG", + "STM32L471xx" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "macros_add": ["TWO_RAM_REGIONS"], + "detect_code": ["0312"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L471QG", + "bootloader_supported": true + }, + "MTB_MTS_DRAGONFLY": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411RE"], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "overrides": { + "lse_available": 0 + }, + "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], + "device_has_add": ["MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "post_binary_hook": { + "function": "MTSCode.combine_bins_mtb_mts_dragonfly", + "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] + }, + "release_versions": ["2", "5"], + "device_name": "STM32F411RE", + "bootloader_supported": true + }, + "XDOT_L151CC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151CC"], + "config": { + "hse_value": { + "value": "24000000", + "macro_name": "HSE_VALUE" + } + }, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT", "FLASH", "MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "release_versions": ["5"], + "device_name": "STM32L151CC", + "bootloader_supported": true + }, + "FF1705_L151CC": { + "inherits": ["XDOT_L151CC"], + "detect_code": ["8080"] + }, + "MTB_MTS_XDOT": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151CC"], + "config": { + "hse_value": { + "value": "24000000", + "macro_name": "HSE_VALUE" + } + }, + "overrides": { + "stdio_uart_tx": "PA_2", + "stdio_uart_rx": "PA_3" + }, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT", "FLASH", "MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "release_versions": ["5"], + "device_name": "STM32L151CC", + "bootloader_supported": true + }, + "MTB_RAK811": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "extra_labels_add": ["STM32L1", "STM32L151xBA", "STM32L151CBA"], + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "device_has_add": ["ANALOGOUT", "MPU"], + "device_has_remove": [ + "SERIAL_FC" + ], + "release_versions": ["5"], + "device_name": "STM32L151CBxxA", + "bootloader_supported": true + }, + "MOTE_L152RC": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M3", + "default_toolchain": "ARM", + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "extra_labels_add": ["STM32L1", "STM32L152RC"], + "detect_code": ["4100"], + "device_has_add": ["ANALOGOUT", "SERIAL_ASYNCH", "FLASH", "MPU"], + "device_has_remove": ["SERIAL_FC"], + "release_versions": ["2", "5"], + "device_name": "STM32L152RC" + }, + "DISCO_F401VC": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "default_toolchain": "GCC_ARM", + "extra_labels_add": [ + "STM32F4", + "STM32F401", + "STM32F401xC", + "STM32F401VC" + ], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": ["MPU"], + "device_name": "STM32F401VC" + }, + "MODULE_UBLOX_ODIN_W2": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M4F", + "extra_labels_add": [ + "STM32F4", + "STM32F439", + "STM32F439ZI", + "STM32F439xx", + "STM32F439xI", + "STM_EMAC", + "CORDIO", + "CORDIO_ODIN_W2" + ], + "macros": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "HSE_VALUE=24000000", + "HSE_STARTUP_TIMEOUT=5000", + "CB_INTERFACE_SDIO", + "CB_CHIP_WL18XX", + "SUPPORT_80211D_ALWAYS", + "WLAN_ENABLED", + "CB_FEATURE_802DOT11W", + "CB_FEATURE_802DOT11R", + "MBEDTLS_ARC4_C", + "MBEDTLS_DES_C", + "MBEDTLS_MD4_C", + "MBEDTLS_MD5_C", + "MBEDTLS_SHA1_C", + "MBED_MPU_CUSTOM" + ], + "device_has_add": [ + "CAN", + "EMAC", + "TRNG", + "FLASH", + "WIFI", + "SERIAL" + ], + "features": ["BLE"], + "device_has_remove": [], + "device_name": "STM32F439ZI", + "public": false, + "bootloader_supported": true, + "config": { + "BLE_STACK_UBX": { + "help": "It should be set to true to enable ublox ODIN own stack/driver rather than CORDIO", + "value": false, + "macro_name": "BLE_STACK_UBX" + } + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "UBLOX_EVK_ODIN_W2": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "supported_form_factors": ["ARDUINO"], + "release_versions": ["5"], + "device_has_remove": [], + "extra_labels_add": ["PSA"], + "components_add": ["FLASHIAP"], + "config": { + "stdio_uart_tx_help": { + "help": "Value: D8(default) or D1" + }, + "stdio_uart_rx_help": { + "help": "Value: D2(default) or D0" + } + }, + "overrides": { + "stdio_uart_tx": "D8", + "stdio_uart_rx": "D2" + } + }, + "MBED_CONNECT_ODIN": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "release_versions": ["5"], + "config": { + "stdio_uart_tx_help": { + "help": "Value: PA_9(default) or PD_8" + }, + "stdio_uart_rx_help": { + "help": "Value: PA_10(default) or PD_9" + } + }, + "overrides": { + "stdio_uart_tx": "PA_9", + "stdio_uart_rx": "PA_10" + } + }, + "MTB_UBLOX_ODIN_W2": { + "inherits": ["MODULE_UBLOX_ODIN_W2"], + "device_has_add": [], + "overrides": {"lse_available": 0}, + "release_versions": ["5"] + }, + "UBLOX_C030": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "extra_labels_add": [ + "STM32F4", + "STM32F437", + "STM32F437VG", + "STM32F437xx", + "STM32F437xG", + "STM_EMAC" + ], + "config": { + "modem_is_on_board": { + "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", + "value": 1, + "macro_name": "MODEM_ON_BOARD" + }, + "modem_data_connection_type": { + "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", + "value": 1, + "macro_name": "MODEM_ON_BOARD_UART" + } + }, + "macros_add": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "HSE_VALUE=12000000", + "GNSSBAUD=9600" + ], + "device_has_add": [ + "ANALOGOUT", + "EMAC", + "TRNG", + "FLASH", + "MPU" + ], + "public": false, + "device_name": "STM32F437VG", + "bootloader_supported": true, + "overrides": { + "lse_available": 0, + "network-default-interface-type": "ETHERNET" + } + }, + "UBLOX_C030_U201": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "UBLOX_C030_N211": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "UBLOX_C030_R41XM": { + "inherits": ["UBLOX_C030"], + "release_versions": ["5"] + }, + "UBLOX_C030_R410M": { + "inherits": ["UBLOX_C030_R41XM"], + "release_versions": ["5"] + }, + "UBLOX_C030_R412M": { + "inherits": ["UBLOX_C030_R41XM"], + "release_versions": ["5"] + }, + "NZ32_SC151": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "uARM", + "program_cycle_s": 1.5, + "extra_labels_add": ["STM32L1", "STM32L151RC"], + "overrides": { "lse_available": 0 }, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], + "device_has_add": ["ANALOGOUT", "MPU"], + "default_lib": "small", + "device_name": "STM32L151RC" + }, + "MCU_NRF51": { + "inherits": ["Target"], + "core": "Cortex-M0", + "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex", + "macros": [ + "NRF51", + "NRF5x", + "TARGET_NRF51822", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "MERGE_BOOTLOADER": false, + "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"], + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_ARM"], + "public": false, + "MERGE_SOFT_DEVICE": true, + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "boot": "s130_nrf51_1.0.0_bootloader.hex", + "name": "s130_nrf51_1.0.0_softdevice.hex", + "offset": 114688 + }, + { + "boot": "s110_nrf51822_8.0.0_bootloader.hex", + "name": "s110_nrf51822_8.0.0_softdevice.hex", + "offset": 98304 + }, + { + "boot": "s110_nrf51822_7.1.0_bootloader.hex", + "name": "s110_nrf51822_7.1.0_softdevice.hex", + "offset": 90112 + }, + { + "boot": "s110_nrf51822_7.0.0_bootloader.hex", + "name": "s110_nrf51822_7.0.0_softdevice.hex", + "offset": 90112 + }, + { + "boot": "s110_nrf51822_6.0.0_bootloader.hex", + "name": "s110_nrf51822_6.0.0_softdevice.hex", + "offset": 81920 + } + ], + "detect_code": ["1070"], + "post_binary_hook": { + "function": "MCU_NRF51Code.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM"] + }, + "program_cycle_s": 6, + "features": ["BLE"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ] + }, + "MCU_NRF51_16K_BASE": { + "inherits": ["MCU_NRF51"], + "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"], + "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"], + "public": false, + "default_lib": "small" + }, + "MCU_NRF51_16K_BOOT_BASE": { + "inherits": ["MCU_NRF51_16K_BASE"], + "MERGE_BOOTLOADER": true, + "extra_labels_add": ["MCU_NRF51_16K_BOOT"], + "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"], + "public": false + }, + "MCU_NRF51_16K_OTA_BASE": { + "inherits": ["MCU_NRF51_16K_BASE"], + "public": false, + "extra_labels_add": ["MCU_NRF51_16K_OTA"], + "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"], + "MERGE_SOFT_DEVICE": false + }, + "MCU_NRF51_16K": { + "inherits": ["MCU_NRF51_16K_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_S110": { + "extra_labels_add": ["MCU_NRF51_16K_S110"], + "macros_add": ["TARGET_MCU_NRF51_16K_S110"], + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "name": "s110_nrf51822_8.0.0_softdevice.hex", + "boot": "s110_nrf51822_8.0.0_bootloader.hex", + "offset": 98304 + }, + { + "name": "s110_nrf51822_7.1.0_softdevice.hex", + "boot": "s110_nrf51822_7.1.0_bootloader.hex", + "offset": 90112 + } + ], + "public": false + }, + "MCU_NRF51_16K_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"], + "public": false + }, + "MCU_NRF51_16K_BOOT": { + "inherits": ["MCU_NRF51_16K_BOOT_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_16K_BOOT_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"], + "public": false + }, + "MCU_NRF51_16K_OTA": { + "inherits": ["MCU_NRF51_16K_OTA_BASE"], + "extra_labels_add": ["MCU_NRF51_16K_S130"], + "macros_add": ["TARGET_MCU_NRF51_16K_S130"], + "public": false + }, + "MCU_NRF51_16K_OTA_S110": { + "inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"], + 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"I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "STDIO_MESSAGES" + ], + "release_versions": ["2", "5"] + }, + "MAX32620HSP": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "extra_labels": ["Maxim", "MAX32620"], + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "STDIO_MESSAGES" + ], + "features": ["BLE"], + "release_versions": [] + }, + "MAX32620FTHR": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": [ + "__SYSTEM_HFX=96000000", + "TARGET=MAX32620", + "TARGET_REV=0x4332", + "OPEN_DRAIN_LEDS" + ], + "extra_labels": ["Maxim", "MAX32620C"], + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "STDIO_MESSAGES", + "USTICKER" + ], + "release_versions": ["2", "5"] + }, + "SDT32620B": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": [ + "__SYSTEM_HFX=96000000", + "TARGET=MAX32620", + "TARGET_REV=0x4332", + "OPEN_DRAIN_LEDS" + ], + "detect_code": ["3101"], + "extra_labels": ["Maxim", "MAX32620C"], + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "STDIO_MESSAGES", + "USTICKER" + ], + "release_versions": ["2", "5"] + }, + "MAX32625_BASE": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": ["TARGET=MAX32625", "TARGET_REV=0x4132", "OPEN_DRAIN_LEDS"], + "extra_labels": ["Maxim", "MAX32625"], + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_FC", + "SLEEP", + "SPI", + "STDIO_MESSAGES", + "USTICKER" + ], + "device_name": "MAX32625", + "release_versions": ["2", "5"], + "public": false + }, + "MAX32625MBED": { + "inherits": ["MAX32625_BASE"], + "extra_labels_add": ["MAX32625_NO_BOOT"] + }, + "SDT32625B": { + "inherits": ["MAX32625_BASE"], + "extra_labels_add": ["MAX32625_NO_BOOT"], + "detect_code": ["3102"] + }, + "MAX32625PICO": { + "inherits": ["MAX32625_BASE"], + "extra_labels_add": ["MAX32625_BOOT"], + "bootloader_supported": true + }, + "MAX32625NEXPAQ": { + "inherits": ["MAX32625_BASE"] + }, + "MAX32630FTHR": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "macros": [ + "__SYSTEM_HFX=96000000", + "TARGET=MAX32630", + "TARGET_REV=0x4132", + "BLE_HCI_UART", + "OPEN_DRAIN_LEDS" + ], + "extra_labels": ["Maxim", "MAX32630"], + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SPI", + "STDIO_MESSAGES", + "USTICKER", + "MPU" + ], + "features": ["BLE"], + "release_versions": ["2", "5"] + }, + "EFM32": { + "inherits": ["Target"], + "extra_labels": ["Silicon_Labs", "EFM32"], + "macros": [ + "MBEDTLS_CONFIG_HW_SUPPORT", + "MBED_TICKLESS", + "EM_MSC_RUN_FROM_FLASH" + ], + "public": false + }, + "EFM32GG990F1024": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"], + "core": "Cortex-M3", + "macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32GG990F1024", + "public": false, + "bootloader_supported": true + }, + "EFM32GG_STK3700": { + "inherits": ["EFM32GG990F1024"], + "progen": { "target": "efm32gg-stk" }, + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "ITM", + "MPU" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32LG990F256": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32LG", "256K", "SL_AES"], + "core": "Cortex-M3", + "macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32LG990F256", + "public": false, + "bootloader_supported": true + }, + "EFM32LG_STK3600": { + "inherits": ["EFM32LG990F256"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 2, + "device_name": "EFM32LG990F256", + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32WG990F256": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32WG", "256K", "SL_AES"], + "core": "Cortex-M4F", + "macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32WG990F256", + "public": false, + "bootloader_supported": true + }, + "EFM32WG_STK3800": { + "inherits": ["EFM32WG990F256"], + "progen": { "target": "efm32wg-stk" }, + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "48000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PF7", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32ZG222F32": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"], + "supported_toolchains": ["GCC_ARM", "uARM", "IAR"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "EFM32ZG222F32", + "public": false + }, + "EFM32ZG_STK3200": { + "inherits": ["EFM32ZG222F32"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "24000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA9", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32HG322F64": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32HG", "64K", "SL_AES"], + "core": "Cortex-M0+", + "default_toolchain": "uARM", + "macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"], + "supported_toolchains": ["GCC_ARM", "uARM", "IAR"], + "default_lib": "small", + "release_versions": ["2"], + "device_name": "EFM32HG322F64", + "public": false + }, + "EFM32HG_STK3400": { + "inherits": ["EFM32HG322F64"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "24000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "21000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!", + "value": "_CMU_HFRCOCTRL_BAND_21MHZ", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA9", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFM32PG1B100F256GM32": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32PG1B100F256GM32", + "public": false, + "bootloader_supported": true + }, + "EFM32PG_STK3401": { + "inherits": ["EFM32PG1B100F256GM32"], + "device_has": [ + "ANALOGIN", + "CRC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "40000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFR32MG1P132F256GM48": { + "inherits": ["EFM32"], + "extra_labels_add": [ + "EFR32MG1", + "EFR32_1", + "256K", + "SL_RAIL", + "SL_CRYPTO" + ], + "core": "Cortex-M4F", + "macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFR32MG1P132F256GM48", + "public": false, + "bootloader_supported": true + }, + "EFR32MG1P233F256GM48": { + "inherits": ["EFM32"], + "extra_labels_add": [ + "EFR32MG1", + "EFR32_1", + "256K", + "SL_RAIL", + "SL_CRYPTO" + ], + "core": "Cortex-M4F", + "macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "public": false, + "bootloader_supported": true + }, + "EFR32MG1_BRD4150": { + "inherits": ["EFR32MG1P132F256GM48"], + "device_has": [ + "802_15_4_PHY", + "ANALOGIN", + "CRC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + }, + "overrides": { + "network-default-interface-type": "MESH" + }, + "public": false + }, + "TB_SENSE_1": { + "inherits": ["EFR32MG1P233F256GM48"], + "device_has": [ + "802_15_4_PHY", + "ANALOGIN", + "CRC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 5, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + } + }, + "overrides": { + "network-default-interface-type": "MESH" + } + }, + "EFM32PG12B500F1024GL125": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": [ + "EFM32PG12B500F1024GL125", + "TRANSACTION_QUEUE_SIZE_SPI=4" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32PG12B500F1024GL125", + "public": false, + "bootloader_supported": true + }, + "EFM32PG12_STK3402": { + "inherits": ["EFM32PG12B500F1024GL125"], + "device_has": [ + "ANALOGIN", + "CRC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "TRNG", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 2, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "40000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PA5", + "macro_name": "EFM_BC_EN" + } + } + }, + "EFR32MG12P332F1024GL125": { + "inherits": ["EFM32"], + "extra_labels_add": [ + "EFR32MG12", + "EFR32_12", + "1024K", + "SL_RAIL", + "SL_CRYPTO" + ], + "core": "Cortex-M4F", + "macros_add": [ + "EFR32MG12P332F1024GL125", + "TRANSACTION_QUEUE_SIZE_SPI=4" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFR32MG12P332F1024GL125", + "public": false, + "bootloader_supported": true + }, + "TB_SENSE_12": { + "inherits": ["EFR32MG12P332F1024GL125"], + "device_name": "EFR32MG12P332F1024GL125", + "device_has": [ + "802_15_4_PHY", + "ANALOGIN", + "CRC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "TRNG", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 5, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "38400000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + } + }, + "overrides": { + "network-default-interface-type": "MESH" + } + }, + "EFM32GG11B820F2048GL192": { + "inherits": ["EFM32"], + "extra_labels_add": ["EFM32GG11", "2048K", "SL_CRYPTO"], + "core": "Cortex-M4F", + "macros_add": [ + "EFM32GG11B820F2048GL192", + "TRANSACTION_QUEUE_SIZE_SPI=4" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], + "release_versions": ["2", "5"], + "device_name": "EFM32GG11B820F2048GL192", + "public": false, + "bootloader_supported": true + }, + "EFM32GG11_STK3701": { + "inherits": ["EFM32GG11B820F2048GL192"], + "device_name": "EFM32GG11B820F2048GL192", + "device_has": [ + "ANALOGIN", + "CRC", + "EMAC", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "QSPI", + "RTC", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "USTICKER", + "TRNG", + "FLASH", + "MPU" + ], + "forced_reset_timeout": 5, + "config": { + "hf_clock_src": { + "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator", + "value": "HFXO", + "macro_name": "CORE_CLOCK_SOURCE" + }, + "hfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "50000000", + "macro_name": "HFXO_FREQUENCY" + }, + "lf_clock_src": { + "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator", + "value": "LFXO", + "macro_name": "LOW_ENERGY_CLOCK_SOURCE" + }, + "lfxo_clock_freq": { + "help": "Value: External crystal frequency in hertz", + "value": "32768", + "macro_name": "LFXO_FREQUENCY" + }, + "hfrco_clock_freq": { + "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select", + "value": "32000000", + "macro_name": "HFRCO_FREQUENCY" + }, + "hfrco_band_select": { + "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!", + "value": "cmuHFRCOFreq_32M0Hz", + "macro_name": "HFRCO_FREQUENCY_ENUM" + }, + "board_controller_enable": { + "help": "Pin to pull high for enabling the USB serial port", + "value": "PE1", + "macro_name": "EFM_BC_EN" + }, + "qspi_flash_enable": { + "help": "Pin to pull high for enabling the on-board QSPI flash", + "value": "PG13", + "macro_name": "QSPI_FLASH_EN" + } + }, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "WIZWIKI_W7500": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2", "5"] + }, + "WIZWIKI_W7500P": { + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "inherits": ["Target"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2", "5"] + }, + "WIZWIKI_W7500ECO": { + "inherits": ["Target"], + "core": "Cortex-M0", + "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "SPISLAVE", + "STDIO_MESSAGES" + ], + "release_versions": ["2", "5"] + }, + "SAMR21G18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": [ + "__SAMR21G18A__", + "I2C_MASTER_CALLBACK_MODE=true", + "EXTINT_CALLBACK_MODE=true", + "USART_CALLBACK_MODE=true", + "TC_ASYNC=true" + ], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH" + ], + "release_versions": ["2"], + "device_name": "ATSAMR21G18A" + }, + "SAMD21J18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": [ + "__SAMD21J18A__", + "I2C_MASTER_CALLBACK_MODE=true", + "EXTINT_CALLBACK_MODE=true", + "USART_CALLBACK_MODE=true", + "TC_ASYNC=true" + ], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH" + ], + "release_versions": ["2"], + "device_name": "ATSAMD21J18A" + }, + "SAMD21G18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": [ + "__SAMD21G18A__", + "I2C_MASTER_CALLBACK_MODE=true", + "EXTINT_CALLBACK_MODE=true", + "USART_CALLBACK_MODE=true", + "TC_ASYNC=true" + ], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH" + ], + "release_versions": ["2"], + "device_name": "ATSAMD21G18A" + }, + "SAML21J18A": { + "inherits": ["Target"], + "core": "Cortex-M0+", + "macros": [ + "__SAML21J18A__", + "I2C_MASTER_CALLBACK_MODE=true", + "EXTINT_CALLBACK_MODE=true", + "USART_CALLBACK_MODE=true", + "TC_ASYNC=true" + ], + "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH" + ], + "device_name": "ATSAML21J18A" + }, + "SAMG55J19": { + "inherits": ["Target"], + "core": "Cortex-M4", + "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"], + "macros": [ + "__SAMG55J19__", + "BOARD=75", + "I2C_MASTER_CALLBACK_MODE=true", + "EXTINT_CALLBACK_MODE=true", + "USART_CALLBACK_MODE=true", + "TC_ASYNC=true" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], + "default_toolchain": "ARM", + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "MPU" + ], + "default_lib": "std", + "device_name": "ATSAMG55J19" + }, + "MCU_NRF51_UNIFIED": { + "inherits": ["Target"], + "core": "Cortex-M0", + "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex", + "macros": [ + "BOARD_PCA10028", + "NRF51", + "TARGET_NRF51822", + "BLE_STACK_SUPPORT_REQD", + "SOFTDEVICE_PRESENT", + "S130", + "TARGET_MCU_NRF51822", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "NO_SYSTICK", + "MBED_TICKLESS" + ], + "MERGE_BOOTLOADER": false, + "extra_labels": [ + "NORDIC", + "MCU_NRF51", + "MCU_NRF51822_UNIFIED", + "NRF5x", + "NRF51", + "SDK_11", + "NORDIC_SOFTDEVICE" + ], + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], + "public": false, + "MERGE_SOFT_DEVICE": true, + "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [ + { + "boot": "", + "name": "s130_nrf51_2.0.0_softdevice.hex", + "offset": 110592 + } + ], + "detect_code": ["1070"], + "post_binary_hook": { + "function": "MCU_NRF51Code.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM", "IAR"] + }, + "program_cycle_s": 6, + "features": ["BLE"], + "config": { + "lf_clock_src": { + "value": "NRF_LF_SRC_XTAL", + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC" + }, + "uart_hwfc": { + "help": "Value: 1 for enable, 0 for disable", + "value": 1, + "macro_name": "MBED_CONF_NORDIC_UART_HWFC" + } + }, + "device_has": [ + "ANALOGIN", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ] + }, + "MCU_NRF51_16K_UNIFIED_S130": { + "inherits": ["MCU_NRF51_UNIFIED"], + "extra_labels_add": [ + "MCU_NORDIC_16K", + "MCU_NRF51_16K_S130", + "MCU_NRF51_16K" + ], + "macros_add": [ + "TARGET_MCU_NORDIC_16K", + "TARGET_MCU_NRF51_16K_S130", + "TARGET_MCU_NRF51_16K" + ], + "public": false + }, + "MCU_NRF51_32K_UNIFIED": { + "inherits": ["MCU_NRF51_UNIFIED"], + "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"], + "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"], + "public": false + }, + "NRF51_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "device_has": [ + "USTICKER", + "LPTICKER", + "ANALOGIN", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SPISLAVE" + ], + "release_versions": ["2", "5"], + "device_name": "nRF51822_xxAA" + }, + "SDT51822B": { + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "device_has": [ + "USTICKER", + "LPTICKER", + "ANALOGIN", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SPISLAVE" + ], + "detect_code": ["3103"], + "release_versions": ["2", "5"], + "device_name": "nRF51822_xxAA" + }, + "NRF51_DONGLE": { + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "progen": { "target": "nrf51-dongle" }, + "device_has": [ + "USTICKER", + "LPTICKER", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SPISLAVE" + ], + "release_versions": ["2", "5"] + }, + "OSHCHIP": { + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "overrides": { "lf_clock_src": "NRF_LF_SRC_RC" }, + "device_has": [ + "USTICKER", + "LPTICKER", + "ANALOGIN", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE" + ], + "device_name": "nRF51822_xxAC" + }, + "MCU_NRF52832": { + "inherits": ["Target"], + "core": "Cortex-M4F", + "static_memory_defines": false, + "macros": [ + "BOARD_PCA10040", + "NRF52", + "TARGET_NRF52832", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "MBED_TICKLESS", + "MBED_MPU_CUSTOM" + ], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "ITM", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SYSTICK_CLK_OFF_DURING_SLEEP", + "TRNG", + "USTICKER" + ], + "extra_labels": [ + "NORDIC", + "NRF5x", + "NRF52", + "SDK_14_2", + "NORDIC_SOFTDEVICE", + "SOFTDEVICE_COMMON", + "SOFTDEVICE_S132_FULL" + ], + "config": { + "lf_clock_src": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC", + "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC", + "value": "NRF_LF_SRC_XTAL" + }, + "lf_clock_rc_calib_timer_interval": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL", + "value": 16 + }, + "lf_clock_rc_calib_mode_config": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG", + "value": 0 + } + }, + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "public": false, + "detect_code": ["1101"], + "program_cycle_s": 6, + "bootloader_supported": true + }, + "NRF52_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA", + "macros_add": [ + "WSF_MAX_HANDLERS=10" + ] + }, + "SDT52832B": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "detect_code": ["3104"], + "device_name": "nRF52832_xxAA" + }, + "UBLOX_EVA_NINA": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "UBLOX_EVK_NINA_B1": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MTB_UBLOX_NINA_B1": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MTB_LAIRD_BL652": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MTB_MURATA_WSM_BL241": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA", + "detect_code": ["0466"] + }, + "MTB_ACONNO_ACN52832": { + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "DELTA_DFBM_NQ620": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MCU_NRF52840": { + "inherits": ["Target"], + "components_add": ["QSPIF"], + "core": "Cortex-M4F", + "static_memory_defines": false, + "macros": [ + "BOARD_PCA10056", + "NRF52840_XXAA", + "TARGET_NRF52840", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "MBED_TICKLESS", + "MBEDTLS_CONFIG_HW_SUPPORT", + "WSF_MAX_HANDLERS=10", + "MBED_MPU_CUSTOM" + ], + "features": ["CRYPTOCELL310"], + "device_has": [ + "ANALOGIN", + "FLASH", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "ITM", + "LPTICKER", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SYSTICK_CLK_OFF_DURING_SLEEP", + "TRNG", + "USTICKER", + "QSPI" + ], + "extra_labels": [ + "NORDIC", + "NRF5x", + "NRF52", + "SDK_14_2", + "NORDIC_SOFTDEVICE", + "SOFTDEVICE_COMMON", + "SOFTDEVICE_S140_FULL" + ], + "config": { + "lf_clock_src": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC", + "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC", + "value": "NRF_LF_SRC_XTAL" + }, + "lf_clock_rc_calib_timer_interval": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL", + "value": 16 + }, + "lf_clock_rc_calib_mode_config": { + "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG", + "value": 0 + } + }, + "overrides": { + "mpu-rom-end": "0x1fffffff" + }, + "OUTPUT_EXT": "hex", + "is_disk_virtual": true, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "public": false, + "detect_code": ["1101"], + "program_cycle_s": 6, + "bootloader_supported": true + }, + "NRF52840_DK": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52840"], + "release_versions": ["5"], + "device_name": "nRF52840_xxAA" + }, + "MTB_LAIRD_BL654": { + "inherits": ["MCU_NRF52840"], + "release_versions": ["5"], + "device_name": "nRF52840_xxAA", + "detect_code": ["0465"], + "features_remove": ["CRYPTOCELL310"], + "macros_remove": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "overrides": { + "lf_clock_src": "NRF_LF_SRC_RC" + } + }, + "BLUEPILL_F103C8": { + "inherits": ["FAMILY_STM32"], + "core": "Cortex-M3", + "default_toolchain": "GCC_ARM", + "extra_labels_add": ["STM32F1", "STM32F103C8"], + "supported_toolchains": ["GCC_ARM"], + "device_has_add": [ + "CAN", + "SERIAL_ASYNCH", + "FLASH" + ], + "device_has_remove": ["STDIO_MESSAGES", "LPTICKER"] + }, + "NUMAKER_PFM_NUC472": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "extra_labels": [ + "NUVOTON", + "NUC472", + "NU_XRAM_SUPPORTED", + "FLASH_CMSIS_ALGO", + "NUVOTON_EMAC" + ], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K", + "value": "GPIO_DBCTL_DBCLKSRC_IRC10K" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + } + }, + "inherits": ["Target"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "LPTICKER_DELAY_TICKS=3"], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "STDIO_MESSAGES", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "TRNG", + "CAN", + "FLASH", + "EMAC", + "MPU" + ], + "release_versions": ["5"], + "device_name": "NUC472HI8AE", + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "NCS36510": { + "inherits": ["Target"], + "core": "Cortex-M3", + "extra_labels": ["ONSEMI"], + "config": { + "mac-addr-low": { + "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.", + "value": "0xFFFFFFFF" + }, + "mac-addr-high": { + "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.", + "value": "0xFFFFFFFF" + }, + "32KHz-clk-trim": { + "help": "32KHz clock trim", + "value": "0x39" + }, + "32MHz-clk-trim": { + "help": "32MHz clock trim", + "value": "0x17" + }, + "rssi-trim": { + "help": "RSSI trim", + "value": "0x3D" + }, + "txtune-trim": { + "help": "TX tune trim", + "value": "0xFFFFFFFF" + } + }, + "OUTPUT_EXT": "hex", + "post_binary_hook": { + "function": "NCS36510TargetCode.ncs36510_addfib" + }, + "macros": [ + "CM3", + "CPU_NCS36510", + "TARGET_NCS36510", + "LOAD_ADDRESS=0x3000" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "SERIAL", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "TRNG", + "SPISLAVE", + "802_15_4_PHY", + "MPU" + ], + "release_versions": ["2", "5"] + }, + "NUMAKER_PFM_M453": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "extra_labels": [ + "NUVOTON", + "M451", + "NUMAKER_PFM_M453", + "FLASH_CMSIS_ALGO" + ], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC", + "value": "GPIO_DBCTL_DBCLKSRC_LIRC" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + } + }, + "inherits": ["Target"], + "macros_add": ["LPTICKER_DELAY_TICKS=3"], + "progen": { "target": "numaker-pfm-m453" }, + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "STDIO_MESSAGES", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "CAN", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "M453VG6AE", + "bootloader_supported": true + }, + "NUMAKER_PFM_NANO130": { + "core": "Cortex-M0", + "default_toolchain": "ARM", + "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K", + "value": "GPIO_DBCLKSRC_IRC10K" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768", + "value": "GPIO_DBCLKSEL_16" + }, + "clock-pll": { + "help": "Choose clock source to clock PLL: NU_HXT_PLL or NU_HIRC_PLL", + "macro_name": "NU_CLOCK_PLL", + "value": "NU_HIRC_PLL" + } + }, + "inherits": ["Target"], + "macros": [ + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", + "MBED_FAULT_HANDLER_DISABLED", + "LPTICKER_DELAY_TICKS=3" + ], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "STDIO_MESSAGES", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH" + ], + "release_versions": ["5"], + "device_name": "NANO130KE3BN" + }, + "HI2110": { + "inherits": ["Target"], + "core": "Cortex-M0", + "default_toolchain": "GCC_ARM", + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "extra_labels": ["ublox"], + "macros": [ + "TARGET_PROCESSOR_FAMILY_BOUDICA", + "BOUDICA_SARA", + "NDEBUG=1", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "public": false, + "target_overrides": { + "*": { + "core.stdio-flush-at-exit": false + } + }, + "device_has": [ + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "SERIAL", + "SLEEP", + "STDIO_MESSAGES" + ], + "default_lib": "std", + "release_versions": [] + }, + "SARA_NBIOT": { + "inherits": ["HI2110"], + "extra_labels": ["ublox", "HI2110"], + "public": false + }, + "SARA_NBIOT_EVK": { + "inherits": ["SARA_NBIOT"], + "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"] + }, + "MCU_RTL8195A": { + "core": "Cortex-M3", + "default_toolchain": "GCC_ARM", + "macros": [ + "__RTL8195A__", + "CONFIG_PLATFORM_8195A", + "CONFIG_MBED_ENABLED", + "PLATFORM_CMSIS_RTOS", + "MBED_FAULT_HANDLER_DISABLED", + "MBED_MPU_CUSTOM" + ], + "inherits": ["Target"], + "extra_labels": ["Realtek", "AMEBA", "RTW_EMAC"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "TRNG", + "FLASH" + ], + "public": false, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "post_binary_hook": { + "function": "RTL8195ACode.binary_hook", + "toolchains": ["ARM_STD", "GCC_ARM", "IAR"] + }, + "release_versions": ["5"], + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "REALTEK_RTL8195AM": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_RTL8195A"], + "detect_code": ["4600"], + "extra_labels_add": ["RTL8195A"] + }, + "VBLUNO51_LEGACY": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K"], + "detect_code": ["C006"], + "overrides": { "uart_hwfc": 0 }, + "extra_labels_add": ["VBLUNO51"] + }, + "VBLUNO51_BOOT": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_BOOT"], + "detect_code": ["C006"], + "overrides": { "uart_hwfc": 0 }, + "extra_labels_add": ["VBLUNO51"], + "macros_add": ["TARGET_VBLUNO51"] + }, + "VBLUNO51_OTA": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_OTA"], + "detect_code": ["C006"], + "overrides": { "uart_hwfc": 0 }, + "extra_labels_add": ["VBLUNO51"], + "macros_add": ["TARGET_VBLUNO51"] + }, + "VBLUNO51": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF51_32K_UNIFIED"], + "detect_code": ["C006"], + "overrides": { "uart_hwfc": 0 }, + "device_has": [ + "USTICKER", + "LPTICKER", + "ANALOGIN", + "I2C", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "SLEEP", + "SPI", + "SPI_ASYNCH", + "SPISLAVE" + ], + "release_versions": ["2"], + "device_name": "nRF51822_xxAC" + }, + "DISCO_L496AG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L496AG", "STM32L496xG"], + "components_add": ["QSPIF"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0822"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU", + "QSPI" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L496AG", + "bootloader_supported": true + }, + "NUCLEO_L496ZG": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0823"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L496ZG", + "bootloader_supported": true + }, + "NUCLEO_L496ZG_P": { + "inherits": ["NUCLEO_L496ZG"], + "detect_code": ["0828"] + }, + "NUCLEO_L4R5ZI": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": ["ARDUINO", "MORPHO"], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32L4", "STM32L4R5ZI", "STM32L4R5xI"], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", + "value": "USE_PLL_MSI", + "macro_name": "CLOCK_SOURCE" + }, + "lpticker_lptim": { + "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", + "value": 1 + } + }, + "macros_add": [ + "MBED_TICKLESS" + ], + "overrides": { "lpticker_delay_ticks": 4 }, + "detect_code": ["0776"], + "device_has_add": [ + "ANALOGOUT", + "CAN", + "CRC", + "SERIAL_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "release_versions": ["2", "5"], + "device_name": "STM32L4R5ZI", + "bootloader_supported": true + }, + "NUCLEO_L4R5ZI_P": { + "inherits": ["NUCLEO_L4R5ZI"], + "detect_code": ["0781"] + }, + "VBLUNO52": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52832"], + "release_versions": ["5"], + "device_name": "nRF52832_xxAA" + }, + "MCU_M480": { + "core": "Cortex-M4F", + "default_toolchain": "ARM", + "public": false, + "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO", "NUVOTON_EMAC"], + "is_disk_virtual": true, + "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC", + "value": "GPIO_DBCTL_DBCLKSRC_LIRC" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + }, + "usb-device-hsusbd": { + "help": "Select high-speed USB device or not", + "value": 1 + }, + "ctrl01-enable": { + "help": "Enable control_01", + "value": 0 + } + }, + "inherits": ["Target"], + "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "LPTICKER_DELAY_TICKS=3"], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "STDIO_MESSAGES", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "TRNG", + "FLASH", + "CAN", + "EMAC", + "MPU" + ], + "release_versions": ["5"], + "bootloader_supported": true, + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "NUMAKER_PFM_M487": { + "inherits": ["MCU_M480"], + "device_name": "M487JIDAE" + }, + "NUMAKER_IOT_M487": { + "inherits": ["MCU_M480"], + "device_name": "M487JIDAE" + }, + "TMPM066": { + "inherits": ["Target"], + "core": "Cortex-M0", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": [ + "__TMPM066__", + "CMSIS_VECTAB_VIRTUAL", + "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"" + ], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "USTICKER", + "ANALOGIN", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "SERIAL", + "SLEEP", + "I2C", + "I2CSLAVE", + "STDIO_MESSAGES", + "PWMOUT" + ], + "device_name": "TMPM066FWUG", + "detect_code": ["7011"], + "release_versions": ["5"] + }, + "SAKURAIO_EVB_01": { + "inherits": ["FAMILY_STM32"], + "supported_form_factors": [], + "core": "Cortex-M4F", + "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"], + "device_has": [ + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "MPU" + ], + "config": { + "clock_source": { + "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", + "value": "USE_PLL_HSI", + "macro_name": "CLOCK_SOURCE" + } + }, + "device_has_add": [ + "SERIAL_ASYNCH", + "FLASH" + ], + "release_versions": ["2"], + "device_name": "STM32F411RE" + }, + "TMPM46B": { + "inherits": ["Target"], + "core": "Cortex-M4", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM46B__"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "USTICKER", + "ANALOGIN", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_FC", + "SPI", + "I2C", + "STDIO_MESSAGES", + "TRNG", + "FLASH", + "SLEEP" + ], + "device_name": "TMPM46BF10FG", + "detect_code": ["7013"], + "release_versions": ["5"], + "bootloader_supported": true + }, + "ARM_FM": { + "inherits": ["Target"], + "public": false, + "macros": ["__ARM_FM"], + "extra_labels": ["ARM_FM"] + }, + "FVP_MPS2": { + "inherits": ["ARM_FM"], + "public": false, + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "OUTPUT_EXT": "elf", + "device_has": [ + "AACI", + "ANALOGIN", + "CLCD", + "EMAC", + "FLASH", + "I2C", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "SERIAL", + "SPI", + "SPISLAVE", + "TSC", + "USTICKER" + ], + "release_versions": ["5"], + "components_add": ["LAN91C111"], + "overrides": { + "network-default-interface-type": "ETHERNET" + } + }, + "FVP_MPS2_M0": { + "inherits": ["FVP_MPS2"], + "core": "Cortex-M0", + "macros_add": ["CMSDK_CM0"] + }, + "FVP_MPS2_M0P": { + "inherits": ["FVP_MPS2"], + "core": "Cortex-M0+", + "macros_add": ["CMSDK_CM0plus"], + "device_has_add": ["MPU"] + }, + "FVP_MPS2_M3": { + "inherits": ["FVP_MPS2"], + "core": "Cortex-M3", + "macros_add": ["CMSDK_CM3"], + "device_has_add": ["MPU"] + }, + "FVP_MPS2_M4": { + "inherits": ["FVP_MPS2"], + "core": "Cortex-M4", + "macros_add": ["CMSDK_CM4"], + "device_has_add": ["MPU"] + }, + "FVP_MPS2_M7": { + "inherits": ["FVP_MPS2"], + "core": "Cortex-M7", + "macros_add": ["CMSDK_CM7"], + "device_has_add": ["MPU"] + }, + "NUMAKER_PFM_M2351": { + "core": "Cortex-M23-NS", + "default_toolchain": "ARMC6", + "extra_labels": [ + "NUVOTON", + "M2351", + "M2351KIAAEES", + "FLASH_CMSIS_ALGO" + ], + "OUTPUT_EXT": "hex", + "macros": [ + "MBED_FAULT_HANDLER_DISABLED", + "MBED_TZ_DEFAULT_ACCESS=1", + "LPTICKER_DELAY_TICKS=3" + ], + "is_disk_virtual": true, + "supported_toolchains": ["ARMC6"], + "config": { + "gpio-irq-debounce-enable": { + "help": "Enable GPIO IRQ debounce", + "value": 0 + }, + "gpio-irq-debounce-enable-list": { + "help": "Comma separated pin list to enable GPIO IRQ debounce", + "value": "NC" + }, + "gpio-irq-debounce-clock-source": { + "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC", + "value": "GPIO_DBCTL_DBCLKSRC_LIRC" + }, + "gpio-irq-debounce-sample-rate": { + "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768", + "value": "GPIO_DBCTL_DBCLKSEL_16" + } + }, + "overrides": { + "mpu-rom-end": "0x1fffffff" + }, + "inherits": ["Target"], + "device_has": [ + "USTICKER", + "LPTICKER", + "RTC", + "ANALOGIN", + "I2C", + "I2CSLAVE", + "I2C_ASYNCH", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "STDIO_MESSAGES", + "SLEEP", + "SPI", + "SPISLAVE", + "SPI_ASYNCH", + "TRNG", + "FLASH", + "MPU" + ], + "detect_code": ["1305"], + "release_versions": ["5"], + "device_name": "M2351KIAAEES", + "bootloader_supported": true + }, + "TMPM3H6": { + "inherits": ["Target"], + "core": "Cortex-M3", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM3H6__"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "USTICKER", + "ANALOGIN", + "ANALOGOUT", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + "I2C", + "I2CSLAVE", + "STDIO_MESSAGES", + "MPU" + ], + "device_name": "TMPM3H6FWFG", + "detect_code": ["7012"], + "release_versions": ["5"] + }, + "TMPM4G9": { + "inherits": ["Target"], + "core": "Cortex-M4", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM4G9__"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "ANALOGIN", + "ANALOGOUT", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SPI", + "I2C", + "I2CSLAVE", + "STDIO_MESSAGES", + "FLASH", + "SLEEP", + "USTICKER", + "MPU" + ], + "device_name": "TMPM4G9F15FG", + "detect_code": ["7015"], + "release_versions": ["5"], + "bootloader_supported": true + }, + "MCU_PSOC6": { + "inherits": ["Target"], + "macros": ["MBED_MPU_CUSTOM"], + "default_toolchain": "GCC_ARM", + "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], + "core": "Cortex-M4F", + "OUTPUT_EXT": "hex", + "device_has": [ + "USTICKER", + "INTERRUPTIN", + "SERIAL", + "SERIAL_ASYNCH", + "SERIAL_FC", + "PORTIN", + "PORTOUT", + "PORTINOUT", + "RTC", + "PWMOUT", + "ANALOGIN", + "ANALOGOUT", + "I2C", + "I2C_ASYNCH", + "SPI", + "SPI_ASYNCH", + "STDIO_MESSAGES", + "LPTICKER", + "SLEEP", + "FLASH", + "TRNG", + "CRC" + ], + "release_versions": ["5"], + "extra_labels": ["Cypress", "PSOC6"], + "public": false + }, + "MCU_PSOC6_M0": { + "inherits": ["MCU_PSOC6"], + "core": "Cortex-M0+", + "macros_add": ["MCU_PSOC6_M0"], + "public": false + }, + "MCU_PSOC6_M4": { + "inherits": ["MCU_PSOC6"], + "macros_add": ["MCU_PSOC6_M4"], + "public": false + }, + "CY8CKIT_062_WIFI_BT": { + "inherits": ["MCU_PSOC6_M4"], + "features": ["BLE"], + "supported_form_factors": ["ARDUINO"], + "extra_labels_add": ["PSOC6_01", "WICED", "CYW43XXX", "CYW4343X", "CORDIO"], + "macros_add": ["CY8C6247BZI_D54", "PSOC6_DYNSRM_DISABLE=1"], + "detect_code": ["1900"], + "hex_filename": "psoc6_01_cm0p_sleep.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "CY8CMOD_062_4343W": { + "inherits": ["MCU_PSOC6_M4"], + "features": ["BLE"], + "device_has_remove": ["ANALOGOUT"], + "extra_labels_add": ["PSOC6_02", "WICED", "CYW43XXX", "CYW4343X", "CORDIO"], + "macros_add": ["CY8C624ABZI_D44", "PSOC6_DYNSRM_DISABLE=1"], + "public": false, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "CY8CPROTO_062_4343W": { + "inherits": ["CY8CMOD_062_4343W"], + "detect_code": ["1901"], + "hex_filename": "psoc6_02_cm0p_sleep.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + } + }, + "CY8CKIT_062_BLE": { + "inherits": ["MCU_PSOC6_M4"], + "supported_form_factors": ["ARDUINO"], + "extra_labels_add": ["PSOC6_01"], + "macros_add": ["CY8C6347BZI_BLD53", "PSOC6_DYNSRM_DISABLE=1"], + "detect_code": ["1902"], + "hex_filename": "psoc6_01_cm0p_sleep.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + } + }, + "CY8CKIT_062_4343W": { + "inherits": ["MCU_PSOC6_M4"], + "features": ["BLE"], + "supported_form_factors": ["ARDUINO"], + "device_has_remove": ["ANALOGOUT"], + "extra_labels_add": ["PSOC6_02", "WICED", "CYW43XXX", "CYW4343X", "CORDIO"], + "macros_add": ["CY8C624ABZI_D44", "PSOC6_DYNSRM_DISABLE=1"], + "detect_code": ["1905"], + "hex_filename": "psoc6_02_cm0p_sleep.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "CYW943012P6EVB_01": { + "inherits": ["MCU_PSOC6_M4"], + "features": ["BLE"], + "extra_labels_add": ["PSOC6_01", "WICED", "CYW43XXX", "CYW43012", "CORDIO"], + "macros_add": ["CY8C6247BZI_D54", "PSOC6_DYNSRM_DISABLE=1"], + "detect_code": ["1906"], + "hex_filename": "psoc6_01_cm0p_sleep.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + }, + "overrides": { + "network-default-interface-type": "WIFI" + } + }, + "FUTURE_SEQUANA_M0": { + "inherits": ["MCU_PSOC6_M0"], + "supported_form_factors": ["ARDUINO"], + "extra_labels_add": ["PSOC6_FUTURE", "CY8C63XX", "FUTURE_SEQUANA"], + "extra_labels_remove": ["PSOC6"], + "device_has_remove": ["TRNG", "CRC"], + "macros_add": ["CY8C6347BZI_BLD53"], + "detect_code": ["6000"], + "post_binary_hook": { + "function": "PSOC6Code.complete" + }, + "config": { + "system-clock": { + "help": "Desired frequency of main clock (Hz)", + "value": "100000000UL", + "macro_name": "CY_CLK_HFCLK0_FREQ_HZ" + }, + "peri-clock": { + "help": "Desired frequency of peripheral clock (Hz)", + "value": "50000000UL", + "macro_name": "CY_CLK_PERICLK_FREQ_HZ" + }, + "m0-clock": { + "help": "Desired frequency of M0+ core clock (Hz)", + "value": "50000000UL", + "macro_name": "CY_CLK_SLOWCLK_FREQ_HZ" + } + } + }, + "FUTURE_SEQUANA": { + "inherits": ["MCU_PSOC6_M4"], + "supported_form_factors": ["ARDUINO"], + "extra_labels_add": ["PSOC6_FUTURE", "CY8C63XX", "CORDIO"], + "extra_labels_remove": ["PSOC6"], + "device_has_remove": ["TRNG", "CRC"], + "macros_add": ["CY8C6347BZI_BLD53"], + "detect_code": ["6000"], + "hex_filename": "psoc63_m0_default_1.02.hex", + "post_binary_hook": { + "function": "PSOC6Code.complete" + }, + "config": { + "system-clock": { + "help": "Desired frequency of main clock (Hz)", + "value": "100000000UL", + "macro_name": "CY_CLK_HFCLK0_FREQ_HZ" + }, + "peri-clock": { + "help": "Desired frequency of peripheral clock (Hz)", + "value": "50000000UL", + "macro_name": "CY_CLK_PERICLK_FREQ_HZ" + }, + "m0-clock": { + "help": "Desired frequency of M0+ core clock (Hz)", + "value": "50000000UL", + "macro_name": "CY_CLK_SLOWCLK_FREQ_HZ" + } + } + }, + "FUTURE_SEQUANA_M0_PSA": { + "inherits": ["SPE_Target", "FUTURE_SEQUANA_M0"], + "components_add": ["SPM_MAILBOX", "FLASHIAP"], + "extra_labels_add": ["PSA"], + "macros_add": [ + "PSOC6_DYNSRM_DISABLE=1", + "MBEDTLS_PSA_CRYPTO_SPM", + "MBEDTLS_PSA_CRYPTO_C", + "MBEDTLS_ENTROPY_NV_SEED", + "MBEDTLS_PLATFORM_NV_SEED_READ_MACRO=mbed_default_seed_read", + "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO=mbed_default_seed_write" + ], + "deliver_to_target": "FUTURE_SEQUANA_PSA", + "overrides": { + "secure-rom-start": "0x10000000", + "secure-rom-size": "0x80000", + "non-secure-rom-start": "0x10080000", + "non-secure-rom-size": "0x78000", + "secure-ram-start": "0x08000000", + "secure-ram-size": "0x10000", + "non-secure-ram-start": "0x08010000", + "non-secure-ram-size": "0x37700", + "shared-ram-start": "0x08047700", + "shared-ram-size": "0x100" + } + }, + "FUTURE_SEQUANA_PSA": { + "inherits": ["NSPE_Target", "FUTURE_SEQUANA"], + "extra_labels_add": ["PSA"], + "extra_labels_remove": ["CORDIO"], + "components_add": ["SPM_MAILBOX"], + "macros_add": ["PSOC6_DYNSRM_DISABLE=1", "MBEDTLS_PSA_CRYPTO_C"], + "hex_filename": "psa_release_1.0.hex", + "overrides": { + "secure-rom-start": "0x10000000", + "secure-rom-size": "0x80000", + "non-secure-rom-start": "0x10080000", + "non-secure-rom-size": "0x78000", + "secure-ram-start": "0x08000000", + "secure-ram-size": "0x10000", + "non-secure-ram-start": "0x08010000", + "non-secure-ram-size": "0x37700", + "shared-ram-start": "0x08047700", + "shared-ram-size": "0x100" + } + }, + "TMPM3HQ": { + "inherits": ["Target"], + "core": "Cortex-M3", + "is_disk_virtual": true, + "extra_labels": ["TOSHIBA"], + "macros": ["__TMPM3HQ__"], + "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], + "device_has": [ + "USTICKER", + "ANALOGIN", + "ANALOGOUT", + "INTERRUPTIN", + "PORTIN", + "PORTINOUT", + "PORTOUT", + "PWMOUT", + "SERIAL", + "SLEEP", + "SPI", + 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