mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dcmi.h
- Revision:
- 167:e84263d55307
- Parent:
- 149:156823d33999
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dcmi.h Thu Jun 08 15:02:37 2017 +0100 +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dcmi.h Wed Jun 21 17:46:44 2017 +0100 @@ -2,13 +2,13 @@ ****************************************************************************** * @file stm32f2xx_hal_dcmi.h * @author MCD Application Team - * @version V1.1.3 - * @date 29-June-2016 + * @version V1.2.1 + * @date 14-April-2017 * @brief Header file of DCMI HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -153,11 +153,11 @@ /** @defgroup DCMI_Error_Code DCMI Error Code * @{ */ -#define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ -#define HAL_DCMI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun error */ -#define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002U) /*!< Synchronization error */ -#define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */ -#define HAL_DCMI_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error */ +#define HAL_DCMI_ERROR_NONE 0x00000000U /*!< No error */ +#define HAL_DCMI_ERROR_OVR 0x00000001U /*!< Overrun error */ +#define HAL_DCMI_ERROR_SYNC 0x00000002U /*!< Synchronization error */ +#define HAL_DCMI_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */ +#define HAL_DCMI_ERROR_DMA 0x00000040U /*!< DMA error */ /** * @} */ @@ -165,7 +165,7 @@ /** @defgroup DCMI_Capture_Mode DCMI Capture Mode * @{ */ -#define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000U) /*!< The received data are transferred continuously +#define DCMI_MODE_CONTINUOUS 0x00000000U /*!< The received data are transferred continuously into the destination memory through the DMA */ #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of frame and then transfers a single frame through the DMA */ @@ -176,7 +176,7 @@ /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode * @{ */ -#define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000U) /*!< Hardware synchronization data capture (frame/line start/stop) +#define DCMI_SYNCHRO_HARDWARE 0x00000000U /*!< Hardware synchronization data capture (frame/line start/stop) is synchronized with the HSYNC/VSYNC signals */ #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with synchronization codes embedded in the data flow */ @@ -188,7 +188,7 @@ /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity * @{ */ -#define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000U) /*!< Pixel clock active on Falling edge */ +#define DCMI_PCKPOLARITY_FALLING 0x00000000U /*!< Pixel clock active on Falling edge */ #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */ /** @@ -198,7 +198,7 @@ /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity * @{ */ -#define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Vertical synchronization active Low */ +#define DCMI_VSPOLARITY_LOW 0x00000000U /*!< Vertical synchronization active Low */ #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */ /** @@ -208,7 +208,7 @@ /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity * @{ */ -#define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Horizontal synchronization active Low */ +#define DCMI_HSPOLARITY_LOW 0x00000000U /*!< Horizontal synchronization active Low */ #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */ /** @@ -218,7 +218,7 @@ /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG * @{ */ -#define DCMI_JPEG_DISABLE ((uint32_t)0x00000000U) /*!< Mode JPEG Disabled */ +#define DCMI_JPEG_DISABLE 0x00000000U /*!< Mode JPEG Disabled */ #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */ /** @@ -228,7 +228,7 @@ /** @defgroup DCMI_Capture_Rate DCMI Capture Rate * @{ */ -#define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000U) /*!< All frames are captured */ +#define DCMI_CR_ALL_FRAME 0x00000000U /*!< All frames are captured */ #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */ #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */ @@ -239,7 +239,7 @@ /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode * @{ */ -#define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000U) /*!< Interface captures 8-bit data on every pixel clock */ +#define DCMI_EXTEND_DATA_8B 0x00000000U /*!< Interface captures 8-bit data on every pixel clock */ #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */ #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */ #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */ @@ -251,7 +251,7 @@ /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate * @{ */ -#define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFFU) /*!< Window coordinate */ +#define DCMI_WINDOW_COORDINATE 0x3FFFU /*!< Window coordinate */ /** * @} @@ -260,7 +260,7 @@ /** @defgroup DCMI_Window_Height DCMI Window Height * @{ */ -#define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFFU) /*!< Window Height */ +#define DCMI_WINDOW_HEIGHT 0x1FFFU /*!< Window Height */ /** * @} @@ -499,8 +499,8 @@ /** @defgroup DCMI_Private_Constants DCMI Private Constants * @{ */ -#define DCMI_MIS_INDEX ((uint32_t)0x1000U) /*!< DCMI MIS register index */ -#define DCMI_SR_INDEX ((uint32_t)0x2000U) /*!< DCMI SR register index */ +#define DCMI_MIS_INDEX 0x1000U /*!< DCMI MIS register index */ +#define DCMI_SR_INDEX 0x2000U /*!< DCMI SR register index */ /** * @} */