mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dcmi.h@167:e84263d55307, 2017-06-21 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Jun 21 17:46:44 2017 +0100
- Revision:
- 167:e84263d55307
- Parent:
- 149:156823d33999
This updates the lib to the mbed lib v 145
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f2xx_hal_dcmi.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
AnnaBridge | 167:e84263d55307 | 5 | * @version V1.2.1 |
AnnaBridge | 167:e84263d55307 | 6 | * @date 14-April-2017 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of DCMI HAL module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
AnnaBridge | 167:e84263d55307 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F2xx_HAL_DCMI_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F2xx_HAL_DCMI_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | #if defined(STM32F207xx) || defined(STM32F217xx) |
<> | 144:ef7eb2e8f9f7 | 47 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 48 | #include "stm32f2xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /** @addtogroup STM32F2xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 52 | * @{ |
<> | 144:ef7eb2e8f9f7 | 53 | */ |
<> | 144:ef7eb2e8f9f7 | 54 | |
<> | 144:ef7eb2e8f9f7 | 55 | /** @addtogroup DCMI DCMI |
<> | 144:ef7eb2e8f9f7 | 56 | * @brief DCMI HAL module driver |
<> | 144:ef7eb2e8f9f7 | 57 | * @{ |
<> | 144:ef7eb2e8f9f7 | 58 | */ |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 61 | /** @defgroup DCMI_Exported_Types DCMI Exported Types |
<> | 144:ef7eb2e8f9f7 | 62 | * @{ |
<> | 144:ef7eb2e8f9f7 | 63 | */ |
<> | 144:ef7eb2e8f9f7 | 64 | /** |
<> | 144:ef7eb2e8f9f7 | 65 | * @brief DCMI Embedded Synchronisation CODE Init structure definition |
<> | 144:ef7eb2e8f9f7 | 66 | */ |
<> | 144:ef7eb2e8f9f7 | 67 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 68 | { |
<> | 144:ef7eb2e8f9f7 | 69 | uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */ |
<> | 144:ef7eb2e8f9f7 | 70 | uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */ |
<> | 144:ef7eb2e8f9f7 | 71 | uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */ |
<> | 144:ef7eb2e8f9f7 | 72 | uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */ |
<> | 144:ef7eb2e8f9f7 | 73 | }DCMI_CodesInitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | /** |
<> | 144:ef7eb2e8f9f7 | 76 | * @brief DCMI Init structure definition |
<> | 144:ef7eb2e8f9f7 | 77 | */ |
<> | 144:ef7eb2e8f9f7 | 78 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 79 | { |
<> | 144:ef7eb2e8f9f7 | 80 | uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded. |
<> | 144:ef7eb2e8f9f7 | 81 | This parameter can be a value of @ref DCMI_Synchronization_Mode */ |
<> | 144:ef7eb2e8f9f7 | 82 | |
<> | 144:ef7eb2e8f9f7 | 83 | uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising. |
<> | 144:ef7eb2e8f9f7 | 84 | This parameter can be a value of @ref DCMI_PIXCK_Polarity */ |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low. |
<> | 144:ef7eb2e8f9f7 | 87 | This parameter can be a value of @ref DCMI_VSYNC_Polarity */ |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low. |
<> | 144:ef7eb2e8f9f7 | 90 | This parameter can be a value of @ref DCMI_HSYNC_Polarity */ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4. |
<> | 144:ef7eb2e8f9f7 | 93 | This parameter can be a value of @ref DCMI_Capture_Rate */ |
<> | 144:ef7eb2e8f9f7 | 94 | |
<> | 144:ef7eb2e8f9f7 | 95 | uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit. |
<> | 144:ef7eb2e8f9f7 | 96 | This parameter can be a value of @ref DCMI_Extended_Data_Mode */ |
<> | 144:ef7eb2e8f9f7 | 97 | |
<> | 144:ef7eb2e8f9f7 | 98 | DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */ |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode. |
<> | 144:ef7eb2e8f9f7 | 101 | This parameter can be a value of @ref DCMI_MODE_JPEG */ |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | }DCMI_InitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | /** |
<> | 144:ef7eb2e8f9f7 | 106 | * @brief HAL DCMI State structures definition |
<> | 144:ef7eb2e8f9f7 | 107 | */ |
<> | 144:ef7eb2e8f9f7 | 108 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 109 | { |
<> | 144:ef7eb2e8f9f7 | 110 | HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */ |
<> | 144:ef7eb2e8f9f7 | 111 | HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */ |
<> | 144:ef7eb2e8f9f7 | 112 | HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */ |
<> | 144:ef7eb2e8f9f7 | 113 | HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */ |
<> | 144:ef7eb2e8f9f7 | 114 | HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */ |
<> | 144:ef7eb2e8f9f7 | 115 | HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */ |
<> | 144:ef7eb2e8f9f7 | 116 | }HAL_DCMI_StateTypeDef; |
<> | 144:ef7eb2e8f9f7 | 117 | |
<> | 144:ef7eb2e8f9f7 | 118 | /** |
<> | 144:ef7eb2e8f9f7 | 119 | * @brief DCMI handle Structure definition |
<> | 144:ef7eb2e8f9f7 | 120 | */ |
<> | 144:ef7eb2e8f9f7 | 121 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 122 | { |
<> | 144:ef7eb2e8f9f7 | 123 | DCMI_TypeDef *Instance; /*!< DCMI Register base address */ |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | DCMI_InitTypeDef Init; /*!< DCMI parameters */ |
<> | 144:ef7eb2e8f9f7 | 126 | |
<> | 144:ef7eb2e8f9f7 | 127 | HAL_LockTypeDef Lock; /*!< DCMI locking object */ |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */ |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | __IO uint32_t XferCount; /*!< DMA transfer counter */ |
<> | 144:ef7eb2e8f9f7 | 132 | |
<> | 144:ef7eb2e8f9f7 | 133 | __IO uint32_t XferSize; /*!< DMA transfer size */ |
<> | 144:ef7eb2e8f9f7 | 134 | |
<> | 144:ef7eb2e8f9f7 | 135 | uint32_t XferTransferNumber; /*!< DMA transfer number */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */ |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */ |
<> | 144:ef7eb2e8f9f7 | 140 | |
<> | 144:ef7eb2e8f9f7 | 141 | __IO uint32_t ErrorCode; /*!< DCMI Error code */ |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | }DCMI_HandleTypeDef; |
<> | 144:ef7eb2e8f9f7 | 144 | /** |
<> | 144:ef7eb2e8f9f7 | 145 | * @} |
<> | 144:ef7eb2e8f9f7 | 146 | */ |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 149 | /** @defgroup DCMI_Exported_Constants DCMI Exported Constants |
<> | 144:ef7eb2e8f9f7 | 150 | * @{ |
<> | 144:ef7eb2e8f9f7 | 151 | */ |
<> | 144:ef7eb2e8f9f7 | 152 | |
<> | 144:ef7eb2e8f9f7 | 153 | /** @defgroup DCMI_Error_Code DCMI Error Code |
<> | 144:ef7eb2e8f9f7 | 154 | * @{ |
<> | 144:ef7eb2e8f9f7 | 155 | */ |
AnnaBridge | 167:e84263d55307 | 156 | #define HAL_DCMI_ERROR_NONE 0x00000000U /*!< No error */ |
AnnaBridge | 167:e84263d55307 | 157 | #define HAL_DCMI_ERROR_OVR 0x00000001U /*!< Overrun error */ |
AnnaBridge | 167:e84263d55307 | 158 | #define HAL_DCMI_ERROR_SYNC 0x00000002U /*!< Synchronization error */ |
AnnaBridge | 167:e84263d55307 | 159 | #define HAL_DCMI_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */ |
AnnaBridge | 167:e84263d55307 | 160 | #define HAL_DCMI_ERROR_DMA 0x00000040U /*!< DMA error */ |
<> | 144:ef7eb2e8f9f7 | 161 | /** |
<> | 144:ef7eb2e8f9f7 | 162 | * @} |
<> | 144:ef7eb2e8f9f7 | 163 | */ |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | /** @defgroup DCMI_Capture_Mode DCMI Capture Mode |
<> | 144:ef7eb2e8f9f7 | 166 | * @{ |
<> | 144:ef7eb2e8f9f7 | 167 | */ |
AnnaBridge | 167:e84263d55307 | 168 | #define DCMI_MODE_CONTINUOUS 0x00000000U /*!< The received data are transferred continuously |
<> | 144:ef7eb2e8f9f7 | 169 | into the destination memory through the DMA */ |
<> | 144:ef7eb2e8f9f7 | 170 | #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of |
<> | 144:ef7eb2e8f9f7 | 171 | frame and then transfers a single frame through the DMA */ |
<> | 144:ef7eb2e8f9f7 | 172 | /** |
<> | 144:ef7eb2e8f9f7 | 173 | * @} |
<> | 144:ef7eb2e8f9f7 | 174 | */ |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode |
<> | 144:ef7eb2e8f9f7 | 177 | * @{ |
<> | 144:ef7eb2e8f9f7 | 178 | */ |
AnnaBridge | 167:e84263d55307 | 179 | #define DCMI_SYNCHRO_HARDWARE 0x00000000U /*!< Hardware synchronization data capture (frame/line start/stop) |
<> | 144:ef7eb2e8f9f7 | 180 | is synchronized with the HSYNC/VSYNC signals */ |
<> | 144:ef7eb2e8f9f7 | 181 | #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with |
<> | 144:ef7eb2e8f9f7 | 182 | synchronization codes embedded in the data flow */ |
<> | 144:ef7eb2e8f9f7 | 183 | |
<> | 144:ef7eb2e8f9f7 | 184 | /** |
<> | 144:ef7eb2e8f9f7 | 185 | * @} |
<> | 144:ef7eb2e8f9f7 | 186 | */ |
<> | 144:ef7eb2e8f9f7 | 187 | |
<> | 144:ef7eb2e8f9f7 | 188 | /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity |
<> | 144:ef7eb2e8f9f7 | 189 | * @{ |
<> | 144:ef7eb2e8f9f7 | 190 | */ |
AnnaBridge | 167:e84263d55307 | 191 | #define DCMI_PCKPOLARITY_FALLING 0x00000000U /*!< Pixel clock active on Falling edge */ |
<> | 144:ef7eb2e8f9f7 | 192 | #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */ |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | /** |
<> | 144:ef7eb2e8f9f7 | 195 | * @} |
<> | 144:ef7eb2e8f9f7 | 196 | */ |
<> | 144:ef7eb2e8f9f7 | 197 | |
<> | 144:ef7eb2e8f9f7 | 198 | /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity |
<> | 144:ef7eb2e8f9f7 | 199 | * @{ |
<> | 144:ef7eb2e8f9f7 | 200 | */ |
AnnaBridge | 167:e84263d55307 | 201 | #define DCMI_VSPOLARITY_LOW 0x00000000U /*!< Vertical synchronization active Low */ |
<> | 144:ef7eb2e8f9f7 | 202 | #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */ |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /** |
<> | 144:ef7eb2e8f9f7 | 205 | * @} |
<> | 144:ef7eb2e8f9f7 | 206 | */ |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity |
<> | 144:ef7eb2e8f9f7 | 209 | * @{ |
<> | 144:ef7eb2e8f9f7 | 210 | */ |
AnnaBridge | 167:e84263d55307 | 211 | #define DCMI_HSPOLARITY_LOW 0x00000000U /*!< Horizontal synchronization active Low */ |
<> | 144:ef7eb2e8f9f7 | 212 | #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */ |
<> | 144:ef7eb2e8f9f7 | 213 | |
<> | 144:ef7eb2e8f9f7 | 214 | /** |
<> | 144:ef7eb2e8f9f7 | 215 | * @} |
<> | 144:ef7eb2e8f9f7 | 216 | */ |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG |
<> | 144:ef7eb2e8f9f7 | 219 | * @{ |
<> | 144:ef7eb2e8f9f7 | 220 | */ |
AnnaBridge | 167:e84263d55307 | 221 | #define DCMI_JPEG_DISABLE 0x00000000U /*!< Mode JPEG Disabled */ |
<> | 144:ef7eb2e8f9f7 | 222 | #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */ |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | /** |
<> | 144:ef7eb2e8f9f7 | 225 | * @} |
<> | 144:ef7eb2e8f9f7 | 226 | */ |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | /** @defgroup DCMI_Capture_Rate DCMI Capture Rate |
<> | 144:ef7eb2e8f9f7 | 229 | * @{ |
<> | 144:ef7eb2e8f9f7 | 230 | */ |
AnnaBridge | 167:e84263d55307 | 231 | #define DCMI_CR_ALL_FRAME 0x00000000U /*!< All frames are captured */ |
<> | 144:ef7eb2e8f9f7 | 232 | #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */ |
<> | 144:ef7eb2e8f9f7 | 233 | #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */ |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | /** |
<> | 144:ef7eb2e8f9f7 | 236 | * @} |
<> | 144:ef7eb2e8f9f7 | 237 | */ |
<> | 144:ef7eb2e8f9f7 | 238 | |
<> | 144:ef7eb2e8f9f7 | 239 | /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode |
<> | 144:ef7eb2e8f9f7 | 240 | * @{ |
<> | 144:ef7eb2e8f9f7 | 241 | */ |
AnnaBridge | 167:e84263d55307 | 242 | #define DCMI_EXTEND_DATA_8B 0x00000000U /*!< Interface captures 8-bit data on every pixel clock */ |
<> | 144:ef7eb2e8f9f7 | 243 | #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */ |
<> | 144:ef7eb2e8f9f7 | 244 | #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */ |
<> | 144:ef7eb2e8f9f7 | 245 | #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */ |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /** |
<> | 144:ef7eb2e8f9f7 | 248 | * @} |
<> | 144:ef7eb2e8f9f7 | 249 | */ |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate |
<> | 144:ef7eb2e8f9f7 | 252 | * @{ |
<> | 144:ef7eb2e8f9f7 | 253 | */ |
AnnaBridge | 167:e84263d55307 | 254 | #define DCMI_WINDOW_COORDINATE 0x3FFFU /*!< Window coordinate */ |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | /** |
<> | 144:ef7eb2e8f9f7 | 257 | * @} |
<> | 144:ef7eb2e8f9f7 | 258 | */ |
<> | 144:ef7eb2e8f9f7 | 259 | |
<> | 144:ef7eb2e8f9f7 | 260 | /** @defgroup DCMI_Window_Height DCMI Window Height |
<> | 144:ef7eb2e8f9f7 | 261 | * @{ |
<> | 144:ef7eb2e8f9f7 | 262 | */ |
AnnaBridge | 167:e84263d55307 | 263 | #define DCMI_WINDOW_HEIGHT 0x1FFFU /*!< Window Height */ |
<> | 144:ef7eb2e8f9f7 | 264 | |
<> | 144:ef7eb2e8f9f7 | 265 | /** |
<> | 144:ef7eb2e8f9f7 | 266 | * @} |
<> | 144:ef7eb2e8f9f7 | 267 | */ |
<> | 144:ef7eb2e8f9f7 | 268 | |
<> | 144:ef7eb2e8f9f7 | 269 | /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line |
<> | 144:ef7eb2e8f9f7 | 270 | * @{ |
<> | 144:ef7eb2e8f9f7 | 271 | */ |
<> | 144:ef7eb2e8f9f7 | 272 | #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */ |
<> | 144:ef7eb2e8f9f7 | 273 | #define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */ |
<> | 144:ef7eb2e8f9f7 | 274 | |
<> | 144:ef7eb2e8f9f7 | 275 | /** |
<> | 144:ef7eb2e8f9f7 | 276 | * @} |
<> | 144:ef7eb2e8f9f7 | 277 | */ |
<> | 144:ef7eb2e8f9f7 | 278 | |
<> | 144:ef7eb2e8f9f7 | 279 | /** @defgroup DCMI_interrupt_sources DCMI interrupt sources |
<> | 144:ef7eb2e8f9f7 | 280 | * @{ |
<> | 144:ef7eb2e8f9f7 | 281 | */ |
<> | 144:ef7eb2e8f9f7 | 282 | #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 283 | #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */ |
<> | 144:ef7eb2e8f9f7 | 284 | #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */ |
<> | 144:ef7eb2e8f9f7 | 285 | #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */ |
<> | 144:ef7eb2e8f9f7 | 286 | #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */ |
<> | 144:ef7eb2e8f9f7 | 287 | /** |
<> | 144:ef7eb2e8f9f7 | 288 | * @} |
<> | 144:ef7eb2e8f9f7 | 289 | */ |
<> | 144:ef7eb2e8f9f7 | 290 | |
<> | 144:ef7eb2e8f9f7 | 291 | /** @defgroup DCMI_Flags DCMI Flags |
<> | 144:ef7eb2e8f9f7 | 292 | * @{ |
<> | 144:ef7eb2e8f9f7 | 293 | */ |
<> | 144:ef7eb2e8f9f7 | 294 | |
<> | 144:ef7eb2e8f9f7 | 295 | /** |
<> | 144:ef7eb2e8f9f7 | 296 | * @brief DCMI SR register |
<> | 144:ef7eb2e8f9f7 | 297 | */ |
<> | 144:ef7eb2e8f9f7 | 298 | #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */ |
<> | 144:ef7eb2e8f9f7 | 299 | #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */ |
<> | 144:ef7eb2e8f9f7 | 300 | #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */ |
<> | 144:ef7eb2e8f9f7 | 301 | /** |
<> | 144:ef7eb2e8f9f7 | 302 | * @brief DCMI RIS register |
<> | 144:ef7eb2e8f9f7 | 303 | */ |
<> | 144:ef7eb2e8f9f7 | 304 | #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RIS_FRAME_RIS) /*!< Frame capture complete interrupt flag */ |
<> | 144:ef7eb2e8f9f7 | 305 | #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RIS_OVR_RIS) /*!< Overrun interrupt flag */ |
<> | 144:ef7eb2e8f9f7 | 306 | #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RIS_ERR_RIS) /*!< Synchronization error interrupt flag */ |
<> | 144:ef7eb2e8f9f7 | 307 | #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RIS_VSYNC_RIS) /*!< VSYNC interrupt flag */ |
<> | 144:ef7eb2e8f9f7 | 308 | #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RIS_LINE_RIS) /*!< Line interrupt flag */ |
<> | 144:ef7eb2e8f9f7 | 309 | /** |
<> | 144:ef7eb2e8f9f7 | 310 | * @brief DCMI MIS register |
<> | 144:ef7eb2e8f9f7 | 311 | */ |
<> | 144:ef7eb2e8f9f7 | 312 | #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */ |
<> | 144:ef7eb2e8f9f7 | 313 | #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */ |
<> | 144:ef7eb2e8f9f7 | 314 | #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */ |
<> | 144:ef7eb2e8f9f7 | 315 | #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */ |
<> | 144:ef7eb2e8f9f7 | 316 | #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */ |
<> | 144:ef7eb2e8f9f7 | 317 | /** |
<> | 144:ef7eb2e8f9f7 | 318 | * @} |
<> | 144:ef7eb2e8f9f7 | 319 | */ |
<> | 144:ef7eb2e8f9f7 | 320 | |
<> | 144:ef7eb2e8f9f7 | 321 | /** |
<> | 144:ef7eb2e8f9f7 | 322 | * @} |
<> | 144:ef7eb2e8f9f7 | 323 | */ |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | /* Exported macro ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 326 | /** @defgroup DCMI_Exported_Macros DCMI Exported Macros |
<> | 144:ef7eb2e8f9f7 | 327 | * @{ |
<> | 144:ef7eb2e8f9f7 | 328 | */ |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | /** @brief Reset DCMI handle state |
<> | 144:ef7eb2e8f9f7 | 331 | * @param __HANDLE__: specifies the DCMI handle. |
<> | 144:ef7eb2e8f9f7 | 332 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 333 | */ |
<> | 144:ef7eb2e8f9f7 | 334 | #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 335 | |
<> | 144:ef7eb2e8f9f7 | 336 | /** |
<> | 144:ef7eb2e8f9f7 | 337 | * @brief Enable the DCMI. |
<> | 144:ef7eb2e8f9f7 | 338 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 339 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 340 | */ |
<> | 144:ef7eb2e8f9f7 | 341 | #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE) |
<> | 144:ef7eb2e8f9f7 | 342 | |
<> | 144:ef7eb2e8f9f7 | 343 | /** |
<> | 144:ef7eb2e8f9f7 | 344 | * @brief Disable the DCMI. |
<> | 144:ef7eb2e8f9f7 | 345 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 346 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 347 | */ |
<> | 144:ef7eb2e8f9f7 | 348 | #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE)) |
<> | 144:ef7eb2e8f9f7 | 349 | |
<> | 144:ef7eb2e8f9f7 | 350 | /* Interrupt & Flag management */ |
<> | 144:ef7eb2e8f9f7 | 351 | /** |
<> | 144:ef7eb2e8f9f7 | 352 | * @brief Get the DCMI pending flag. |
<> | 144:ef7eb2e8f9f7 | 353 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 354 | * @param __FLAG__: Get the specified flag. |
<> | 144:ef7eb2e8f9f7 | 355 | * This parameter can be one of the following values (no combination allowed) |
<> | 144:ef7eb2e8f9f7 | 356 | * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines) |
<> | 144:ef7eb2e8f9f7 | 357 | * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames) |
<> | 144:ef7eb2e8f9f7 | 358 | * @arg DCMI_FLAG_FNE: FIFO empty flag |
<> | 144:ef7eb2e8f9f7 | 359 | * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask |
<> | 144:ef7eb2e8f9f7 | 360 | * @arg DCMI_FLAG_OVRRI: Overrun flag mask |
<> | 144:ef7eb2e8f9f7 | 361 | * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask |
<> | 144:ef7eb2e8f9f7 | 362 | * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask |
<> | 144:ef7eb2e8f9f7 | 363 | * @arg DCMI_FLAG_LINERI: Line flag mask |
<> | 144:ef7eb2e8f9f7 | 364 | * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status |
<> | 144:ef7eb2e8f9f7 | 365 | * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status |
<> | 144:ef7eb2e8f9f7 | 366 | * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status |
<> | 144:ef7eb2e8f9f7 | 367 | * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status |
<> | 144:ef7eb2e8f9f7 | 368 | * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status |
<> | 144:ef7eb2e8f9f7 | 369 | * @retval The state of FLAG. |
<> | 144:ef7eb2e8f9f7 | 370 | */ |
<> | 144:ef7eb2e8f9f7 | 371 | #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\ |
<> | 144:ef7eb2e8f9f7 | 372 | ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RIS & (__FLAG__)) :\ |
<> | 144:ef7eb2e8f9f7 | 373 | (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MIS & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__))) |
<> | 144:ef7eb2e8f9f7 | 374 | |
<> | 144:ef7eb2e8f9f7 | 375 | /** |
<> | 144:ef7eb2e8f9f7 | 376 | * @brief Clear the DCMI pending flags. |
<> | 144:ef7eb2e8f9f7 | 377 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 378 | * @param __FLAG__: specifies the flag to clear. |
<> | 144:ef7eb2e8f9f7 | 379 | * This parameter can be any combination of the following values: |
<> | 144:ef7eb2e8f9f7 | 380 | * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask |
<> | 144:ef7eb2e8f9f7 | 381 | * @arg DCMI_FLAG_OVRRI: Overrun flag mask |
<> | 144:ef7eb2e8f9f7 | 382 | * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask |
<> | 144:ef7eb2e8f9f7 | 383 | * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask |
<> | 144:ef7eb2e8f9f7 | 384 | * @arg DCMI_FLAG_LINERI: Line flag mask |
<> | 144:ef7eb2e8f9f7 | 385 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 386 | */ |
<> | 144:ef7eb2e8f9f7 | 387 | #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
<> | 144:ef7eb2e8f9f7 | 388 | |
<> | 144:ef7eb2e8f9f7 | 389 | /** |
<> | 144:ef7eb2e8f9f7 | 390 | * @brief Enable the specified DCMI interrupts. |
<> | 144:ef7eb2e8f9f7 | 391 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 392 | * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled. |
<> | 144:ef7eb2e8f9f7 | 393 | * This parameter can be any combination of the following values: |
<> | 144:ef7eb2e8f9f7 | 394 | * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask |
<> | 144:ef7eb2e8f9f7 | 395 | * @arg DCMI_IT_OVR: Overrun interrupt mask |
<> | 144:ef7eb2e8f9f7 | 396 | * @arg DCMI_IT_ERR: Synchronization error interrupt mask |
<> | 144:ef7eb2e8f9f7 | 397 | * @arg DCMI_IT_VSYNC: VSYNC interrupt mask |
<> | 144:ef7eb2e8f9f7 | 398 | * @arg DCMI_IT_LINE: Line interrupt mask |
<> | 144:ef7eb2e8f9f7 | 399 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 400 | */ |
<> | 144:ef7eb2e8f9f7 | 401 | #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 402 | |
<> | 144:ef7eb2e8f9f7 | 403 | /** |
<> | 144:ef7eb2e8f9f7 | 404 | * @brief Disable the specified DCMI interrupts. |
<> | 144:ef7eb2e8f9f7 | 405 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 406 | * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled. |
<> | 144:ef7eb2e8f9f7 | 407 | * This parameter can be any combination of the following values: |
<> | 144:ef7eb2e8f9f7 | 408 | * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask |
<> | 144:ef7eb2e8f9f7 | 409 | * @arg DCMI_IT_OVR: Overrun interrupt mask |
<> | 144:ef7eb2e8f9f7 | 410 | * @arg DCMI_IT_ERR: Synchronization error interrupt mask |
<> | 144:ef7eb2e8f9f7 | 411 | * @arg DCMI_IT_VSYNC: VSYNC interrupt mask |
<> | 144:ef7eb2e8f9f7 | 412 | * @arg DCMI_IT_LINE: Line interrupt mask |
<> | 144:ef7eb2e8f9f7 | 413 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 414 | */ |
<> | 144:ef7eb2e8f9f7 | 415 | #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 416 | |
<> | 144:ef7eb2e8f9f7 | 417 | /** |
<> | 144:ef7eb2e8f9f7 | 418 | * @brief Check whether the specified DCMI interrupt has occurred or not. |
<> | 144:ef7eb2e8f9f7 | 419 | * @param __HANDLE__: DCMI handle |
<> | 144:ef7eb2e8f9f7 | 420 | * @param __INTERRUPT__: specifies the DCMI interrupt source to check. |
<> | 144:ef7eb2e8f9f7 | 421 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 422 | * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask |
<> | 144:ef7eb2e8f9f7 | 423 | * @arg DCMI_IT_OVR: Overrun interrupt mask |
<> | 144:ef7eb2e8f9f7 | 424 | * @arg DCMI_IT_ERR: Synchronization error interrupt mask |
<> | 144:ef7eb2e8f9f7 | 425 | * @arg DCMI_IT_VSYNC: VSYNC interrupt mask |
<> | 144:ef7eb2e8f9f7 | 426 | * @arg DCMI_IT_LINE: Line interrupt mask |
<> | 144:ef7eb2e8f9f7 | 427 | * @retval The state of INTERRUPT. |
<> | 144:ef7eb2e8f9f7 | 428 | */ |
<> | 144:ef7eb2e8f9f7 | 429 | #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 430 | |
<> | 144:ef7eb2e8f9f7 | 431 | /** |
<> | 144:ef7eb2e8f9f7 | 432 | * @} |
<> | 144:ef7eb2e8f9f7 | 433 | */ |
<> | 144:ef7eb2e8f9f7 | 434 | |
<> | 144:ef7eb2e8f9f7 | 435 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 436 | /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions |
<> | 144:ef7eb2e8f9f7 | 437 | * @{ |
<> | 144:ef7eb2e8f9f7 | 438 | */ |
<> | 144:ef7eb2e8f9f7 | 439 | |
<> | 144:ef7eb2e8f9f7 | 440 | /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions |
<> | 144:ef7eb2e8f9f7 | 441 | * @{ |
<> | 144:ef7eb2e8f9f7 | 442 | */ |
<> | 144:ef7eb2e8f9f7 | 443 | /* Initialization and de-initialization functions *****************************/ |
<> | 144:ef7eb2e8f9f7 | 444 | HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 445 | HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 446 | void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi); |
<> | 144:ef7eb2e8f9f7 | 447 | void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi); |
<> | 144:ef7eb2e8f9f7 | 448 | /** |
<> | 144:ef7eb2e8f9f7 | 449 | * @} |
<> | 144:ef7eb2e8f9f7 | 450 | */ |
<> | 144:ef7eb2e8f9f7 | 451 | |
<> | 144:ef7eb2e8f9f7 | 452 | /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions |
<> | 144:ef7eb2e8f9f7 | 453 | * @{ |
<> | 144:ef7eb2e8f9f7 | 454 | */ |
<> | 144:ef7eb2e8f9f7 | 455 | /* IO operation functions *****************************************************/ |
<> | 144:ef7eb2e8f9f7 | 456 | HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length); |
<> | 144:ef7eb2e8f9f7 | 457 | HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi); |
<> | 144:ef7eb2e8f9f7 | 458 | HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi); |
<> | 144:ef7eb2e8f9f7 | 459 | HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi); |
<> | 144:ef7eb2e8f9f7 | 460 | void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 461 | void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 462 | void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 463 | void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 464 | void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 465 | void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 466 | void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 467 | /** |
<> | 144:ef7eb2e8f9f7 | 468 | * @} |
<> | 144:ef7eb2e8f9f7 | 469 | */ |
<> | 144:ef7eb2e8f9f7 | 470 | |
<> | 144:ef7eb2e8f9f7 | 471 | /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 472 | * @{ |
<> | 144:ef7eb2e8f9f7 | 473 | */ |
<> | 144:ef7eb2e8f9f7 | 474 | /* Peripheral Control functions ***********************************************/ |
<> | 144:ef7eb2e8f9f7 | 475 | HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize); |
<> | 144:ef7eb2e8f9f7 | 476 | HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 477 | HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 478 | /** |
<> | 144:ef7eb2e8f9f7 | 479 | * @} |
<> | 144:ef7eb2e8f9f7 | 480 | */ |
<> | 144:ef7eb2e8f9f7 | 481 | |
<> | 144:ef7eb2e8f9f7 | 482 | /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 483 | * @{ |
<> | 144:ef7eb2e8f9f7 | 484 | */ |
<> | 144:ef7eb2e8f9f7 | 485 | /* Peripheral State functions *************************************************/ |
<> | 144:ef7eb2e8f9f7 | 486 | HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 487 | uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi); |
<> | 144:ef7eb2e8f9f7 | 488 | /** |
<> | 144:ef7eb2e8f9f7 | 489 | * @} |
<> | 144:ef7eb2e8f9f7 | 490 | */ |
<> | 144:ef7eb2e8f9f7 | 491 | |
<> | 144:ef7eb2e8f9f7 | 492 | /** |
<> | 144:ef7eb2e8f9f7 | 493 | * @} |
<> | 144:ef7eb2e8f9f7 | 494 | */ |
<> | 144:ef7eb2e8f9f7 | 495 | |
<> | 144:ef7eb2e8f9f7 | 496 | /* Private types -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 497 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 498 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 499 | /** @defgroup DCMI_Private_Constants DCMI Private Constants |
<> | 144:ef7eb2e8f9f7 | 500 | * @{ |
<> | 144:ef7eb2e8f9f7 | 501 | */ |
AnnaBridge | 167:e84263d55307 | 502 | #define DCMI_MIS_INDEX 0x1000U /*!< DCMI MIS register index */ |
AnnaBridge | 167:e84263d55307 | 503 | #define DCMI_SR_INDEX 0x2000U /*!< DCMI SR register index */ |
<> | 144:ef7eb2e8f9f7 | 504 | /** |
<> | 144:ef7eb2e8f9f7 | 505 | * @} |
<> | 144:ef7eb2e8f9f7 | 506 | */ |
<> | 144:ef7eb2e8f9f7 | 507 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 508 | /** @defgroup DCMI_Private_Macros DCMI Private Macros |
<> | 144:ef7eb2e8f9f7 | 509 | * @{ |
<> | 144:ef7eb2e8f9f7 | 510 | */ |
<> | 144:ef7eb2e8f9f7 | 511 | #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \ |
<> | 144:ef7eb2e8f9f7 | 512 | ((MODE) == DCMI_MODE_SNAPSHOT)) |
<> | 144:ef7eb2e8f9f7 | 513 | |
<> | 144:ef7eb2e8f9f7 | 514 | #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \ |
<> | 144:ef7eb2e8f9f7 | 515 | ((MODE) == DCMI_SYNCHRO_EMBEDDED)) |
<> | 144:ef7eb2e8f9f7 | 516 | |
<> | 144:ef7eb2e8f9f7 | 517 | #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \ |
<> | 144:ef7eb2e8f9f7 | 518 | ((POLARITY) == DCMI_PCKPOLARITY_RISING)) |
<> | 144:ef7eb2e8f9f7 | 519 | |
<> | 144:ef7eb2e8f9f7 | 520 | #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \ |
<> | 144:ef7eb2e8f9f7 | 521 | ((POLARITY) == DCMI_VSPOLARITY_HIGH)) |
<> | 144:ef7eb2e8f9f7 | 522 | |
<> | 144:ef7eb2e8f9f7 | 523 | #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \ |
<> | 144:ef7eb2e8f9f7 | 524 | ((POLARITY) == DCMI_HSPOLARITY_HIGH)) |
<> | 144:ef7eb2e8f9f7 | 525 | |
<> | 144:ef7eb2e8f9f7 | 526 | #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \ |
<> | 144:ef7eb2e8f9f7 | 527 | ((JPEG_MODE) == DCMI_JPEG_ENABLE)) |
<> | 144:ef7eb2e8f9f7 | 528 | |
<> | 144:ef7eb2e8f9f7 | 529 | #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \ |
<> | 144:ef7eb2e8f9f7 | 530 | ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \ |
<> | 144:ef7eb2e8f9f7 | 531 | ((RATE) == DCMI_CR_ALTERNATE_4_FRAME)) |
<> | 144:ef7eb2e8f9f7 | 532 | |
<> | 144:ef7eb2e8f9f7 | 533 | #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \ |
<> | 144:ef7eb2e8f9f7 | 534 | ((DATA) == DCMI_EXTEND_DATA_10B) || \ |
<> | 144:ef7eb2e8f9f7 | 535 | ((DATA) == DCMI_EXTEND_DATA_12B) || \ |
<> | 144:ef7eb2e8f9f7 | 536 | ((DATA) == DCMI_EXTEND_DATA_14B)) |
<> | 144:ef7eb2e8f9f7 | 537 | |
<> | 144:ef7eb2e8f9f7 | 538 | #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE) |
<> | 144:ef7eb2e8f9f7 | 539 | |
<> | 144:ef7eb2e8f9f7 | 540 | #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT) |
<> | 144:ef7eb2e8f9f7 | 541 | |
<> | 144:ef7eb2e8f9f7 | 542 | /** |
<> | 144:ef7eb2e8f9f7 | 543 | * @} |
<> | 144:ef7eb2e8f9f7 | 544 | */ |
<> | 144:ef7eb2e8f9f7 | 545 | |
<> | 144:ef7eb2e8f9f7 | 546 | /* Private functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 547 | /** @addtogroup DCMI_Private_Functions DCMI Private Functions |
<> | 144:ef7eb2e8f9f7 | 548 | * @{ |
<> | 144:ef7eb2e8f9f7 | 549 | */ |
<> | 144:ef7eb2e8f9f7 | 550 | |
<> | 144:ef7eb2e8f9f7 | 551 | /** |
<> | 144:ef7eb2e8f9f7 | 552 | * @} |
<> | 144:ef7eb2e8f9f7 | 553 | */ |
<> | 144:ef7eb2e8f9f7 | 554 | |
<> | 144:ef7eb2e8f9f7 | 555 | #endif /* STM32F207xx || STM32F217xx */ |
<> | 144:ef7eb2e8f9f7 | 556 | |
<> | 144:ef7eb2e8f9f7 | 557 | |
<> | 144:ef7eb2e8f9f7 | 558 | /** |
<> | 144:ef7eb2e8f9f7 | 559 | * @} |
<> | 144:ef7eb2e8f9f7 | 560 | */ |
<> | 144:ef7eb2e8f9f7 | 561 | |
<> | 144:ef7eb2e8f9f7 | 562 | /** |
<> | 144:ef7eb2e8f9f7 | 563 | * @} |
<> | 144:ef7eb2e8f9f7 | 564 | */ |
<> | 144:ef7eb2e8f9f7 | 565 | |
<> | 144:ef7eb2e8f9f7 | 566 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 567 | } |
<> | 144:ef7eb2e8f9f7 | 568 | #endif |
<> | 144:ef7eb2e8f9f7 | 569 | |
<> | 144:ef7eb2e8f9f7 | 570 | #endif /* __STM32F2xx_HAL_DCMI_H */ |
<> | 144:ef7eb2e8f9f7 | 571 | |
<> | 144:ef7eb2e8f9f7 | 572 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |