Diff: targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c

Revision:

174:b96e65c34a4d

Parent:

173:e131a1973e81

Child:

177:d650f5d4c87a

--- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c	Fri Sep 15 14:59:18 2017 +0100
+++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c	Mon Oct 02 15:33:19 2017 +0100
@@ -17,6 +17,8 @@
 
 #if defined(__CC_ARM)
 #include "cmsis_armcc.h"
+#elif (defined(__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
+#include "cmsis_armclang.h"
 #elif defined(__GNUC__)
 #include "cmsis_gcc.h"
 #else
@@ -27,7 +29,6 @@
 #if defined(__CC_ARM) || \
     (defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
 
-extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
 extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
 extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
 extern uint8_t Image$$TCM_OVERLAY$$ZI$$Base[];
@@ -40,13 +41,11 @@
 #define __bss_dtcm_end__   Image$$TCM_OVERLAY$$ZI$$Limit
 #define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
 #define __bss_dram_end__   Image$$RW_DRAM2$$ZI$$Limit
-#define __stackp           Image$$ARM_LIB_STACK$$ZI$$Limit
 
 #elif defined (__ICCARM__)
 
 #pragma section=".ram.bss"
 
-extern uint32_t CSTACK$$Limit;
 uint8_t *__bss_start__;
 uint8_t *__bss_end__;
 
@@ -55,12 +54,9 @@
     __bss_start__ = (uint8_t *)__section_begin(".ram.bss");
     __bss_end__   = (uint8_t *)__section_end(".ram.bss");
 }
-#define __stackp           CSTACK$$Limit
 
 #else
 
-extern uint32_t __StackTop;
-extern uint32_t __StackLimit;
 extern uint8_t __bss_sram_start__[];
 extern uint8_t __bss_sram_end__[];
 extern uint8_t __bss_dtcm_start__[];
@@ -68,7 +64,6 @@
 extern uint8_t __bss_dram_start__[];
 extern uint8_t __bss_dram_end__[];
 
-#define __stackp           __StackTop
 #endif
 
 extern VECTOR_Func NewVectorTable[];
@@ -173,16 +168,19 @@
 
 extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
 // Image2 Entry Function
-void PLAT_Start(void)
+void PLAT_Init(void)
 {
     uint32_t val;
 
-#if defined (__ICCARM__)
-    __iar_data_init_app();
+    // Overwrite vector table
+    NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
+#if defined ( __ICCARM__ )
+    NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
 #endif
 
     // Clear RAM BSS
 #if defined (__ICCARM__)
+    __iar_data_init_app();
     __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
 #else
     __rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
@@ -190,14 +188,6 @@
     __rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
 #endif
 
-    // Set MSP
-    __set_MSP((uint32_t)&__stackp - 0x100);
-    // Overwrite vector table
-    NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
-#if defined ( __ICCARM__ )
-    NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
-#endif
-
     extern HAL_TIMER_OP_EXT HalTimerOpExt;
     __rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt));
     __rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp));
@@ -270,7 +260,11 @@
 #else
     __asm ("ldr  r0, =SystemInit   \n"
            "blx  r0                \n"
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+           "ldr  r0, =__main \n"
+#else
            "ldr  r0, =_start       \n"
+#endif
            "bx   r0                \n"
     );
 #endif