mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_gpio.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
179:b0033dcd6934 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_gpio.c
<> 144:ef7eb2e8f9f7 3 * @brief General Purpose IO (GPIO) peripheral API
<> 144:ef7eb2e8f9f7 4 * devices.
AnnaBridge 179:b0033dcd6934 5 * @version 5.3.3
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
AnnaBridge 179:b0033dcd6934 7 * # License
<> 150:02e0a0aed4ec 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 9 *******************************************************************************
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 12 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 13 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 16 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 17 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 18 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 19 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 22 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 23 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 24 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 25 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 26 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 29 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 30 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 ******************************************************************************/
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "em_gpio.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /***************************************************************************//**
<> 150:02e0a0aed4ec 39 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 40 * @{
<> 144:ef7eb2e8f9f7 41 ******************************************************************************/
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 44 * @addtogroup GPIO
<> 144:ef7eb2e8f9f7 45 * @brief General Purpose Input/Output (GPIO) API
<> 150:02e0a0aed4ec 46 * @details
<> 150:02e0a0aed4ec 47 * This module contains functions to control the GPIO peripheral of Silicon
<> 150:02e0a0aed4ec 48 * Labs 32-bit MCUs and SoCs. The GPIO peripheral is used for pin configuration
<> 150:02e0a0aed4ec 49 * and direct pin manipulation and sensing as well as routing for peripheral
<> 150:02e0a0aed4ec 50 * pin connections.
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 ******************************************************************************/
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /*******************************************************************************
<> 144:ef7eb2e8f9f7 55 ******************************* DEFINES ***********************************
<> 144:ef7eb2e8f9f7 56 ******************************************************************************/
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /** Validation of pin typically usable in assert statements. */
<> 144:ef7eb2e8f9f7 61 #define GPIO_DRIVEMODE_VALID(mode) ((mode) <= 3)
AnnaBridge 179:b0033dcd6934 62 #define GPIO_STRENGHT_VALID(strenght) (!((strenght) \
AnnaBridge 179:b0033dcd6934 63 & ~(_GPIO_P_CTRL_DRIVESTRENGTH_MASK \
AnnaBridge 179:b0033dcd6934 64 | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK)))
<> 144:ef7eb2e8f9f7 65 /** @endcond */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /*******************************************************************************
<> 144:ef7eb2e8f9f7 68 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 69 ******************************************************************************/
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 72 * @brief
<> 144:ef7eb2e8f9f7 73 * Sets the pin location of the debug pins (Serial Wire interface).
<> 144:ef7eb2e8f9f7 74 *
<> 144:ef7eb2e8f9f7 75 * @note
<> 144:ef7eb2e8f9f7 76 * Changing the pins used for debugging uncontrolled, may result in a lockout.
<> 144:ef7eb2e8f9f7 77 *
<> 144:ef7eb2e8f9f7 78 * @param[in] location
<> 144:ef7eb2e8f9f7 79 * The debug pin location to use (0-3).
<> 144:ef7eb2e8f9f7 80 ******************************************************************************/
<> 144:ef7eb2e8f9f7 81 void GPIO_DbgLocationSet(unsigned int location)
<> 144:ef7eb2e8f9f7 82 {
AnnaBridge 179:b0033dcd6934 83 #if defined (_GPIO_ROUTE_SWLOCATION_MASK)
<> 144:ef7eb2e8f9f7 84 EFM_ASSERT(location < AFCHANLOC_MAX);
<> 144:ef7eb2e8f9f7 85
AnnaBridge 179:b0033dcd6934 86 GPIO->ROUTE = (GPIO->ROUTE & ~_GPIO_ROUTE_SWLOCATION_MASK)
AnnaBridge 179:b0033dcd6934 87 | (location << _GPIO_ROUTE_SWLOCATION_SHIFT);
<> 144:ef7eb2e8f9f7 88 #else
<> 144:ef7eb2e8f9f7 89 (void)location;
<> 144:ef7eb2e8f9f7 90 #endif
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
<> 144:ef7eb2e8f9f7 94 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 95 * @brief
<> 144:ef7eb2e8f9f7 96 * Sets the drive mode for a GPIO port.
<> 144:ef7eb2e8f9f7 97 *
<> 144:ef7eb2e8f9f7 98 * @param[in] port
<> 144:ef7eb2e8f9f7 99 * The GPIO port to access.
<> 144:ef7eb2e8f9f7 100 *
<> 144:ef7eb2e8f9f7 101 * @param[in] mode
<> 144:ef7eb2e8f9f7 102 * Drive mode to use for port.
<> 144:ef7eb2e8f9f7 103 ******************************************************************************/
<> 144:ef7eb2e8f9f7 104 void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode)
<> 144:ef7eb2e8f9f7 105 {
<> 144:ef7eb2e8f9f7 106 EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_DRIVEMODE_VALID(mode));
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 GPIO->P[port].CTRL = (GPIO->P[port].CTRL & ~(_GPIO_P_CTRL_DRIVEMODE_MASK))
<> 144:ef7eb2e8f9f7 109 | (mode << _GPIO_P_CTRL_DRIVEMODE_SHIFT);
<> 144:ef7eb2e8f9f7 110 }
<> 144:ef7eb2e8f9f7 111 #endif
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 #if defined (_GPIO_P_CTRL_DRIVESTRENGTH_MASK)
<> 144:ef7eb2e8f9f7 114 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 115 * @brief
<> 144:ef7eb2e8f9f7 116 * Sets the drive strength for a GPIO port.
<> 144:ef7eb2e8f9f7 117 *
<> 144:ef7eb2e8f9f7 118 * @param[in] port
<> 144:ef7eb2e8f9f7 119 * The GPIO port to access.
<> 144:ef7eb2e8f9f7 120 *
<> 144:ef7eb2e8f9f7 121 * @param[in] strength
<> 144:ef7eb2e8f9f7 122 * Drive strength to use for port.
<> 144:ef7eb2e8f9f7 123 ******************************************************************************/
<> 144:ef7eb2e8f9f7 124 void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port,
<> 144:ef7eb2e8f9f7 125 GPIO_DriveStrength_TypeDef strength)
<> 144:ef7eb2e8f9f7 126 {
<> 144:ef7eb2e8f9f7 127 EFM_ASSERT(GPIO_PORT_VALID(port) && GPIO_STRENGHT_VALID(strength));
<> 144:ef7eb2e8f9f7 128 BUS_RegMaskedWrite(&GPIO->P[port].CTRL,
<> 144:ef7eb2e8f9f7 129 _GPIO_P_CTRL_DRIVESTRENGTH_MASK | _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK,
<> 144:ef7eb2e8f9f7 130 strength);
<> 144:ef7eb2e8f9f7 131 }
<> 144:ef7eb2e8f9f7 132 #endif
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 135 * @brief
<> 150:02e0a0aed4ec 136 * Configure GPIO external pin interrupt.
<> 144:ef7eb2e8f9f7 137 *
<> 144:ef7eb2e8f9f7 138 * @details
AnnaBridge 179:b0033dcd6934 139 * It is recommended to disable interrupts before configuring a GPIO pin interrupt.
AnnaBridge 179:b0033dcd6934 140 * See @ref GPIO_IntDisable() for more information.
<> 144:ef7eb2e8f9f7 141 *
<> 144:ef7eb2e8f9f7 142 * The actual GPIO interrupt handler must be in place before enabling the
<> 144:ef7eb2e8f9f7 143 * interrupt.
<> 144:ef7eb2e8f9f7 144 *
<> 150:02e0a0aed4ec 145 * Notice that any pending interrupt for the selected interrupt is cleared
<> 150:02e0a0aed4ec 146 * by this function.
<> 144:ef7eb2e8f9f7 147 *
<> 144:ef7eb2e8f9f7 148 * @note
<> 161:2cc1468da177 149 * On series 0 devices the pin number parameter is not used. The
<> 150:02e0a0aed4ec 150 * pin number used on these devices is hardwired to the interrupt with the
<> 150:02e0a0aed4ec 151 * same number. @n
<> 161:2cc1468da177 152 * On series 1 devices, pin number can be selected freely within a group.
<> 150:02e0a0aed4ec 153 * Interrupt numbers are divided into 4 groups (intNo / 4) and valid pin
<> 150:02e0a0aed4ec 154 * number within the interrupt groups are:
AnnaBridge 179:b0033dcd6934 155 * 0: pins 0-3 (interrupt number 0-3)
AnnaBridge 179:b0033dcd6934 156 * 1: pins 4-7 (interrupt number 4-7)
AnnaBridge 179:b0033dcd6934 157 * 2: pins 8-11 (interrupt number 8-11)
AnnaBridge 179:b0033dcd6934 158 * 3: pins 12-15 (interrupt number 12-15)
<> 144:ef7eb2e8f9f7 159 *
<> 144:ef7eb2e8f9f7 160 * @param[in] port
<> 144:ef7eb2e8f9f7 161 * The port to associate with @p pin.
<> 144:ef7eb2e8f9f7 162 *
<> 144:ef7eb2e8f9f7 163 * @param[in] pin
<> 150:02e0a0aed4ec 164 * The pin number on the port.
<> 150:02e0a0aed4ec 165 *
<> 150:02e0a0aed4ec 166 * @param[in] intNo
<> 150:02e0a0aed4ec 167 * The interrupt number to trigger.
<> 144:ef7eb2e8f9f7 168 *
<> 144:ef7eb2e8f9f7 169 * @param[in] risingEdge
<> 144:ef7eb2e8f9f7 170 * Set to true if interrupts shall be enabled on rising edge, otherwise false.
<> 144:ef7eb2e8f9f7 171 *
<> 144:ef7eb2e8f9f7 172 * @param[in] fallingEdge
<> 144:ef7eb2e8f9f7 173 * Set to true if interrupts shall be enabled on falling edge, otherwise false.
<> 144:ef7eb2e8f9f7 174 *
<> 144:ef7eb2e8f9f7 175 * @param[in] enable
<> 144:ef7eb2e8f9f7 176 * Set to true if interrupt shall be enabled after configuration completed,
AnnaBridge 179:b0033dcd6934 177 * false to leave disabled. See @ref GPIO_IntDisable() and @ref GPIO_IntEnable().
<> 144:ef7eb2e8f9f7 178 ******************************************************************************/
<> 150:02e0a0aed4ec 179 void GPIO_ExtIntConfig(GPIO_Port_TypeDef port,
<> 150:02e0a0aed4ec 180 unsigned int pin,
<> 150:02e0a0aed4ec 181 unsigned int intNo,
<> 150:02e0a0aed4ec 182 bool risingEdge,
<> 150:02e0a0aed4ec 183 bool fallingEdge,
<> 150:02e0a0aed4ec 184 bool enable)
<> 144:ef7eb2e8f9f7 185 {
<> 161:2cc1468da177 186 uint32_t tmp = 0;
<> 150:02e0a0aed4ec 187 #if !defined(_GPIO_EXTIPINSELL_MASK)
<> 150:02e0a0aed4ec 188 (void)pin;
<> 150:02e0a0aed4ec 189 #endif
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
<> 150:02e0a0aed4ec 192 #if defined(_GPIO_EXTIPINSELL_MASK)
<> 150:02e0a0aed4ec 193 EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin));
<> 150:02e0a0aed4ec 194 #endif
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /* There are two registers controlling the interrupt configuration:
<> 144:ef7eb2e8f9f7 197 * The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls
<> 144:ef7eb2e8f9f7 198 * pins 8-15. */
AnnaBridge 179:b0033dcd6934 199 if (intNo < 8) {
<> 144:ef7eb2e8f9f7 200 BUS_RegMaskedWrite(&GPIO->EXTIPSELL,
<> 150:02e0a0aed4ec 201 _GPIO_EXTIPSELL_EXTIPSEL0_MASK
<> 150:02e0a0aed4ec 202 << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo),
<> 150:02e0a0aed4ec 203 port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo));
AnnaBridge 179:b0033dcd6934 204 } else {
<> 150:02e0a0aed4ec 205 tmp = intNo - 8;
<> 144:ef7eb2e8f9f7 206 BUS_RegMaskedWrite(&GPIO->EXTIPSELH,
<> 150:02e0a0aed4ec 207 _GPIO_EXTIPSELH_EXTIPSEL8_MASK
<> 150:02e0a0aed4ec 208 << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp),
<> 150:02e0a0aed4ec 209 port << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
<> 144:ef7eb2e8f9f7 210 }
<> 144:ef7eb2e8f9f7 211
<> 150:02e0a0aed4ec 212 #if defined(_GPIO_EXTIPINSELL_MASK)
<> 150:02e0a0aed4ec 213 /* There are two registers controlling the interrupt/pin number mapping:
<> 150:02e0a0aed4ec 214 * The EXTIPINSELL register controls interrupt 0-7 and EXTIPINSELH controls
<> 150:02e0a0aed4ec 215 * interrupt 8-15. */
AnnaBridge 179:b0033dcd6934 216 if (intNo < 8) {
<> 150:02e0a0aed4ec 217 BUS_RegMaskedWrite(&GPIO->EXTIPINSELL,
<> 150:02e0a0aed4ec 218 _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK
<> 150:02e0a0aed4ec 219 << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo),
<> 150:02e0a0aed4ec 220 ((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK)
<> 150:02e0a0aed4ec 221 << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo));
AnnaBridge 179:b0033dcd6934 222 } else {
<> 150:02e0a0aed4ec 223 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH,
<> 150:02e0a0aed4ec 224 _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK
<> 150:02e0a0aed4ec 225 << (_GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT * tmp),
<> 150:02e0a0aed4ec 226 ((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK)
<> 150:02e0a0aed4ec 227 << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
<> 150:02e0a0aed4ec 228 }
<> 150:02e0a0aed4ec 229 #endif
<> 150:02e0a0aed4ec 230
<> 144:ef7eb2e8f9f7 231 /* Enable/disable rising edge */
<> 150:02e0a0aed4ec 232 BUS_RegBitWrite(&(GPIO->EXTIRISE), intNo, risingEdge);
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Enable/disable falling edge */
<> 150:02e0a0aed4ec 235 BUS_RegBitWrite(&(GPIO->EXTIFALL), intNo, fallingEdge);
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /* Clear any pending interrupt */
<> 150:02e0a0aed4ec 238 GPIO->IFC = 1 << intNo;
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /* Finally enable/disable interrupt */
<> 150:02e0a0aed4ec 241 BUS_RegBitWrite(&(GPIO->IEN), intNo, enable);
<> 144:ef7eb2e8f9f7 242 }
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 245 * @brief
<> 144:ef7eb2e8f9f7 246 * Set the mode for a GPIO pin.
<> 144:ef7eb2e8f9f7 247 *
<> 144:ef7eb2e8f9f7 248 * @param[in] port
<> 144:ef7eb2e8f9f7 249 * The GPIO port to access.
<> 144:ef7eb2e8f9f7 250 *
<> 144:ef7eb2e8f9f7 251 * @param[in] pin
<> 144:ef7eb2e8f9f7 252 * The pin number in the port.
<> 144:ef7eb2e8f9f7 253 *
<> 144:ef7eb2e8f9f7 254 * @param[in] mode
<> 144:ef7eb2e8f9f7 255 * The desired pin mode.
<> 144:ef7eb2e8f9f7 256 *
<> 144:ef7eb2e8f9f7 257 * @param[in] out
<> 144:ef7eb2e8f9f7 258 * Value to set for pin in DOUT register. The DOUT setting is important for
<> 144:ef7eb2e8f9f7 259 * even some input mode configurations, determining pull-up/down direction.
<> 144:ef7eb2e8f9f7 260 ******************************************************************************/
<> 144:ef7eb2e8f9f7 261 void GPIO_PinModeSet(GPIO_Port_TypeDef port,
<> 144:ef7eb2e8f9f7 262 unsigned int pin,
<> 144:ef7eb2e8f9f7 263 GPIO_Mode_TypeDef mode,
<> 144:ef7eb2e8f9f7 264 unsigned int out)
<> 144:ef7eb2e8f9f7 265 {
<> 144:ef7eb2e8f9f7 266 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /* If disabling pin, do not modify DOUT in order to reduce chance for */
<> 144:ef7eb2e8f9f7 269 /* glitch/spike (may not be sufficient precaution in all use cases) */
AnnaBridge 179:b0033dcd6934 270 if (mode != gpioModeDisabled) {
AnnaBridge 179:b0033dcd6934 271 if (out) {
<> 144:ef7eb2e8f9f7 272 GPIO_PinOutSet(port, pin);
AnnaBridge 179:b0033dcd6934 273 } else {
<> 144:ef7eb2e8f9f7 274 GPIO_PinOutClear(port, pin);
<> 144:ef7eb2e8f9f7 275 }
<> 144:ef7eb2e8f9f7 276 }
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /* There are two registers controlling the pins for each port. The MODEL
<> 144:ef7eb2e8f9f7 279 * register controls pins 0-7 and MODEH controls pins 8-15. */
AnnaBridge 179:b0033dcd6934 280 if (pin < 8) {
<> 161:2cc1468da177 281 GPIO->P[port].MODEL = (GPIO->P[port].MODEL & ~(0xFu << (pin * 4)))
<> 150:02e0a0aed4ec 282 | (mode << (pin * 4));
AnnaBridge 179:b0033dcd6934 283 } else {
<> 161:2cc1468da177 284 GPIO->P[port].MODEH = (GPIO->P[port].MODEH & ~(0xFu << ((pin - 8) * 4)))
<> 150:02e0a0aed4ec 285 | (mode << ((pin - 8) * 4));
<> 144:ef7eb2e8f9f7 286 }
<> 144:ef7eb2e8f9f7 287
AnnaBridge 179:b0033dcd6934 288 if (mode == gpioModeDisabled) {
AnnaBridge 179:b0033dcd6934 289 if (out) {
<> 144:ef7eb2e8f9f7 290 GPIO_PinOutSet(port, pin);
AnnaBridge 179:b0033dcd6934 291 } else {
<> 144:ef7eb2e8f9f7 292 GPIO_PinOutClear(port, pin);
<> 144:ef7eb2e8f9f7 293 }
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295 }
<> 144:ef7eb2e8f9f7 296
<> 150:02e0a0aed4ec 297 /***************************************************************************//**
<> 150:02e0a0aed4ec 298 * @brief
<> 150:02e0a0aed4ec 299 * Get the mode for a GPIO pin.
<> 150:02e0a0aed4ec 300 *
<> 150:02e0a0aed4ec 301 * @param[in] port
<> 150:02e0a0aed4ec 302 * The GPIO port to access.
<> 150:02e0a0aed4ec 303 *
<> 150:02e0a0aed4ec 304 * @param[in] pin
<> 150:02e0a0aed4ec 305 * The pin number in the port.
<> 150:02e0a0aed4ec 306 *
<> 150:02e0a0aed4ec 307 * @return
<> 150:02e0a0aed4ec 308 * The pin mode.
<> 150:02e0a0aed4ec 309 ******************************************************************************/
<> 150:02e0a0aed4ec 310 GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port,
<> 150:02e0a0aed4ec 311 unsigned int pin)
<> 150:02e0a0aed4ec 312 {
<> 150:02e0a0aed4ec 313 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
<> 150:02e0a0aed4ec 314
AnnaBridge 179:b0033dcd6934 315 if (pin < 8) {
<> 150:02e0a0aed4ec 316 return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEL >> (pin * 4)) & 0xF);
AnnaBridge 179:b0033dcd6934 317 } else {
<> 150:02e0a0aed4ec 318 return (GPIO_Mode_TypeDef) ((GPIO->P[port].MODEH >> ((pin - 8) * 4)) & 0xF);
<> 150:02e0a0aed4ec 319 }
<> 150:02e0a0aed4ec 320 }
<> 150:02e0a0aed4ec 321
AnnaBridge 179:b0033dcd6934 322 #if defined(_GPIO_EM4WUEN_MASK)
<> 144:ef7eb2e8f9f7 323 /**************************************************************************//**
<> 144:ef7eb2e8f9f7 324 * @brief
<> 144:ef7eb2e8f9f7 325 * Enable GPIO pin wake-up from EM4. When the function exits,
<> 144:ef7eb2e8f9f7 326 * EM4 mode can be safely entered.
<> 144:ef7eb2e8f9f7 327 *
<> 144:ef7eb2e8f9f7 328 * @note
<> 144:ef7eb2e8f9f7 329 * It is assumed that the GPIO pin modes are set correctly.
<> 144:ef7eb2e8f9f7 330 * Valid modes are @ref gpioModeInput and @ref gpioModeInputPull.
<> 144:ef7eb2e8f9f7 331 *
<> 144:ef7eb2e8f9f7 332 * @param[in] pinmask
<> 144:ef7eb2e8f9f7 333 * Bitmask containing the bitwise logic OR of which GPIO pin(s) to enable.
<> 144:ef7eb2e8f9f7 334 * Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
<> 144:ef7eb2e8f9f7 335 * @param[in] polaritymask
<> 144:ef7eb2e8f9f7 336 * Bitmask containing the bitwise logic OR of GPIO pin(s) wake-up polarity.
<> 144:ef7eb2e8f9f7 337 * Refer to Reference Manuals for pinmask to GPIO port/pin mapping.
<> 144:ef7eb2e8f9f7 338 *****************************************************************************/
<> 144:ef7eb2e8f9f7 339 void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask)
<> 144:ef7eb2e8f9f7 340 {
<> 144:ef7eb2e8f9f7 341 EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0);
<> 144:ef7eb2e8f9f7 342
AnnaBridge 179:b0033dcd6934 343 #if defined(_GPIO_EM4WUPOL_MASK)
<> 144:ef7eb2e8f9f7 344 EFM_ASSERT((polaritymask & ~_GPIO_EM4WUPOL_MASK) == 0);
<> 144:ef7eb2e8f9f7 345 GPIO->EM4WUPOL &= ~pinmask; /* Set wakeup polarity */
<> 144:ef7eb2e8f9f7 346 GPIO->EM4WUPOL |= pinmask & polaritymask;
AnnaBridge 179:b0033dcd6934 347 #elif defined(_GPIO_EXTILEVEL_MASK)
<> 144:ef7eb2e8f9f7 348 EFM_ASSERT((polaritymask & ~_GPIO_EXTILEVEL_MASK) == 0);
<> 144:ef7eb2e8f9f7 349 GPIO->EXTILEVEL &= ~pinmask;
<> 144:ef7eb2e8f9f7 350 GPIO->EXTILEVEL |= pinmask & polaritymask;
<> 144:ef7eb2e8f9f7 351 #endif
<> 144:ef7eb2e8f9f7 352 GPIO->EM4WUEN |= pinmask; /* Enable wakeup */
<> 144:ef7eb2e8f9f7 353
<> 144:ef7eb2e8f9f7 354 GPIO_EM4SetPinRetention(true); /* Enable pin retention */
<> 144:ef7eb2e8f9f7 355
AnnaBridge 179:b0033dcd6934 356 #if defined(_GPIO_CMD_EM4WUCLR_MASK)
<> 144:ef7eb2e8f9f7 357 GPIO->CMD = GPIO_CMD_EM4WUCLR; /* Clear wake-up logic */
AnnaBridge 179:b0033dcd6934 358 #elif defined(_GPIO_IFC_EM4WU_MASK)
<> 144:ef7eb2e8f9f7 359 GPIO_IntClear(pinmask);
<> 144:ef7eb2e8f9f7 360 #endif
<> 144:ef7eb2e8f9f7 361 }
<> 144:ef7eb2e8f9f7 362 #endif
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /** @} (end addtogroup GPIO) */
<> 150:02e0a0aed4ec 365 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 #endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */