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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_adc_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
181:57724642e740 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal_adc_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 6 * functionalities of the Analog to Digital Convertor (ADC)
<> 144:ef7eb2e8f9f7 7 * peripheral:
<> 144:ef7eb2e8f9f7 8 * + Operation functions
AnnaBridge 181:57724642e740 9 * ++ Start, stop, get result of conversions of ADC group injected,
AnnaBridge 181:57724642e740 10 * using 2 possible modes: polling, interruption.
AnnaBridge 167:e84263d55307 11 * ++ Calibration
AnnaBridge 167:e84263d55307 12 * +++ ADC automatic self-calibration
AnnaBridge 167:e84263d55307 13 * +++ Calibration factors get or set
<> 144:ef7eb2e8f9f7 14 * ++ Multimode feature when available
<> 144:ef7eb2e8f9f7 15 * + Control functions
AnnaBridge 181:57724642e740 16 * ++ Channels configuration on ADC group injected
<> 144:ef7eb2e8f9f7 17 * + State functions
AnnaBridge 181:57724642e740 18 * ++ ADC group injected contexts queue management
AnnaBridge 167:e84263d55307 19 * Other functions (generic functions) are available in file
AnnaBridge 167:e84263d55307 20 * "stm32l4xx_hal_adc.c".
AnnaBridge 167:e84263d55307 21 *
AnnaBridge 167:e84263d55307 22 @verbatim
<> 144:ef7eb2e8f9f7 23 [..]
AnnaBridge 167:e84263d55307 24 (@) Sections "ADC peripheral features" and "How to use this driver" are
AnnaBridge 167:e84263d55307 25 available in file of generic functions "stm32l4xx_hal_adc.c".
AnnaBridge 167:e84263d55307 26 [..]
AnnaBridge 167:e84263d55307 27 @endverbatim
<> 144:ef7eb2e8f9f7 28 ******************************************************************************
<> 144:ef7eb2e8f9f7 29 * @attention
<> 144:ef7eb2e8f9f7 30 *
AnnaBridge 167:e84263d55307 31 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 34 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 35 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 36 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 37 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 38 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 39 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 41 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 42 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 43 *
<> 144:ef7eb2e8f9f7 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 54 *
AnnaBridge 167:e84263d55307 55 ******************************************************************************
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 #include "stm32l4xx_hal.h"
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /** @defgroup ADCEx ADCEx
<> 144:ef7eb2e8f9f7 66 * @brief ADC Extended HAL module driver
<> 144:ef7eb2e8f9f7 67 * @{
<> 144:ef7eb2e8f9f7 68 */
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 #ifdef HAL_ADC_MODULE_ENABLED
AnnaBridge 167:e84263d55307 71
<> 144:ef7eb2e8f9f7 72 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 73 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
<> 144:ef7eb2e8f9f7 76 * @{
<> 144:ef7eb2e8f9f7 77 */
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 #define ADC_JSQR_FIELDS ((uint32_t)(ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
<> 144:ef7eb2e8f9f7 80 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
<> 144:ef7eb2e8f9f7 81 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime
<> 144:ef7eb2e8f9f7 82 once the ADC is enabled */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /* Fixed timeout value for ADC calibration. */
<> 144:ef7eb2e8f9f7 85 /* Values defined to be higher than worst cases: low clock frequency, */
<> 144:ef7eb2e8f9f7 86 /* maximum prescalers. */
<> 144:ef7eb2e8f9f7 87 /* Ex of profile low frequency : f_ADC at 0.14 MHz (minimum value */
<> 144:ef7eb2e8f9f7 88 /* according to Data sheet), calibration_time MAX = 112 / f_ADC */
<> 144:ef7eb2e8f9f7 89 /* 112 / 140,000 = 0.8 ms */
<> 144:ef7eb2e8f9f7 90 /* At maximum CPU speed (80 MHz), this means */
<> 144:ef7eb2e8f9f7 91 /* 0.8 ms * 80 MHz = 64000 CPU cycles */
AnnaBridge 181:57724642e740 92 #define ADC_CALIBRATION_TIMEOUT (64000U) /*!< ADC calibration time-out value */
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 /**
<> 144:ef7eb2e8f9f7 95 * @}
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 99 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 100 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 101 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
<> 144:ef7eb2e8f9f7 104 * @{
AnnaBridge 167:e84263d55307 105 */
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
<> 144:ef7eb2e8f9f7 108 * @brief Extended IO operation functions
<> 144:ef7eb2e8f9f7 109 *
AnnaBridge 167:e84263d55307 110 @verbatim
<> 144:ef7eb2e8f9f7 111 ===============================================================================
AnnaBridge 167:e84263d55307 112 ##### IO operation functions #####
AnnaBridge 167:e84263d55307 113 ===============================================================================
<> 144:ef7eb2e8f9f7 114 [..] This section provides functions allowing to:
AnnaBridge 167:e84263d55307 115
<> 144:ef7eb2e8f9f7 116 (+) Perform the ADC self-calibration for single or differential ending.
<> 144:ef7eb2e8f9f7 117 (+) Get calibration factors for single or differential ending.
<> 144:ef7eb2e8f9f7 118 (+) Set calibration factors for single or differential ending.
AnnaBridge 181:57724642e740 119
AnnaBridge 181:57724642e740 120 (+) Start conversion of ADC group injected.
AnnaBridge 181:57724642e740 121 (+) Stop conversion of ADC group injected.
AnnaBridge 181:57724642e740 122 (+) Poll for conversion complete on ADC group injected.
AnnaBridge 181:57724642e740 123 (+) Get result of ADC group injected channel conversion.
AnnaBridge 181:57724642e740 124 (+) Start conversion of ADC group injected and enable interruptions.
AnnaBridge 181:57724642e740 125 (+) Stop conversion of ADC group injected and disable interruptions.
AnnaBridge 167:e84263d55307 126
<> 144:ef7eb2e8f9f7 127 (+) When multimode feature is available, start multimode and enable DMA transfer.
<> 144:ef7eb2e8f9f7 128 (+) Stop multimode and disable ADC DMA transfer.
<> 144:ef7eb2e8f9f7 129 (+) Get result of multimode conversion.
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 @endverbatim
<> 144:ef7eb2e8f9f7 132 * @{
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /**
<> 144:ef7eb2e8f9f7 136 * @brief Perform an ADC automatic self-calibration
<> 144:ef7eb2e8f9f7 137 * Calibration prerequisite: ADC must be disabled (execute this
<> 144:ef7eb2e8f9f7 138 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
AnnaBridge 167:e84263d55307 139 * @param hadc ADC handle
AnnaBridge 167:e84263d55307 140 * @param SingleDiff Selection of single-ended or differential input
AnnaBridge 181:57724642e740 141 * This parameter can be one of the following values:
AnnaBridge 181:57724642e740 142 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
AnnaBridge 181:57724642e740 143 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
<> 144:ef7eb2e8f9f7 144 * @retval HAL status
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
<> 144:ef7eb2e8f9f7 147 {
AnnaBridge 167:e84263d55307 148 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 149 uint32_t WaitLoopIndex = 0;
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Check the parameters */
<> 144:ef7eb2e8f9f7 152 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 153 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
AnnaBridge 181:57724642e740 154
<> 144:ef7eb2e8f9f7 155 /* Process locked */
<> 144:ef7eb2e8f9f7 156 __HAL_LOCK(hadc);
AnnaBridge 167:e84263d55307 157
<> 144:ef7eb2e8f9f7 158 /* Calibration prerequisite: ADC must be disabled. */
AnnaBridge 167:e84263d55307 159
<> 144:ef7eb2e8f9f7 160 /* Disable the ADC (if not already disabled) */
AnnaBridge 167:e84263d55307 161 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /* Check if ADC is effectively disabled */
AnnaBridge 167:e84263d55307 164 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 165 {
AnnaBridge 181:57724642e740 166 /* Set ADC state */
AnnaBridge 181:57724642e740 167 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 168 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 169 HAL_ADC_STATE_BUSY_INTERNAL);
AnnaBridge 181:57724642e740 170
<> 144:ef7eb2e8f9f7 171
AnnaBridge 181:57724642e740 172
<> 144:ef7eb2e8f9f7 173 /* Select calibration mode single ended or differential ended */
<> 144:ef7eb2e8f9f7 174 MODIFY_REG(hadc->Instance->CR, ADC_CR_ADCALDIF, SingleDiff);
AnnaBridge 167:e84263d55307 175
<> 144:ef7eb2e8f9f7 176 /* Start ADC calibration */
<> 144:ef7eb2e8f9f7 177 SET_BIT(hadc->Instance->CR, ADC_CR_ADCAL);
AnnaBridge 167:e84263d55307 178
<> 144:ef7eb2e8f9f7 179 /* Wait for calibration completion */
<> 144:ef7eb2e8f9f7 180 while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
<> 144:ef7eb2e8f9f7 181 {
<> 144:ef7eb2e8f9f7 182 WaitLoopIndex++;
<> 144:ef7eb2e8f9f7 183 if (WaitLoopIndex >= ADC_CALIBRATION_TIMEOUT)
<> 144:ef7eb2e8f9f7 184 {
<> 144:ef7eb2e8f9f7 185 /* Update ADC state machine to error */
AnnaBridge 181:57724642e740 186 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 187 HAL_ADC_STATE_BUSY_INTERNAL,
AnnaBridge 181:57724642e740 188 HAL_ADC_STATE_ERROR_INTERNAL);
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /* Process unlocked */
<> 144:ef7eb2e8f9f7 191 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 194 }
<> 144:ef7eb2e8f9f7 195 }
<> 144:ef7eb2e8f9f7 196
AnnaBridge 181:57724642e740 197 /* Set ADC state */
AnnaBridge 181:57724642e740 198 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 199 HAL_ADC_STATE_BUSY_INTERNAL,
AnnaBridge 181:57724642e740 200 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 201 }
<> 144:ef7eb2e8f9f7 202 else
<> 144:ef7eb2e8f9f7 203 {
<> 144:ef7eb2e8f9f7 204 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
<> 144:ef7eb2e8f9f7 205
AnnaBridge 167:e84263d55307 206 /* Note: No need to update variable "tmp_hal_status" here: already set */
AnnaBridge 167:e84263d55307 207 /* to state "HAL_ERROR" by function disabling the ADC. */
<> 144:ef7eb2e8f9f7 208 }
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* Process unlocked */
<> 144:ef7eb2e8f9f7 211 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /* Return function status */
AnnaBridge 167:e84263d55307 214 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 215 }
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /**
AnnaBridge 181:57724642e740 218 * @brief Get the calibration factor.
AnnaBridge 181:57724642e740 219 * @param hadc ADC handle.
AnnaBridge 181:57724642e740 220 * @param SingleDiff This parameter can be only:
AnnaBridge 181:57724642e740 221 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
AnnaBridge 181:57724642e740 222 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
AnnaBridge 181:57724642e740 223 * @retval Calibration value.
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 /* Check the parameters */
<> 144:ef7eb2e8f9f7 228 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 229 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
<> 144:ef7eb2e8f9f7 230
AnnaBridge 181:57724642e740 231 /* Return the selected ADC calibration value */
<> 144:ef7eb2e8f9f7 232 if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
<> 144:ef7eb2e8f9f7 233 {
<> 144:ef7eb2e8f9f7 234 return ADC_CALFACT_DIFF_GET(hadc->Instance->CALFACT);
<> 144:ef7eb2e8f9f7 235 }
<> 144:ef7eb2e8f9f7 236 else
<> 144:ef7eb2e8f9f7 237 {
<> 144:ef7eb2e8f9f7 238 return ((hadc->Instance->CALFACT) & ADC_CALFACT_CALFACT_S);
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240 }
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /**
AnnaBridge 181:57724642e740 243 * @brief Set the calibration factor to overwrite automatic conversion result.
AnnaBridge 181:57724642e740 244 * ADC must be enabled and no conversion is ongoing.
AnnaBridge 181:57724642e740 245 * @param hadc ADC handle
AnnaBridge 181:57724642e740 246 * @param SingleDiff This parameter can be only:
AnnaBridge 181:57724642e740 247 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
AnnaBridge 181:57724642e740 248 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
AnnaBridge 181:57724642e740 249 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
<> 144:ef7eb2e8f9f7 250 * @retval HAL state
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
<> 144:ef7eb2e8f9f7 253 {
AnnaBridge 167:e84263d55307 254 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /* Check the parameters */
<> 144:ef7eb2e8f9f7 257 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 258 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
<> 144:ef7eb2e8f9f7 259 assert_param(IS_ADC_CALFACT(CalibrationFactor));
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /* Process locked */
<> 144:ef7eb2e8f9f7 262 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /* Verification of hardware constraints before modifying the calibration */
<> 144:ef7eb2e8f9f7 265 /* factors register: ADC must be enabled, no conversion on going. */
<> 144:ef7eb2e8f9f7 266 if ( (ADC_IS_ENABLE(hadc) != RESET) &&
<> 144:ef7eb2e8f9f7 267 (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) )
<> 144:ef7eb2e8f9f7 268 {
AnnaBridge 167:e84263d55307 269 /* Set the selected ADC calibration value */
<> 144:ef7eb2e8f9f7 270 if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
<> 144:ef7eb2e8f9f7 271 {
<> 144:ef7eb2e8f9f7 272 MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D, ADC_CALFACT_DIFF_SET(CalibrationFactor));
<> 144:ef7eb2e8f9f7 273 }
<> 144:ef7eb2e8f9f7 274 else
<> 144:ef7eb2e8f9f7 275 {
<> 144:ef7eb2e8f9f7 276 MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_S, CalibrationFactor);
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278 }
<> 144:ef7eb2e8f9f7 279 else
<> 144:ef7eb2e8f9f7 280 {
<> 144:ef7eb2e8f9f7 281 /* Update ADC state machine */
<> 144:ef7eb2e8f9f7 282 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
AnnaBridge 181:57724642e740 283 /* Update ADC error code */
AnnaBridge 181:57724642e740 284 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* Update ADC state machine to error */
AnnaBridge 167:e84263d55307 287 tmp_hal_status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 288 }
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /* Process unlocked */
<> 144:ef7eb2e8f9f7 291 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /* Return function status */
AnnaBridge 167:e84263d55307 294 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 295 }
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @brief Enable ADC, start conversion of injected group.
<> 144:ef7eb2e8f9f7 299 * @note Interruptions enabled in this function: None.
<> 144:ef7eb2e8f9f7 300 * @note Case of multimode enabled when multimode feature is available:
<> 144:ef7eb2e8f9f7 301 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
<> 144:ef7eb2e8f9f7 302 * then for ADC master.
<> 144:ef7eb2e8f9f7 303 * For ADC slave, ADC is enabled only (conversion is not started).
<> 144:ef7eb2e8f9f7 304 * For ADC master, ADC is enabled and multimode conversion is started.
AnnaBridge 181:57724642e740 305 * @param hadc ADC handle.
<> 144:ef7eb2e8f9f7 306 * @retval HAL status
<> 144:ef7eb2e8f9f7 307 */
<> 144:ef7eb2e8f9f7 308 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 309 {
AnnaBridge 167:e84263d55307 310 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /* Check the parameters */
<> 144:ef7eb2e8f9f7 313 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc))
<> 144:ef7eb2e8f9f7 316 {
<> 144:ef7eb2e8f9f7 317 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 318 }
<> 144:ef7eb2e8f9f7 319 else
<> 144:ef7eb2e8f9f7 320 {
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /* In case of software trigger detection enabled, JQDIS must be set
<> 144:ef7eb2e8f9f7 323 (which can be done only if ADSTART and JADSTART are both cleared).
<> 144:ef7eb2e8f9f7 324 If JQDIS is not set at that point, returns an error
<> 144:ef7eb2e8f9f7 325 - since software trigger detection is disabled. User needs to
<> 144:ef7eb2e8f9f7 326 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
<> 144:ef7eb2e8f9f7 327 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
<> 144:ef7eb2e8f9f7 328 the queue is empty */
<> 144:ef7eb2e8f9f7 329 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET)
<> 144:ef7eb2e8f9f7 330 && (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET))
<> 144:ef7eb2e8f9f7 331 {
<> 144:ef7eb2e8f9f7 332 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 333 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
AnnaBridge 167:e84263d55307 336
<> 144:ef7eb2e8f9f7 337 /* Process locked */
<> 144:ef7eb2e8f9f7 338 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 /* Enable the ADC peripheral */
AnnaBridge 167:e84263d55307 341 tmp_hal_status = ADC_Enable(hadc);
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /* Start conversion if ADC is effectively enabled */
AnnaBridge 167:e84263d55307 344 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 345 {
<> 144:ef7eb2e8f9f7 346 /* Check if a regular conversion is ongoing */
AnnaBridge 167:e84263d55307 347 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY))
<> 144:ef7eb2e8f9f7 348 {
<> 144:ef7eb2e8f9f7 349 /* Reset ADC error code field related to injected conversions only */
<> 144:ef7eb2e8f9f7 350 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
<> 144:ef7eb2e8f9f7 351 }
<> 144:ef7eb2e8f9f7 352 else
<> 144:ef7eb2e8f9f7 353 {
<> 144:ef7eb2e8f9f7 354 /* Set ADC error code to none */
AnnaBridge 167:e84263d55307 355 ADC_CLEAR_ERRORCODE(hadc);
<> 144:ef7eb2e8f9f7 356 }
AnnaBridge 181:57724642e740 357
AnnaBridge 181:57724642e740 358 /* Set ADC state */
AnnaBridge 181:57724642e740 359 /* - Clear state bitfield related to injected group conversion results */
AnnaBridge 181:57724642e740 360 /* - Set state bitfield related to injected operation */
AnnaBridge 181:57724642e740 361 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 362 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
AnnaBridge 181:57724642e740 363 HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
<> 144:ef7eb2e8f9f7 366 - by default if ADC is Master or Independent or if multimode feature is not available
<> 144:ef7eb2e8f9f7 367 - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */
<> 144:ef7eb2e8f9f7 368 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
<> 144:ef7eb2e8f9f7 369 {
<> 144:ef7eb2e8f9f7 370 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
AnnaBridge 167:e84263d55307 371 }
AnnaBridge 167:e84263d55307 372
AnnaBridge 181:57724642e740 373 /* Clear ADC group injected group conversion flag */
<> 144:ef7eb2e8f9f7 374 /* (To ensure of no unknown state from potential previous ADC operations) */
<> 144:ef7eb2e8f9f7 375 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
<> 144:ef7eb2e8f9f7 376
AnnaBridge 181:57724642e740 377 /* Process unlocked */
AnnaBridge 181:57724642e740 378 /* Unlock before starting ADC conversions: in case of potential */
AnnaBridge 181:57724642e740 379 /* interruption, to let the process to ADC IRQ Handler. */
AnnaBridge 181:57724642e740 380 __HAL_UNLOCK(hadc);
AnnaBridge 181:57724642e740 381
<> 144:ef7eb2e8f9f7 382 /* Enable conversion of injected group, if automatic injected conversion */
<> 144:ef7eb2e8f9f7 383 /* is disabled. */
<> 144:ef7eb2e8f9f7 384 /* If software start has been selected, conversion starts immediately. */
<> 144:ef7eb2e8f9f7 385 /* If external trigger has been selected, conversion will start at next */
<> 144:ef7eb2e8f9f7 386 /* trigger event. */
<> 144:ef7eb2e8f9f7 387 /* Case of multimode enabled (when multimode feature is available): */
<> 144:ef7eb2e8f9f7 388 /* if ADC is slave, */
<> 144:ef7eb2e8f9f7 389 /* - ADC is enabled only (conversion is not started). */
<> 144:ef7eb2e8f9f7 390 /* - if multimode only concerns regular conversion, ADC is enabled */
<> 144:ef7eb2e8f9f7 391 /* and conversion is started. */
<> 144:ef7eb2e8f9f7 392 /* If ADC is master or independent, */
<> 144:ef7eb2e8f9f7 393 /* - ADC is enabled and conversion is started. */
AnnaBridge 167:e84263d55307 394
AnnaBridge 167:e84263d55307 395 /* Are injected conversions that of a dual Slave ? */
<> 144:ef7eb2e8f9f7 396 if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc))
<> 144:ef7eb2e8f9f7 397 {
<> 144:ef7eb2e8f9f7 398 /* hadc is not the handle of a Slave ADC with dual injected conversions enabled:
<> 144:ef7eb2e8f9f7 399 set ADSTART only if JAUTO is cleared */
<> 144:ef7eb2e8f9f7 400 if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO))
<> 144:ef7eb2e8f9f7 401 {
<> 144:ef7eb2e8f9f7 402 SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ;
<> 144:ef7eb2e8f9f7 403 }
<> 144:ef7eb2e8f9f7 404 }
<> 144:ef7eb2e8f9f7 405 else
<> 144:ef7eb2e8f9f7 406 {
<> 144:ef7eb2e8f9f7 407 /* hadc is the handle of a Slave ADC with dual injected conversions enabled:
<> 144:ef7eb2e8f9f7 408 ADSTART is not set */
<> 144:ef7eb2e8f9f7 409 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
<> 144:ef7eb2e8f9f7 410 }
<> 144:ef7eb2e8f9f7 411 }
<> 144:ef7eb2e8f9f7 412 else
<> 144:ef7eb2e8f9f7 413 {
<> 144:ef7eb2e8f9f7 414 /* Process unlocked */
<> 144:ef7eb2e8f9f7 415 __HAL_UNLOCK(hadc);
AnnaBridge 181:57724642e740 416 }
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /* Return function status */
AnnaBridge 167:e84263d55307 419 return tmp_hal_status;
AnnaBridge 181:57724642e740 420 }
<> 144:ef7eb2e8f9f7 421 }
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /**
AnnaBridge 167:e84263d55307 424 * @brief Stop conversion of injected channels. Disable ADC peripheral if
AnnaBridge 167:e84263d55307 425 * no regular conversion is on going.
AnnaBridge 167:e84263d55307 426 * @note If ADC must be disabled and if conversion is on going on
AnnaBridge 167:e84263d55307 427 * regular group, function HAL_ADC_Stop must be used to stop both
AnnaBridge 167:e84263d55307 428 * injected and regular groups, and disable the ADC.
AnnaBridge 167:e84263d55307 429 * @note If injected group mode auto-injection is enabled,
AnnaBridge 167:e84263d55307 430 * function HAL_ADC_Stop must be used.
<> 144:ef7eb2e8f9f7 431 * @note In case of multimode enabled (when multimode feature is available),
<> 144:ef7eb2e8f9f7 432 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
<> 144:ef7eb2e8f9f7 433 * For ADC master, conversion is stopped and ADC is disabled.
<> 144:ef7eb2e8f9f7 434 * For ADC slave, ADC is disabled only (conversion stop of ADC master
<> 144:ef7eb2e8f9f7 435 * has already stopped conversion of ADC slave).
AnnaBridge 181:57724642e740 436 * @param hadc ADC handle.
AnnaBridge 167:e84263d55307 437 * @retval HAL status
<> 144:ef7eb2e8f9f7 438 */
<> 144:ef7eb2e8f9f7 439 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
AnnaBridge 167:e84263d55307 440 {
AnnaBridge 167:e84263d55307 441 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 /* Check the parameters */
<> 144:ef7eb2e8f9f7 444 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 /* Process locked */
<> 144:ef7eb2e8f9f7 447 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 /* 1. Stop potential conversion on going on injected group only. */
AnnaBridge 167:e84263d55307 450 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 /* Disable ADC peripheral if injected conversions are effectively stopped */
<> 144:ef7eb2e8f9f7 453 /* and if no conversion on regular group is on-going */
AnnaBridge 167:e84263d55307 454 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 455 {
<> 144:ef7eb2e8f9f7 456 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
<> 144:ef7eb2e8f9f7 457 {
<> 144:ef7eb2e8f9f7 458 /* 2. Disable the ADC peripheral */
AnnaBridge 167:e84263d55307 459 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /* Check if ADC is effectively disabled */
AnnaBridge 167:e84263d55307 462 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 463 {
AnnaBridge 181:57724642e740 464 /* Set ADC state */
AnnaBridge 181:57724642e740 465 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 466 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 467 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 468 }
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470 /* Conversion on injected group is stopped, but ADC not disabled since */
<> 144:ef7eb2e8f9f7 471 /* conversion on regular group is still running. */
<> 144:ef7eb2e8f9f7 472 else
<> 144:ef7eb2e8f9f7 473 {
AnnaBridge 181:57724642e740 474 /* Set ADC state */
AnnaBridge 167:e84263d55307 475 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 476 }
<> 144:ef7eb2e8f9f7 477 }
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /* Process unlocked */
<> 144:ef7eb2e8f9f7 480 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 /* Return function status */
AnnaBridge 167:e84263d55307 483 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 484 }
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 /**
<> 144:ef7eb2e8f9f7 487 * @brief Wait for injected group conversion to be completed.
AnnaBridge 181:57724642e740 488 * @param hadc ADC handle
AnnaBridge 181:57724642e740 489 * @param Timeout Timeout value in millisecond.
AnnaBridge 167:e84263d55307 490 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
AnnaBridge 167:e84263d55307 491 * checked and cleared depending on AUTDLY bit status.
<> 144:ef7eb2e8f9f7 492 * @retval HAL status
<> 144:ef7eb2e8f9f7 493 */
<> 144:ef7eb2e8f9f7 494 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 495 {
AnnaBridge 181:57724642e740 496 uint32_t tickstart = 0U;
AnnaBridge 181:57724642e740 497 uint32_t tmp_Flag_End = 0U;
AnnaBridge 181:57724642e740 498 uint32_t tmp_cfgr = 0U;
AnnaBridge 181:57724642e740 499 ADC_TypeDef *tmpADC_Master;
AnnaBridge 181:57724642e740 500
<> 144:ef7eb2e8f9f7 501 /* Check the parameters */
<> 144:ef7eb2e8f9f7 502 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /* If end of sequence selected */
<> 144:ef7eb2e8f9f7 505 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
<> 144:ef7eb2e8f9f7 506 {
<> 144:ef7eb2e8f9f7 507 tmp_Flag_End = ADC_FLAG_JEOS;
<> 144:ef7eb2e8f9f7 508 }
<> 144:ef7eb2e8f9f7 509 else /* end of conversion selected */
<> 144:ef7eb2e8f9f7 510 {
<> 144:ef7eb2e8f9f7 511 tmp_Flag_End = ADC_FLAG_JEOC;
<> 144:ef7eb2e8f9f7 512 }
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /* Get timeout */
<> 144:ef7eb2e8f9f7 515 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /* Wait until End of Conversion or Sequence flag is raised */
<> 144:ef7eb2e8f9f7 518 while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_End))
<> 144:ef7eb2e8f9f7 519 {
<> 144:ef7eb2e8f9f7 520 /* Check if timeout is disabled (set to infinite wait) */
<> 144:ef7eb2e8f9f7 521 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 522 {
<> 144:ef7eb2e8f9f7 523 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
<> 144:ef7eb2e8f9f7 524 {
<> 144:ef7eb2e8f9f7 525 /* Update ADC state machine to timeout */
<> 144:ef7eb2e8f9f7 526 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
<> 144:ef7eb2e8f9f7 527
<> 144:ef7eb2e8f9f7 528 /* Process unlocked */
<> 144:ef7eb2e8f9f7 529 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 532 }
<> 144:ef7eb2e8f9f7 533 }
<> 144:ef7eb2e8f9f7 534 }
<> 144:ef7eb2e8f9f7 535
AnnaBridge 181:57724642e740 536 /* Get relevant register CFGR in ADC instance of ADC master or slave */
AnnaBridge 181:57724642e740 537 /* in function of multimode state (for devices with multimode */
AnnaBridge 181:57724642e740 538 /* available). */
AnnaBridge 181:57724642e740 539 if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc) == SET)
<> 144:ef7eb2e8f9f7 540 {
<> 144:ef7eb2e8f9f7 541 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
<> 144:ef7eb2e8f9f7 542 }
<> 144:ef7eb2e8f9f7 543 else
<> 144:ef7eb2e8f9f7 544 {
<> 144:ef7eb2e8f9f7 545 tmpADC_Master = ADC_MASTER_REGISTER(hadc);
<> 144:ef7eb2e8f9f7 546 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
AnnaBridge 167:e84263d55307 547 }
<> 144:ef7eb2e8f9f7 548
AnnaBridge 181:57724642e740 549 /* Update ADC state machine */
AnnaBridge 181:57724642e740 550 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
<> 144:ef7eb2e8f9f7 551
AnnaBridge 181:57724642e740 552 /* Determine whether any further conversion upcoming on group injected */
AnnaBridge 181:57724642e740 553 /* by external trigger or by automatic injected conversion */
AnnaBridge 181:57724642e740 554 /* from group regular. */
AnnaBridge 181:57724642e740 555 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) ||
AnnaBridge 181:57724642e740 556 ((READ_BIT (tmp_cfgr, ADC_CFGR_JAUTO) == RESET) &&
AnnaBridge 181:57724642e740 557 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
AnnaBridge 181:57724642e740 558 (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) == RESET) ) ) )
AnnaBridge 181:57724642e740 559 {
AnnaBridge 181:57724642e740 560 /* Check whether end of sequence is reached */
AnnaBridge 181:57724642e740 561 if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) )
AnnaBridge 181:57724642e740 562 {
AnnaBridge 181:57724642e740 563 /* Particular case if injected contexts queue is enabled: */
AnnaBridge 181:57724642e740 564 /* when the last context has been fully processed, JSQR is reset */
AnnaBridge 181:57724642e740 565 /* by the hardware. Even if no injected conversion is planned to come */
AnnaBridge 181:57724642e740 566 /* (queue empty, triggers are ignored), it can start again */
AnnaBridge 181:57724642e740 567 /* immediately after setting a new context (JADSTART is still set). */
AnnaBridge 181:57724642e740 568 /* Therefore, state of HAL ADC injected group is kept to busy. */
AnnaBridge 181:57724642e740 569 if(READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == RESET)
AnnaBridge 181:57724642e740 570 {
AnnaBridge 181:57724642e740 571 /* Set ADC state */
AnnaBridge 181:57724642e740 572 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
AnnaBridge 181:57724642e740 573
AnnaBridge 181:57724642e740 574 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
AnnaBridge 181:57724642e740 575 {
AnnaBridge 181:57724642e740 576 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
AnnaBridge 181:57724642e740 577 }
AnnaBridge 181:57724642e740 578 }
AnnaBridge 181:57724642e740 579 }
AnnaBridge 181:57724642e740 580 }
<> 144:ef7eb2e8f9f7 581
AnnaBridge 167:e84263d55307 582 /* Clear polled flag */
<> 144:ef7eb2e8f9f7 583 if (tmp_Flag_End == ADC_FLAG_JEOS)
<> 144:ef7eb2e8f9f7 584 {
<> 144:ef7eb2e8f9f7 585 /* Clear end of sequence JEOS flag of injected group if low power feature */
<> 144:ef7eb2e8f9f7 586 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
<> 144:ef7eb2e8f9f7 587 /* For injected groups, no new conversion will start before JEOS is */
<> 144:ef7eb2e8f9f7 588 /* cleared. */
AnnaBridge 181:57724642e740 589 if (READ_BIT (tmp_cfgr, ADC_CFGR_AUTDLY) == RESET)
<> 144:ef7eb2e8f9f7 590 {
AnnaBridge 181:57724642e740 591 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
<> 144:ef7eb2e8f9f7 592 }
<> 144:ef7eb2e8f9f7 593 }
<> 144:ef7eb2e8f9f7 594 else
<> 144:ef7eb2e8f9f7 595 {
AnnaBridge 181:57724642e740 596 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
AnnaBridge 167:e84263d55307 597 }
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 /* Return API HAL status */
<> 144:ef7eb2e8f9f7 600 return HAL_OK;
<> 144:ef7eb2e8f9f7 601 }
<> 144:ef7eb2e8f9f7 602
<> 144:ef7eb2e8f9f7 603 /**
<> 144:ef7eb2e8f9f7 604 * @brief Enable ADC, start conversion of injected group with interruption.
<> 144:ef7eb2e8f9f7 605 * @note Interruptions enabled in this function according to initialization
<> 144:ef7eb2e8f9f7 606 * setting : JEOC (end of conversion) or JEOS (end of sequence)
<> 144:ef7eb2e8f9f7 607 * @note Case of multimode enabled (when multimode feature is enabled):
<> 144:ef7eb2e8f9f7 608 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
<> 144:ef7eb2e8f9f7 609 * then for ADC master.
<> 144:ef7eb2e8f9f7 610 * For ADC slave, ADC is enabled only (conversion is not started).
<> 144:ef7eb2e8f9f7 611 * For ADC master, ADC is enabled and multimode conversion is started.
AnnaBridge 181:57724642e740 612 * @param hadc ADC handle.
<> 144:ef7eb2e8f9f7 613 * @retval HAL status.
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 616 {
AnnaBridge 167:e84263d55307 617 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 618
<> 144:ef7eb2e8f9f7 619 /* Check the parameters */
<> 144:ef7eb2e8f9f7 620 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc))
<> 144:ef7eb2e8f9f7 623 {
<> 144:ef7eb2e8f9f7 624 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 625 }
<> 144:ef7eb2e8f9f7 626 else
<> 144:ef7eb2e8f9f7 627 {
<> 144:ef7eb2e8f9f7 628 /* In case of software trigger detection enabled, JQDIS must be set
<> 144:ef7eb2e8f9f7 629 (which can be done only if ADSTART and JADSTART are both cleared).
<> 144:ef7eb2e8f9f7 630 If JQDIS is not set at that point, returns an error
<> 144:ef7eb2e8f9f7 631 - since software trigger detection is disabled. User needs to
<> 144:ef7eb2e8f9f7 632 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
<> 144:ef7eb2e8f9f7 633 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
<> 144:ef7eb2e8f9f7 634 the queue is empty */
<> 144:ef7eb2e8f9f7 635 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET)
<> 144:ef7eb2e8f9f7 636 && (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET))
<> 144:ef7eb2e8f9f7 637 {
<> 144:ef7eb2e8f9f7 638 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 639 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 640 }
<> 144:ef7eb2e8f9f7 641
<> 144:ef7eb2e8f9f7 642 /* Process locked */
<> 144:ef7eb2e8f9f7 643 __HAL_LOCK(hadc);
AnnaBridge 167:e84263d55307 644
<> 144:ef7eb2e8f9f7 645 /* Enable the ADC peripheral */
AnnaBridge 167:e84263d55307 646 tmp_hal_status = ADC_Enable(hadc);
<> 144:ef7eb2e8f9f7 647
<> 144:ef7eb2e8f9f7 648 /* Start conversion if ADC is effectively enabled */
AnnaBridge 167:e84263d55307 649 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 650 {
<> 144:ef7eb2e8f9f7 651 /* Check if a regular conversion is ongoing */
<> 144:ef7eb2e8f9f7 652 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY))
<> 144:ef7eb2e8f9f7 653 {
<> 144:ef7eb2e8f9f7 654 /* Reset ADC error code field related to injected conversions only */
<> 144:ef7eb2e8f9f7 655 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
<> 144:ef7eb2e8f9f7 656 }
<> 144:ef7eb2e8f9f7 657 else
<> 144:ef7eb2e8f9f7 658 {
<> 144:ef7eb2e8f9f7 659 /* Set ADC error code to none */
<> 144:ef7eb2e8f9f7 660 ADC_CLEAR_ERRORCODE(hadc);
<> 144:ef7eb2e8f9f7 661 }
AnnaBridge 181:57724642e740 662
AnnaBridge 181:57724642e740 663 /* Set ADC state */
AnnaBridge 181:57724642e740 664 /* - Clear state bitfield related to injected group conversion results */
AnnaBridge 181:57724642e740 665 /* - Set state bitfield related to injected operation */
AnnaBridge 181:57724642e740 666 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 667 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
AnnaBridge 181:57724642e740 668 HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 669
<> 144:ef7eb2e8f9f7 670 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
<> 144:ef7eb2e8f9f7 671 - by default if ADC is Master or Independent or if multimode feature is not available
<> 144:ef7eb2e8f9f7 672 - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */
<> 144:ef7eb2e8f9f7 673 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
<> 144:ef7eb2e8f9f7 674 {
<> 144:ef7eb2e8f9f7 675 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
AnnaBridge 167:e84263d55307 676 }
AnnaBridge 181:57724642e740 677
AnnaBridge 181:57724642e740 678 /* Clear ADC group injected group conversion flag */
<> 144:ef7eb2e8f9f7 679 /* (To ensure of no unknown state from potential previous ADC operations) */
<> 144:ef7eb2e8f9f7 680 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
<> 144:ef7eb2e8f9f7 681
AnnaBridge 181:57724642e740 682 /* Process unlocked */
AnnaBridge 181:57724642e740 683 /* Unlock before starting ADC conversions: in case of potential */
AnnaBridge 181:57724642e740 684 /* interruption, to let the process to ADC IRQ Handler. */
AnnaBridge 181:57724642e740 685 __HAL_UNLOCK(hadc);
AnnaBridge 181:57724642e740 686
<> 144:ef7eb2e8f9f7 687 /* Enable ADC Injected context queue overflow interrupt if this feature */
<> 144:ef7eb2e8f9f7 688 /* is enabled. */
<> 144:ef7eb2e8f9f7 689 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != RESET)
<> 144:ef7eb2e8f9f7 690 {
<> 144:ef7eb2e8f9f7 691 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
<> 144:ef7eb2e8f9f7 692 }
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 /* Enable ADC end of conversion interrupt */
<> 144:ef7eb2e8f9f7 695 switch(hadc->Init.EOCSelection)
<> 144:ef7eb2e8f9f7 696 {
<> 144:ef7eb2e8f9f7 697 case ADC_EOC_SEQ_CONV:
<> 144:ef7eb2e8f9f7 698 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
<> 144:ef7eb2e8f9f7 699 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
<> 144:ef7eb2e8f9f7 700 break;
<> 144:ef7eb2e8f9f7 701 /* case ADC_EOC_SINGLE_CONV */
<> 144:ef7eb2e8f9f7 702 default:
<> 144:ef7eb2e8f9f7 703 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
<> 144:ef7eb2e8f9f7 704 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
<> 144:ef7eb2e8f9f7 705 break;
<> 144:ef7eb2e8f9f7 706 }
<> 144:ef7eb2e8f9f7 707
<> 144:ef7eb2e8f9f7 708 /* Enable conversion of injected group, if automatic injected conversion */
<> 144:ef7eb2e8f9f7 709 /* is disabled. */
<> 144:ef7eb2e8f9f7 710 /* If software start has been selected, conversion starts immediately. */
<> 144:ef7eb2e8f9f7 711 /* If external trigger has been selected, conversion will start at next */
<> 144:ef7eb2e8f9f7 712 /* trigger event. */
<> 144:ef7eb2e8f9f7 713 /* Case of multimode enabled (when multimode feature is available): */
<> 144:ef7eb2e8f9f7 714 /* if ADC is slave, */
<> 144:ef7eb2e8f9f7 715 /* - ADC is enabled only (conversion is not started), */
<> 144:ef7eb2e8f9f7 716 /* - if multimode only concerns regular conversion, ADC is enabled */
<> 144:ef7eb2e8f9f7 717 /* and conversion is started. */
<> 144:ef7eb2e8f9f7 718 /* If ADC is master or independent, */
<> 144:ef7eb2e8f9f7 719 /* - ADC is enabled and conversion is started. */
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 /* Are injected conversions that of a dual Slave ? */
<> 144:ef7eb2e8f9f7 722 if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc))
<> 144:ef7eb2e8f9f7 723 {
<> 144:ef7eb2e8f9f7 724 /* hadc is not the handle of a Slave ADC with dual injected conversions enabled:
<> 144:ef7eb2e8f9f7 725 set ADSTART only if JAUTO is cleared */
<> 144:ef7eb2e8f9f7 726 if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO))
<> 144:ef7eb2e8f9f7 727 {
<> 144:ef7eb2e8f9f7 728 SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ;
<> 144:ef7eb2e8f9f7 729 }
<> 144:ef7eb2e8f9f7 730 }
<> 144:ef7eb2e8f9f7 731 else
<> 144:ef7eb2e8f9f7 732 {
<> 144:ef7eb2e8f9f7 733 /* hadc is the handle of a Slave ADC with dual injected conversions enabled:
<> 144:ef7eb2e8f9f7 734 ADSTART is not set */
<> 144:ef7eb2e8f9f7 735 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
<> 144:ef7eb2e8f9f7 736 }
<> 144:ef7eb2e8f9f7 737 }
<> 144:ef7eb2e8f9f7 738 else
<> 144:ef7eb2e8f9f7 739 {
<> 144:ef7eb2e8f9f7 740 /* Process unlocked */
<> 144:ef7eb2e8f9f7 741 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 742 }
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /* Return function status */
AnnaBridge 167:e84263d55307 745 return tmp_hal_status;
AnnaBridge 181:57724642e740 746 }
<> 144:ef7eb2e8f9f7 747 }
<> 144:ef7eb2e8f9f7 748
<> 144:ef7eb2e8f9f7 749 /**
AnnaBridge 167:e84263d55307 750 * @brief Stop conversion of injected channels, disable interruption of
AnnaBridge 167:e84263d55307 751 * end-of-conversion. Disable ADC peripheral if no regular conversion
<> 144:ef7eb2e8f9f7 752 * is on going.
AnnaBridge 167:e84263d55307 753 * @note If ADC must be disabled and if conversion is on going on
AnnaBridge 167:e84263d55307 754 * regular group, function HAL_ADC_Stop must be used to stop both
AnnaBridge 167:e84263d55307 755 * injected and regular groups, and disable the ADC.
AnnaBridge 167:e84263d55307 756 * @note If injected group mode auto-injection is enabled,
AnnaBridge 167:e84263d55307 757 * function HAL_ADC_Stop must be used.
<> 144:ef7eb2e8f9f7 758 * @note Case of multimode enabled (when multimode feature is available):
<> 144:ef7eb2e8f9f7 759 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
<> 144:ef7eb2e8f9f7 760 * then for ADC slave.
<> 144:ef7eb2e8f9f7 761 * For ADC master, conversion is stopped and ADC is disabled.
<> 144:ef7eb2e8f9f7 762 * For ADC slave, ADC is disabled only (conversion stop of ADC master
<> 144:ef7eb2e8f9f7 763 * has already stopped conversion of ADC slave).
<> 144:ef7eb2e8f9f7 764 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
AnnaBridge 181:57724642e740 765 * @param hadc ADC handle
AnnaBridge 167:e84263d55307 766 * @retval HAL status
<> 144:ef7eb2e8f9f7 767 */
<> 144:ef7eb2e8f9f7 768 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
AnnaBridge 167:e84263d55307 769 {
AnnaBridge 167:e84263d55307 770 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 771
<> 144:ef7eb2e8f9f7 772 /* Check the parameters */
<> 144:ef7eb2e8f9f7 773 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 774
<> 144:ef7eb2e8f9f7 775 /* Process locked */
<> 144:ef7eb2e8f9f7 776 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778 /* 1. Stop potential conversion on going on injected group only. */
AnnaBridge 167:e84263d55307 779 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 /* Disable ADC peripheral if injected conversions are effectively stopped */
<> 144:ef7eb2e8f9f7 782 /* and if no conversion on the other group (regular group) is intended to */
<> 144:ef7eb2e8f9f7 783 /* continue. */
AnnaBridge 167:e84263d55307 784 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 785 {
<> 144:ef7eb2e8f9f7 786 /* Disable ADC end of conversion interrupt for injected channels */
<> 144:ef7eb2e8f9f7 787 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
<> 144:ef7eb2e8f9f7 788
AnnaBridge 181:57724642e740 789 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
<> 144:ef7eb2e8f9f7 790 {
<> 144:ef7eb2e8f9f7 791 /* 2. Disable the ADC peripheral */
AnnaBridge 167:e84263d55307 792 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 793
<> 144:ef7eb2e8f9f7 794 /* Check if ADC is effectively disabled */
AnnaBridge 167:e84263d55307 795 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 796 {
AnnaBridge 181:57724642e740 797 /* Set ADC state */
AnnaBridge 181:57724642e740 798 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 799 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 800 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 801 }
<> 144:ef7eb2e8f9f7 802 }
<> 144:ef7eb2e8f9f7 803 /* Conversion on injected group is stopped, but ADC not disabled since */
<> 144:ef7eb2e8f9f7 804 /* conversion on regular group is still running. */
<> 144:ef7eb2e8f9f7 805 else
<> 144:ef7eb2e8f9f7 806 {
AnnaBridge 181:57724642e740 807 /* Set ADC state */
AnnaBridge 181:57724642e740 808 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 809 }
<> 144:ef7eb2e8f9f7 810 }
<> 144:ef7eb2e8f9f7 811
<> 144:ef7eb2e8f9f7 812 /* Process unlocked */
<> 144:ef7eb2e8f9f7 813 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 814
<> 144:ef7eb2e8f9f7 815 /* Return function status */
AnnaBridge 167:e84263d55307 816 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 817 }
<> 144:ef7eb2e8f9f7 818
AnnaBridge 181:57724642e740 819 #if defined(ADC_MULTIMODE_SUPPORT)
<> 144:ef7eb2e8f9f7 820 /**
<> 144:ef7eb2e8f9f7 821 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
<> 144:ef7eb2e8f9f7 822 * @note Multimode must have been previously configured using
<> 144:ef7eb2e8f9f7 823 * HAL_ADCEx_MultiModeConfigChannel() function.
<> 144:ef7eb2e8f9f7 824 * Interruptions enabled in this function:
<> 144:ef7eb2e8f9f7 825 * overrun, DMA half transfer, DMA transfer complete.
<> 144:ef7eb2e8f9f7 826 * Each of these interruptions has its dedicated callback function.
<> 144:ef7eb2e8f9f7 827 * @note State field of Slave ADC handle is not updated in this configuration:
<> 144:ef7eb2e8f9f7 828 * user should not rely on it for information related to Slave regular
<> 144:ef7eb2e8f9f7 829 * conversions.
AnnaBridge 181:57724642e740 830 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
AnnaBridge 181:57724642e740 831 * @param pData Destination Buffer address.
AnnaBridge 181:57724642e740 832 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
AnnaBridge 167:e84263d55307 833 * @retval HAL status
<> 144:ef7eb2e8f9f7 834 */
<> 144:ef7eb2e8f9f7 835 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
<> 144:ef7eb2e8f9f7 836 {
AnnaBridge 167:e84263d55307 837 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 838 ADC_HandleTypeDef tmphadcSlave;
<> 144:ef7eb2e8f9f7 839 ADC_Common_TypeDef *tmpADC_Common;
<> 144:ef7eb2e8f9f7 840
<> 144:ef7eb2e8f9f7 841 /* Check the parameters */
<> 144:ef7eb2e8f9f7 842 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 843 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
<> 144:ef7eb2e8f9f7 844 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
<> 144:ef7eb2e8f9f7 845 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
<> 144:ef7eb2e8f9f7 846
<> 144:ef7eb2e8f9f7 847 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
<> 144:ef7eb2e8f9f7 848 {
<> 144:ef7eb2e8f9f7 849 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 850 }
<> 144:ef7eb2e8f9f7 851 else
<> 144:ef7eb2e8f9f7 852 {
<> 144:ef7eb2e8f9f7 853 /* Process locked */
<> 144:ef7eb2e8f9f7 854 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /* Set a temporary handle of the ADC slave associated to the ADC master */
<> 144:ef7eb2e8f9f7 857 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
<> 144:ef7eb2e8f9f7 858
<> 144:ef7eb2e8f9f7 859 if (tmphadcSlave.Instance == NULL)
<> 144:ef7eb2e8f9f7 860 {
AnnaBridge 181:57724642e740 861 /* Set ADC state */
<> 144:ef7eb2e8f9f7 862 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 863
<> 144:ef7eb2e8f9f7 864 /* Process unlocked */
<> 144:ef7eb2e8f9f7 865 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 866
<> 144:ef7eb2e8f9f7 867 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 868 }
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /* Enable the ADC peripherals: master and slave (in case if not already */
<> 144:ef7eb2e8f9f7 871 /* enabled previously) */
AnnaBridge 167:e84263d55307 872 tmp_hal_status = ADC_Enable(hadc);
AnnaBridge 167:e84263d55307 873 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 874 {
AnnaBridge 167:e84263d55307 875 tmp_hal_status = ADC_Enable(&tmphadcSlave);
<> 144:ef7eb2e8f9f7 876 }
<> 144:ef7eb2e8f9f7 877
<> 144:ef7eb2e8f9f7 878 /* Start multimode conversion of ADCs pair */
AnnaBridge 167:e84263d55307 879 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 880 {
AnnaBridge 181:57724642e740 881 /* Set ADC state */
AnnaBridge 181:57724642e740 882 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 883 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
AnnaBridge 181:57724642e740 884 HAL_ADC_STATE_REG_BUSY);
AnnaBridge 181:57724642e740 885
<> 144:ef7eb2e8f9f7 886 /* Set ADC error code to none */
<> 144:ef7eb2e8f9f7 887 ADC_CLEAR_ERRORCODE(hadc);
<> 144:ef7eb2e8f9f7 888
<> 144:ef7eb2e8f9f7 889 /* Set the DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 890 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 /* Set the DMA half transfer complete callback */
<> 144:ef7eb2e8f9f7 893 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
<> 144:ef7eb2e8f9f7 894
<> 144:ef7eb2e8f9f7 895 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 896 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 /* Pointer to the common control register */
AnnaBridge 181:57724642e740 899 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
<> 144:ef7eb2e8f9f7 900
<> 144:ef7eb2e8f9f7 901 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
<> 144:ef7eb2e8f9f7 902 /* start (in case of SW start): */
<> 144:ef7eb2e8f9f7 903
<> 144:ef7eb2e8f9f7 904 /* Clear regular group conversion flag and overrun flag */
<> 144:ef7eb2e8f9f7 905 /* (To ensure of no unknown state from potential previous ADC operations) */
<> 144:ef7eb2e8f9f7 906 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
<> 144:ef7eb2e8f9f7 907
AnnaBridge 181:57724642e740 908 /* Process unlocked */
AnnaBridge 181:57724642e740 909 /* Unlock before starting ADC conversions: in case of potential */
AnnaBridge 181:57724642e740 910 /* interruption, to let the process to ADC IRQ Handler. */
AnnaBridge 181:57724642e740 911 __HAL_UNLOCK(hadc);
AnnaBridge 181:57724642e740 912
<> 144:ef7eb2e8f9f7 913 /* Enable ADC overrun interrupt */
<> 144:ef7eb2e8f9f7 914 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
AnnaBridge 181:57724642e740 915
<> 144:ef7eb2e8f9f7 916 /* Start the DMA channel */
<> 144:ef7eb2e8f9f7 917 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 /* Enable conversion of regular group. */
<> 144:ef7eb2e8f9f7 920 /* If software start has been selected, conversion starts immediately. */
<> 144:ef7eb2e8f9f7 921 /* If external trigger has been selected, conversion will start at next */
<> 144:ef7eb2e8f9f7 922 /* trigger event. */
AnnaBridge 181:57724642e740 923 /* Start ADC group regular conversion */
AnnaBridge 181:57724642e740 924 LL_ADC_REG_StartConversion(hadc->Instance);
<> 144:ef7eb2e8f9f7 925 }
<> 144:ef7eb2e8f9f7 926 else
<> 144:ef7eb2e8f9f7 927 {
<> 144:ef7eb2e8f9f7 928 /* Process unlocked */
<> 144:ef7eb2e8f9f7 929 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 930 }
AnnaBridge 167:e84263d55307 931
<> 144:ef7eb2e8f9f7 932 /* Return function status */
AnnaBridge 167:e84263d55307 933 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 934 }
<> 144:ef7eb2e8f9f7 935 }
<> 144:ef7eb2e8f9f7 936
<> 144:ef7eb2e8f9f7 937 /**
<> 144:ef7eb2e8f9f7 938 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
<> 144:ef7eb2e8f9f7 939 * @note Multimode is kept enabled after this function. MultiMode DMA bits
<> 144:ef7eb2e8f9f7 940 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
<> 144:ef7eb2e8f9f7 941 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
<> 144:ef7eb2e8f9f7 942 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
<> 144:ef7eb2e8f9f7 943 * resort to HAL_ADCEx_DisableMultiMode() API.
<> 144:ef7eb2e8f9f7 944 * @note In case of DMA configured in circular mode, function
<> 144:ef7eb2e8f9f7 945 * HAL_ADC_Stop_DMA() must be called after this function with handle of
<> 144:ef7eb2e8f9f7 946 * ADC slave, to properly disable the DMA channel.
AnnaBridge 181:57724642e740 947 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
AnnaBridge 167:e84263d55307 948 * @retval HAL status
<> 144:ef7eb2e8f9f7 949 */
<> 144:ef7eb2e8f9f7 950 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 951 {
AnnaBridge 167:e84263d55307 952 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 953 uint32_t tickstart;
<> 144:ef7eb2e8f9f7 954 ADC_HandleTypeDef tmphadcSlave;
<> 144:ef7eb2e8f9f7 955
<> 144:ef7eb2e8f9f7 956 /* Check the parameters */
<> 144:ef7eb2e8f9f7 957 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 958
<> 144:ef7eb2e8f9f7 959 /* Process locked */
<> 144:ef7eb2e8f9f7 960 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 961
AnnaBridge 167:e84263d55307 962
<> 144:ef7eb2e8f9f7 963 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
AnnaBridge 167:e84263d55307 964 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
AnnaBridge 167:e84263d55307 965
<> 144:ef7eb2e8f9f7 966 /* Disable ADC peripheral if conversions are effectively stopped */
AnnaBridge 167:e84263d55307 967 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 968 {
<> 144:ef7eb2e8f9f7 969 /* Set a temporary handle of the ADC slave associated to the ADC master */
<> 144:ef7eb2e8f9f7 970 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
<> 144:ef7eb2e8f9f7 971
<> 144:ef7eb2e8f9f7 972 if (tmphadcSlave.Instance == NULL)
<> 144:ef7eb2e8f9f7 973 {
<> 144:ef7eb2e8f9f7 974 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 975 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 976
<> 144:ef7eb2e8f9f7 977 /* Process unlocked */
<> 144:ef7eb2e8f9f7 978 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 979
<> 144:ef7eb2e8f9f7 980 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 981 }
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 /* Procedure to disable the ADC peripheral: wait for conversions */
<> 144:ef7eb2e8f9f7 984 /* effectively stopped (ADC master and ADC slave), then disable ADC */
<> 144:ef7eb2e8f9f7 985
<> 144:ef7eb2e8f9f7 986 /* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
<> 144:ef7eb2e8f9f7 987 tickstart = HAL_GetTick();
AnnaBridge 167:e84263d55307 988
<> 144:ef7eb2e8f9f7 989 while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) ||
<> 144:ef7eb2e8f9f7 990 ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
<> 144:ef7eb2e8f9f7 991 {
<> 144:ef7eb2e8f9f7 992 if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
<> 144:ef7eb2e8f9f7 993 {
<> 144:ef7eb2e8f9f7 994 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 995 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
<> 144:ef7eb2e8f9f7 996
<> 144:ef7eb2e8f9f7 997 /* Process unlocked */
<> 144:ef7eb2e8f9f7 998 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 999
<> 144:ef7eb2e8f9f7 1000 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1001 }
<> 144:ef7eb2e8f9f7 1002 }
<> 144:ef7eb2e8f9f7 1003
<> 144:ef7eb2e8f9f7 1004 /* Disable the DMA channel (in case of DMA in circular mode or stop */
<> 144:ef7eb2e8f9f7 1005 /* while DMA transfer is on going) */
<> 144:ef7eb2e8f9f7 1006 /* Note: DMA channel of ADC slave should be stopped after this function */
<> 144:ef7eb2e8f9f7 1007 /* with HAL_ADC_Stop_DMA() API. */
AnnaBridge 167:e84263d55307 1008 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
<> 144:ef7eb2e8f9f7 1009
<> 144:ef7eb2e8f9f7 1010 /* Check if DMA channel effectively disabled */
AnnaBridge 167:e84263d55307 1011 if (tmp_hal_status == HAL_ERROR)
<> 144:ef7eb2e8f9f7 1012 {
<> 144:ef7eb2e8f9f7 1013 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1014 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
<> 144:ef7eb2e8f9f7 1015 }
<> 144:ef7eb2e8f9f7 1016
<> 144:ef7eb2e8f9f7 1017 /* Disable ADC overrun interrupt */
<> 144:ef7eb2e8f9f7 1018 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
<> 144:ef7eb2e8f9f7 1019
<> 144:ef7eb2e8f9f7 1020 /* 2. Disable the ADC peripherals: master and slave */
AnnaBridge 167:e84263d55307 1021 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
<> 144:ef7eb2e8f9f7 1022 /* memory a potential failing status. */
AnnaBridge 167:e84263d55307 1023 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1024 {
<> 144:ef7eb2e8f9f7 1025 /* Check if ADC are effectively disabled */
<> 144:ef7eb2e8f9f7 1026 if ((ADC_Disable(hadc) == HAL_OK) &&
<> 144:ef7eb2e8f9f7 1027 (ADC_Disable(&tmphadcSlave) == HAL_OK) )
<> 144:ef7eb2e8f9f7 1028 {
AnnaBridge 167:e84263d55307 1029 tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1030 }
<> 144:ef7eb2e8f9f7 1031 }
<> 144:ef7eb2e8f9f7 1032 else
<> 144:ef7eb2e8f9f7 1033 {
<> 144:ef7eb2e8f9f7 1034 ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 1035 ADC_Disable(&tmphadcSlave);
<> 144:ef7eb2e8f9f7 1036 }
<> 144:ef7eb2e8f9f7 1037
AnnaBridge 181:57724642e740 1038 /* Set ADC state (ADC master) */
AnnaBridge 181:57724642e740 1039 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 1040 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 1041 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 1042 }
<> 144:ef7eb2e8f9f7 1043
<> 144:ef7eb2e8f9f7 1044 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1045 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1046
<> 144:ef7eb2e8f9f7 1047 /* Return function status */
AnnaBridge 167:e84263d55307 1048 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 1049 }
<> 144:ef7eb2e8f9f7 1050
<> 144:ef7eb2e8f9f7 1051 /**
<> 144:ef7eb2e8f9f7 1052 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
AnnaBridge 181:57724642e740 1053 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
<> 144:ef7eb2e8f9f7 1054 * @retval The converted data values.
<> 144:ef7eb2e8f9f7 1055 */
<> 144:ef7eb2e8f9f7 1056 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1057 {
<> 144:ef7eb2e8f9f7 1058 ADC_Common_TypeDef *tmpADC_Common;
<> 144:ef7eb2e8f9f7 1059
<> 144:ef7eb2e8f9f7 1060 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1061 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1062
<> 144:ef7eb2e8f9f7 1063 /* Pointer to the common control register */
AnnaBridge 181:57724642e740 1064 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
<> 144:ef7eb2e8f9f7 1065
<> 144:ef7eb2e8f9f7 1066 /* Return the multi mode conversion value */
<> 144:ef7eb2e8f9f7 1067 return tmpADC_Common->CDR;
<> 144:ef7eb2e8f9f7 1068 }
AnnaBridge 181:57724642e740 1069 #endif /* ADC_MULTIMODE_SUPPORT */
<> 144:ef7eb2e8f9f7 1070
<> 144:ef7eb2e8f9f7 1071 /**
<> 144:ef7eb2e8f9f7 1072 * @brief Get ADC injected group conversion result.
AnnaBridge 167:e84263d55307 1073 * @note Reading register JDRx automatically clears ADC flag JEOC
AnnaBridge 167:e84263d55307 1074 * (ADC group injected end of unitary conversion).
AnnaBridge 167:e84263d55307 1075 * @note This function does not clear ADC flag JEOS
AnnaBridge 167:e84263d55307 1076 * (ADC group injected end of sequence conversion)
AnnaBridge 167:e84263d55307 1077 * Occurrence of flag JEOS rising:
AnnaBridge 167:e84263d55307 1078 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
AnnaBridge 167:e84263d55307 1079 * to flag JEOC.
AnnaBridge 167:e84263d55307 1080 * - If sequencer is composed of several ranks, during the scan
AnnaBridge 167:e84263d55307 1081 * sequence flag JEOC only is raised, at the end of the scan sequence
AnnaBridge 167:e84263d55307 1082 * both flags JEOC and EOS are raised.
AnnaBridge 167:e84263d55307 1083 * Flag JEOS must not be cleared by this function because
AnnaBridge 167:e84263d55307 1084 * it would not be compliant with low power features
AnnaBridge 167:e84263d55307 1085 * (feature low power auto-wait, not available on all STM32 families).
AnnaBridge 167:e84263d55307 1086 * To clear this flag, either use function:
AnnaBridge 167:e84263d55307 1087 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
AnnaBridge 167:e84263d55307 1088 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
AnnaBridge 167:e84263d55307 1089 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
AnnaBridge 181:57724642e740 1090 * @param hadc ADC handle
AnnaBridge 181:57724642e740 1091 * @param InjectedRank the converted ADC injected rank.
<> 144:ef7eb2e8f9f7 1092 * This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 1093 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
AnnaBridge 167:e84263d55307 1094 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
AnnaBridge 167:e84263d55307 1095 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
AnnaBridge 167:e84263d55307 1096 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
AnnaBridge 167:e84263d55307 1097 * @retval ADC group injected conversion data
<> 144:ef7eb2e8f9f7 1098 */
<> 144:ef7eb2e8f9f7 1099 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
<> 144:ef7eb2e8f9f7 1100 {
<> 144:ef7eb2e8f9f7 1101 uint32_t tmp_jdr = 0;
AnnaBridge 167:e84263d55307 1102
<> 144:ef7eb2e8f9f7 1103 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1104 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1105 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
<> 144:ef7eb2e8f9f7 1106
AnnaBridge 167:e84263d55307 1107 /* Get ADC converted value */
<> 144:ef7eb2e8f9f7 1108 switch(InjectedRank)
<> 144:ef7eb2e8f9f7 1109 {
AnnaBridge 167:e84263d55307 1110 case ADC_INJECTED_RANK_4:
<> 144:ef7eb2e8f9f7 1111 tmp_jdr = hadc->Instance->JDR4;
<> 144:ef7eb2e8f9f7 1112 break;
<> 144:ef7eb2e8f9f7 1113 case ADC_INJECTED_RANK_3:
<> 144:ef7eb2e8f9f7 1114 tmp_jdr = hadc->Instance->JDR3;
<> 144:ef7eb2e8f9f7 1115 break;
<> 144:ef7eb2e8f9f7 1116 case ADC_INJECTED_RANK_2:
<> 144:ef7eb2e8f9f7 1117 tmp_jdr = hadc->Instance->JDR2;
<> 144:ef7eb2e8f9f7 1118 break;
<> 144:ef7eb2e8f9f7 1119 case ADC_INJECTED_RANK_1:
<> 144:ef7eb2e8f9f7 1120 default:
<> 144:ef7eb2e8f9f7 1121 tmp_jdr = hadc->Instance->JDR1;
<> 144:ef7eb2e8f9f7 1122 break;
<> 144:ef7eb2e8f9f7 1123 }
<> 144:ef7eb2e8f9f7 1124
<> 144:ef7eb2e8f9f7 1125 /* Return ADC converted value */
<> 144:ef7eb2e8f9f7 1126 return tmp_jdr;
<> 144:ef7eb2e8f9f7 1127 }
<> 144:ef7eb2e8f9f7 1128
<> 144:ef7eb2e8f9f7 1129 /**
AnnaBridge 167:e84263d55307 1130 * @brief Injected conversion complete callback in non-blocking mode.
AnnaBridge 181:57724642e740 1131 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1132 * @retval None
<> 144:ef7eb2e8f9f7 1133 */
<> 144:ef7eb2e8f9f7 1134 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1135 {
<> 144:ef7eb2e8f9f7 1136 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1137 UNUSED(hadc);
AnnaBridge 167:e84263d55307 1138
<> 144:ef7eb2e8f9f7 1139 /* NOTE : This function should not be modified. When the callback is needed,
<> 144:ef7eb2e8f9f7 1140 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
<> 144:ef7eb2e8f9f7 1141 */
<> 144:ef7eb2e8f9f7 1142 }
<> 144:ef7eb2e8f9f7 1143
<> 144:ef7eb2e8f9f7 1144 /**
AnnaBridge 167:e84263d55307 1145 * @brief Injected context queue overflow callback.
<> 144:ef7eb2e8f9f7 1146 * @note This callback is called if injected context queue is enabled
<> 144:ef7eb2e8f9f7 1147 (parameter "QueueInjectedContext" in injected channel configuration)
<> 144:ef7eb2e8f9f7 1148 and if a new injected context is set when queue is full (maximum 2
<> 144:ef7eb2e8f9f7 1149 contexts).
AnnaBridge 181:57724642e740 1150 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1151 * @retval None
<> 144:ef7eb2e8f9f7 1152 */
<> 144:ef7eb2e8f9f7 1153 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1154 {
<> 144:ef7eb2e8f9f7 1155 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1156 UNUSED(hadc);
AnnaBridge 167:e84263d55307 1157
<> 144:ef7eb2e8f9f7 1158 /* NOTE : This function should not be modified. When the callback is needed,
<> 144:ef7eb2e8f9f7 1159 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
<> 144:ef7eb2e8f9f7 1160 */
<> 144:ef7eb2e8f9f7 1161 }
<> 144:ef7eb2e8f9f7 1162
<> 144:ef7eb2e8f9f7 1163 /**
AnnaBridge 167:e84263d55307 1164 * @brief Analog watchdog 2 callback in non-blocking mode.
AnnaBridge 181:57724642e740 1165 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1166 * @retval None
<> 144:ef7eb2e8f9f7 1167 */
<> 144:ef7eb2e8f9f7 1168 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1169 {
<> 144:ef7eb2e8f9f7 1170 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1171 UNUSED(hadc);
AnnaBridge 167:e84263d55307 1172
<> 144:ef7eb2e8f9f7 1173 /* NOTE : This function should not be modified. When the callback is needed,
<> 144:ef7eb2e8f9f7 1174 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
<> 144:ef7eb2e8f9f7 1175 */
<> 144:ef7eb2e8f9f7 1176 }
<> 144:ef7eb2e8f9f7 1177
<> 144:ef7eb2e8f9f7 1178 /**
AnnaBridge 167:e84263d55307 1179 * @brief Analog watchdog 3 callback in non-blocking mode.
AnnaBridge 181:57724642e740 1180 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1181 * @retval None
<> 144:ef7eb2e8f9f7 1182 */
<> 144:ef7eb2e8f9f7 1183 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1184 {
<> 144:ef7eb2e8f9f7 1185 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1186 UNUSED(hadc);
AnnaBridge 167:e84263d55307 1187
<> 144:ef7eb2e8f9f7 1188 /* NOTE : This function should not be modified. When the callback is needed,
<> 144:ef7eb2e8f9f7 1189 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
<> 144:ef7eb2e8f9f7 1190 */
<> 144:ef7eb2e8f9f7 1191 }
<> 144:ef7eb2e8f9f7 1192
<> 144:ef7eb2e8f9f7 1193
<> 144:ef7eb2e8f9f7 1194 /**
AnnaBridge 167:e84263d55307 1195 * @brief End Of Sampling callback in non-blocking mode.
AnnaBridge 181:57724642e740 1196 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1197 * @retval None
<> 144:ef7eb2e8f9f7 1198 */
<> 144:ef7eb2e8f9f7 1199 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1200 {
<> 144:ef7eb2e8f9f7 1201 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1202 UNUSED(hadc);
AnnaBridge 167:e84263d55307 1203
<> 144:ef7eb2e8f9f7 1204 /* NOTE : This function should not be modified. When the callback is needed,
<> 144:ef7eb2e8f9f7 1205 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
<> 144:ef7eb2e8f9f7 1206 */
<> 144:ef7eb2e8f9f7 1207 }
<> 144:ef7eb2e8f9f7 1208
AnnaBridge 167:e84263d55307 1209 /**
AnnaBridge 167:e84263d55307 1210 * @brief Stop ADC conversion of regular group (and injected channels in
AnnaBridge 167:e84263d55307 1211 * case of auto_injection mode), disable ADC peripheral if no
AnnaBridge 167:e84263d55307 1212 * conversion is on going on injected group.
AnnaBridge 181:57724642e740 1213 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1214 * @retval HAL status.
<> 144:ef7eb2e8f9f7 1215 */
<> 144:ef7eb2e8f9f7 1216 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc)
AnnaBridge 167:e84263d55307 1217 {
AnnaBridge 167:e84263d55307 1218 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1219
<> 144:ef7eb2e8f9f7 1220 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1221 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1222
<> 144:ef7eb2e8f9f7 1223 /* Process locked */
<> 144:ef7eb2e8f9f7 1224 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 1225
<> 144:ef7eb2e8f9f7 1226 /* 1. Stop potential regular conversion on going */
AnnaBridge 167:e84263d55307 1227 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
<> 144:ef7eb2e8f9f7 1228
<> 144:ef7eb2e8f9f7 1229 /* Disable ADC peripheral if regular conversions are effectively stopped
<> 144:ef7eb2e8f9f7 1230 and if no injected conversions are on-going */
AnnaBridge 167:e84263d55307 1231 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1232 {
<> 144:ef7eb2e8f9f7 1233 /* Clear HAL_ADC_STATE_REG_BUSY bit */
<> 144:ef7eb2e8f9f7 1234 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
<> 144:ef7eb2e8f9f7 1235
<> 144:ef7eb2e8f9f7 1236 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1237 {
<> 144:ef7eb2e8f9f7 1238 /* 2. Disable the ADC peripheral */
AnnaBridge 167:e84263d55307 1239 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 1240
<> 144:ef7eb2e8f9f7 1241 /* Check if ADC is effectively disabled */
AnnaBridge 167:e84263d55307 1242 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1243 {
AnnaBridge 181:57724642e740 1244 /* Set ADC state */
AnnaBridge 181:57724642e740 1245 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 1246 HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 1247 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 1248 }
<> 144:ef7eb2e8f9f7 1249 }
<> 144:ef7eb2e8f9f7 1250 /* Conversion on injected group is stopped, but ADC not disabled since */
<> 144:ef7eb2e8f9f7 1251 /* conversion on regular group is still running. */
<> 144:ef7eb2e8f9f7 1252 else
<> 144:ef7eb2e8f9f7 1253 {
<> 144:ef7eb2e8f9f7 1254 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 1255 }
<> 144:ef7eb2e8f9f7 1256 }
AnnaBridge 167:e84263d55307 1257
<> 144:ef7eb2e8f9f7 1258 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1259 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1260
<> 144:ef7eb2e8f9f7 1261 /* Return function status */
AnnaBridge 167:e84263d55307 1262 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 1263 }
<> 144:ef7eb2e8f9f7 1264
<> 144:ef7eb2e8f9f7 1265
AnnaBridge 167:e84263d55307 1266 /**
AnnaBridge 167:e84263d55307 1267 * @brief Stop ADC conversion of ADC groups regular and injected,
AnnaBridge 167:e84263d55307 1268 * disable interrution of end-of-conversion,
AnnaBridge 167:e84263d55307 1269 * disable ADC peripheral if no conversion is on going
AnnaBridge 167:e84263d55307 1270 * on injected group.
AnnaBridge 181:57724642e740 1271 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1272 * @retval HAL status.
AnnaBridge 167:e84263d55307 1273 */
<> 144:ef7eb2e8f9f7 1274 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1275 {
AnnaBridge 167:e84263d55307 1276 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1277
<> 144:ef7eb2e8f9f7 1278 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1279 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1280
<> 144:ef7eb2e8f9f7 1281 /* Process locked */
<> 144:ef7eb2e8f9f7 1282 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 1283
<> 144:ef7eb2e8f9f7 1284 /* 1. Stop potential regular conversion on going */
AnnaBridge 167:e84263d55307 1285 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
<> 144:ef7eb2e8f9f7 1286
<> 144:ef7eb2e8f9f7 1287 /* Disable ADC peripheral if conversions are effectively stopped
<> 144:ef7eb2e8f9f7 1288 and if no injected conversion is on-going */
AnnaBridge 167:e84263d55307 1289 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1290 {
<> 144:ef7eb2e8f9f7 1291 /* Clear HAL_ADC_STATE_REG_BUSY bit */
<> 144:ef7eb2e8f9f7 1292 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
AnnaBridge 167:e84263d55307 1293
<> 144:ef7eb2e8f9f7 1294 /* Disable all regular-related interrupts */
<> 144:ef7eb2e8f9f7 1295 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
<> 144:ef7eb2e8f9f7 1296
<> 144:ef7eb2e8f9f7 1297 /* 2. Disable ADC peripheral if no injected conversions are on-going */
<> 144:ef7eb2e8f9f7 1298 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1299 {
AnnaBridge 167:e84263d55307 1300 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 1301 /* if no issue reported */
AnnaBridge 167:e84263d55307 1302 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1303 {
AnnaBridge 181:57724642e740 1304 /* Set ADC state */
AnnaBridge 181:57724642e740 1305 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 1306 HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 1307 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 1308 }
<> 144:ef7eb2e8f9f7 1309 }
<> 144:ef7eb2e8f9f7 1310 else
<> 144:ef7eb2e8f9f7 1311 {
<> 144:ef7eb2e8f9f7 1312 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 1313 }
<> 144:ef7eb2e8f9f7 1314 }
AnnaBridge 167:e84263d55307 1315
<> 144:ef7eb2e8f9f7 1316 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1317 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1318
<> 144:ef7eb2e8f9f7 1319 /* Return function status */
AnnaBridge 167:e84263d55307 1320 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 1321 }
<> 144:ef7eb2e8f9f7 1322
<> 144:ef7eb2e8f9f7 1323 /**
AnnaBridge 167:e84263d55307 1324 * @brief Stop ADC conversion of regular group (and injected group in
AnnaBridge 167:e84263d55307 1325 * case of auto_injection mode), disable ADC DMA transfer, disable
AnnaBridge 167:e84263d55307 1326 * ADC peripheral if no conversion is on going
AnnaBridge 167:e84263d55307 1327 * on injected group.
<> 144:ef7eb2e8f9f7 1328 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
<> 144:ef7eb2e8f9f7 1329 * For multimode (when multimode feature is available),
<> 144:ef7eb2e8f9f7 1330 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
AnnaBridge 181:57724642e740 1331 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 1332 * @retval HAL status.
<> 144:ef7eb2e8f9f7 1333 */
<> 144:ef7eb2e8f9f7 1334 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc)
AnnaBridge 167:e84263d55307 1335 {
AnnaBridge 167:e84263d55307 1336 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1337
<> 144:ef7eb2e8f9f7 1338 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1339 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
AnnaBridge 167:e84263d55307 1340
<> 144:ef7eb2e8f9f7 1341 /* Process locked */
<> 144:ef7eb2e8f9f7 1342 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 1343
<> 144:ef7eb2e8f9f7 1344 /* 1. Stop potential regular conversion on going */
AnnaBridge 167:e84263d55307 1345 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
<> 144:ef7eb2e8f9f7 1346
<> 144:ef7eb2e8f9f7 1347 /* Disable ADC peripheral if conversions are effectively stopped
<> 144:ef7eb2e8f9f7 1348 and if no injected conversion is on-going */
AnnaBridge 167:e84263d55307 1349 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1350 {
<> 144:ef7eb2e8f9f7 1351 /* Clear HAL_ADC_STATE_REG_BUSY bit */
<> 144:ef7eb2e8f9f7 1352 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
<> 144:ef7eb2e8f9f7 1353
<> 144:ef7eb2e8f9f7 1354 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
<> 144:ef7eb2e8f9f7 1355 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
<> 144:ef7eb2e8f9f7 1358 /* while DMA transfer is on going) */
AnnaBridge 167:e84263d55307 1359 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
<> 144:ef7eb2e8f9f7 1360
<> 144:ef7eb2e8f9f7 1361 /* Check if DMA channel effectively disabled */
AnnaBridge 167:e84263d55307 1362 if (tmp_hal_status != HAL_OK)
<> 144:ef7eb2e8f9f7 1363 {
<> 144:ef7eb2e8f9f7 1364 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1365 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
<> 144:ef7eb2e8f9f7 1366 }
<> 144:ef7eb2e8f9f7 1367
<> 144:ef7eb2e8f9f7 1368 /* Disable ADC overrun interrupt */
<> 144:ef7eb2e8f9f7 1369 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
<> 144:ef7eb2e8f9f7 1370
<> 144:ef7eb2e8f9f7 1371 /* 2. Disable the ADC peripheral */
AnnaBridge 167:e84263d55307 1372 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
<> 144:ef7eb2e8f9f7 1373 /* memory a potential failing status. */
<> 144:ef7eb2e8f9f7 1374 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1375 {
AnnaBridge 167:e84263d55307 1376 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1377 {
AnnaBridge 167:e84263d55307 1378 tmp_hal_status = ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 1379 }
<> 144:ef7eb2e8f9f7 1380 else
<> 144:ef7eb2e8f9f7 1381 {
<> 144:ef7eb2e8f9f7 1382 ADC_Disable(hadc);
<> 144:ef7eb2e8f9f7 1383 }
AnnaBridge 167:e84263d55307 1384
<> 144:ef7eb2e8f9f7 1385 /* Check if ADC is effectively disabled */
AnnaBridge 167:e84263d55307 1386 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1387 {
AnnaBridge 181:57724642e740 1388 /* Set ADC state */
AnnaBridge 181:57724642e740 1389 ADC_STATE_CLR_SET(hadc->State,
AnnaBridge 181:57724642e740 1390 HAL_ADC_STATE_INJ_BUSY,
AnnaBridge 181:57724642e740 1391 HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 1392 }
<> 144:ef7eb2e8f9f7 1393 }
<> 144:ef7eb2e8f9f7 1394 else
<> 144:ef7eb2e8f9f7 1395 {
<> 144:ef7eb2e8f9f7 1396 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 144:ef7eb2e8f9f7 1397 }
<> 144:ef7eb2e8f9f7 1398 }
AnnaBridge 167:e84263d55307 1399
<> 144:ef7eb2e8f9f7 1400 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1401 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1402
<> 144:ef7eb2e8f9f7 1403 /* Return function status */
AnnaBridge 167:e84263d55307 1404 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 1405 }
<> 144:ef7eb2e8f9f7 1406
AnnaBridge 181:57724642e740 1407 #if defined(ADC_MULTIMODE_SUPPORT)
<> 144:ef7eb2e8f9f7 1408 /**
<> 144:ef7eb2e8f9f7 1409 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
<> 144:ef7eb2e8f9f7 1410 * @note Multimode is kept enabled after this function. Multimode DMA bits
<> 144:ef7eb2e8f9f7 1411 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
<> 144:ef7eb2e8f9f7 1412 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
<> 144:ef7eb2e8f9f7 1413 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
<> 144:ef7eb2e8f9f7 1414 * resort to HAL_ADCEx_DisableMultiMode() API.
<> 144:ef7eb2e8f9f7 1415 * @note In case of DMA configured in circular mode, function
<> 144:ef7eb2e8f9f7 1416 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
<> 144:ef7eb2e8f9f7 1417 * ADC slave, to properly disable the DMA channel.
AnnaBridge 181:57724642e740 1418 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
AnnaBridge 167:e84263d55307 1419 * @retval HAL status
<> 144:ef7eb2e8f9f7 1420 */
<> 144:ef7eb2e8f9f7 1421 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 1422 {
AnnaBridge 167:e84263d55307 1423 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1424 uint32_t tickstart;
<> 144:ef7eb2e8f9f7 1425 ADC_HandleTypeDef tmphadcSlave;
<> 144:ef7eb2e8f9f7 1426
<> 144:ef7eb2e8f9f7 1427 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1428 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1429
<> 144:ef7eb2e8f9f7 1430 /* Process locked */
<> 144:ef7eb2e8f9f7 1431 __HAL_LOCK(hadc);
<> 144:ef7eb2e8f9f7 1432
AnnaBridge 167:e84263d55307 1433
<> 144:ef7eb2e8f9f7 1434 /* 1. Stop potential multimode conversion on going, on regular groups */
AnnaBridge 167:e84263d55307 1435 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
AnnaBridge 167:e84263d55307 1436
<> 144:ef7eb2e8f9f7 1437 /* Disable ADC peripheral if conversions are effectively stopped */
AnnaBridge 167:e84263d55307 1438 if (tmp_hal_status == HAL_OK)
AnnaBridge 167:e84263d55307 1439 {
AnnaBridge 167:e84263d55307 1440 /* Clear HAL_ADC_STATE_REG_BUSY bit */
<> 144:ef7eb2e8f9f7 1441 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
<> 144:ef7eb2e8f9f7 1442
<> 144:ef7eb2e8f9f7 1443 /* Set a temporary handle of the ADC slave associated to the ADC master */
<> 144:ef7eb2e8f9f7 1444 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
<> 144:ef7eb2e8f9f7 1445
<> 144:ef7eb2e8f9f7 1446 if (tmphadcSlave.Instance == NULL)
<> 144:ef7eb2e8f9f7 1447 {
<> 144:ef7eb2e8f9f7 1448 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1449 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 1450
<> 144:ef7eb2e8f9f7 1451 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1452 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1453
<> 144:ef7eb2e8f9f7 1454 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1455 }
<> 144:ef7eb2e8f9f7 1456
<> 144:ef7eb2e8f9f7 1457 /* Procedure to disable the ADC peripheral: wait for conversions */
<> 144:ef7eb2e8f9f7 1458 /* effectively stopped (ADC master and ADC slave), then disable ADC */
<> 144:ef7eb2e8f9f7 1459
<> 144:ef7eb2e8f9f7 1460 /* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
<> 144:ef7eb2e8f9f7 1461 tickstart = HAL_GetTick();
AnnaBridge 167:e84263d55307 1462
<> 144:ef7eb2e8f9f7 1463 while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) ||
<> 144:ef7eb2e8f9f7 1464 ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
<> 144:ef7eb2e8f9f7 1465 {
<> 144:ef7eb2e8f9f7 1466 if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
<> 144:ef7eb2e8f9f7 1467 {
<> 144:ef7eb2e8f9f7 1468 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1469 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
<> 144:ef7eb2e8f9f7 1470
<> 144:ef7eb2e8f9f7 1471 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1472 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1473
<> 144:ef7eb2e8f9f7 1474 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1475 }
<> 144:ef7eb2e8f9f7 1476 }
<> 144:ef7eb2e8f9f7 1477
<> 144:ef7eb2e8f9f7 1478 /* Disable the DMA channel (in case of DMA in circular mode or stop */
<> 144:ef7eb2e8f9f7 1479 /* while DMA transfer is on going) */
<> 144:ef7eb2e8f9f7 1480 /* Note: DMA channel of ADC slave should be stopped after this function */
<> 144:ef7eb2e8f9f7 1481 /* with HAL_ADCEx_RegularStop_DMA() API. */
AnnaBridge 167:e84263d55307 1482 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
<> 144:ef7eb2e8f9f7 1483
<> 144:ef7eb2e8f9f7 1484 /* Check if DMA channel effectively disabled */
AnnaBridge 167:e84263d55307 1485 if (tmp_hal_status != HAL_OK)
<> 144:ef7eb2e8f9f7 1486 {
<> 144:ef7eb2e8f9f7 1487 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1488 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
<> 144:ef7eb2e8f9f7 1489 }
<> 144:ef7eb2e8f9f7 1490
<> 144:ef7eb2e8f9f7 1491 /* Disable ADC overrun interrupt */
<> 144:ef7eb2e8f9f7 1492 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
<> 144:ef7eb2e8f9f7 1493
<> 144:ef7eb2e8f9f7 1494 /* 2. Disable the ADC peripherals: master and slave if no injected */
<> 144:ef7eb2e8f9f7 1495 /* conversion is on-going. */
AnnaBridge 167:e84263d55307 1496 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
<> 144:ef7eb2e8f9f7 1497 /* memory a potential failing status. */
AnnaBridge 167:e84263d55307 1498 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1499 {
<> 144:ef7eb2e8f9f7 1500 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1501 {
AnnaBridge 167:e84263d55307 1502 tmp_hal_status = ADC_Disable(hadc);
AnnaBridge 167:e84263d55307 1503 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1504 {
<> 144:ef7eb2e8f9f7 1505 if (ADC_IS_CONVERSION_ONGOING_INJECTED(&tmphadcSlave) == RESET)
<> 144:ef7eb2e8f9f7 1506 {
AnnaBridge 167:e84263d55307 1507 tmp_hal_status = ADC_Disable(&tmphadcSlave);
<> 144:ef7eb2e8f9f7 1508 }
<> 144:ef7eb2e8f9f7 1509 }
<> 144:ef7eb2e8f9f7 1510 }
<> 144:ef7eb2e8f9f7 1511
AnnaBridge 167:e84263d55307 1512 if (tmp_hal_status == HAL_OK)
<> 144:ef7eb2e8f9f7 1513 {
<> 144:ef7eb2e8f9f7 1514 /* Both Master and Slave ADC's could be disabled. Update Master State */
<> 144:ef7eb2e8f9f7 1515 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
<> 144:ef7eb2e8f9f7 1516 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
<> 144:ef7eb2e8f9f7 1517 }
<> 144:ef7eb2e8f9f7 1518 else
<> 144:ef7eb2e8f9f7 1519 {
<> 144:ef7eb2e8f9f7 1520 /* injected (Master or Slave) conversions are still on-going,
<> 144:ef7eb2e8f9f7 1521 no Master State change */
<> 144:ef7eb2e8f9f7 1522 }
<> 144:ef7eb2e8f9f7 1523 }
<> 144:ef7eb2e8f9f7 1524 }
<> 144:ef7eb2e8f9f7 1525
<> 144:ef7eb2e8f9f7 1526 /* Process unlocked */
<> 144:ef7eb2e8f9f7 1527 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 1528
<> 144:ef7eb2e8f9f7 1529 /* Return function status */
AnnaBridge 167:e84263d55307 1530 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 1531 }
AnnaBridge 181:57724642e740 1532 #endif /* ADC_MULTIMODE_SUPPORT */
<> 144:ef7eb2e8f9f7 1533
<> 144:ef7eb2e8f9f7 1534 /**
<> 144:ef7eb2e8f9f7 1535 * @}
<> 144:ef7eb2e8f9f7 1536 */
<> 144:ef7eb2e8f9f7 1537
AnnaBridge 167:e84263d55307 1538 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
AnnaBridge 167:e84263d55307 1539 * @brief ADC Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 1540 *
<> 144:ef7eb2e8f9f7 1541 @verbatim
<> 144:ef7eb2e8f9f7 1542 ===============================================================================
<> 144:ef7eb2e8f9f7 1543 ##### Peripheral Control functions #####
AnnaBridge 167:e84263d55307 1544 ===============================================================================
<> 144:ef7eb2e8f9f7 1545 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 1546 (+) Configure channels on injected group
<> 144:ef7eb2e8f9f7 1547 (+) Configure multimode when multimode feature is available
<> 144:ef7eb2e8f9f7 1548 (+) Enable or Disable Injected Queue
<> 144:ef7eb2e8f9f7 1549 (+) Disable ADC voltage regulator
AnnaBridge 167:e84263d55307 1550 (+) Enter ADC deep-power-down mode
<> 144:ef7eb2e8f9f7 1551
<> 144:ef7eb2e8f9f7 1552 @endverbatim
<> 144:ef7eb2e8f9f7 1553 * @{
<> 144:ef7eb2e8f9f7 1554 */
<> 144:ef7eb2e8f9f7 1555
AnnaBridge 167:e84263d55307 1556 /**
AnnaBridge 167:e84263d55307 1557 * @brief Configure a channel to be assigned to ADC group injected.
<> 144:ef7eb2e8f9f7 1558 * @note Possibility to update parameters on the fly:
AnnaBridge 167:e84263d55307 1559 * This function initializes injected group, following calls to this
<> 144:ef7eb2e8f9f7 1560 * function can be used to reconfigure some parameters of structure
<> 144:ef7eb2e8f9f7 1561 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
AnnaBridge 167:e84263d55307 1562 * The setting of these parameters is conditioned to ADC state:
AnnaBridge 167:e84263d55307 1563 * Refer to comments of structure "ADC_InjectionConfTypeDef".
AnnaBridge 167:e84263d55307 1564 * @note In case of usage of internal measurement channels:
AnnaBridge 167:e84263d55307 1565 * Vbat/VrefInt/TempSensor.
AnnaBridge 167:e84263d55307 1566 * These internal paths can be disabled using function
AnnaBridge 167:e84263d55307 1567 * HAL_ADC_DeInit().
<> 144:ef7eb2e8f9f7 1568 * @note Caution: For Injected Context Queue use, a context must be fully
<> 144:ef7eb2e8f9f7 1569 * defined before start of injected conversion. All channels are configured
<> 144:ef7eb2e8f9f7 1570 * consecutively for the same ADC instance. Therefore, the number of calls to
<> 144:ef7eb2e8f9f7 1571 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
<> 144:ef7eb2e8f9f7 1572 * InjectedNbrOfConversion for each context.
<> 144:ef7eb2e8f9f7 1573 * - Example 1: If 1 context is intended to be used (or if there is no use of the
<> 144:ef7eb2e8f9f7 1574 * Injected Queue Context feature) and if the context contains 3 injected ranks
<> 144:ef7eb2e8f9f7 1575 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
<> 144:ef7eb2e8f9f7 1576 * called once for each channel (i.e. 3 times) before starting a conversion.
<> 144:ef7eb2e8f9f7 1577 * This function must not be called to configure a 4th injected channel:
<> 144:ef7eb2e8f9f7 1578 * it would start a new context into context queue.
<> 144:ef7eb2e8f9f7 1579 * - Example 2: If 2 contexts are intended to be used and each of them contains
<> 144:ef7eb2e8f9f7 1580 * 3 injected ranks (InjectedNbrOfConversion = 3),
<> 144:ef7eb2e8f9f7 1581 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
<> 144:ef7eb2e8f9f7 1582 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
<> 144:ef7eb2e8f9f7 1583 * start once the 1st context is set, that is after the first three
<> 144:ef7eb2e8f9f7 1584 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
AnnaBridge 181:57724642e740 1585 * @param hadc ADC handle
AnnaBridge 181:57724642e740 1586 * @param sConfigInjected Structure of ADC injected group and ADC channel for
<> 144:ef7eb2e8f9f7 1587 * injected group.
AnnaBridge 167:e84263d55307 1588 * @retval HAL status
<> 144:ef7eb2e8f9f7 1589 */
<> 144:ef7eb2e8f9f7 1590 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
<> 144:ef7eb2e8f9f7 1591 {
AnnaBridge 167:e84263d55307 1592 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 1593 uint32_t tmpOffsetShifted;
AnnaBridge 181:57724642e740 1594 uint32_t wait_loop_index = 0U;
<> 144:ef7eb2e8f9f7 1595
AnnaBridge 181:57724642e740 1596 uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
<> 144:ef7eb2e8f9f7 1597
<> 144:ef7eb2e8f9f7 1598 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1599 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 1600 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
<> 144:ef7eb2e8f9f7 1601 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
<> 144:ef7eb2e8f9f7 1602 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
<> 144:ef7eb2e8f9f7 1603 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
<> 144:ef7eb2e8f9f7 1604 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
AnnaBridge 181:57724642e740 1605 assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv));
<> 144:ef7eb2e8f9f7 1606 assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
<> 144:ef7eb2e8f9f7 1607 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
<> 144:ef7eb2e8f9f7 1608 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
<> 144:ef7eb2e8f9f7 1609
<> 144:ef7eb2e8f9f7 1610 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
<> 144:ef7eb2e8f9f7 1611 {
<> 144:ef7eb2e8f9f7 1612 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
<> 144:ef7eb2e8f9f7 1613 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
<> 144:ef7eb2e8f9f7 1614 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
<> 144:ef7eb2e8f9f7 1615 }
<> 144:ef7eb2e8f9f7 1616
<> 144:ef7eb2e8f9f7 1617
<> 144:ef7eb2e8f9f7 1618 /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
<> 144:ef7eb2e8f9f7 1619 ignored (considered as reset) */
<> 144:ef7eb2e8f9f7 1620 assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE)));
AnnaBridge 167:e84263d55307 1621
<> 144:ef7eb2e8f9f7 1622 /* JDISCEN and JAUTO bits can't be set at the same time */
<> 144:ef7eb2e8f9f7 1623 assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
AnnaBridge 167:e84263d55307 1624
<> 144:ef7eb2e8f9f7 1625 /* DISCEN and JAUTO bits can't be set at the same time */
<> 144:ef7eb2e8f9f7 1626 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
AnnaBridge 167:e84263d55307 1627
<> 144:ef7eb2e8f9f7 1628 /* Verification of channel number */
<> 144:ef7eb2e8f9f7 1629 if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
<> 144:ef7eb2e8f9f7 1630 {
<> 144:ef7eb2e8f9f7 1631 assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel));
<> 144:ef7eb2e8f9f7 1632 }
<> 144:ef7eb2e8f9f7 1633 else
<> 144:ef7eb2e8f9f7 1634 {
<> 144:ef7eb2e8f9f7 1635 assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel));
AnnaBridge 167:e84263d55307 1636 }
AnnaBridge 167:e84263d55307 1637
<> 144:ef7eb2e8f9f7 1638 /* Process locked */
<> 144:ef7eb2e8f9f7 1639 __HAL_LOCK(hadc);
AnnaBridge 167:e84263d55307 1640
AnnaBridge 167:e84263d55307 1641 /* Configuration of injected group sequencer: */
<> 144:ef7eb2e8f9f7 1642 /* Hardware constraint: Must fully define injected context register JSQR */
<> 144:ef7eb2e8f9f7 1643 /* before make it entering into injected sequencer queue. */
<> 144:ef7eb2e8f9f7 1644 /* */
<> 144:ef7eb2e8f9f7 1645 /* - if scan mode is disabled: */
<> 144:ef7eb2e8f9f7 1646 /* * Injected channels sequence length is set to 0x00: 1 channel */
<> 144:ef7eb2e8f9f7 1647 /* converted (channel on injected rank 1) */
<> 144:ef7eb2e8f9f7 1648 /* Parameter "InjectedNbrOfConversion" is discarded. */
<> 144:ef7eb2e8f9f7 1649 /* * Injected context register JSQR setting is simple: register is fully */
<> 144:ef7eb2e8f9f7 1650 /* defined on one call of this function (for injected rank 1) and can */
<> 144:ef7eb2e8f9f7 1651 /* be entered into queue directly. */
<> 144:ef7eb2e8f9f7 1652 /* - if scan mode is enabled: */
<> 144:ef7eb2e8f9f7 1653 /* * Injected channels sequence length is set to parameter */
<> 144:ef7eb2e8f9f7 1654 /* "InjectedNbrOfConversion". */
<> 144:ef7eb2e8f9f7 1655 /* * Injected context register JSQR setting more complex: register is */
<> 144:ef7eb2e8f9f7 1656 /* fully defined over successive calls of this function, for each */
<> 144:ef7eb2e8f9f7 1657 /* injected channel rank. It is entered into queue only when all */
<> 144:ef7eb2e8f9f7 1658 /* injected ranks have been set. */
<> 144:ef7eb2e8f9f7 1659 /* Note: Scan mode is not present by hardware on this device, but used */
<> 144:ef7eb2e8f9f7 1660 /* by software for alignment over all STM32 devices. */
AnnaBridge 181:57724642e740 1661
<> 144:ef7eb2e8f9f7 1662 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
AnnaBridge 181:57724642e740 1663 (sConfigInjected->InjectedNbrOfConversion == 1U) )
<> 144:ef7eb2e8f9f7 1664 {
<> 144:ef7eb2e8f9f7 1665 /* Configuration of context register JSQR: */
<> 144:ef7eb2e8f9f7 1666 /* - number of ranks in injected group sequencer: fixed to 1st rank */
<> 144:ef7eb2e8f9f7 1667 /* (scan mode disabled, only rank 1 used) */
<> 144:ef7eb2e8f9f7 1668 /* - external trigger to start conversion */
<> 144:ef7eb2e8f9f7 1669 /* - external trigger polarity */
<> 144:ef7eb2e8f9f7 1670 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
<> 144:ef7eb2e8f9f7 1671
<> 144:ef7eb2e8f9f7 1672 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
<> 144:ef7eb2e8f9f7 1673 {
<> 144:ef7eb2e8f9f7 1674 /* Enable external trigger if trigger selection is different of */
<> 144:ef7eb2e8f9f7 1675 /* software start. */
<> 144:ef7eb2e8f9f7 1676 /* Note: This configuration keeps the hardware feature of parameter */
<> 144:ef7eb2e8f9f7 1677 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
<> 144:ef7eb2e8f9f7 1678 /* software start. */
AnnaBridge 181:57724642e740 1679 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
<> 144:ef7eb2e8f9f7 1680 {
AnnaBridge 181:57724642e740 1681 tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
AnnaBridge 181:57724642e740 1682 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
AnnaBridge 181:57724642e740 1683 | sConfigInjected->ExternalTrigInjecConvEdge
AnnaBridge 181:57724642e740 1684 );
<> 144:ef7eb2e8f9f7 1685 }
<> 144:ef7eb2e8f9f7 1686 else
<> 144:ef7eb2e8f9f7 1687 {
AnnaBridge 181:57724642e740 1688 tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) );
<> 144:ef7eb2e8f9f7 1689 }
<> 144:ef7eb2e8f9f7 1690
<> 144:ef7eb2e8f9f7 1691 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
<> 144:ef7eb2e8f9f7 1692 /* For debug and informative reasons, hadc handle saves JSQR setting */
<> 144:ef7eb2e8f9f7 1693 hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
<> 144:ef7eb2e8f9f7 1694
<> 144:ef7eb2e8f9f7 1695 }
<> 144:ef7eb2e8f9f7 1696 }
<> 144:ef7eb2e8f9f7 1697 else
<> 144:ef7eb2e8f9f7 1698 {
<> 144:ef7eb2e8f9f7 1699 /* Case of scan mode enabled, several channels to set into injected group */
<> 144:ef7eb2e8f9f7 1700 /* sequencer. */
<> 144:ef7eb2e8f9f7 1701 /* */
<> 144:ef7eb2e8f9f7 1702 /* Procedure to define injected context register JSQR over successive */
<> 144:ef7eb2e8f9f7 1703 /* calls of this function, for each injected channel rank: */
<> 144:ef7eb2e8f9f7 1704 /* 1. Start new context and set parameters related to all injected */
<> 144:ef7eb2e8f9f7 1705 /* channels: injected sequence length and trigger. */
<> 144:ef7eb2e8f9f7 1706
<> 144:ef7eb2e8f9f7 1707 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
<> 144:ef7eb2e8f9f7 1708 /* call of the context under setting */
AnnaBridge 181:57724642e740 1709 if (hadc->InjectionConfig.ChannelCount == 0U)
<> 144:ef7eb2e8f9f7 1710 {
<> 144:ef7eb2e8f9f7 1711 /* Initialize number of channels that will be configured on the context */
<> 144:ef7eb2e8f9f7 1712 /* being built */
<> 144:ef7eb2e8f9f7 1713 hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
<> 144:ef7eb2e8f9f7 1714 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
<> 144:ef7eb2e8f9f7 1715 call, this context will be written in JSQR register at the last call.
<> 144:ef7eb2e8f9f7 1716 At this point, the context is merely reset */
AnnaBridge 181:57724642e740 1717 hadc->InjectionConfig.ContextQueue = 0x00000000U;
AnnaBridge 167:e84263d55307 1718
<> 144:ef7eb2e8f9f7 1719 /* Configuration of context register JSQR: */
<> 144:ef7eb2e8f9f7 1720 /* - number of ranks in injected group sequencer */
<> 144:ef7eb2e8f9f7 1721 /* - external trigger to start conversion */
<> 144:ef7eb2e8f9f7 1722 /* - external trigger polarity */
AnnaBridge 167:e84263d55307 1723
<> 144:ef7eb2e8f9f7 1724 /* Enable external trigger if trigger selection is different of */
<> 144:ef7eb2e8f9f7 1725 /* software start. */
<> 144:ef7eb2e8f9f7 1726 /* Note: This configuration keeps the hardware feature of parameter */
<> 144:ef7eb2e8f9f7 1727 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
<> 144:ef7eb2e8f9f7 1728 /* software start. */
AnnaBridge 181:57724642e740 1729 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
AnnaBridge 167:e84263d55307 1730 {
AnnaBridge 181:57724642e740 1731 tmp_JSQR_ContextQueueBeingBuilt = ( (sConfigInjected->InjectedNbrOfConversion - 1U)
AnnaBridge 181:57724642e740 1732 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
AnnaBridge 181:57724642e740 1733 | sConfigInjected->ExternalTrigInjecConvEdge
AnnaBridge 181:57724642e740 1734 );
<> 144:ef7eb2e8f9f7 1735 }
<> 144:ef7eb2e8f9f7 1736 else
<> 144:ef7eb2e8f9f7 1737 {
AnnaBridge 181:57724642e740 1738 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U) );
<> 144:ef7eb2e8f9f7 1739 }
<> 144:ef7eb2e8f9f7 1740
AnnaBridge 181:57724642e740 1741 }
<> 144:ef7eb2e8f9f7 1742
<> 144:ef7eb2e8f9f7 1743 /* 2. Continue setting of context under definition with parameter */
AnnaBridge 167:e84263d55307 1744 /* related to each channel: channel rank sequence */
<> 144:ef7eb2e8f9f7 1745 /* Clear the old JSQx bits for the selected rank */
<> 144:ef7eb2e8f9f7 1746 tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
<> 144:ef7eb2e8f9f7 1747
<> 144:ef7eb2e8f9f7 1748 /* Set the JSQx bits for the selected rank */
<> 144:ef7eb2e8f9f7 1749 tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
AnnaBridge 181:57724642e740 1750
<> 144:ef7eb2e8f9f7 1751 /* Decrease channel count */
<> 144:ef7eb2e8f9f7 1752 hadc->InjectionConfig.ChannelCount--;
<> 144:ef7eb2e8f9f7 1753
<> 144:ef7eb2e8f9f7 1754 /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
<> 144:ef7eb2e8f9f7 1755 call, aggregate the setting to those already built during the previous
<> 144:ef7eb2e8f9f7 1756 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
<> 144:ef7eb2e8f9f7 1757 hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
AnnaBridge 167:e84263d55307 1758
<> 144:ef7eb2e8f9f7 1759 /* 4. End of context setting: if this is the last channel set, then write context
<> 144:ef7eb2e8f9f7 1760 into register JSQR and make it enter into queue */
AnnaBridge 181:57724642e740 1761 if (hadc->InjectionConfig.ChannelCount == 0U)
<> 144:ef7eb2e8f9f7 1762 {
<> 144:ef7eb2e8f9f7 1763 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
<> 144:ef7eb2e8f9f7 1764 }
AnnaBridge 167:e84263d55307 1765 }
<> 144:ef7eb2e8f9f7 1766
<> 144:ef7eb2e8f9f7 1767 /* Parameters update conditioned to ADC state: */
<> 144:ef7eb2e8f9f7 1768 /* Parameters that can be updated when ADC is disabled or enabled without */
<> 144:ef7eb2e8f9f7 1769 /* conversion on going on injected group: */
<> 144:ef7eb2e8f9f7 1770 /* - Injected context queue: Queue disable (active context is kept) or */
<> 144:ef7eb2e8f9f7 1771 /* enable (context decremented, up to 2 contexts queued) */
<> 144:ef7eb2e8f9f7 1772 /* - Injected discontinuous mode: can be enabled only if auto-injected */
<> 144:ef7eb2e8f9f7 1773 /* mode is disabled. */
<> 144:ef7eb2e8f9f7 1774 if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1775 {
<> 144:ef7eb2e8f9f7 1776 /* If auto-injected mode is disabled: no constraint */
<> 144:ef7eb2e8f9f7 1777 if (sConfigInjected->AutoInjectedConv == DISABLE)
<> 144:ef7eb2e8f9f7 1778 {
<> 144:ef7eb2e8f9f7 1779 MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
<> 144:ef7eb2e8f9f7 1780 ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) |
<> 144:ef7eb2e8f9f7 1781 ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) );
<> 144:ef7eb2e8f9f7 1782 }
AnnaBridge 181:57724642e740 1783 /* If auto-injected mode is enabled: Injected discontinuous setting is */
<> 144:ef7eb2e8f9f7 1784 /* discarded. */
<> 144:ef7eb2e8f9f7 1785 else
<> 144:ef7eb2e8f9f7 1786 {
<> 144:ef7eb2e8f9f7 1787 MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
<> 144:ef7eb2e8f9f7 1788 ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) );
<> 144:ef7eb2e8f9f7 1789 }
<> 144:ef7eb2e8f9f7 1790
<> 144:ef7eb2e8f9f7 1791 }
<> 144:ef7eb2e8f9f7 1792
<> 144:ef7eb2e8f9f7 1793 /* Parameters update conditioned to ADC state: */
<> 144:ef7eb2e8f9f7 1794 /* Parameters that can be updated when ADC is disabled or enabled without */
<> 144:ef7eb2e8f9f7 1795 /* conversion on going on regular and injected groups: */
<> 144:ef7eb2e8f9f7 1796 /* - Automatic injected conversion: can be enabled if injected group */
<> 144:ef7eb2e8f9f7 1797 /* external triggers are disabled. */
<> 144:ef7eb2e8f9f7 1798 /* - Channel sampling time */
<> 144:ef7eb2e8f9f7 1799 /* - Channel offset */
<> 144:ef7eb2e8f9f7 1800 if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
AnnaBridge 167:e84263d55307 1801 {
<> 144:ef7eb2e8f9f7 1802 /* If injected group external triggers are disabled (set to injected */
<> 144:ef7eb2e8f9f7 1803 /* software start): no constraint */
<> 144:ef7eb2e8f9f7 1804 if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
<> 144:ef7eb2e8f9f7 1805 || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
<> 144:ef7eb2e8f9f7 1806 {
<> 144:ef7eb2e8f9f7 1807 if (sConfigInjected->AutoInjectedConv == ENABLE)
<> 144:ef7eb2e8f9f7 1808 {
<> 144:ef7eb2e8f9f7 1809 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
<> 144:ef7eb2e8f9f7 1810 }
<> 144:ef7eb2e8f9f7 1811 else
<> 144:ef7eb2e8f9f7 1812 {
<> 144:ef7eb2e8f9f7 1813 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
<> 144:ef7eb2e8f9f7 1814 }
<> 144:ef7eb2e8f9f7 1815 }
<> 144:ef7eb2e8f9f7 1816 /* If Automatic injected conversion was intended to be set and could not */
<> 144:ef7eb2e8f9f7 1817 /* due to injected group external triggers enabled, error is reported. */
<> 144:ef7eb2e8f9f7 1818 else
<> 144:ef7eb2e8f9f7 1819 {
<> 144:ef7eb2e8f9f7 1820 if (sConfigInjected->AutoInjectedConv == ENABLE)
<> 144:ef7eb2e8f9f7 1821 {
<> 144:ef7eb2e8f9f7 1822 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1823 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 1824
AnnaBridge 167:e84263d55307 1825 tmp_hal_status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 1826 }
<> 144:ef7eb2e8f9f7 1827 else
<> 144:ef7eb2e8f9f7 1828 {
<> 144:ef7eb2e8f9f7 1829 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
<> 144:ef7eb2e8f9f7 1830 }
<> 144:ef7eb2e8f9f7 1831 }
<> 144:ef7eb2e8f9f7 1832
<> 144:ef7eb2e8f9f7 1833 if (sConfigInjected->InjecOversamplingMode == ENABLE)
<> 144:ef7eb2e8f9f7 1834 {
<> 144:ef7eb2e8f9f7 1835 assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
<> 144:ef7eb2e8f9f7 1836 assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
<> 144:ef7eb2e8f9f7 1837
<> 144:ef7eb2e8f9f7 1838 /* JOVSE must be reset in case of triggered regular mode */
<> 144:ef7eb2e8f9f7 1839 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS)));
AnnaBridge 167:e84263d55307 1840
<> 144:ef7eb2e8f9f7 1841 /* Configuration of Injected Oversampler: */
<> 144:ef7eb2e8f9f7 1842 /* - Oversampling Ratio */
<> 144:ef7eb2e8f9f7 1843 /* - Right bit shift */
<> 144:ef7eb2e8f9f7 1844
<> 144:ef7eb2e8f9f7 1845 /* Enable OverSampling mode */
AnnaBridge 181:57724642e740 1846 MODIFY_REG(hadc->Instance->CFGR2,
AnnaBridge 181:57724642e740 1847 ADC_CFGR2_JOVSE |
AnnaBridge 181:57724642e740 1848 ADC_CFGR2_OVSR |
AnnaBridge 181:57724642e740 1849 ADC_CFGR2_OVSS,
AnnaBridge 181:57724642e740 1850 ADC_CFGR2_JOVSE |
AnnaBridge 181:57724642e740 1851 sConfigInjected->InjecOversampling.Ratio |
AnnaBridge 181:57724642e740 1852 sConfigInjected->InjecOversampling.RightBitShift
AnnaBridge 181:57724642e740 1853 );
AnnaBridge 167:e84263d55307 1854 }
<> 144:ef7eb2e8f9f7 1855 else
<> 144:ef7eb2e8f9f7 1856 {
<> 144:ef7eb2e8f9f7 1857 /* Disable Regular OverSampling */
<> 144:ef7eb2e8f9f7 1858 CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
AnnaBridge 167:e84263d55307 1859 }
AnnaBridge 167:e84263d55307 1860
AnnaBridge 181:57724642e740 1861 #if defined(ADC_SMPR1_SMPPLUS)
AnnaBridge 181:57724642e740 1862 /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */
AnnaBridge 181:57724642e740 1863 if(sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5)
AnnaBridge 181:57724642e740 1864 {
AnnaBridge 181:57724642e740 1865 /* Set sampling time of the selected ADC channel */
AnnaBridge 181:57724642e740 1866 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLINGTIME_2CYCLES_5);
AnnaBridge 181:57724642e740 1867
AnnaBridge 181:57724642e740 1868 /* Set ADC sampling time common configuration */
AnnaBridge 181:57724642e740 1869 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5);
AnnaBridge 181:57724642e740 1870 }
AnnaBridge 181:57724642e740 1871 else
AnnaBridge 181:57724642e740 1872 {
AnnaBridge 181:57724642e740 1873 /* Set sampling time of the selected ADC channel */
AnnaBridge 181:57724642e740 1874 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
AnnaBridge 181:57724642e740 1875
AnnaBridge 181:57724642e740 1876 /* Set ADC sampling time common configuration */
AnnaBridge 181:57724642e740 1877 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT);
AnnaBridge 181:57724642e740 1878 }
AnnaBridge 181:57724642e740 1879 #else
AnnaBridge 181:57724642e740 1880 /* Set sampling time of the selected ADC channel */
AnnaBridge 181:57724642e740 1881 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
AnnaBridge 181:57724642e740 1882 #endif
<> 144:ef7eb2e8f9f7 1883
<> 144:ef7eb2e8f9f7 1884 /* Configure the offset: offset enable/disable, channel, offset value */
AnnaBridge 167:e84263d55307 1885
<> 144:ef7eb2e8f9f7 1886 /* Shift the offset with respect to the selected ADC resolution. */
<> 144:ef7eb2e8f9f7 1887 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
<> 144:ef7eb2e8f9f7 1888 tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
<> 144:ef7eb2e8f9f7 1889
AnnaBridge 181:57724642e740 1890 if(sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
AnnaBridge 181:57724642e740 1891 {
AnnaBridge 181:57724642e740 1892 /* Set ADC selected offset number */
AnnaBridge 181:57724642e740 1893 LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->InjectedChannel, tmpOffsetShifted);
AnnaBridge 181:57724642e740 1894
AnnaBridge 181:57724642e740 1895 }
AnnaBridge 181:57724642e740 1896 else
<> 144:ef7eb2e8f9f7 1897 {
AnnaBridge 181:57724642e740 1898 /* Scan each offset register to check if the selected channel is targeted. */
AnnaBridge 181:57724642e740 1899 /* If this is the case, the corresponding offset number is disabled. */
AnnaBridge 181:57724642e740 1900 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
AnnaBridge 181:57724642e740 1901 {
AnnaBridge 181:57724642e740 1902 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
AnnaBridge 181:57724642e740 1903 }
AnnaBridge 181:57724642e740 1904 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
<> 144:ef7eb2e8f9f7 1905 {
AnnaBridge 181:57724642e740 1906 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
<> 144:ef7eb2e8f9f7 1907 }
AnnaBridge 181:57724642e740 1908 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
<> 144:ef7eb2e8f9f7 1909 {
AnnaBridge 181:57724642e740 1910 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
<> 144:ef7eb2e8f9f7 1911 }
AnnaBridge 181:57724642e740 1912 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
<> 144:ef7eb2e8f9f7 1913 {
AnnaBridge 181:57724642e740 1914 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
<> 144:ef7eb2e8f9f7 1915 }
<> 144:ef7eb2e8f9f7 1916 }
AnnaBridge 167:e84263d55307 1917
AnnaBridge 181:57724642e740 1918 }
<> 144:ef7eb2e8f9f7 1919
<> 144:ef7eb2e8f9f7 1920 /* Parameters update conditioned to ADC state: */
<> 144:ef7eb2e8f9f7 1921 /* Parameters that can be updated only when ADC is disabled: */
<> 144:ef7eb2e8f9f7 1922 /* - Single or differential mode */
<> 144:ef7eb2e8f9f7 1923 /* - Internal measurement channels: Vbat/VrefInt/TempSensor */
<> 144:ef7eb2e8f9f7 1924 if (ADC_IS_ENABLE(hadc) == RESET)
<> 144:ef7eb2e8f9f7 1925 {
AnnaBridge 181:57724642e740 1926 /* Set mode single-ended or differential input of the selected ADC channel */
AnnaBridge 181:57724642e740 1927 LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSingleDiff);
AnnaBridge 181:57724642e740 1928
<> 144:ef7eb2e8f9f7 1929 /* Configuration of differential mode */
AnnaBridge 181:57724642e740 1930 if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
<> 144:ef7eb2e8f9f7 1931 {
AnnaBridge 181:57724642e740 1932 /* Set sampling time of the selected ADC channel */
AnnaBridge 181:57724642e740 1933 LL_ADC_SetChannelSamplingTime(hadc->Instance, __LL_ADC_DECIMAL_NB_TO_CHANNEL(__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) + 1), sConfigInjected->InjectedSamplingTime);
<> 144:ef7eb2e8f9f7 1934 }
<> 144:ef7eb2e8f9f7 1935
<> 144:ef7eb2e8f9f7 1936 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
<> 144:ef7eb2e8f9f7 1937 /* internal measurement paths enable: If internal channel selected, */
<> 144:ef7eb2e8f9f7 1938 /* enable dedicated internal buffers and path. */
<> 144:ef7eb2e8f9f7 1939 /* Note: these internal measurement paths can be disabled using */
<> 144:ef7eb2e8f9f7 1940 /* HAL_ADC_DeInit(). */
<> 144:ef7eb2e8f9f7 1941
<> 144:ef7eb2e8f9f7 1942 /* Configuration of common ADC parameters */
<> 144:ef7eb2e8f9f7 1943 /* If the requested internal measurement path has already been enabled, */
<> 144:ef7eb2e8f9f7 1944 /* bypass the configuration processing. */
AnnaBridge 181:57724642e740 1945 if (( (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) &&
AnnaBridge 181:57724642e740 1946 ((LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0U)) ||
AnnaBridge 181:57724642e740 1947 ( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) &&
AnnaBridge 181:57724642e740 1948 ((LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) & LL_ADC_PATH_INTERNAL_VBAT) == 0U)) ||
AnnaBridge 181:57724642e740 1949 ( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) &&
AnnaBridge 181:57724642e740 1950 ((LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) & LL_ADC_PATH_INTERNAL_VREFINT) == 0U))
AnnaBridge 181:57724642e740 1951 )
<> 144:ef7eb2e8f9f7 1952 {
<> 144:ef7eb2e8f9f7 1953 /* Configuration of common ADC parameters (continuation) */
<> 144:ef7eb2e8f9f7 1954 /* Software is allowed to change common parameters only when all ADCs */
<> 144:ef7eb2e8f9f7 1955 /* of the common group are disabled. */
<> 144:ef7eb2e8f9f7 1956 if ((ADC_IS_ENABLE(hadc) == RESET) &&
<> 144:ef7eb2e8f9f7 1957 (ADC_ANY_OTHER_ENABLED(hadc) == RESET) )
<> 144:ef7eb2e8f9f7 1958 {
<> 144:ef7eb2e8f9f7 1959 if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
<> 144:ef7eb2e8f9f7 1960 {
<> 144:ef7eb2e8f9f7 1961 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
<> 144:ef7eb2e8f9f7 1962 {
AnnaBridge 181:57724642e740 1963 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)));
<> 144:ef7eb2e8f9f7 1964
<> 144:ef7eb2e8f9f7 1965 /* Delay for temperature sensor stabilization time */
<> 144:ef7eb2e8f9f7 1966 /* Compute number of CPU cycles to wait for */
AnnaBridge 181:57724642e740 1967 wait_loop_index = (LL_ADC_DELAY_TEMPSENSOR_STAB_US * (SystemCoreClock / 1000000));
<> 144:ef7eb2e8f9f7 1968 while(wait_loop_index != 0)
<> 144:ef7eb2e8f9f7 1969 {
<> 144:ef7eb2e8f9f7 1970 wait_loop_index--;
<> 144:ef7eb2e8f9f7 1971 }
<> 144:ef7eb2e8f9f7 1972 }
<> 144:ef7eb2e8f9f7 1973 }
<> 144:ef7eb2e8f9f7 1974 else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
<> 144:ef7eb2e8f9f7 1975 {
<> 144:ef7eb2e8f9f7 1976 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
<> 144:ef7eb2e8f9f7 1977 {
AnnaBridge 181:57724642e740 1978 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)));
<> 144:ef7eb2e8f9f7 1979 }
<> 144:ef7eb2e8f9f7 1980 }
<> 144:ef7eb2e8f9f7 1981 else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
<> 144:ef7eb2e8f9f7 1982 {
<> 144:ef7eb2e8f9f7 1983 if (ADC_VREFINT_INSTANCE(hadc))
<> 144:ef7eb2e8f9f7 1984 {
AnnaBridge 181:57724642e740 1985 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)));
AnnaBridge 181:57724642e740 1986 }
AnnaBridge 181:57724642e740 1987 }
<> 144:ef7eb2e8f9f7 1988 }
<> 144:ef7eb2e8f9f7 1989 /* If the requested internal measurement path has already been enabled */
<> 144:ef7eb2e8f9f7 1990 /* and other ADC of the common group are enabled, internal */
<> 144:ef7eb2e8f9f7 1991 /* measurement paths cannot be enabled. */
<> 144:ef7eb2e8f9f7 1992 else
<> 144:ef7eb2e8f9f7 1993 {
<> 144:ef7eb2e8f9f7 1994 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 1995 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 1996
AnnaBridge 167:e84263d55307 1997 tmp_hal_status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 1998 }
<> 144:ef7eb2e8f9f7 1999 }
<> 144:ef7eb2e8f9f7 2000
AnnaBridge 181:57724642e740 2001 }
<> 144:ef7eb2e8f9f7 2002
<> 144:ef7eb2e8f9f7 2003 /* Process unlocked */
<> 144:ef7eb2e8f9f7 2004 __HAL_UNLOCK(hadc);
AnnaBridge 167:e84263d55307 2005
<> 144:ef7eb2e8f9f7 2006 /* Return function status */
AnnaBridge 167:e84263d55307 2007 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 2008 }
<> 144:ef7eb2e8f9f7 2009
AnnaBridge 181:57724642e740 2010 #if defined(ADC_MULTIMODE_SUPPORT)
<> 144:ef7eb2e8f9f7 2011 /**
<> 144:ef7eb2e8f9f7 2012 * @brief Enable ADC multimode and configure multimode parameters
<> 144:ef7eb2e8f9f7 2013 * @note Possibility to update parameters on the fly:
<> 144:ef7eb2e8f9f7 2014 * This function initializes multimode parameters, following
<> 144:ef7eb2e8f9f7 2015 * calls to this function can be used to reconfigure some parameters
<> 144:ef7eb2e8f9f7 2016 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
<> 144:ef7eb2e8f9f7 2017 * the ADCs.
<> 144:ef7eb2e8f9f7 2018 * The setting of these parameters is conditioned to ADC state.
<> 144:ef7eb2e8f9f7 2019 * For parameters constraints, see comments of structure
<> 144:ef7eb2e8f9f7 2020 * "ADC_MultiModeTypeDef".
<> 144:ef7eb2e8f9f7 2021 * @note To move back configuration from multimode to single mode, ADC must
<> 144:ef7eb2e8f9f7 2022 * be reset (using function HAL_ADC_Init() ).
AnnaBridge 181:57724642e740 2023 * @param hadc Master ADC handle
AnnaBridge 181:57724642e740 2024 * @param multimode Structure of ADC multimode configuration
<> 144:ef7eb2e8f9f7 2025 * @retval HAL status
<> 144:ef7eb2e8f9f7 2026 */
<> 144:ef7eb2e8f9f7 2027 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
<> 144:ef7eb2e8f9f7 2028 {
AnnaBridge 167:e84263d55307 2029 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 144:ef7eb2e8f9f7 2030 ADC_Common_TypeDef *tmpADC_Common;
<> 144:ef7eb2e8f9f7 2031 ADC_HandleTypeDef tmphadcSlave;
<> 144:ef7eb2e8f9f7 2032
<> 144:ef7eb2e8f9f7 2033 /* Check the parameters */
<> 144:ef7eb2e8f9f7 2034 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
<> 144:ef7eb2e8f9f7 2035 assert_param(IS_ADC_MULTIMODE(multimode->Mode));
<> 144:ef7eb2e8f9f7 2036 if(multimode->Mode != ADC_MODE_INDEPENDENT)
<> 144:ef7eb2e8f9f7 2037 {
<> 144:ef7eb2e8f9f7 2038 assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode));
<> 144:ef7eb2e8f9f7 2039 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
<> 144:ef7eb2e8f9f7 2040 }
<> 144:ef7eb2e8f9f7 2041
<> 144:ef7eb2e8f9f7 2042 /* Process locked */
<> 144:ef7eb2e8f9f7 2043 __HAL_LOCK(hadc);
AnnaBridge 167:e84263d55307 2044
<> 144:ef7eb2e8f9f7 2045 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
<> 144:ef7eb2e8f9f7 2046
AnnaBridge 167:e84263d55307 2047 if (tmphadcSlave.Instance == NULL)
AnnaBridge 167:e84263d55307 2048 {
AnnaBridge 167:e84263d55307 2049 /* Update ADC state machine to error */
AnnaBridge 167:e84263d55307 2050 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
AnnaBridge 167:e84263d55307 2051
AnnaBridge 167:e84263d55307 2052 /* Process unlocked */
AnnaBridge 167:e84263d55307 2053 __HAL_UNLOCK(hadc);
AnnaBridge 167:e84263d55307 2054
AnnaBridge 167:e84263d55307 2055 return HAL_ERROR;
AnnaBridge 167:e84263d55307 2056 }
AnnaBridge 167:e84263d55307 2057
<> 144:ef7eb2e8f9f7 2058 /* Parameters update conditioned to ADC state: */
<> 144:ef7eb2e8f9f7 2059 /* Parameters that can be updated when ADC is disabled or enabled without */
<> 144:ef7eb2e8f9f7 2060 /* conversion on going on regular group: */
<> 144:ef7eb2e8f9f7 2061 /* - Multimode DMA configuration */
<> 144:ef7eb2e8f9f7 2062 /* - Multimode DMA mode */
<> 144:ef7eb2e8f9f7 2063 if ( (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
<> 144:ef7eb2e8f9f7 2064 && (ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) == RESET) )
<> 144:ef7eb2e8f9f7 2065 {
<> 144:ef7eb2e8f9f7 2066 /* Pointer to the common control register */
AnnaBridge 181:57724642e740 2067 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
<> 144:ef7eb2e8f9f7 2068
<> 144:ef7eb2e8f9f7 2069 /* If multimode is selected, configure all multimode paramaters. */
<> 144:ef7eb2e8f9f7 2070 /* Otherwise, reset multimode parameters (can be used in case of */
<> 144:ef7eb2e8f9f7 2071 /* transition from multimode to independent mode). */
<> 144:ef7eb2e8f9f7 2072 if(multimode->Mode != ADC_MODE_INDEPENDENT)
<> 144:ef7eb2e8f9f7 2073 {
<> 144:ef7eb2e8f9f7 2074 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG,
<> 144:ef7eb2e8f9f7 2075 multimode->DMAAccessMode |
<> 144:ef7eb2e8f9f7 2076 ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests));
<> 144:ef7eb2e8f9f7 2077
<> 144:ef7eb2e8f9f7 2078 /* Parameters that can be updated only when ADC is disabled: */
<> 144:ef7eb2e8f9f7 2079 /* - Multimode mode selection */
<> 144:ef7eb2e8f9f7 2080 /* - Multimode delay */
<> 144:ef7eb2e8f9f7 2081 /* Note: Delay range depends on selected resolution: */
<> 144:ef7eb2e8f9f7 2082 /* from 1 to 12 clock cycles for 12 bits */
<> 144:ef7eb2e8f9f7 2083 /* from 1 to 10 clock cycles for 10 bits, */
<> 144:ef7eb2e8f9f7 2084 /* from 1 to 8 clock cycles for 8 bits */
<> 144:ef7eb2e8f9f7 2085 /* from 1 to 6 clock cycles for 6 bits */
<> 144:ef7eb2e8f9f7 2086 /* If a higher delay is selected, it will be clipped to maximum delay */
<> 144:ef7eb2e8f9f7 2087 /* range */
<> 144:ef7eb2e8f9f7 2088 if ((ADC_IS_ENABLE(hadc) == RESET) &&
<> 144:ef7eb2e8f9f7 2089 (ADC_IS_ENABLE(&tmphadcSlave) == RESET) )
<> 144:ef7eb2e8f9f7 2090 {
AnnaBridge 181:57724642e740 2091 MODIFY_REG(tmpADC_Common->CCR,
AnnaBridge 181:57724642e740 2092 ADC_CCR_DUAL |
AnnaBridge 181:57724642e740 2093 ADC_CCR_DELAY,
AnnaBridge 181:57724642e740 2094 multimode->Mode |
AnnaBridge 181:57724642e740 2095 multimode->TwoSamplingDelay
AnnaBridge 181:57724642e740 2096 );
<> 144:ef7eb2e8f9f7 2097 }
<> 144:ef7eb2e8f9f7 2098 }
<> 144:ef7eb2e8f9f7 2099 else /* ADC_MODE_INDEPENDENT */
<> 144:ef7eb2e8f9f7 2100 {
<> 144:ef7eb2e8f9f7 2101 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
<> 144:ef7eb2e8f9f7 2102
<> 144:ef7eb2e8f9f7 2103 /* Parameters that can be updated only when ADC is disabled: */
<> 144:ef7eb2e8f9f7 2104 /* - Multimode mode selection */
<> 144:ef7eb2e8f9f7 2105 /* - Multimode delay */
<> 144:ef7eb2e8f9f7 2106 if ((ADC_IS_ENABLE(hadc) == RESET) &&
<> 144:ef7eb2e8f9f7 2107 (ADC_IS_ENABLE(&tmphadcSlave) == RESET) )
<> 144:ef7eb2e8f9f7 2108 {
<> 144:ef7eb2e8f9f7 2109 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
<> 144:ef7eb2e8f9f7 2110 }
<> 144:ef7eb2e8f9f7 2111 }
<> 144:ef7eb2e8f9f7 2112 }
<> 144:ef7eb2e8f9f7 2113 /* If one of the ADC sharing the same common group is enabled, no update */
<> 144:ef7eb2e8f9f7 2114 /* could be done on neither of the multimode structure parameters. */
<> 144:ef7eb2e8f9f7 2115 else
<> 144:ef7eb2e8f9f7 2116 {
<> 144:ef7eb2e8f9f7 2117 /* Update ADC state machine to error */
<> 144:ef7eb2e8f9f7 2118 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 144:ef7eb2e8f9f7 2119
AnnaBridge 167:e84263d55307 2120 tmp_hal_status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 2121 }
AnnaBridge 167:e84263d55307 2122
<> 144:ef7eb2e8f9f7 2123 /* Process unlocked */
<> 144:ef7eb2e8f9f7 2124 __HAL_UNLOCK(hadc);
<> 144:ef7eb2e8f9f7 2125
<> 144:ef7eb2e8f9f7 2126 /* Return function status */
AnnaBridge 167:e84263d55307 2127 return tmp_hal_status;
<> 144:ef7eb2e8f9f7 2128 }
AnnaBridge 181:57724642e740 2129 #endif /* ADC_MULTIMODE_SUPPORT */
<> 144:ef7eb2e8f9f7 2130
<> 144:ef7eb2e8f9f7 2131 /**
<> 144:ef7eb2e8f9f7 2132 * @brief Enable Injected Queue
<> 144:ef7eb2e8f9f7 2133 * @note This function resets CFGR register JQDIS bit in order to enable the
<> 144:ef7eb2e8f9f7 2134 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
<> 144:ef7eb2e8f9f7 2135 * are both equal to 0 to ensure that no regular nor injected
<> 144:ef7eb2e8f9f7 2136 * conversion is ongoing.
AnnaBridge 181:57724642e740 2137 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 2138 * @retval HAL status
<> 144:ef7eb2e8f9f7 2139 */
<> 144:ef7eb2e8f9f7 2140 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 2141 {
<> 144:ef7eb2e8f9f7 2142 /* Parameter can be set only if no conversion is on-going */
<> 144:ef7eb2e8f9f7 2143 if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 2144 {
<> 144:ef7eb2e8f9f7 2145 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
<> 144:ef7eb2e8f9f7 2146
<> 144:ef7eb2e8f9f7 2147 /* Update state, clear previous result related to injected queue overflow */
<> 144:ef7eb2e8f9f7 2148 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
<> 144:ef7eb2e8f9f7 2149
<> 144:ef7eb2e8f9f7 2150 return HAL_OK;
<> 144:ef7eb2e8f9f7 2151 }
<> 144:ef7eb2e8f9f7 2152 else
<> 144:ef7eb2e8f9f7 2153 {
<> 144:ef7eb2e8f9f7 2154 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 2155 }
<> 144:ef7eb2e8f9f7 2156 }
<> 144:ef7eb2e8f9f7 2157
<> 144:ef7eb2e8f9f7 2158 /**
<> 144:ef7eb2e8f9f7 2159 * @brief Disable Injected Queue
<> 144:ef7eb2e8f9f7 2160 * @note This function sets CFGR register JQDIS bit in order to disable the
<> 144:ef7eb2e8f9f7 2161 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
<> 144:ef7eb2e8f9f7 2162 * are both equal to 0 to ensure that no regular nor injected
<> 144:ef7eb2e8f9f7 2163 * conversion is ongoing.
AnnaBridge 181:57724642e740 2164 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 2165 * @retval HAL status
<> 144:ef7eb2e8f9f7 2166 */
<> 144:ef7eb2e8f9f7 2167 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 2168 {
<> 144:ef7eb2e8f9f7 2169 /* Parameter can be set only if no conversion is on-going */
<> 144:ef7eb2e8f9f7 2170 if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
<> 144:ef7eb2e8f9f7 2171 {
<> 144:ef7eb2e8f9f7 2172 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
<> 144:ef7eb2e8f9f7 2173 return HAL_OK;
<> 144:ef7eb2e8f9f7 2174 }
<> 144:ef7eb2e8f9f7 2175 else
<> 144:ef7eb2e8f9f7 2176 {
<> 144:ef7eb2e8f9f7 2177 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 2178 }
<> 144:ef7eb2e8f9f7 2179 }
<> 144:ef7eb2e8f9f7 2180
<> 144:ef7eb2e8f9f7 2181 /**
<> 144:ef7eb2e8f9f7 2182 * @brief Disable ADC voltage regulator.
<> 144:ef7eb2e8f9f7 2183 * @note Disabling voltage regulator allows to save power. This operation can
<> 144:ef7eb2e8f9f7 2184 * be carried out only when ADC is disabled.
<> 144:ef7eb2e8f9f7 2185 * @note To enable again the voltage regulator, the user is expected to
<> 144:ef7eb2e8f9f7 2186 * resort to HAL_ADC_Init() API.
AnnaBridge 181:57724642e740 2187 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 2188 * @retval HAL status
<> 144:ef7eb2e8f9f7 2189 */
<> 144:ef7eb2e8f9f7 2190 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 2191 {
<> 144:ef7eb2e8f9f7 2192 /* ADVREGEN can be written only when the ADC is disabled */
<> 144:ef7eb2e8f9f7 2193 if (ADC_IS_ENABLE(hadc) == RESET)
<> 144:ef7eb2e8f9f7 2194 {
<> 144:ef7eb2e8f9f7 2195 CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN);
<> 144:ef7eb2e8f9f7 2196 return HAL_OK;
<> 144:ef7eb2e8f9f7 2197 }
<> 144:ef7eb2e8f9f7 2198 else
<> 144:ef7eb2e8f9f7 2199 {
<> 144:ef7eb2e8f9f7 2200 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 2201 }
<> 144:ef7eb2e8f9f7 2202 }
<> 144:ef7eb2e8f9f7 2203
<> 144:ef7eb2e8f9f7 2204 /**
<> 144:ef7eb2e8f9f7 2205 * @brief Enter ADC deep-power-down mode
<> 144:ef7eb2e8f9f7 2206 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
<> 144:ef7eb2e8f9f7 2207 * in reducing leakage currents. It is particularly interesting before
<> 144:ef7eb2e8f9f7 2208 * entering stop modes.
<> 144:ef7eb2e8f9f7 2209 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
<> 144:ef7eb2e8f9f7 2210 * ADC voltage regulator. This means that this API encompasses
<> 144:ef7eb2e8f9f7 2211 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
<> 144:ef7eb2e8f9f7 2212 * calibration is lost.
<> 144:ef7eb2e8f9f7 2213 * @note To exit the ADC deep-power-down mode, the user is expected to
<> 144:ef7eb2e8f9f7 2214 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
<> 144:ef7eb2e8f9f7 2215 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
<> 144:ef7eb2e8f9f7 2216 * saved calibration factor.
AnnaBridge 181:57724642e740 2217 * @param hadc ADC handle
<> 144:ef7eb2e8f9f7 2218 * @retval HAL status
<> 144:ef7eb2e8f9f7 2219 */
<> 144:ef7eb2e8f9f7 2220 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc)
<> 144:ef7eb2e8f9f7 2221 {
<> 144:ef7eb2e8f9f7 2222 /* DEEPPWD can be written only when the ADC is disabled */
<> 144:ef7eb2e8f9f7 2223 if (ADC_IS_ENABLE(hadc) == RESET)
<> 144:ef7eb2e8f9f7 2224 {
<> 144:ef7eb2e8f9f7 2225 SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD);
<> 144:ef7eb2e8f9f7 2226 return HAL_OK;
<> 144:ef7eb2e8f9f7 2227 }
<> 144:ef7eb2e8f9f7 2228 else
<> 144:ef7eb2e8f9f7 2229 {
<> 144:ef7eb2e8f9f7 2230 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 2231 }
<> 144:ef7eb2e8f9f7 2232 }
<> 144:ef7eb2e8f9f7 2233
<> 144:ef7eb2e8f9f7 2234 /**
<> 144:ef7eb2e8f9f7 2235 * @}
<> 144:ef7eb2e8f9f7 2236 */
<> 144:ef7eb2e8f9f7 2237
<> 144:ef7eb2e8f9f7 2238 /**
<> 144:ef7eb2e8f9f7 2239 * @}
<> 144:ef7eb2e8f9f7 2240 */
<> 144:ef7eb2e8f9f7 2241
<> 144:ef7eb2e8f9f7 2242 #endif /* HAL_ADC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 2243 /**
<> 144:ef7eb2e8f9f7 2244 * @}
<> 144:ef7eb2e8f9f7 2245 */
<> 144:ef7eb2e8f9f7 2246
<> 144:ef7eb2e8f9f7 2247 /**
<> 144:ef7eb2e8f9f7 2248 * @}
AnnaBridge 167:e84263d55307 2249 */
<> 144:ef7eb2e8f9f7 2250
<> 144:ef7eb2e8f9f7 2251 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/