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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_wwdg.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_ll_wwdg.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief Header file of WWDG LL module.
<> 149:156823d33999 6 ******************************************************************************
<> 149:156823d33999 7 * @attention
<> 149:156823d33999 8 *
AnnaBridge 184:08ed48f1de7f 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 12 * are permitted provided that the following conditions are met:
<> 149:156823d33999 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 14 * this list of conditions and the following disclaimer.
<> 149:156823d33999 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 16 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 17 * and/or other materials provided with the distribution.
<> 149:156823d33999 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 19 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 20 * without specific prior written permission.
<> 149:156823d33999 21 *
<> 149:156823d33999 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 32 *
<> 149:156823d33999 33 ******************************************************************************
<> 149:156823d33999 34 */
<> 149:156823d33999 35
<> 149:156823d33999 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 37 #ifndef __STM32L1xx_LL_WWDG_H
<> 149:156823d33999 38 #define __STM32L1xx_LL_WWDG_H
<> 149:156823d33999 39
<> 149:156823d33999 40 #ifdef __cplusplus
<> 149:156823d33999 41 extern "C" {
<> 149:156823d33999 42 #endif
<> 149:156823d33999 43
<> 149:156823d33999 44 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 45 #include "stm32l1xx.h"
<> 149:156823d33999 46
<> 149:156823d33999 47 /** @addtogroup STM32L1xx_LL_Driver
<> 149:156823d33999 48 * @{
<> 149:156823d33999 49 */
<> 149:156823d33999 50
<> 149:156823d33999 51 #if defined (WWDG)
<> 149:156823d33999 52
<> 149:156823d33999 53 /** @defgroup WWDG_LL WWDG
<> 149:156823d33999 54 * @{
<> 149:156823d33999 55 */
<> 149:156823d33999 56
<> 149:156823d33999 57 /* Private types -------------------------------------------------------------*/
<> 149:156823d33999 58 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 59
<> 149:156823d33999 60 /* Private constants ---------------------------------------------------------*/
<> 149:156823d33999 61
<> 149:156823d33999 62 /* Private macros ------------------------------------------------------------*/
<> 149:156823d33999 63
<> 149:156823d33999 64 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 65 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 66 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
<> 149:156823d33999 67 * @{
<> 149:156823d33999 68 */
<> 149:156823d33999 69
<> 149:156823d33999 70
<> 149:156823d33999 71 /** @defgroup WWDG_LL_EC_IT IT Defines
<> 149:156823d33999 72 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
<> 149:156823d33999 73 * @{
<> 149:156823d33999 74 */
<> 149:156823d33999 75 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI
<> 149:156823d33999 76 /**
<> 149:156823d33999 77 * @}
<> 149:156823d33999 78 */
<> 149:156823d33999 79
<> 149:156823d33999 80 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
<> 149:156823d33999 81 * @{
<> 149:156823d33999 82 */
AnnaBridge 184:08ed48f1de7f 83 #define LL_WWDG_PRESCALER_1 0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */
<> 149:156823d33999 84 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
<> 149:156823d33999 85 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
<> 149:156823d33999 86 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
<> 149:156823d33999 87 /**
<> 149:156823d33999 88 * @}
<> 149:156823d33999 89 */
<> 149:156823d33999 90
<> 149:156823d33999 91 /**
<> 149:156823d33999 92 * @}
<> 149:156823d33999 93 */
<> 149:156823d33999 94
<> 149:156823d33999 95 /* Exported macro ------------------------------------------------------------*/
<> 149:156823d33999 96 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
<> 149:156823d33999 97 * @{
<> 149:156823d33999 98 */
<> 149:156823d33999 99 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
<> 149:156823d33999 100 * @{
<> 149:156823d33999 101 */
<> 149:156823d33999 102 /**
<> 149:156823d33999 103 * @brief Write a value in WWDG register
<> 149:156823d33999 104 * @param __INSTANCE__ WWDG Instance
<> 149:156823d33999 105 * @param __REG__ Register to be written
<> 149:156823d33999 106 * @param __VALUE__ Value to be written in the register
<> 149:156823d33999 107 * @retval None
<> 149:156823d33999 108 */
<> 149:156823d33999 109 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 149:156823d33999 110
<> 149:156823d33999 111 /**
<> 149:156823d33999 112 * @brief Read a value in WWDG register
<> 149:156823d33999 113 * @param __INSTANCE__ WWDG Instance
<> 149:156823d33999 114 * @param __REG__ Register to be read
<> 149:156823d33999 115 * @retval Register value
<> 149:156823d33999 116 */
<> 149:156823d33999 117 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 149:156823d33999 118 /**
<> 149:156823d33999 119 * @}
<> 149:156823d33999 120 */
<> 149:156823d33999 121
<> 149:156823d33999 122
<> 149:156823d33999 123 /**
<> 149:156823d33999 124 * @}
<> 149:156823d33999 125 */
<> 149:156823d33999 126
<> 149:156823d33999 127 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 128 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
<> 149:156823d33999 129 * @{
<> 149:156823d33999 130 */
<> 149:156823d33999 131
<> 149:156823d33999 132 /** @defgroup WWDG_LL_EF_Configuration Configuration
<> 149:156823d33999 133 * @{
<> 149:156823d33999 134 */
<> 149:156823d33999 135 /**
<> 149:156823d33999 136 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset.
<> 149:156823d33999 137 * @note It is enabled by setting the WDGA bit in the WWDG_CR register,
<> 149:156823d33999 138 * then it cannot be disabled again except by a reset.
<> 149:156823d33999 139 * This bit is set by software and only cleared by hardware after a reset.
<> 149:156823d33999 140 * When WDGA = 1, the watchdog can generate a reset.
<> 149:156823d33999 141 * @rmtoll CR WDGA LL_WWDG_Enable
<> 149:156823d33999 142 * @param WWDGx WWDG Instance
<> 149:156823d33999 143 * @retval None
<> 149:156823d33999 144 */
<> 149:156823d33999 145 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 146 {
<> 149:156823d33999 147 SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
<> 149:156823d33999 148 }
<> 149:156823d33999 149
<> 149:156823d33999 150 /**
<> 149:156823d33999 151 * @brief Checks if Window Watchdog is enabled
<> 149:156823d33999 152 * @rmtoll CR WDGA LL_WWDG_IsEnabled
<> 149:156823d33999 153 * @param WWDGx WWDG Instance
<> 149:156823d33999 154 * @retval State of bit (1 or 0).
<> 149:156823d33999 155 */
<> 149:156823d33999 156 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 157 {
<> 149:156823d33999 158 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
<> 149:156823d33999 159 }
<> 149:156823d33999 160
<> 149:156823d33999 161 /**
<> 149:156823d33999 162 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0])
<> 149:156823d33999 163 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
<> 149:156823d33999 164 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
<> 149:156823d33999 165 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
<> 149:156823d33999 166 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
<> 149:156823d33999 167 * @rmtoll CR T LL_WWDG_SetCounter
<> 149:156823d33999 168 * @param WWDGx WWDG Instance
<> 149:156823d33999 169 * @param Counter 0..0x7F (7 bit counter value)
<> 149:156823d33999 170 * @retval None
<> 149:156823d33999 171 */
<> 149:156823d33999 172 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
<> 149:156823d33999 173 {
<> 149:156823d33999 174 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
<> 149:156823d33999 175 }
<> 149:156823d33999 176
<> 149:156823d33999 177 /**
<> 149:156823d33999 178 * @brief Return current Watchdog Counter Value (7 bits counter value)
<> 149:156823d33999 179 * @rmtoll CR T LL_WWDG_GetCounter
<> 149:156823d33999 180 * @param WWDGx WWDG Instance
<> 149:156823d33999 181 * @retval 7 bit Watchdog Counter value
<> 149:156823d33999 182 */
<> 149:156823d33999 183 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 184 {
<> 149:156823d33999 185 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
<> 149:156823d33999 186 }
<> 149:156823d33999 187
<> 149:156823d33999 188 /**
<> 149:156823d33999 189 * @brief Set the time base of the prescaler (WDGTB).
<> 149:156823d33999 190 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
<> 149:156823d33999 191 * is decremented every (4096 x 2expWDGTB) PCLK cycles
<> 149:156823d33999 192 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler
<> 149:156823d33999 193 * @param WWDGx WWDG Instance
<> 149:156823d33999 194 * @param Prescaler This parameter can be one of the following values:
<> 149:156823d33999 195 * @arg @ref LL_WWDG_PRESCALER_1
<> 149:156823d33999 196 * @arg @ref LL_WWDG_PRESCALER_2
<> 149:156823d33999 197 * @arg @ref LL_WWDG_PRESCALER_4
<> 149:156823d33999 198 * @arg @ref LL_WWDG_PRESCALER_8
<> 149:156823d33999 199 * @retval None
<> 149:156823d33999 200 */
<> 149:156823d33999 201 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
<> 149:156823d33999 202 {
<> 149:156823d33999 203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
<> 149:156823d33999 204 }
<> 149:156823d33999 205
<> 149:156823d33999 206 /**
<> 149:156823d33999 207 * @brief Return current Watchdog Prescaler Value
<> 149:156823d33999 208 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler
<> 149:156823d33999 209 * @param WWDGx WWDG Instance
<> 149:156823d33999 210 * @retval Returned value can be one of the following values:
<> 149:156823d33999 211 * @arg @ref LL_WWDG_PRESCALER_1
<> 149:156823d33999 212 * @arg @ref LL_WWDG_PRESCALER_2
<> 149:156823d33999 213 * @arg @ref LL_WWDG_PRESCALER_4
<> 149:156823d33999 214 * @arg @ref LL_WWDG_PRESCALER_8
<> 149:156823d33999 215 */
<> 149:156823d33999 216 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 217 {
<> 149:156823d33999 218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
<> 149:156823d33999 219 }
<> 149:156823d33999 220
<> 149:156823d33999 221 /**
<> 149:156823d33999 222 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
<> 149:156823d33999 223 * @note This window value defines when write in the WWDG_CR register
<> 149:156823d33999 224 * to program Watchdog counter is allowed.
<> 149:156823d33999 225 * Watchdog counter value update must occur only when the counter value
<> 149:156823d33999 226 * is lower than the Watchdog window register value.
<> 149:156823d33999 227 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
<> 149:156823d33999 228 * (in the control register) is refreshed before the downcounter has reached
<> 149:156823d33999 229 * the watchdog window register value.
<> 149:156823d33999 230 * Physically is possible to set the Window lower then 0x40 but it is not recommended.
<> 149:156823d33999 231 * To generate an immediate reset, it is possible to set the Counter lower than 0x40.
<> 149:156823d33999 232 * @rmtoll CFR W LL_WWDG_SetWindow
<> 149:156823d33999 233 * @param WWDGx WWDG Instance
<> 149:156823d33999 234 * @param Window 0x00..0x7F (7 bit Window value)
<> 149:156823d33999 235 * @retval None
<> 149:156823d33999 236 */
<> 149:156823d33999 237 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
<> 149:156823d33999 238 {
<> 149:156823d33999 239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
<> 149:156823d33999 240 }
<> 149:156823d33999 241
<> 149:156823d33999 242 /**
<> 149:156823d33999 243 * @brief Return current Watchdog Window Value (7 bits value)
<> 149:156823d33999 244 * @rmtoll CFR W LL_WWDG_GetWindow
<> 149:156823d33999 245 * @param WWDGx WWDG Instance
<> 149:156823d33999 246 * @retval 7 bit Watchdog Window value
<> 149:156823d33999 247 */
<> 149:156823d33999 248 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 249 {
<> 149:156823d33999 250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
<> 149:156823d33999 251 }
<> 149:156823d33999 252
<> 149:156823d33999 253 /**
<> 149:156823d33999 254 * @}
<> 149:156823d33999 255 */
<> 149:156823d33999 256
<> 149:156823d33999 257 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
<> 149:156823d33999 258 * @{
<> 149:156823d33999 259 */
<> 149:156823d33999 260 /**
<> 149:156823d33999 261 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
<> 149:156823d33999 262 * @note This bit is set by hardware when the counter has reached the value 0x40.
<> 149:156823d33999 263 * It must be cleared by software by writing 0.
<> 149:156823d33999 264 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
<> 149:156823d33999 265 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP
<> 149:156823d33999 266 * @param WWDGx WWDG Instance
<> 149:156823d33999 267 * @retval State of bit (1 or 0).
<> 149:156823d33999 268 */
<> 149:156823d33999 269 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 270 {
<> 149:156823d33999 271 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
<> 149:156823d33999 272 }
<> 149:156823d33999 273
<> 149:156823d33999 274 /**
<> 149:156823d33999 275 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF)
<> 149:156823d33999 276 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP
<> 149:156823d33999 277 * @param WWDGx WWDG Instance
<> 149:156823d33999 278 * @retval None
<> 149:156823d33999 279 */
<> 149:156823d33999 280 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 281 {
<> 149:156823d33999 282 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
<> 149:156823d33999 283 }
<> 149:156823d33999 284
<> 149:156823d33999 285 /**
<> 149:156823d33999 286 * @}
<> 149:156823d33999 287 */
<> 149:156823d33999 288
<> 149:156823d33999 289 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
<> 149:156823d33999 290 * @{
<> 149:156823d33999 291 */
<> 149:156823d33999 292 /**
<> 149:156823d33999 293 * @brief Enable the Early Wakeup Interrupt.
<> 149:156823d33999 294 * @note When set, an interrupt occurs whenever the counter reaches value 0x40.
<> 149:156823d33999 295 * This interrupt is only cleared by hardware after a reset
<> 149:156823d33999 296 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP
<> 149:156823d33999 297 * @param WWDGx WWDG Instance
<> 149:156823d33999 298 * @retval None
<> 149:156823d33999 299 */
<> 149:156823d33999 300 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 301 {
<> 149:156823d33999 302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
<> 149:156823d33999 303 }
<> 149:156823d33999 304
<> 149:156823d33999 305 /**
<> 149:156823d33999 306 * @brief Check if Early Wakeup Interrupt is enabled
<> 149:156823d33999 307 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP
<> 149:156823d33999 308 * @param WWDGx WWDG Instance
<> 149:156823d33999 309 * @retval State of bit (1 or 0).
<> 149:156823d33999 310 */
<> 149:156823d33999 311 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
<> 149:156823d33999 312 {
<> 149:156823d33999 313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
<> 149:156823d33999 314 }
<> 149:156823d33999 315
<> 149:156823d33999 316 /**
<> 149:156823d33999 317 * @}
<> 149:156823d33999 318 */
<> 149:156823d33999 319
<> 149:156823d33999 320 /**
<> 149:156823d33999 321 * @}
<> 149:156823d33999 322 */
<> 149:156823d33999 323
<> 149:156823d33999 324 /**
<> 149:156823d33999 325 * @}
<> 149:156823d33999 326 */
<> 149:156823d33999 327
<> 149:156823d33999 328 #endif /* WWDG */
<> 149:156823d33999 329
<> 149:156823d33999 330 /**
<> 149:156823d33999 331 * @}
<> 149:156823d33999 332 */
<> 149:156823d33999 333
<> 149:156823d33999 334 #ifdef __cplusplus
<> 149:156823d33999 335 }
<> 149:156823d33999 336 #endif
<> 149:156823d33999 337
<> 149:156823d33999 338 #endif /* __STM32L1xx_LL_WWDG_H */
<> 149:156823d33999 339
<> 149:156823d33999 340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/