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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_tim.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_tim.c
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @brief TIM LL module driver.
Kojto	158:b23ee177fd68	6	******************************************************************************
Kojto	158:b23ee177fd68	7	* @attention
Kojto	158:b23ee177fd68	8	*
Kojto	158:b23ee177fd68	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	12	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	13	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	14	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	17	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	19	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	20	* without specific prior written permission.
Kojto	158:b23ee177fd68	21	*
Kojto	158:b23ee177fd68	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	32	*
Kojto	158:b23ee177fd68	33	******************************************************************************
Kojto	158:b23ee177fd68	34	*/
Kojto	158:b23ee177fd68	35	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	36
Kojto	158:b23ee177fd68	37	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	38	#include "stm32l0xx_ll_tim.h"
Kojto	158:b23ee177fd68	39	#include "stm32l0xx_ll_bus.h"
Kojto	158:b23ee177fd68	40
Kojto	158:b23ee177fd68	41	#ifdef USE_FULL_ASSERT
Anna Bridge	186:707f6e361f3e	42	#include "stm32_assert.h"
Kojto	158:b23ee177fd68	43	#else
Anna Bridge	186:707f6e361f3e	44	#define assert_param(expr) ((void)0U)
Kojto	158:b23ee177fd68	45	#endif
Kojto	158:b23ee177fd68	46
Kojto	158:b23ee177fd68	47	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	48	* @{
Kojto	158:b23ee177fd68	49	*/
Kojto	158:b23ee177fd68	50
Kojto	158:b23ee177fd68	51	#if defined (TIM2) \|\| defined (TIM3) \|\| defined (TIM21) \|\| defined (TIM22) \|\| defined (TIM6) \|\| defined (TIM7)
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	/** @addtogroup TIM_LL
Kojto	158:b23ee177fd68	54	* @{
Kojto	158:b23ee177fd68	55	*/
Kojto	158:b23ee177fd68	56
Kojto	158:b23ee177fd68	57	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	58	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	59	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	60	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	61	/** @addtogroup TIM_LL_Private_Macros
Kojto	158:b23ee177fd68	62	* @{
Kojto	158:b23ee177fd68	63	*/
Kojto	158:b23ee177fd68	64	#define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
Kojto	158:b23ee177fd68	65	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
Kojto	158:b23ee177fd68	66	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
Kojto	158:b23ee177fd68	67	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
Kojto	158:b23ee177fd68	68	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
Kojto	158:b23ee177fd68	69
Kojto	158:b23ee177fd68	70	#define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
Kojto	158:b23ee177fd68	71	\|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
Kojto	158:b23ee177fd68	72	\|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
Kojto	158:b23ee177fd68	73
Kojto	158:b23ee177fd68	74	#define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
Kojto	158:b23ee177fd68	75	\|\| ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
Kojto	158:b23ee177fd68	76	\|\| ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
Kojto	158:b23ee177fd68	77	\|\| ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
Kojto	158:b23ee177fd68	78	\|\| ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
Kojto	158:b23ee177fd68	79	\|\| ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
Kojto	158:b23ee177fd68	80	\|\| ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
Kojto	158:b23ee177fd68	81	\|\| ((__VALUE__) == LL_TIM_OCMODE_PWM2))
Kojto	158:b23ee177fd68	82
Kojto	158:b23ee177fd68	83	#define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
Kojto	158:b23ee177fd68	84	\|\| ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
Kojto	158:b23ee177fd68	85
Kojto	158:b23ee177fd68	86	#define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
Kojto	158:b23ee177fd68	87	\|\| ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
Kojto	158:b23ee177fd68	88
Kojto	158:b23ee177fd68	89	#define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
Kojto	158:b23ee177fd68	90	\|\| ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
Kojto	158:b23ee177fd68	91	\|\| ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
Kojto	158:b23ee177fd68	92
Kojto	158:b23ee177fd68	93	#define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
Kojto	158:b23ee177fd68	94	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
Kojto	158:b23ee177fd68	95	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
Kojto	158:b23ee177fd68	96	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV8))
Kojto	158:b23ee177fd68	97
Kojto	158:b23ee177fd68	98	#define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
Kojto	158:b23ee177fd68	99	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
Kojto	158:b23ee177fd68	100	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
Kojto	158:b23ee177fd68	101	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
Kojto	158:b23ee177fd68	102	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
Kojto	158:b23ee177fd68	103	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
Kojto	158:b23ee177fd68	104	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
Kojto	158:b23ee177fd68	105	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
Kojto	158:b23ee177fd68	106	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
Kojto	158:b23ee177fd68	107	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
Kojto	158:b23ee177fd68	108	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
Kojto	158:b23ee177fd68	109	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
Kojto	158:b23ee177fd68	110	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
Kojto	158:b23ee177fd68	111	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
Kojto	158:b23ee177fd68	112	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
Kojto	158:b23ee177fd68	113	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
Kojto	158:b23ee177fd68	114
Kojto	158:b23ee177fd68	115	#define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
Kojto	158:b23ee177fd68	116	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \
Kojto	158:b23ee177fd68	117	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE))
Kojto	158:b23ee177fd68	118
Kojto	158:b23ee177fd68	119	#define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
Kojto	158:b23ee177fd68	120	\|\| ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
Kojto	158:b23ee177fd68	121	\|\| ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
Kojto	158:b23ee177fd68	122
Kojto	158:b23ee177fd68	123	#define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
Kojto	158:b23ee177fd68	124	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
Kojto	158:b23ee177fd68	125	/**
Kojto	158:b23ee177fd68	126	* @}
Kojto	158:b23ee177fd68	127	*/
Kojto	158:b23ee177fd68	128
Kojto	158:b23ee177fd68	129
Kojto	158:b23ee177fd68	130	/* Private function prototypes -----------------------------------------------*/
Kojto	158:b23ee177fd68	131	/** @defgroup TIM_LL_Private_Functions TIM Private Functions
Kojto	158:b23ee177fd68	132	* @{
Kojto	158:b23ee177fd68	133	*/
Anna Bridge	186:707f6e361f3e	134	static ErrorStatus OC1Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct);
Anna Bridge	186:707f6e361f3e	135	static ErrorStatus OC2Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct);
Anna Bridge	186:707f6e361f3e	136	static ErrorStatus OC3Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct);
Anna Bridge	186:707f6e361f3e	137	static ErrorStatus OC4Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct);
Anna Bridge	186:707f6e361f3e	138	static ErrorStatus IC1Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct);
Anna Bridge	186:707f6e361f3e	139	static ErrorStatus IC2Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct);
Anna Bridge	186:707f6e361f3e	140	static ErrorStatus IC3Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct);
Anna Bridge	186:707f6e361f3e	141	static ErrorStatus IC4Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct);
Kojto	158:b23ee177fd68	142	/**
Kojto	158:b23ee177fd68	143	* @}
Kojto	158:b23ee177fd68	144	*/
Kojto	158:b23ee177fd68	145
Kojto	158:b23ee177fd68	146	/* Exported functions --------------------------------------------------------*/
Anna Bridge	186:707f6e361f3e	147	/** @addtogroup TIM_LL_Exported_Functions
Kojto	158:b23ee177fd68	148	* @{
Kojto	158:b23ee177fd68	149	*/
Kojto	158:b23ee177fd68	150
Kojto	158:b23ee177fd68	151	/** @addtogroup TIM_LL_EF_Init
Kojto	158:b23ee177fd68	152	* @{
Kojto	158:b23ee177fd68	153	*/
Kojto	158:b23ee177fd68	154
Kojto	158:b23ee177fd68	155	/**
Kojto	158:b23ee177fd68	156	* @brief Set TIMx registers to their reset values.
Kojto	158:b23ee177fd68	157	* @param TIMx Timer instance
Kojto	158:b23ee177fd68	158	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	159	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	160	* - ERROR: invalid TIMx instance
Kojto	158:b23ee177fd68	161	*/
Anna Bridge	186:707f6e361f3e	162	ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
Kojto	158:b23ee177fd68	163	{
Kojto	158:b23ee177fd68	164	ErrorStatus result = SUCCESS;
Kojto	158:b23ee177fd68	165
Kojto	158:b23ee177fd68	166	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	167	assert_param(IS_TIM_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	168
Anna Bridge	186:707f6e361f3e	169	if (TIMx == TIM2)
Anna Bridge	186:707f6e361f3e	170	{
Kojto	158:b23ee177fd68	171	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
Kojto	158:b23ee177fd68	172	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
Kojto	158:b23ee177fd68	173	}
Anna Bridge	186:707f6e361f3e	174	#if defined(TIM3)
Kojto	158:b23ee177fd68	175	else if (TIMx == TIM3)
Anna Bridge	186:707f6e361f3e	176	{
Kojto	158:b23ee177fd68	177	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
Kojto	158:b23ee177fd68	178	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
Kojto	158:b23ee177fd68	179	}
Kojto	158:b23ee177fd68	180	#endif /* TIM3 */
Anna Bridge	186:707f6e361f3e	181	#if defined(TIM6)
Kojto	158:b23ee177fd68	182	else if (TIMx == TIM6)
Anna Bridge	186:707f6e361f3e	183	{
Kojto	158:b23ee177fd68	184	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
Kojto	158:b23ee177fd68	185	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
Kojto	158:b23ee177fd68	186	}
Kojto	158:b23ee177fd68	187	#endif /* TIM6 */
Anna Bridge	186:707f6e361f3e	188	#if defined(TIM7)
Kojto	158:b23ee177fd68	189	else if (TIMx == TIM7)
Anna Bridge	186:707f6e361f3e	190	{
Kojto	158:b23ee177fd68	191	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
Kojto	158:b23ee177fd68	192	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
Kojto	158:b23ee177fd68	193	}
Kojto	158:b23ee177fd68	194	#endif /* TIM7 */
Kojto	158:b23ee177fd68	195	else if (TIMx == TIM21)
Anna Bridge	186:707f6e361f3e	196	{
Kojto	158:b23ee177fd68	197	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM21);
Kojto	158:b23ee177fd68	198	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM21);
Kojto	158:b23ee177fd68	199	}
Anna Bridge	186:707f6e361f3e	200	#if defined(TIM22)
Kojto	158:b23ee177fd68	201	else if (TIMx == TIM22)
Anna Bridge	186:707f6e361f3e	202	{
Kojto	158:b23ee177fd68	203	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM22);
Kojto	158:b23ee177fd68	204	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM22);
Kojto	158:b23ee177fd68	205	}
Kojto	158:b23ee177fd68	206	#endif /* TIM22 */
Kojto	158:b23ee177fd68	207	else
Kojto	158:b23ee177fd68	208	{
Kojto	158:b23ee177fd68	209	result = ERROR;
Kojto	158:b23ee177fd68	210	}
Anna Bridge	186:707f6e361f3e	211
Kojto	158:b23ee177fd68	212	return result;
Kojto	158:b23ee177fd68	213	}
Kojto	158:b23ee177fd68	214
Kojto	158:b23ee177fd68	215	/**
Kojto	158:b23ee177fd68	216	* @brief Set the fields of the time base unit configuration data structure
Kojto	158:b23ee177fd68	217	* to their default values.
Kojto	158:b23ee177fd68	218	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configuration data structure)
Kojto	158:b23ee177fd68	219	* @retval None
Kojto	158:b23ee177fd68	220	*/
Anna Bridge	186:707f6e361f3e	221	void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
Kojto	158:b23ee177fd68	222	{
Kojto	158:b23ee177fd68	223	/* Set the default configuration */
Kojto	158:b23ee177fd68	224	TIM_InitStruct->Prescaler = (uint16_t)0x0000U;
Kojto	158:b23ee177fd68	225	TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP;
Kojto	158:b23ee177fd68	226	TIM_InitStruct->Autoreload = (uint32_t)0xFFFFFFFFU;
Kojto	158:b23ee177fd68	227	TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
Kojto	158:b23ee177fd68	228	}
Kojto	158:b23ee177fd68	229
Kojto	158:b23ee177fd68	230	/**
Kojto	158:b23ee177fd68	231	* @brief Configure the TIMx time base unit.
Kojto	158:b23ee177fd68	232	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	233	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
Kojto	158:b23ee177fd68	234	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	235	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	236	* - ERROR: not applicable
Kojto	158:b23ee177fd68	237	*/
Anna Bridge	186:707f6e361f3e	238	ErrorStatus LL_TIM_Init(TIM_TypeDef TIMx, LL_TIM_InitTypeDef TIM_InitStruct)
Kojto	158:b23ee177fd68	239	{
Anna Bridge	186:707f6e361f3e	240	uint32_t tmpcr1 = 0U;
Kojto	158:b23ee177fd68	241
Kojto	158:b23ee177fd68	242	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	243	assert_param(IS_TIM_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	244	assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
Kojto	158:b23ee177fd68	245	assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
Kojto	158:b23ee177fd68	246
Anna Bridge	186:707f6e361f3e	247	tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
Kojto	158:b23ee177fd68	248
Anna Bridge	186:707f6e361f3e	249	if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
Kojto	158:b23ee177fd68	250	{
Kojto	158:b23ee177fd68	251	/* Select the Counter Mode */
Anna Bridge	186:707f6e361f3e	252	MODIFY_REG(tmpcr1, (TIM_CR1_DIR \| TIM_CR1_CMS), TIM_InitStruct->CounterMode);
Kojto	158:b23ee177fd68	253	}
Anna Bridge	186:707f6e361f3e	254
Anna Bridge	186:707f6e361f3e	255	if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
Kojto	158:b23ee177fd68	256	{
Kojto	158:b23ee177fd68	257	/* Set the clock division */
Anna Bridge	186:707f6e361f3e	258	MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision);
Kojto	158:b23ee177fd68	259	}
Kojto	158:b23ee177fd68	260
Kojto	158:b23ee177fd68	261	/* Write to TIMx CR1 */
Kojto	158:b23ee177fd68	262	LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
Kojto	158:b23ee177fd68	263
Kojto	158:b23ee177fd68	264	/* Set the Autoreload value */
Kojto	158:b23ee177fd68	265	LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
Anna Bridge	186:707f6e361f3e	266
Kojto	158:b23ee177fd68	267	/* Set the Prescaler value */
Kojto	158:b23ee177fd68	268	LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
Anna Bridge	186:707f6e361f3e	269	/* Generate an update event to reload the Prescaler
Kojto	158:b23ee177fd68	270	and the repetition counter value (if applicable) immediately */
Kojto	158:b23ee177fd68	271	LL_TIM_GenerateEvent_UPDATE(TIMx);
Anna Bridge	186:707f6e361f3e	272
Kojto	158:b23ee177fd68	273	return SUCCESS;
Kojto	158:b23ee177fd68	274	}
Kojto	158:b23ee177fd68	275
Kojto	158:b23ee177fd68	276	/**
Anna Bridge	186:707f6e361f3e	277	* @brief Set the fields of the TIMx output channel configuration data
Kojto	158:b23ee177fd68	278	* structure to their default values.
Kojto	158:b23ee177fd68	279	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
Kojto	158:b23ee177fd68	280	* @retval None
Kojto	158:b23ee177fd68	281	*/
Anna Bridge	186:707f6e361f3e	282	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
Kojto	158:b23ee177fd68	283	{
Kojto	158:b23ee177fd68	284	/* Set the default configuration */
Kojto	158:b23ee177fd68	285	TIM_OC_InitStruct->OCMode = LL_TIM_OCMODE_FROZEN;
Kojto	158:b23ee177fd68	286	TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE;
Kojto	158:b23ee177fd68	287	TIM_OC_InitStruct->CompareValue = (uint32_t)0x00000000U;
Kojto	158:b23ee177fd68	288	TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH;
Kojto	158:b23ee177fd68	289	}
Kojto	158:b23ee177fd68	290
Kojto	158:b23ee177fd68	291	/**
Kojto	158:b23ee177fd68	292	* @brief Configure the TIMx output channel.
Kojto	158:b23ee177fd68	293	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	294	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	295	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	158:b23ee177fd68	296	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	158:b23ee177fd68	297	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	158:b23ee177fd68	298	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	158:b23ee177fd68	299	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
Kojto	158:b23ee177fd68	300	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	301	* - SUCCESS: TIMx output channel is initialized
Kojto	158:b23ee177fd68	302	* - ERROR: TIMx output channel is not initialized
Kojto	158:b23ee177fd68	303	*/
Anna Bridge	186:707f6e361f3e	304	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef TIM_OC_InitStruct)
Kojto	158:b23ee177fd68	305	{
Kojto	158:b23ee177fd68	306	ErrorStatus result = ERROR;
Anna Bridge	186:707f6e361f3e	307
Anna Bridge	186:707f6e361f3e	308	switch (Channel)
Kojto	158:b23ee177fd68	309	{
Anna Bridge	186:707f6e361f3e	310	case LL_TIM_CHANNEL_CH1:
Anna Bridge	186:707f6e361f3e	311	result = OC1Config(TIMx, TIM_OC_InitStruct);
Anna Bridge	186:707f6e361f3e	312	break;
Anna Bridge	186:707f6e361f3e	313	case LL_TIM_CHANNEL_CH2:
Anna Bridge	186:707f6e361f3e	314	result = OC2Config(TIMx, TIM_OC_InitStruct);
Anna Bridge	186:707f6e361f3e	315	break;
Anna Bridge	186:707f6e361f3e	316	case LL_TIM_CHANNEL_CH3:
Anna Bridge	186:707f6e361f3e	317	result = OC3Config(TIMx, TIM_OC_InitStruct);
Anna Bridge	186:707f6e361f3e	318	break;
Anna Bridge	186:707f6e361f3e	319	case LL_TIM_CHANNEL_CH4:
Anna Bridge	186:707f6e361f3e	320	result = OC4Config(TIMx, TIM_OC_InitStruct);
Anna Bridge	186:707f6e361f3e	321	break;
Anna Bridge	186:707f6e361f3e	322	default:
Anna Bridge	186:707f6e361f3e	323	break;
Kojto	158:b23ee177fd68	324	}
Anna Bridge	186:707f6e361f3e	325
Kojto	158:b23ee177fd68	326	return result;
Kojto	158:b23ee177fd68	327	}
Kojto	158:b23ee177fd68	328
Kojto	158:b23ee177fd68	329	/**
Anna Bridge	186:707f6e361f3e	330	* @brief Set the fields of the TIMx input channel configuration data
Kojto	158:b23ee177fd68	331	* structure to their default values.
Kojto	158:b23ee177fd68	332	* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
Kojto	158:b23ee177fd68	333	* @retval None
Kojto	158:b23ee177fd68	334	*/
Anna Bridge	186:707f6e361f3e	335	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
Kojto	158:b23ee177fd68	336	{
Kojto	158:b23ee177fd68	337	/* Set the default configuration */
Kojto	158:b23ee177fd68	338	TIM_ICInitStruct->ICPolarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	339	TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	340	TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	341	TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	342	}
Kojto	158:b23ee177fd68	343
Kojto	158:b23ee177fd68	344	/**
Kojto	158:b23ee177fd68	345	* @brief Configure the TIMx input channel.
Kojto	158:b23ee177fd68	346	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	347	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	348	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	158:b23ee177fd68	349	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	158:b23ee177fd68	350	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	158:b23ee177fd68	351	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	158:b23ee177fd68	352	* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
Kojto	158:b23ee177fd68	353	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	354	* - SUCCESS: TIMx output channel is initialized
Kojto	158:b23ee177fd68	355	* - ERROR: TIMx output channel is not initialized
Kojto	158:b23ee177fd68	356	*/
Anna Bridge	186:707f6e361f3e	357	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef TIM_IC_InitStruct)
Kojto	158:b23ee177fd68	358	{
Kojto	158:b23ee177fd68	359	ErrorStatus result = ERROR;
Anna Bridge	186:707f6e361f3e	360
Anna Bridge	186:707f6e361f3e	361	switch (Channel)
Kojto	158:b23ee177fd68	362	{
Anna Bridge	186:707f6e361f3e	363	case LL_TIM_CHANNEL_CH1:
Anna Bridge	186:707f6e361f3e	364	result = IC1Config(TIMx, TIM_IC_InitStruct);
Anna Bridge	186:707f6e361f3e	365	break;
Anna Bridge	186:707f6e361f3e	366	case LL_TIM_CHANNEL_CH2:
Anna Bridge	186:707f6e361f3e	367	result = IC2Config(TIMx, TIM_IC_InitStruct);
Anna Bridge	186:707f6e361f3e	368	break;
Anna Bridge	186:707f6e361f3e	369	case LL_TIM_CHANNEL_CH3:
Anna Bridge	186:707f6e361f3e	370	result = IC3Config(TIMx, TIM_IC_InitStruct);
Anna Bridge	186:707f6e361f3e	371	break;
Anna Bridge	186:707f6e361f3e	372	case LL_TIM_CHANNEL_CH4:
Anna Bridge	186:707f6e361f3e	373	result = IC4Config(TIMx, TIM_IC_InitStruct);
Anna Bridge	186:707f6e361f3e	374	break;
Anna Bridge	186:707f6e361f3e	375	default:
Anna Bridge	186:707f6e361f3e	376	break;
Kojto	158:b23ee177fd68	377	}
Anna Bridge	186:707f6e361f3e	378
Kojto	158:b23ee177fd68	379	return result;
Kojto	158:b23ee177fd68	380	}
Kojto	158:b23ee177fd68	381
Kojto	158:b23ee177fd68	382	/**
Kojto	158:b23ee177fd68	383	* @brief Fills each TIM_EncoderInitStruct field with its default value
Kojto	158:b23ee177fd68	384	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
Kojto	158:b23ee177fd68	385	* @retval None
Kojto	158:b23ee177fd68	386	*/
Anna Bridge	186:707f6e361f3e	387	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
Kojto	158:b23ee177fd68	388	{
Kojto	158:b23ee177fd68	389	/* Set the default configuration */
Kojto	158:b23ee177fd68	390	TIM_EncoderInitStruct->EncoderMode = LL_TIM_ENCODERMODE_X2_TI1;
Kojto	158:b23ee177fd68	391	TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	392	TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	393	TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	394	TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	395	TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	396	TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	397	TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	398	TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	399	}
Kojto	158:b23ee177fd68	400
Kojto	158:b23ee177fd68	401	/**
Kojto	158:b23ee177fd68	402	* @brief Configure the encoder interface of the timer instance.
Kojto	158:b23ee177fd68	403	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	404	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
Kojto	158:b23ee177fd68	405	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	406	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	407	* - ERROR: not applicable
Kojto	158:b23ee177fd68	408	*/
Anna Bridge	186:707f6e361f3e	409	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef TIMx, LL_TIM_ENCODER_InitTypeDef TIM_EncoderInitStruct)
Kojto	158:b23ee177fd68	410	{
Kojto	158:b23ee177fd68	411	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	412	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	413
Kojto	158:b23ee177fd68	414	/* Check the parameters */
Kojto	158:b23ee177fd68	415	assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	416	assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
Kojto	158:b23ee177fd68	417	assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
Kojto	158:b23ee177fd68	418	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput));
Kojto	158:b23ee177fd68	419	assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler));
Kojto	158:b23ee177fd68	420	assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter));
Kojto	158:b23ee177fd68	421	assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity));
Kojto	158:b23ee177fd68	422	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput));
Kojto	158:b23ee177fd68	423	assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler));
Kojto	158:b23ee177fd68	424	assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter));
Anna Bridge	186:707f6e361f3e	425
Kojto	158:b23ee177fd68	426	/* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
Kojto	158:b23ee177fd68	427	TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E \| TIM_CCER_CC2E);
Anna Bridge	186:707f6e361f3e	428
Kojto	158:b23ee177fd68	429	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	430	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Kojto	158:b23ee177fd68	431
Kojto	158:b23ee177fd68	432	/* Get the TIMx CCER register value */
Anna Bridge	186:707f6e361f3e	433	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	434
Kojto	158:b23ee177fd68	435	/* Configure TI1 */
Kojto	158:b23ee177fd68	436	tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S \| TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC);
Kojto	158:b23ee177fd68	437	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);
Kojto	158:b23ee177fd68	438	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
Kojto	158:b23ee177fd68	439	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);
Anna Bridge	186:707f6e361f3e	440
Kojto	158:b23ee177fd68	441	/* Configure TI2 */
Kojto	158:b23ee177fd68	442	tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S \| TIM_CCMR1_IC2F \| TIM_CCMR1_IC2PSC);
Kojto	158:b23ee177fd68	443	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);
Kojto	158:b23ee177fd68	444	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);
Kojto	158:b23ee177fd68	445	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);
Anna Bridge	186:707f6e361f3e	446
Kojto	158:b23ee177fd68	447	/* Set TI1 and TI2 polarity and enable TI1 and TI2 */
Kojto	158:b23ee177fd68	448	tmpccer &= (uint32_t)~(TIM_CCER_CC1P \| TIM_CCER_CC1NP \| TIM_CCER_CC2P \| TIM_CCER_CC2NP);
Kojto	158:b23ee177fd68	449	tmpccer \|= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
Kojto	158:b23ee177fd68	450	tmpccer \|= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U);
Kojto	158:b23ee177fd68	451	tmpccer \|= (uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E);
Kojto	158:b23ee177fd68	452
Anna Bridge	186:707f6e361f3e	453	/* Set encoder mode */
Kojto	158:b23ee177fd68	454	LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode);
Anna Bridge	186:707f6e361f3e	455
Anna Bridge	186:707f6e361f3e	456	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	457	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Anna Bridge	186:707f6e361f3e	458
Kojto	158:b23ee177fd68	459	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	460	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	461
Kojto	158:b23ee177fd68	462	return SUCCESS;
Kojto	158:b23ee177fd68	463	}
Kojto	158:b23ee177fd68	464
Kojto	158:b23ee177fd68	465
Kojto	158:b23ee177fd68	466	/**
Kojto	158:b23ee177fd68	467	* @}
Kojto	158:b23ee177fd68	468	*/
Kojto	158:b23ee177fd68	469
Kojto	158:b23ee177fd68	470	/**
Kojto	158:b23ee177fd68	471	* @}
Kojto	158:b23ee177fd68	472	*/
Kojto	158:b23ee177fd68	473
Kojto	158:b23ee177fd68	474	/** @addtogroup TIM_LL_Private_Functions TIM Private Functions
Kojto	158:b23ee177fd68	475	* @brief Private functions
Kojto	158:b23ee177fd68	476	* @{
Kojto	158:b23ee177fd68	477	*/
Kojto	158:b23ee177fd68	478	/**
Kojto	158:b23ee177fd68	479	* @brief Configure the TIMx output channel 1.
Kojto	158:b23ee177fd68	480	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	481	* @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure
Kojto	158:b23ee177fd68	482	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	483	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	484	* - ERROR: not applicable
Kojto	158:b23ee177fd68	485	*/
Anna Bridge	186:707f6e361f3e	486	static ErrorStatus OC1Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct)
Kojto	158:b23ee177fd68	487	{
Kojto	158:b23ee177fd68	488	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	489	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	490	uint32_t tmpcr2 = 0U;
Anna Bridge	186:707f6e361f3e	491
Kojto	158:b23ee177fd68	492	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	493	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	494	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	495	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Anna Bridge	186:707f6e361f3e	496	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	497
Kojto	158:b23ee177fd68	498	/* Disable the Channel 1: Reset the CC1E Bit */
Kojto	158:b23ee177fd68	499	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
Anna Bridge	186:707f6e361f3e	500
Kojto	158:b23ee177fd68	501	/* Get the TIMx CCER register value */
Anna Bridge	186:707f6e361f3e	502	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Anna Bridge	186:707f6e361f3e	503
Kojto	158:b23ee177fd68	504	/* Get the TIMx CR2 register value */
Anna Bridge	186:707f6e361f3e	505	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Anna Bridge	186:707f6e361f3e	506
Kojto	158:b23ee177fd68	507	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	508	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Anna Bridge	186:707f6e361f3e	509
Kojto	158:b23ee177fd68	510	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	511	CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);
Anna Bridge	186:707f6e361f3e	512
Kojto	158:b23ee177fd68	513	/* Set the Output Compare Mode */
Kojto	158:b23ee177fd68	514	MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);
Anna Bridge	186:707f6e361f3e	515
Kojto	158:b23ee177fd68	516	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	517	MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity);
Anna Bridge	186:707f6e361f3e	518
Kojto	158:b23ee177fd68	519	/* Set the Output State */
Kojto	158:b23ee177fd68	520	MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState);
Anna Bridge	186:707f6e361f3e	521
Kojto	158:b23ee177fd68	522	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	523	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Anna Bridge	186:707f6e361f3e	524
Kojto	158:b23ee177fd68	525	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	526	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Anna Bridge	186:707f6e361f3e	527
Kojto	158:b23ee177fd68	528	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	529	LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue);
Anna Bridge	186:707f6e361f3e	530
Kojto	158:b23ee177fd68	531	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	532	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	533
Kojto	158:b23ee177fd68	534	return SUCCESS;
Kojto	158:b23ee177fd68	535	}
Kojto	158:b23ee177fd68	536
Kojto	158:b23ee177fd68	537	/**
Kojto	158:b23ee177fd68	538	* @brief Configure the TIMx output channel 2.
Kojto	158:b23ee177fd68	539	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	540	* @param TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure
Kojto	158:b23ee177fd68	541	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	542	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	543	* - ERROR: not applicable
Kojto	158:b23ee177fd68	544	*/
Anna Bridge	186:707f6e361f3e	545	static ErrorStatus OC2Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct)
Kojto	158:b23ee177fd68	546	{
Kojto	158:b23ee177fd68	547	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	548	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	549	uint32_t tmpcr2 = 0U;
Anna Bridge	186:707f6e361f3e	550
Kojto	158:b23ee177fd68	551	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	552	assert_param(IS_TIM_CC2_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	553	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	554	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Anna Bridge	186:707f6e361f3e	555	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	556
Kojto	158:b23ee177fd68	557	/* Disable the Channel 2: Reset the CC2E Bit */
Kojto	158:b23ee177fd68	558	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
Anna Bridge	186:707f6e361f3e	559
Anna Bridge	186:707f6e361f3e	560	/* Get the TIMx CCER register value */
Anna Bridge	186:707f6e361f3e	561	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Anna Bridge	186:707f6e361f3e	562
Kojto	158:b23ee177fd68	563	/* Get the TIMx CR2 register value */
Anna Bridge	186:707f6e361f3e	564	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Anna Bridge	186:707f6e361f3e	565
Kojto	158:b23ee177fd68	566	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	567	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Anna Bridge	186:707f6e361f3e	568
Kojto	158:b23ee177fd68	569	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	570	CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);
Anna Bridge	186:707f6e361f3e	571
Kojto	158:b23ee177fd68	572	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	573	MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);
Anna Bridge	186:707f6e361f3e	574
Kojto	158:b23ee177fd68	575	/* Set the Output Compare Polarity */
Anna Bridge	186:707f6e361f3e	576	MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U);
Anna Bridge	186:707f6e361f3e	577
Kojto	158:b23ee177fd68	578	/* Set the Output State */
Kojto	158:b23ee177fd68	579	MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U);
Anna Bridge	186:707f6e361f3e	580
Kojto	158:b23ee177fd68	581	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	582	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Anna Bridge	186:707f6e361f3e	583
Kojto	158:b23ee177fd68	584	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	585	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Anna Bridge	186:707f6e361f3e	586
Kojto	158:b23ee177fd68	587	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	588	LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue);
Anna Bridge	186:707f6e361f3e	589
Kojto	158:b23ee177fd68	590	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	591	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Anna Bridge	186:707f6e361f3e	592
Kojto	158:b23ee177fd68	593	return SUCCESS;
Kojto	158:b23ee177fd68	594	}
Kojto	158:b23ee177fd68	595
Kojto	158:b23ee177fd68	596	/**
Kojto	158:b23ee177fd68	597	* @brief Configure the TIMx output channel 3.
Kojto	158:b23ee177fd68	598	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	599	* @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
Kojto	158:b23ee177fd68	600	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	601	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	602	* - ERROR: not applicable
Kojto	158:b23ee177fd68	603	*/
Anna Bridge	186:707f6e361f3e	604	static ErrorStatus OC3Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct)
Kojto	158:b23ee177fd68	605	{
Kojto	158:b23ee177fd68	606	uint32_t tmpccmr2 = 0U;
Kojto	158:b23ee177fd68	607	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	608	uint32_t tmpcr2 = 0U;
Anna Bridge	186:707f6e361f3e	609
Kojto	158:b23ee177fd68	610	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	611	assert_param(IS_TIM_CC3_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	612	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	613	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Anna Bridge	186:707f6e361f3e	614	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	615
Kojto	158:b23ee177fd68	616	/* Disable the Channel 3: Reset the CC3E Bit */
Kojto	158:b23ee177fd68	617	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
Anna Bridge	186:707f6e361f3e	618
Kojto	158:b23ee177fd68	619	/* Get the TIMx CCER register value */
Anna Bridge	186:707f6e361f3e	620	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Anna Bridge	186:707f6e361f3e	621
Kojto	158:b23ee177fd68	622	/* Get the TIMx CR2 register value */
Anna Bridge	186:707f6e361f3e	623	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Anna Bridge	186:707f6e361f3e	624
Kojto	158:b23ee177fd68	625	/* Get the TIMx CCMR2 register value */
Kojto	158:b23ee177fd68	626	tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
Anna Bridge	186:707f6e361f3e	627
Kojto	158:b23ee177fd68	628	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	629	CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S);
Anna Bridge	186:707f6e361f3e	630
Kojto	158:b23ee177fd68	631	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	632	MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode);
Anna Bridge	186:707f6e361f3e	633
Kojto	158:b23ee177fd68	634	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	635	MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U);
Anna Bridge	186:707f6e361f3e	636
Kojto	158:b23ee177fd68	637	/* Set the Output State */
Kojto	158:b23ee177fd68	638	MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U);
Anna Bridge	186:707f6e361f3e	639
Kojto	158:b23ee177fd68	640	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	641	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Anna Bridge	186:707f6e361f3e	642
Kojto	158:b23ee177fd68	643	/* Write to TIMx CCMR2 */
Kojto	158:b23ee177fd68	644	LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
Anna Bridge	186:707f6e361f3e	645
Kojto	158:b23ee177fd68	646	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	647	LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
Anna Bridge	186:707f6e361f3e	648
Kojto	158:b23ee177fd68	649	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	650	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	651
Kojto	158:b23ee177fd68	652	return SUCCESS;
Kojto	158:b23ee177fd68	653	}
Kojto	158:b23ee177fd68	654
Kojto	158:b23ee177fd68	655	/**
Kojto	158:b23ee177fd68	656	* @brief Configure the TIMx output channel 4.
Kojto	158:b23ee177fd68	657	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	658	* @param TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure
Kojto	158:b23ee177fd68	659	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	660	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	661	* - ERROR: not applicable
Kojto	158:b23ee177fd68	662	*/
Anna Bridge	186:707f6e361f3e	663	static ErrorStatus OC4Config(TIM_TypeDef TIMx, LL_TIM_OC_InitTypeDef TIM_OCInitStruct)
Kojto	158:b23ee177fd68	664	{
Kojto	158:b23ee177fd68	665	uint32_t tmpccmr2 = 0U;
Kojto	158:b23ee177fd68	666	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	667	uint32_t tmpcr2 = 0U;
Anna Bridge	186:707f6e361f3e	668
Kojto	158:b23ee177fd68	669	/* Check the parameters */
Anna Bridge	186:707f6e361f3e	670	assert_param(IS_TIM_CC4_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	671	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	672	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Anna Bridge	186:707f6e361f3e	673	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	674
Kojto	158:b23ee177fd68	675	/* Disable the Channel 4: Reset the CC4E Bit */
Kojto	158:b23ee177fd68	676	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
Anna Bridge	186:707f6e361f3e	677
Kojto	158:b23ee177fd68	678	/* Get the TIMx CCER register value */
Anna Bridge	186:707f6e361f3e	679	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Anna Bridge	186:707f6e361f3e	680
Kojto	158:b23ee177fd68	681	/* Get the TIMx CR2 register value */
Anna Bridge	186:707f6e361f3e	682	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Anna Bridge	186:707f6e361f3e	683
Kojto	158:b23ee177fd68	684	/* Get the TIMx CCMR2 register value */
Kojto	158:b23ee177fd68	685	tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
Anna Bridge	186:707f6e361f3e	686
Kojto	158:b23ee177fd68	687	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	688	CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S);
Anna Bridge	186:707f6e361f3e	689
Kojto	158:b23ee177fd68	690	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	691	MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U);
Anna Bridge	186:707f6e361f3e	692
Kojto	158:b23ee177fd68	693	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	694	MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U);
Anna Bridge	186:707f6e361f3e	695
Kojto	158:b23ee177fd68	696	/* Set the Output State */
Kojto	158:b23ee177fd68	697	MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U);
Anna Bridge	186:707f6e361f3e	698
Kojto	158:b23ee177fd68	699	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	700	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Anna Bridge	186:707f6e361f3e	701
Anna Bridge	186:707f6e361f3e	702	/* Write to TIMx CCMR2 */
Kojto	158:b23ee177fd68	703	LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
Anna Bridge	186:707f6e361f3e	704
Kojto	158:b23ee177fd68	705	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	706	LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue);
Anna Bridge	186:707f6e361f3e	707
Kojto	158:b23ee177fd68	708	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	709	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	710
Kojto	158:b23ee177fd68	711	return SUCCESS;
Kojto	158:b23ee177fd68	712	}
Kojto	158:b23ee177fd68	713
Kojto	158:b23ee177fd68	714
Kojto	158:b23ee177fd68	715	/**
Kojto	158:b23ee177fd68	716	* @brief Configure the TIMx input channel 1.
Kojto	158:b23ee177fd68	717	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	718	* @param TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure
Kojto	158:b23ee177fd68	719	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	720	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	721	* - ERROR: not applicable
Kojto	158:b23ee177fd68	722	*/
Anna Bridge	186:707f6e361f3e	723	static ErrorStatus IC1Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct)
Kojto	158:b23ee177fd68	724	{
Kojto	158:b23ee177fd68	725	/* Check the parameters */
Kojto	158:b23ee177fd68	726	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	727	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	728	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	729	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	730	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Anna Bridge	186:707f6e361f3e	731
Kojto	158:b23ee177fd68	732	/* Disable the Channel 1: Reset the CC1E Bit */
Kojto	158:b23ee177fd68	733	TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E;
Anna Bridge	186:707f6e361f3e	734
Kojto	158:b23ee177fd68	735	/* Select the Input and set the filter and the prescaler value */
Anna Bridge	186:707f6e361f3e	736	MODIFY_REG(TIMx->CCMR1,
Kojto	158:b23ee177fd68	737	(TIM_CCMR1_CC1S \| TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC),
Kojto	158:b23ee177fd68	738	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 16U);
Kojto	158:b23ee177fd68	739
Kojto	158:b23ee177fd68	740	/* Select the Polarity and set the CC1E Bit */
Anna Bridge	186:707f6e361f3e	741	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	742	(TIM_CCER_CC1P \| TIM_CCER_CC1NP),
Kojto	158:b23ee177fd68	743	(TIM_ICInitStruct->ICPolarity \| TIM_CCER_CC1E));
Kojto	158:b23ee177fd68	744
Kojto	158:b23ee177fd68	745	return SUCCESS;
Kojto	158:b23ee177fd68	746	}
Kojto	158:b23ee177fd68	747
Kojto	158:b23ee177fd68	748	/**
Kojto	158:b23ee177fd68	749	* @brief Configure the TIMx input channel 2.
Kojto	158:b23ee177fd68	750	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	751	* @param TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure
Kojto	158:b23ee177fd68	752	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	753	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	754	* - ERROR: not applicable
Kojto	158:b23ee177fd68	755	*/
Anna Bridge	186:707f6e361f3e	756	static ErrorStatus IC2Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct)
Kojto	158:b23ee177fd68	757	{
Kojto	158:b23ee177fd68	758	/* Check the parameters */
Kojto	158:b23ee177fd68	759	assert_param(IS_TIM_CC2_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	760	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	761	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	762	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	763	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Anna Bridge	186:707f6e361f3e	764
Kojto	158:b23ee177fd68	765	/* Disable the Channel 2: Reset the CC2E Bit */
Kojto	158:b23ee177fd68	766	TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E;
Anna Bridge	186:707f6e361f3e	767
Kojto	158:b23ee177fd68	768	/* Select the Input and set the filter and the prescaler value */
Anna Bridge	186:707f6e361f3e	769	MODIFY_REG(TIMx->CCMR1,
Kojto	158:b23ee177fd68	770	(TIM_CCMR1_CC2S \| TIM_CCMR1_IC2F \| TIM_CCMR1_IC2PSC),
Kojto	158:b23ee177fd68	771	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 8U);
Kojto	158:b23ee177fd68	772
Kojto	158:b23ee177fd68	773	/* Select the Polarity and set the CC2E Bit */
Anna Bridge	186:707f6e361f3e	774	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	775	(TIM_CCER_CC2P \| TIM_CCER_CC2NP),
Anna Bridge	186:707f6e361f3e	776	((TIM_ICInitStruct->ICPolarity << 4U) \| TIM_CCER_CC2E));
Anna Bridge	186:707f6e361f3e	777
Kojto	158:b23ee177fd68	778	return SUCCESS;
Kojto	158:b23ee177fd68	779	}
Kojto	158:b23ee177fd68	780
Kojto	158:b23ee177fd68	781	/**
Kojto	158:b23ee177fd68	782	* @brief Configure the TIMx input channel 3.
Kojto	158:b23ee177fd68	783	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	784	* @param TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure
Kojto	158:b23ee177fd68	785	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	786	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	787	* - ERROR: not applicable
Kojto	158:b23ee177fd68	788	*/
Anna Bridge	186:707f6e361f3e	789	static ErrorStatus IC3Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct)
Kojto	158:b23ee177fd68	790	{
Kojto	158:b23ee177fd68	791	/* Check the parameters */
Kojto	158:b23ee177fd68	792	assert_param(IS_TIM_CC3_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	793	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	794	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	795	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	796	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Anna Bridge	186:707f6e361f3e	797
Kojto	158:b23ee177fd68	798	/* Disable the Channel 3: Reset the CC3E Bit */
Kojto	158:b23ee177fd68	799	TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E;
Anna Bridge	186:707f6e361f3e	800
Kojto	158:b23ee177fd68	801	/* Select the Input and set the filter and the prescaler value */
Anna Bridge	186:707f6e361f3e	802	MODIFY_REG(TIMx->CCMR2,
Kojto	158:b23ee177fd68	803	(TIM_CCMR2_CC3S \| TIM_CCMR2_IC3F \| TIM_CCMR2_IC3PSC),
Kojto	158:b23ee177fd68	804	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 16U);
Kojto	158:b23ee177fd68	805
Kojto	158:b23ee177fd68	806	/* Select the Polarity and set the CC3E Bit */
Anna Bridge	186:707f6e361f3e	807	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	808	(TIM_CCER_CC3P \| TIM_CCER_CC3NP),
Anna Bridge	186:707f6e361f3e	809	((TIM_ICInitStruct->ICPolarity << 8U) \| TIM_CCER_CC3E));
Kojto	158:b23ee177fd68	810
Kojto	158:b23ee177fd68	811	return SUCCESS;
Kojto	158:b23ee177fd68	812	}
Kojto	158:b23ee177fd68	813
Kojto	158:b23ee177fd68	814	/**
Kojto	158:b23ee177fd68	815	* @brief Configure the TIMx input channel 4.
Kojto	158:b23ee177fd68	816	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	817	* @param TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure
Kojto	158:b23ee177fd68	818	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	819	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	820	* - ERROR: not applicable
Kojto	158:b23ee177fd68	821	*/
Anna Bridge	186:707f6e361f3e	822	static ErrorStatus IC4Config(TIM_TypeDef TIMx, LL_TIM_IC_InitTypeDef TIM_ICInitStruct)
Kojto	158:b23ee177fd68	823	{
Kojto	158:b23ee177fd68	824	/* Check the parameters */
Kojto	158:b23ee177fd68	825	assert_param(IS_TIM_CC4_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	826	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	827	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	828	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	829	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Anna Bridge	186:707f6e361f3e	830
Kojto	158:b23ee177fd68	831	/* Disable the Channel 4: Reset the CC4E Bit */
Kojto	158:b23ee177fd68	832	TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E;
Anna Bridge	186:707f6e361f3e	833
Kojto	158:b23ee177fd68	834	/* Select the Input and set the filter and the prescaler value */
Anna Bridge	186:707f6e361f3e	835	MODIFY_REG(TIMx->CCMR2,
Kojto	158:b23ee177fd68	836	(TIM_CCMR2_CC4S \| TIM_CCMR2_IC4F \| TIM_CCMR2_IC4PSC),
Kojto	158:b23ee177fd68	837	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 8U);
Kojto	158:b23ee177fd68	838
Kojto	158:b23ee177fd68	839	/* Select the Polarity and set the CC2E Bit */
Anna Bridge	186:707f6e361f3e	840	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	841	(TIM_CCER_CC4P \| TIM_CCER_CC4NP),
Anna Bridge	186:707f6e361f3e	842	((TIM_ICInitStruct->ICPolarity << 12U) \| TIM_CCER_CC4E));
Kojto	158:b23ee177fd68	843
Kojto	158:b23ee177fd68	844	return SUCCESS;
Kojto	158:b23ee177fd68	845	}
Kojto	158:b23ee177fd68	846
Kojto	158:b23ee177fd68	847
Kojto	158:b23ee177fd68	848	/**
Kojto	158:b23ee177fd68	849	* @}
Kojto	158:b23ee177fd68	850	*/
Kojto	158:b23ee177fd68	851
Kojto	158:b23ee177fd68	852	/**
Kojto	158:b23ee177fd68	853	* @}
Kojto	158:b23ee177fd68	854	*/
Kojto	158:b23ee177fd68	855
Kojto	158:b23ee177fd68	856	#endif /* TIM1 \|\| TIM3 \|\| TIM21 \|\| TIM22 \|\| TIM6 \|\| TIM7 */
Kojto	158:b23ee177fd68	857
Kojto	158:b23ee177fd68	858	/**
Kojto	158:b23ee177fd68	859	* @}
Kojto	158:b23ee177fd68	860	*/
Anna Bridge	186:707f6e361f3e	861
Kojto	158:b23ee177fd68	862	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	863
Kojto	158:b23ee177fd68	864	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/