mbed-dev - mbed library sources. Supersedes mbed-src.

Users » mbed_official » Code » mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_tim.c@158:b23ee177fd68, 2017-02-14 (annotated)

Committer:: Kojto
Date:: Tue Feb 14 14:44:10 2017 +0000
Revision:: 158:b23ee177fd68
Child:: 186:707f6e361f3e

This updates the lib to the mbed lib v136

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_tim.c
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @version V1.7.0
Kojto	158:b23ee177fd68	6	* @date 31-May-2016
Kojto	158:b23ee177fd68	7	* @brief TIM LL module driver.
Kojto	158:b23ee177fd68	8	******************************************************************************
Kojto	158:b23ee177fd68	9	* @attention
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	12	*
Kojto	158:b23ee177fd68	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	14	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	18	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	19	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	21	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	22	* without specific prior written permission.
Kojto	158:b23ee177fd68	23	*
Kojto	158:b23ee177fd68	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	34	*
Kojto	158:b23ee177fd68	35	******************************************************************************
Kojto	158:b23ee177fd68	36	*/
Kojto	158:b23ee177fd68	37	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	38
Kojto	158:b23ee177fd68	39	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	40	#include "stm32l0xx_ll_tim.h"
Kojto	158:b23ee177fd68	41	#include "stm32l0xx_ll_bus.h"
Kojto	158:b23ee177fd68	42
Kojto	158:b23ee177fd68	43	#ifdef USE_FULL_ASSERT
Kojto	158:b23ee177fd68	44	#include "stm32_assert.h"
Kojto	158:b23ee177fd68	45	#else
Kojto	158:b23ee177fd68	46	#define assert_param(expr) ((void)0U)
Kojto	158:b23ee177fd68	47	#endif
Kojto	158:b23ee177fd68	48
Kojto	158:b23ee177fd68	49	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	50	* @{
Kojto	158:b23ee177fd68	51	*/
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	#if defined (TIM2) \|\| defined (TIM3) \|\| defined (TIM21) \|\| defined (TIM22) \|\| defined (TIM6) \|\| defined (TIM7)
Kojto	158:b23ee177fd68	54
Kojto	158:b23ee177fd68	55	/** @addtogroup TIM_LL
Kojto	158:b23ee177fd68	56	* @{
Kojto	158:b23ee177fd68	57	*/
Kojto	158:b23ee177fd68	58
Kojto	158:b23ee177fd68	59	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	60	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	61	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	62	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	63	/** @addtogroup TIM_LL_Private_Macros
Kojto	158:b23ee177fd68	64	* @{
Kojto	158:b23ee177fd68	65	*/
Kojto	158:b23ee177fd68	66	#define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
Kojto	158:b23ee177fd68	67	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
Kojto	158:b23ee177fd68	68	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
Kojto	158:b23ee177fd68	69	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
Kojto	158:b23ee177fd68	70	\|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
Kojto	158:b23ee177fd68	71
Kojto	158:b23ee177fd68	72	#define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
Kojto	158:b23ee177fd68	73	\|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
Kojto	158:b23ee177fd68	74	\|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
Kojto	158:b23ee177fd68	75
Kojto	158:b23ee177fd68	76	#define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
Kojto	158:b23ee177fd68	77	\|\| ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
Kojto	158:b23ee177fd68	78	\|\| ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
Kojto	158:b23ee177fd68	79	\|\| ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
Kojto	158:b23ee177fd68	80	\|\| ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
Kojto	158:b23ee177fd68	81	\|\| ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
Kojto	158:b23ee177fd68	82	\|\| ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
Kojto	158:b23ee177fd68	83	\|\| ((__VALUE__) == LL_TIM_OCMODE_PWM2))
Kojto	158:b23ee177fd68	84
Kojto	158:b23ee177fd68	85	#define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
Kojto	158:b23ee177fd68	86	\|\| ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
Kojto	158:b23ee177fd68	87
Kojto	158:b23ee177fd68	88	#define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
Kojto	158:b23ee177fd68	89	\|\| ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
Kojto	158:b23ee177fd68	90
Kojto	158:b23ee177fd68	91	#define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
Kojto	158:b23ee177fd68	92	\|\| ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
Kojto	158:b23ee177fd68	93	\|\| ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
Kojto	158:b23ee177fd68	94
Kojto	158:b23ee177fd68	95	#define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
Kojto	158:b23ee177fd68	96	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
Kojto	158:b23ee177fd68	97	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
Kojto	158:b23ee177fd68	98	\|\| ((__VALUE__) == LL_TIM_ICPSC_DIV8))
Kojto	158:b23ee177fd68	99
Kojto	158:b23ee177fd68	100	#define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
Kojto	158:b23ee177fd68	101	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
Kojto	158:b23ee177fd68	102	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
Kojto	158:b23ee177fd68	103	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
Kojto	158:b23ee177fd68	104	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
Kojto	158:b23ee177fd68	105	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
Kojto	158:b23ee177fd68	106	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
Kojto	158:b23ee177fd68	107	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
Kojto	158:b23ee177fd68	108	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
Kojto	158:b23ee177fd68	109	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
Kojto	158:b23ee177fd68	110	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
Kojto	158:b23ee177fd68	111	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
Kojto	158:b23ee177fd68	112	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
Kojto	158:b23ee177fd68	113	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
Kojto	158:b23ee177fd68	114	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
Kojto	158:b23ee177fd68	115	\|\| ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
Kojto	158:b23ee177fd68	116
Kojto	158:b23ee177fd68	117	#define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
Kojto	158:b23ee177fd68	118	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \
Kojto	158:b23ee177fd68	119	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE))
Kojto	158:b23ee177fd68	120
Kojto	158:b23ee177fd68	121	#define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
Kojto	158:b23ee177fd68	122	\|\| ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
Kojto	158:b23ee177fd68	123	\|\| ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
Kojto	158:b23ee177fd68	124
Kojto	158:b23ee177fd68	125	#define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
Kojto	158:b23ee177fd68	126	\|\| ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
Kojto	158:b23ee177fd68	127	/**
Kojto	158:b23ee177fd68	128	* @}
Kojto	158:b23ee177fd68	129	*/
Kojto	158:b23ee177fd68	130
Kojto	158:b23ee177fd68	131
Kojto	158:b23ee177fd68	132	/* Private function prototypes -----------------------------------------------*/
Kojto	158:b23ee177fd68	133	/** @defgroup TIM_LL_Private_Functions TIM Private Functions
Kojto	158:b23ee177fd68	134	* @{
Kojto	158:b23ee177fd68	135	*/
Kojto	158:b23ee177fd68	136	static ErrorStatus OC1Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct);
Kojto	158:b23ee177fd68	137	static ErrorStatus OC2Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct);
Kojto	158:b23ee177fd68	138	static ErrorStatus OC3Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct);
Kojto	158:b23ee177fd68	139	static ErrorStatus OC4Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct);
Kojto	158:b23ee177fd68	140	static ErrorStatus IC1Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	158:b23ee177fd68	141	static ErrorStatus IC2Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	158:b23ee177fd68	142	static ErrorStatus IC3Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	158:b23ee177fd68	143	static ErrorStatus IC4Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	158:b23ee177fd68	144	/**
Kojto	158:b23ee177fd68	145	* @}
Kojto	158:b23ee177fd68	146	*/
Kojto	158:b23ee177fd68	147
Kojto	158:b23ee177fd68	148	/* Exported functions --------------------------------------------------------*/
Kojto	158:b23ee177fd68	149	/** @addtogroup TIM_LL_Exported_Functions
Kojto	158:b23ee177fd68	150	* @{
Kojto	158:b23ee177fd68	151	*/
Kojto	158:b23ee177fd68	152
Kojto	158:b23ee177fd68	153	/** @addtogroup TIM_LL_EF_Init
Kojto	158:b23ee177fd68	154	* @{
Kojto	158:b23ee177fd68	155	*/
Kojto	158:b23ee177fd68	156
Kojto	158:b23ee177fd68	157	/**
Kojto	158:b23ee177fd68	158	* @brief Set TIMx registers to their reset values.
Kojto	158:b23ee177fd68	159	* @param TIMx Timer instance
Kojto	158:b23ee177fd68	160	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	161	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	162	* - ERROR: invalid TIMx instance
Kojto	158:b23ee177fd68	163	*/
Kojto	158:b23ee177fd68	164	ErrorStatus LL_TIM_DeInit(TIM_TypeDef* TIMx)
Kojto	158:b23ee177fd68	165	{
Kojto	158:b23ee177fd68	166	ErrorStatus result = SUCCESS;
Kojto	158:b23ee177fd68	167
Kojto	158:b23ee177fd68	168	/* Check the parameters */
Kojto	158:b23ee177fd68	169	assert_param(IS_TIM_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	170
Kojto	158:b23ee177fd68	171	if (TIMx == TIM2)
Kojto	158:b23ee177fd68	172	{
Kojto	158:b23ee177fd68	173	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
Kojto	158:b23ee177fd68	174	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
Kojto	158:b23ee177fd68	175	}
Kojto	158:b23ee177fd68	176	#if defined(TIM3)
Kojto	158:b23ee177fd68	177	else if (TIMx == TIM3)
Kojto	158:b23ee177fd68	178	{
Kojto	158:b23ee177fd68	179	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
Kojto	158:b23ee177fd68	180	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
Kojto	158:b23ee177fd68	181	}
Kojto	158:b23ee177fd68	182	#endif /* TIM3 */
Kojto	158:b23ee177fd68	183	#if defined(TIM6)
Kojto	158:b23ee177fd68	184	else if (TIMx == TIM6)
Kojto	158:b23ee177fd68	185	{
Kojto	158:b23ee177fd68	186	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
Kojto	158:b23ee177fd68	187	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
Kojto	158:b23ee177fd68	188	}
Kojto	158:b23ee177fd68	189	#endif /* TIM6 */
Kojto	158:b23ee177fd68	190	#if defined(TIM7)
Kojto	158:b23ee177fd68	191	else if (TIMx == TIM7)
Kojto	158:b23ee177fd68	192	{
Kojto	158:b23ee177fd68	193	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
Kojto	158:b23ee177fd68	194	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
Kojto	158:b23ee177fd68	195	}
Kojto	158:b23ee177fd68	196	#endif /* TIM7 */
Kojto	158:b23ee177fd68	197	else if (TIMx == TIM21)
Kojto	158:b23ee177fd68	198	{
Kojto	158:b23ee177fd68	199	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM21);
Kojto	158:b23ee177fd68	200	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM21);
Kojto	158:b23ee177fd68	201	}
Kojto	158:b23ee177fd68	202	#if defined(TIM22)
Kojto	158:b23ee177fd68	203	else if (TIMx == TIM22)
Kojto	158:b23ee177fd68	204	{
Kojto	158:b23ee177fd68	205	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM22);
Kojto	158:b23ee177fd68	206	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM22);
Kojto	158:b23ee177fd68	207	}
Kojto	158:b23ee177fd68	208	#endif /* TIM22 */
Kojto	158:b23ee177fd68	209	else
Kojto	158:b23ee177fd68	210	{
Kojto	158:b23ee177fd68	211	result = ERROR;
Kojto	158:b23ee177fd68	212	}
Kojto	158:b23ee177fd68	213
Kojto	158:b23ee177fd68	214	return result;
Kojto	158:b23ee177fd68	215	}
Kojto	158:b23ee177fd68	216
Kojto	158:b23ee177fd68	217	/**
Kojto	158:b23ee177fd68	218	* @brief Set the fields of the time base unit configuration data structure
Kojto	158:b23ee177fd68	219	* to their default values.
Kojto	158:b23ee177fd68	220	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configuration data structure)
Kojto	158:b23ee177fd68	221	* @retval None
Kojto	158:b23ee177fd68	222	*/
Kojto	158:b23ee177fd68	223	void LL_TIM_StructInit(LL_TIM_InitTypeDef* TIM_InitStruct)
Kojto	158:b23ee177fd68	224	{
Kojto	158:b23ee177fd68	225	/* Set the default configuration */
Kojto	158:b23ee177fd68	226	TIM_InitStruct->Prescaler = (uint16_t)0x0000U;
Kojto	158:b23ee177fd68	227	TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP;
Kojto	158:b23ee177fd68	228	TIM_InitStruct->Autoreload = (uint32_t)0xFFFFFFFFU;
Kojto	158:b23ee177fd68	229	TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
Kojto	158:b23ee177fd68	230	}
Kojto	158:b23ee177fd68	231
Kojto	158:b23ee177fd68	232	/**
Kojto	158:b23ee177fd68	233	* @brief Configure the TIMx time base unit.
Kojto	158:b23ee177fd68	234	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	235	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
Kojto	158:b23ee177fd68	236	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	237	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	238	* - ERROR: not applicable
Kojto	158:b23ee177fd68	239	*/
Kojto	158:b23ee177fd68	240	ErrorStatus LL_TIM_Init(TIM_TypeDef * TIMx, LL_TIM_InitTypeDef* TIM_InitStruct)
Kojto	158:b23ee177fd68	241	{
Kojto	158:b23ee177fd68	242	uint16_t tmpcr1 = 0U;
Kojto	158:b23ee177fd68	243
Kojto	158:b23ee177fd68	244	/* Check the parameters */
Kojto	158:b23ee177fd68	245	assert_param(IS_TIM_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	246	assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
Kojto	158:b23ee177fd68	247	assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
Kojto	158:b23ee177fd68	248
Kojto	158:b23ee177fd68	249	tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
Kojto	158:b23ee177fd68	250
Kojto	158:b23ee177fd68	251	if(IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
Kojto	158:b23ee177fd68	252	{
Kojto	158:b23ee177fd68	253	/* Select the Counter Mode */
Kojto	158:b23ee177fd68	254	tmpcr1 &= (uint16_t)(~(TIM_CR1_DIR \| TIM_CR1_CMS));
Kojto	158:b23ee177fd68	255	tmpcr1 \|= (uint32_t)TIM_InitStruct->CounterMode;
Kojto	158:b23ee177fd68	256	}
Kojto	158:b23ee177fd68	257
Kojto	158:b23ee177fd68	258	if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
Kojto	158:b23ee177fd68	259	{
Kojto	158:b23ee177fd68	260	/* Set the clock division */
Kojto	158:b23ee177fd68	261	tmpcr1 &= (uint16_t)(~TIM_CR1_CKD);
Kojto	158:b23ee177fd68	262	tmpcr1 \|= (uint32_t)TIM_InitStruct->ClockDivision;
Kojto	158:b23ee177fd68	263	}
Kojto	158:b23ee177fd68	264
Kojto	158:b23ee177fd68	265	/* Write to TIMx CR1 */
Kojto	158:b23ee177fd68	266	LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
Kojto	158:b23ee177fd68	267
Kojto	158:b23ee177fd68	268	/* Set the Autoreload value */
Kojto	158:b23ee177fd68	269	LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
Kojto	158:b23ee177fd68	270
Kojto	158:b23ee177fd68	271	/* Set the Prescaler value */
Kojto	158:b23ee177fd68	272	LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
Kojto	158:b23ee177fd68	273	/* Generate an update event to reload the Prescaler
Kojto	158:b23ee177fd68	274	and the repetition counter value (if applicable) immediately */
Kojto	158:b23ee177fd68	275	LL_TIM_GenerateEvent_UPDATE(TIMx);
Kojto	158:b23ee177fd68	276
Kojto	158:b23ee177fd68	277	return SUCCESS;
Kojto	158:b23ee177fd68	278	}
Kojto	158:b23ee177fd68	279
Kojto	158:b23ee177fd68	280	/**
Kojto	158:b23ee177fd68	281	* @brief Set the fields of the TIMx output channel configuration data
Kojto	158:b23ee177fd68	282	* structure to their default values.
Kojto	158:b23ee177fd68	283	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
Kojto	158:b23ee177fd68	284	* @retval None
Kojto	158:b23ee177fd68	285	*/
Kojto	158:b23ee177fd68	286	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct)
Kojto	158:b23ee177fd68	287	{
Kojto	158:b23ee177fd68	288	/* Set the default configuration */
Kojto	158:b23ee177fd68	289	TIM_OC_InitStruct->OCMode = LL_TIM_OCMODE_FROZEN;
Kojto	158:b23ee177fd68	290	TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE;
Kojto	158:b23ee177fd68	291	TIM_OC_InitStruct->CompareValue = (uint32_t)0x00000000U;
Kojto	158:b23ee177fd68	292	TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH;
Kojto	158:b23ee177fd68	293	}
Kojto	158:b23ee177fd68	294
Kojto	158:b23ee177fd68	295	/**
Kojto	158:b23ee177fd68	296	* @brief Configure the TIMx output channel.
Kojto	158:b23ee177fd68	297	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	298	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	299	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	158:b23ee177fd68	300	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	158:b23ee177fd68	301	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	158:b23ee177fd68	302	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	158:b23ee177fd68	303	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
Kojto	158:b23ee177fd68	304	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	305	* - SUCCESS: TIMx output channel is initialized
Kojto	158:b23ee177fd68	306	* - ERROR: TIMx output channel is not initialized
Kojto	158:b23ee177fd68	307	*/
Kojto	158:b23ee177fd68	308	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct)
Kojto	158:b23ee177fd68	309	{
Kojto	158:b23ee177fd68	310	ErrorStatus result = ERROR;
Kojto	158:b23ee177fd68	311
Kojto	158:b23ee177fd68	312	switch(Channel)
Kojto	158:b23ee177fd68	313	{
Kojto	158:b23ee177fd68	314	case LL_TIM_CHANNEL_CH1:
Kojto	158:b23ee177fd68	315	result = OC1Config(TIMx, TIM_OC_InitStruct);
Kojto	158:b23ee177fd68	316	break;
Kojto	158:b23ee177fd68	317	case LL_TIM_CHANNEL_CH2:
Kojto	158:b23ee177fd68	318	result = OC2Config(TIMx, TIM_OC_InitStruct);
Kojto	158:b23ee177fd68	319	break;
Kojto	158:b23ee177fd68	320	case LL_TIM_CHANNEL_CH3:
Kojto	158:b23ee177fd68	321	result = OC3Config(TIMx, TIM_OC_InitStruct);
Kojto	158:b23ee177fd68	322	break;
Kojto	158:b23ee177fd68	323	case LL_TIM_CHANNEL_CH4:
Kojto	158:b23ee177fd68	324	result = OC4Config(TIMx, TIM_OC_InitStruct);
Kojto	158:b23ee177fd68	325	break;
Kojto	158:b23ee177fd68	326	default:
Kojto	158:b23ee177fd68	327	break;
Kojto	158:b23ee177fd68	328	}
Kojto	158:b23ee177fd68	329
Kojto	158:b23ee177fd68	330	return result;
Kojto	158:b23ee177fd68	331	}
Kojto	158:b23ee177fd68	332
Kojto	158:b23ee177fd68	333	/**
Kojto	158:b23ee177fd68	334	* @brief Set the fields of the TIMx input channel configuration data
Kojto	158:b23ee177fd68	335	* structure to their default values.
Kojto	158:b23ee177fd68	336	* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
Kojto	158:b23ee177fd68	337	* @retval None
Kojto	158:b23ee177fd68	338	*/
Kojto	158:b23ee177fd68	339	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef* TIM_ICInitStruct)
Kojto	158:b23ee177fd68	340	{
Kojto	158:b23ee177fd68	341	/* Set the default configuration */
Kojto	158:b23ee177fd68	342	TIM_ICInitStruct->ICPolarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	343	TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	344	TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	345	TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	346	}
Kojto	158:b23ee177fd68	347
Kojto	158:b23ee177fd68	348	/**
Kojto	158:b23ee177fd68	349	* @brief Configure the TIMx input channel.
Kojto	158:b23ee177fd68	350	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	351	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	352	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	158:b23ee177fd68	353	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	158:b23ee177fd68	354	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	158:b23ee177fd68	355	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	158:b23ee177fd68	356	* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
Kojto	158:b23ee177fd68	357	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	358	* - SUCCESS: TIMx output channel is initialized
Kojto	158:b23ee177fd68	359	* - ERROR: TIMx output channel is not initialized
Kojto	158:b23ee177fd68	360	*/
Kojto	158:b23ee177fd68	361	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef* TIM_IC_InitStruct)
Kojto	158:b23ee177fd68	362	{
Kojto	158:b23ee177fd68	363	ErrorStatus result = ERROR;
Kojto	158:b23ee177fd68	364
Kojto	158:b23ee177fd68	365	switch(Channel)
Kojto	158:b23ee177fd68	366	{
Kojto	158:b23ee177fd68	367	case LL_TIM_CHANNEL_CH1:
Kojto	158:b23ee177fd68	368	result = IC1Config(TIMx, TIM_IC_InitStruct);
Kojto	158:b23ee177fd68	369	break;
Kojto	158:b23ee177fd68	370	case LL_TIM_CHANNEL_CH2:
Kojto	158:b23ee177fd68	371	result = IC2Config(TIMx, TIM_IC_InitStruct);
Kojto	158:b23ee177fd68	372	break;
Kojto	158:b23ee177fd68	373	case LL_TIM_CHANNEL_CH3:
Kojto	158:b23ee177fd68	374	result = IC3Config(TIMx, TIM_IC_InitStruct);
Kojto	158:b23ee177fd68	375	break;
Kojto	158:b23ee177fd68	376	case LL_TIM_CHANNEL_CH4:
Kojto	158:b23ee177fd68	377	result = IC4Config(TIMx, TIM_IC_InitStruct);
Kojto	158:b23ee177fd68	378	break;
Kojto	158:b23ee177fd68	379	default:
Kojto	158:b23ee177fd68	380	break;
Kojto	158:b23ee177fd68	381	}
Kojto	158:b23ee177fd68	382
Kojto	158:b23ee177fd68	383	return result;
Kojto	158:b23ee177fd68	384	}
Kojto	158:b23ee177fd68	385
Kojto	158:b23ee177fd68	386	/**
Kojto	158:b23ee177fd68	387	* @brief Fills each TIM_EncoderInitStruct field with its default value
Kojto	158:b23ee177fd68	388	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
Kojto	158:b23ee177fd68	389	* @retval None
Kojto	158:b23ee177fd68	390	*/
Kojto	158:b23ee177fd68	391	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct)
Kojto	158:b23ee177fd68	392	{
Kojto	158:b23ee177fd68	393	/* Set the default configuration */
Kojto	158:b23ee177fd68	394	TIM_EncoderInitStruct->EncoderMode = LL_TIM_ENCODERMODE_X2_TI1;
Kojto	158:b23ee177fd68	395	TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	396	TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	397	TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	398	TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	399	TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING;
Kojto	158:b23ee177fd68	400	TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
Kojto	158:b23ee177fd68	401	TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1;
Kojto	158:b23ee177fd68	402	TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1;
Kojto	158:b23ee177fd68	403	}
Kojto	158:b23ee177fd68	404
Kojto	158:b23ee177fd68	405	/**
Kojto	158:b23ee177fd68	406	* @brief Configure the encoder interface of the timer instance.
Kojto	158:b23ee177fd68	407	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	408	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
Kojto	158:b23ee177fd68	409	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	410	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	411	* - ERROR: not applicable
Kojto	158:b23ee177fd68	412	*/
Kojto	158:b23ee177fd68	413	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef* TIMx, LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct)
Kojto	158:b23ee177fd68	414	{
Kojto	158:b23ee177fd68	415	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	416	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	417
Kojto	158:b23ee177fd68	418	/* Check the parameters */
Kojto	158:b23ee177fd68	419	assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	420	assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
Kojto	158:b23ee177fd68	421	assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
Kojto	158:b23ee177fd68	422	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput));
Kojto	158:b23ee177fd68	423	assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler));
Kojto	158:b23ee177fd68	424	assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter));
Kojto	158:b23ee177fd68	425	assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity));
Kojto	158:b23ee177fd68	426	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput));
Kojto	158:b23ee177fd68	427	assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler));
Kojto	158:b23ee177fd68	428	assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter));
Kojto	158:b23ee177fd68	429
Kojto	158:b23ee177fd68	430	/* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
Kojto	158:b23ee177fd68	431	TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E \| TIM_CCER_CC2E);
Kojto	158:b23ee177fd68	432
Kojto	158:b23ee177fd68	433	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	434	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Kojto	158:b23ee177fd68	435
Kojto	158:b23ee177fd68	436	/* Get the TIMx CCER register value */
Kojto	158:b23ee177fd68	437	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	438
Kojto	158:b23ee177fd68	439	/* Configure TI1 */
Kojto	158:b23ee177fd68	440	tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S \| TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC);
Kojto	158:b23ee177fd68	441	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);
Kojto	158:b23ee177fd68	442	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
Kojto	158:b23ee177fd68	443	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);
Kojto	158:b23ee177fd68	444
Kojto	158:b23ee177fd68	445	/* Configure TI2 */
Kojto	158:b23ee177fd68	446	tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S \| TIM_CCMR1_IC2F \| TIM_CCMR1_IC2PSC);
Kojto	158:b23ee177fd68	447	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);
Kojto	158:b23ee177fd68	448	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);
Kojto	158:b23ee177fd68	449	tmpccmr1 \|= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);
Kojto	158:b23ee177fd68	450
Kojto	158:b23ee177fd68	451	/* Set TI1 and TI2 polarity and enable TI1 and TI2 */
Kojto	158:b23ee177fd68	452	tmpccer &= (uint32_t)~(TIM_CCER_CC1P \| TIM_CCER_CC1NP \| TIM_CCER_CC2P \| TIM_CCER_CC2NP);
Kojto	158:b23ee177fd68	453	tmpccer \|= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
Kojto	158:b23ee177fd68	454	tmpccer \|= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U);
Kojto	158:b23ee177fd68	455	tmpccer \|= (uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E);
Kojto	158:b23ee177fd68	456
Kojto	158:b23ee177fd68	457	/* Set encoder mode */
Kojto	158:b23ee177fd68	458	LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode);
Kojto	158:b23ee177fd68	459
Kojto	158:b23ee177fd68	460	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	461	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Kojto	158:b23ee177fd68	462
Kojto	158:b23ee177fd68	463	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	464	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	465
Kojto	158:b23ee177fd68	466	return SUCCESS;
Kojto	158:b23ee177fd68	467	}
Kojto	158:b23ee177fd68	468
Kojto	158:b23ee177fd68	469
Kojto	158:b23ee177fd68	470	/**
Kojto	158:b23ee177fd68	471	* @}
Kojto	158:b23ee177fd68	472	*/
Kojto	158:b23ee177fd68	473
Kojto	158:b23ee177fd68	474	/**
Kojto	158:b23ee177fd68	475	* @}
Kojto	158:b23ee177fd68	476	*/
Kojto	158:b23ee177fd68	477
Kojto	158:b23ee177fd68	478	/** @addtogroup TIM_LL_Private_Functions TIM Private Functions
Kojto	158:b23ee177fd68	479	* @brief Private functions
Kojto	158:b23ee177fd68	480	* @{
Kojto	158:b23ee177fd68	481	*/
Kojto	158:b23ee177fd68	482	/**
Kojto	158:b23ee177fd68	483	* @brief Configure the TIMx output channel 1.
Kojto	158:b23ee177fd68	484	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	485	* @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure
Kojto	158:b23ee177fd68	486	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	487	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	488	* - ERROR: not applicable
Kojto	158:b23ee177fd68	489	*/
Kojto	158:b23ee177fd68	490	static ErrorStatus OC1Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct)
Kojto	158:b23ee177fd68	491	{
Kojto	158:b23ee177fd68	492	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	493	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	494	uint32_t tmpcr2 = 0U;
Kojto	158:b23ee177fd68	495
Kojto	158:b23ee177fd68	496	/* Check the parameters */
Kojto	158:b23ee177fd68	497	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	498	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	499	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Kojto	158:b23ee177fd68	500	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	501
Kojto	158:b23ee177fd68	502	/* Disable the Channel 1: Reset the CC1E Bit */
Kojto	158:b23ee177fd68	503	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
Kojto	158:b23ee177fd68	504
Kojto	158:b23ee177fd68	505	/* Get the TIMx CCER register value */
Kojto	158:b23ee177fd68	506	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	507
Kojto	158:b23ee177fd68	508	/* Get the TIMx CR2 register value */
Kojto	158:b23ee177fd68	509	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Kojto	158:b23ee177fd68	510
Kojto	158:b23ee177fd68	511	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	512	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Kojto	158:b23ee177fd68	513
Kojto	158:b23ee177fd68	514	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	515	CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);
Kojto	158:b23ee177fd68	516
Kojto	158:b23ee177fd68	517	/* Set the Output Compare Mode */
Kojto	158:b23ee177fd68	518	MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);
Kojto	158:b23ee177fd68	519
Kojto	158:b23ee177fd68	520	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	521	MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity);
Kojto	158:b23ee177fd68	522
Kojto	158:b23ee177fd68	523	/* Set the Output State */
Kojto	158:b23ee177fd68	524	MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState);
Kojto	158:b23ee177fd68	525
Kojto	158:b23ee177fd68	526	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	527	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Kojto	158:b23ee177fd68	528
Kojto	158:b23ee177fd68	529	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	530	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Kojto	158:b23ee177fd68	531
Kojto	158:b23ee177fd68	532	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	533	LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue);
Kojto	158:b23ee177fd68	534
Kojto	158:b23ee177fd68	535	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	536	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	537
Kojto	158:b23ee177fd68	538	return SUCCESS;
Kojto	158:b23ee177fd68	539	}
Kojto	158:b23ee177fd68	540
Kojto	158:b23ee177fd68	541	/**
Kojto	158:b23ee177fd68	542	* @brief Configure the TIMx output channel 2.
Kojto	158:b23ee177fd68	543	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	544	* @param TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure
Kojto	158:b23ee177fd68	545	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	546	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	547	* - ERROR: not applicable
Kojto	158:b23ee177fd68	548	*/
Kojto	158:b23ee177fd68	549	static ErrorStatus OC2Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct)
Kojto	158:b23ee177fd68	550	{
Kojto	158:b23ee177fd68	551	uint32_t tmpccmr1 = 0U;
Kojto	158:b23ee177fd68	552	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	553	uint32_t tmpcr2 = 0U;
Kojto	158:b23ee177fd68	554
Kojto	158:b23ee177fd68	555	/* Check the parameters */
Kojto	158:b23ee177fd68	556	assert_param(IS_TIM_CC2_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	557	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	558	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Kojto	158:b23ee177fd68	559	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	560
Kojto	158:b23ee177fd68	561	/* Disable the Channel 2: Reset the CC2E Bit */
Kojto	158:b23ee177fd68	562	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
Kojto	158:b23ee177fd68	563
Kojto	158:b23ee177fd68	564	/* Get the TIMx CCER register value */
Kojto	158:b23ee177fd68	565	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	566
Kojto	158:b23ee177fd68	567	/* Get the TIMx CR2 register value */
Kojto	158:b23ee177fd68	568	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Kojto	158:b23ee177fd68	569
Kojto	158:b23ee177fd68	570	/* Get the TIMx CCMR1 register value */
Kojto	158:b23ee177fd68	571	tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
Kojto	158:b23ee177fd68	572
Kojto	158:b23ee177fd68	573	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	574	CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);
Kojto	158:b23ee177fd68	575
Kojto	158:b23ee177fd68	576	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	577	MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);
Kojto	158:b23ee177fd68	578
Kojto	158:b23ee177fd68	579	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	580	MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity<< 4U);
Kojto	158:b23ee177fd68	581
Kojto	158:b23ee177fd68	582	/* Set the Output State */
Kojto	158:b23ee177fd68	583	MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U);
Kojto	158:b23ee177fd68	584
Kojto	158:b23ee177fd68	585	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	586	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Kojto	158:b23ee177fd68	587
Kojto	158:b23ee177fd68	588	/* Write to TIMx CCMR1 */
Kojto	158:b23ee177fd68	589	LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
Kojto	158:b23ee177fd68	590
Kojto	158:b23ee177fd68	591	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	592	LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue);
Kojto	158:b23ee177fd68	593
Kojto	158:b23ee177fd68	594	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	595	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	596
Kojto	158:b23ee177fd68	597	return SUCCESS;
Kojto	158:b23ee177fd68	598	}
Kojto	158:b23ee177fd68	599
Kojto	158:b23ee177fd68	600	/**
Kojto	158:b23ee177fd68	601	* @brief Configure the TIMx output channel 3.
Kojto	158:b23ee177fd68	602	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	603	* @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
Kojto	158:b23ee177fd68	604	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	605	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	606	* - ERROR: not applicable
Kojto	158:b23ee177fd68	607	*/
Kojto	158:b23ee177fd68	608	static ErrorStatus OC3Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct)
Kojto	158:b23ee177fd68	609	{
Kojto	158:b23ee177fd68	610	uint32_t tmpccmr2 = 0U;
Kojto	158:b23ee177fd68	611	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	612	uint32_t tmpcr2 = 0U;
Kojto	158:b23ee177fd68	613
Kojto	158:b23ee177fd68	614	/* Check the parameters */
Kojto	158:b23ee177fd68	615	assert_param(IS_TIM_CC3_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	616	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	617	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Kojto	158:b23ee177fd68	618	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	619
Kojto	158:b23ee177fd68	620	/* Disable the Channel 3: Reset the CC3E Bit */
Kojto	158:b23ee177fd68	621	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
Kojto	158:b23ee177fd68	622
Kojto	158:b23ee177fd68	623	/* Get the TIMx CCER register value */
Kojto	158:b23ee177fd68	624	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	625
Kojto	158:b23ee177fd68	626	/* Get the TIMx CR2 register value */
Kojto	158:b23ee177fd68	627	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Kojto	158:b23ee177fd68	628
Kojto	158:b23ee177fd68	629	/* Get the TIMx CCMR2 register value */
Kojto	158:b23ee177fd68	630	tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
Kojto	158:b23ee177fd68	631
Kojto	158:b23ee177fd68	632	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	633	CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S);
Kojto	158:b23ee177fd68	634
Kojto	158:b23ee177fd68	635	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	636	MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode);
Kojto	158:b23ee177fd68	637
Kojto	158:b23ee177fd68	638	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	639	MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U);
Kojto	158:b23ee177fd68	640
Kojto	158:b23ee177fd68	641	/* Set the Output State */
Kojto	158:b23ee177fd68	642	MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U);
Kojto	158:b23ee177fd68	643
Kojto	158:b23ee177fd68	644	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	645	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Kojto	158:b23ee177fd68	646
Kojto	158:b23ee177fd68	647	/* Write to TIMx CCMR2 */
Kojto	158:b23ee177fd68	648	LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
Kojto	158:b23ee177fd68	649
Kojto	158:b23ee177fd68	650	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	651	LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
Kojto	158:b23ee177fd68	652
Kojto	158:b23ee177fd68	653	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	654	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	655
Kojto	158:b23ee177fd68	656	return SUCCESS;
Kojto	158:b23ee177fd68	657	}
Kojto	158:b23ee177fd68	658
Kojto	158:b23ee177fd68	659	/**
Kojto	158:b23ee177fd68	660	* @brief Configure the TIMx output channel 4.
Kojto	158:b23ee177fd68	661	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	662	* @param TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure
Kojto	158:b23ee177fd68	663	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	664	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	665	* - ERROR: not applicable
Kojto	158:b23ee177fd68	666	*/
Kojto	158:b23ee177fd68	667	static ErrorStatus OC4Config(TIM_TypeDef* TIMx, LL_TIM_OC_InitTypeDef* TIM_OCInitStruct)
Kojto	158:b23ee177fd68	668	{
Kojto	158:b23ee177fd68	669	uint32_t tmpccmr2 = 0U;
Kojto	158:b23ee177fd68	670	uint32_t tmpccer = 0U;
Kojto	158:b23ee177fd68	671	uint32_t tmpcr2 = 0U;
Kojto	158:b23ee177fd68	672
Kojto	158:b23ee177fd68	673	/* Check the parameters */
Kojto	158:b23ee177fd68	674	assert_param(IS_TIM_CC4_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	675	assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
Kojto	158:b23ee177fd68	676	assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
Kojto	158:b23ee177fd68	677	assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
Kojto	158:b23ee177fd68	678
Kojto	158:b23ee177fd68	679	/* Disable the Channel 4: Reset the CC4E Bit */
Kojto	158:b23ee177fd68	680	CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
Kojto	158:b23ee177fd68	681
Kojto	158:b23ee177fd68	682	/* Get the TIMx CCER register value */
Kojto	158:b23ee177fd68	683	tmpccer = LL_TIM_ReadReg(TIMx, CCER);
Kojto	158:b23ee177fd68	684
Kojto	158:b23ee177fd68	685	/* Get the TIMx CR2 register value */
Kojto	158:b23ee177fd68	686	tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
Kojto	158:b23ee177fd68	687
Kojto	158:b23ee177fd68	688	/* Get the TIMx CCMR2 register value */
Kojto	158:b23ee177fd68	689	tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
Kojto	158:b23ee177fd68	690
Kojto	158:b23ee177fd68	691	/* Reset Capture/Compare selection Bits */
Kojto	158:b23ee177fd68	692	CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S);
Kojto	158:b23ee177fd68	693
Kojto	158:b23ee177fd68	694	/* Select the Output Compare Mode */
Kojto	158:b23ee177fd68	695	MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U);
Kojto	158:b23ee177fd68	696
Kojto	158:b23ee177fd68	697	/* Set the Output Compare Polarity */
Kojto	158:b23ee177fd68	698	MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U);
Kojto	158:b23ee177fd68	699
Kojto	158:b23ee177fd68	700	/* Set the Output State */
Kojto	158:b23ee177fd68	701	MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U);
Kojto	158:b23ee177fd68	702
Kojto	158:b23ee177fd68	703	/* Write to TIMx CR2 */
Kojto	158:b23ee177fd68	704	LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
Kojto	158:b23ee177fd68	705
Kojto	158:b23ee177fd68	706	/* Write to TIMx CCMR2 */
Kojto	158:b23ee177fd68	707	LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
Kojto	158:b23ee177fd68	708
Kojto	158:b23ee177fd68	709	/* Set the Capture Compare Register value */
Kojto	158:b23ee177fd68	710	LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue);
Kojto	158:b23ee177fd68	711
Kojto	158:b23ee177fd68	712	/* Write to TIMx CCER */
Kojto	158:b23ee177fd68	713	LL_TIM_WriteReg(TIMx, CCER, tmpccer);
Kojto	158:b23ee177fd68	714
Kojto	158:b23ee177fd68	715	return SUCCESS;
Kojto	158:b23ee177fd68	716	}
Kojto	158:b23ee177fd68	717
Kojto	158:b23ee177fd68	718
Kojto	158:b23ee177fd68	719	/**
Kojto	158:b23ee177fd68	720	* @brief Configure the TIMx input channel 1.
Kojto	158:b23ee177fd68	721	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	722	* @param TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure
Kojto	158:b23ee177fd68	723	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	724	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	725	* - ERROR: not applicable
Kojto	158:b23ee177fd68	726	*/
Kojto	158:b23ee177fd68	727	static ErrorStatus IC1Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct)
Kojto	158:b23ee177fd68	728	{
Kojto	158:b23ee177fd68	729	/* Check the parameters */
Kojto	158:b23ee177fd68	730	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	731	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	732	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	733	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	734	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Kojto	158:b23ee177fd68	735
Kojto	158:b23ee177fd68	736	/* Disable the Channel 1: Reset the CC1E Bit */
Kojto	158:b23ee177fd68	737	TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E;
Kojto	158:b23ee177fd68	738
Kojto	158:b23ee177fd68	739	/* Select the Input and set the filter and the prescaler value */
Kojto	158:b23ee177fd68	740	MODIFY_REG(TIMx->CCMR1,
Kojto	158:b23ee177fd68	741	(TIM_CCMR1_CC1S \| TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC),
Kojto	158:b23ee177fd68	742	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 16U);
Kojto	158:b23ee177fd68	743
Kojto	158:b23ee177fd68	744	/* Select the Polarity and set the CC1E Bit */
Kojto	158:b23ee177fd68	745	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	746	(TIM_CCER_CC1P \| TIM_CCER_CC1NP),
Kojto	158:b23ee177fd68	747	(TIM_ICInitStruct->ICPolarity \| TIM_CCER_CC1E));
Kojto	158:b23ee177fd68	748
Kojto	158:b23ee177fd68	749	return SUCCESS;
Kojto	158:b23ee177fd68	750	}
Kojto	158:b23ee177fd68	751
Kojto	158:b23ee177fd68	752	/**
Kojto	158:b23ee177fd68	753	* @brief Configure the TIMx input channel 2.
Kojto	158:b23ee177fd68	754	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	755	* @param TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure
Kojto	158:b23ee177fd68	756	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	757	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	758	* - ERROR: not applicable
Kojto	158:b23ee177fd68	759	*/
Kojto	158:b23ee177fd68	760	static ErrorStatus IC2Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct)
Kojto	158:b23ee177fd68	761	{
Kojto	158:b23ee177fd68	762	/* Check the parameters */
Kojto	158:b23ee177fd68	763	assert_param(IS_TIM_CC2_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	764	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	765	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	766	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	767	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Kojto	158:b23ee177fd68	768
Kojto	158:b23ee177fd68	769	/* Disable the Channel 2: Reset the CC2E Bit */
Kojto	158:b23ee177fd68	770	TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E;
Kojto	158:b23ee177fd68	771
Kojto	158:b23ee177fd68	772	/* Select the Input and set the filter and the prescaler value */
Kojto	158:b23ee177fd68	773	MODIFY_REG(TIMx->CCMR1,
Kojto	158:b23ee177fd68	774	(TIM_CCMR1_CC2S \| TIM_CCMR1_IC2F \| TIM_CCMR1_IC2PSC),
Kojto	158:b23ee177fd68	775	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 8U);
Kojto	158:b23ee177fd68	776
Kojto	158:b23ee177fd68	777	/* Select the Polarity and set the CC2E Bit */
Kojto	158:b23ee177fd68	778	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	779	(TIM_CCER_CC2P \| TIM_CCER_CC2NP),
Kojto	158:b23ee177fd68	780	((TIM_ICInitStruct->ICPolarity << 4U) \| TIM_CCER_CC2E) );
Kojto	158:b23ee177fd68	781
Kojto	158:b23ee177fd68	782	return SUCCESS;
Kojto	158:b23ee177fd68	783	}
Kojto	158:b23ee177fd68	784
Kojto	158:b23ee177fd68	785	/**
Kojto	158:b23ee177fd68	786	* @brief Configure the TIMx input channel 3.
Kojto	158:b23ee177fd68	787	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	788	* @param TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure
Kojto	158:b23ee177fd68	789	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	790	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	791	* - ERROR: not applicable
Kojto	158:b23ee177fd68	792	*/
Kojto	158:b23ee177fd68	793	static ErrorStatus IC3Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct)
Kojto	158:b23ee177fd68	794	{
Kojto	158:b23ee177fd68	795	/* Check the parameters */
Kojto	158:b23ee177fd68	796	assert_param(IS_TIM_CC3_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	797	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	798	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	799	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	800	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Kojto	158:b23ee177fd68	801
Kojto	158:b23ee177fd68	802	/* Disable the Channel 3: Reset the CC3E Bit */
Kojto	158:b23ee177fd68	803	TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E;
Kojto	158:b23ee177fd68	804
Kojto	158:b23ee177fd68	805	/* Select the Input and set the filter and the prescaler value */
Kojto	158:b23ee177fd68	806	MODIFY_REG(TIMx->CCMR2,
Kojto	158:b23ee177fd68	807	(TIM_CCMR2_CC3S \| TIM_CCMR2_IC3F \| TIM_CCMR2_IC3PSC),
Kojto	158:b23ee177fd68	808	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 16U);
Kojto	158:b23ee177fd68	809
Kojto	158:b23ee177fd68	810	/* Select the Polarity and set the CC3E Bit */
Kojto	158:b23ee177fd68	811	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	812	(TIM_CCER_CC3P \| TIM_CCER_CC3NP),
Kojto	158:b23ee177fd68	813	((TIM_ICInitStruct->ICPolarity << 8U) \| TIM_CCER_CC3E) );
Kojto	158:b23ee177fd68	814
Kojto	158:b23ee177fd68	815	return SUCCESS;
Kojto	158:b23ee177fd68	816	}
Kojto	158:b23ee177fd68	817
Kojto	158:b23ee177fd68	818	/**
Kojto	158:b23ee177fd68	819	* @brief Configure the TIMx input channel 4.
Kojto	158:b23ee177fd68	820	* @param TIMx Timer Instance
Kojto	158:b23ee177fd68	821	* @param TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure
Kojto	158:b23ee177fd68	822	* @retval An ErrorStatus enumeration value:
Kojto	158:b23ee177fd68	823	* - SUCCESS: TIMx registers are de-initialized
Kojto	158:b23ee177fd68	824	* - ERROR: not applicable
Kojto	158:b23ee177fd68	825	*/
Kojto	158:b23ee177fd68	826	static ErrorStatus IC4Config(TIM_TypeDef* TIMx, LL_TIM_IC_InitTypeDef* TIM_ICInitStruct)
Kojto	158:b23ee177fd68	827	{
Kojto	158:b23ee177fd68	828	/* Check the parameters */
Kojto	158:b23ee177fd68	829	assert_param(IS_TIM_CC4_INSTANCE(TIMx));
Kojto	158:b23ee177fd68	830	assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
Kojto	158:b23ee177fd68	831	assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
Kojto	158:b23ee177fd68	832	assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
Kojto	158:b23ee177fd68	833	assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
Kojto	158:b23ee177fd68	834
Kojto	158:b23ee177fd68	835	/* Disable the Channel 4: Reset the CC4E Bit */
Kojto	158:b23ee177fd68	836	TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E;
Kojto	158:b23ee177fd68	837
Kojto	158:b23ee177fd68	838	/* Select the Input and set the filter and the prescaler value */
Kojto	158:b23ee177fd68	839	MODIFY_REG(TIMx->CCMR2,
Kojto	158:b23ee177fd68	840	(TIM_CCMR2_CC4S \| TIM_CCMR2_IC4F \| TIM_CCMR2_IC4PSC),
Kojto	158:b23ee177fd68	841	(TIM_ICInitStruct->ICActiveInput \| TIM_ICInitStruct->ICFilter \| TIM_ICInitStruct->ICPrescaler) >> 8U);
Kojto	158:b23ee177fd68	842
Kojto	158:b23ee177fd68	843	/* Select the Polarity and set the CC2E Bit */
Kojto	158:b23ee177fd68	844	MODIFY_REG(TIMx->CCER,
Kojto	158:b23ee177fd68	845	(TIM_CCER_CC4P \| TIM_CCER_CC4NP),
Kojto	158:b23ee177fd68	846	((TIM_ICInitStruct->ICPolarity << 12U) \| TIM_CCER_CC4E) );
Kojto	158:b23ee177fd68	847
Kojto	158:b23ee177fd68	848	return SUCCESS;
Kojto	158:b23ee177fd68	849	}
Kojto	158:b23ee177fd68	850
Kojto	158:b23ee177fd68	851
Kojto	158:b23ee177fd68	852	/**
Kojto	158:b23ee177fd68	853	* @}
Kojto	158:b23ee177fd68	854	*/
Kojto	158:b23ee177fd68	855
Kojto	158:b23ee177fd68	856	/**
Kojto	158:b23ee177fd68	857	* @}
Kojto	158:b23ee177fd68	858	*/
Kojto	158:b23ee177fd68	859
Kojto	158:b23ee177fd68	860	#endif /* TIM1 \|\| TIM3 \|\| TIM21 \|\| TIM22 \|\| TIM6 \|\| TIM7 */
Kojto	158:b23ee177fd68	861
Kojto	158:b23ee177fd68	862	/**
Kojto	158:b23ee177fd68	863	* @}
Kojto	158:b23ee177fd68	864	*/
Kojto	158:b23ee177fd68	865
Kojto	158:b23ee177fd68	866	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	867
Kojto	158:b23ee177fd68	868	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/