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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_cryp.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 186:707f6e361f3e

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32l0xx_hal_cryp.c
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	144:ef7eb2e8f9f7	5	* @brief CRYP HAL module driver.
<>	144:ef7eb2e8f9f7	6	*
<>	144:ef7eb2e8f9f7	7	* This file provides firmware functions to manage the following
<>	144:ef7eb2e8f9f7	8	* functionalities of the Cryptography (CRYP) peripheral:
<>	144:ef7eb2e8f9f7	9	* + Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	10	* + Processing functions by algorithm using polling mode
<>	144:ef7eb2e8f9f7	11	* + Processing functions by algorithm using interrupt mode
<>	144:ef7eb2e8f9f7	12	* + Processing functions by algorithm using DMA mode
<>	144:ef7eb2e8f9f7	13	* + Peripheral State functions
<>	144:ef7eb2e8f9f7	14	*
<>	144:ef7eb2e8f9f7	15	@verbatim
<>	144:ef7eb2e8f9f7	16	==============================================================================
<>	144:ef7eb2e8f9f7	17	##### How to use this driver #####
<>	144:ef7eb2e8f9f7	18	==============================================================================
<>	144:ef7eb2e8f9f7	19	[..]
<>	144:ef7eb2e8f9f7	20	The CRYP HAL driver can be used as follows:
<>	144:ef7eb2e8f9f7	21
<>	144:ef7eb2e8f9f7	22	(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
<>	144:ef7eb2e8f9f7	23	(##) Enable the CRYP interface clock using __HAL_RCC_AES_CLK_ENABLE()
<>	144:ef7eb2e8f9f7	24	(##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
<>	144:ef7eb2e8f9f7	25	(+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
<>	144:ef7eb2e8f9f7	26	(+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
<>	144:ef7eb2e8f9f7	27	(+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
<>	144:ef7eb2e8f9f7	28	(##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
<>	144:ef7eb2e8f9f7	29	(+) Enable the DMA1 interface clock using
<>	144:ef7eb2e8f9f7	30	(++) __HAL_RCC_DMA1_CLK_ENABLE()
<>	144:ef7eb2e8f9f7	31	(+) Configure and enable two DMA Channels one for managing data transfer from
<>	144:ef7eb2e8f9f7	32	memory to peripheral (input channel) and another channel for managing data
<>	144:ef7eb2e8f9f7	33	transfer from peripheral to memory (output channel)
<>	144:ef7eb2e8f9f7	34	(+) Associate the initialized DMA handle to the CRYP DMA handle
<>	144:ef7eb2e8f9f7	35	using __HAL_LINKDMA()
<>	144:ef7eb2e8f9f7	36	(+) Configure the priority and enable the NVIC for the transfer complete
<>	144:ef7eb2e8f9f7	37	interrupt on the two DMA Streams. The output stream should have higher
<>	144:ef7eb2e8f9f7	38	priority than the input stream.
<>	144:ef7eb2e8f9f7	39	(++) HAL_NVIC_SetPriority()
<>	144:ef7eb2e8f9f7	40	(++) HAL_NVIC_EnableIRQ()
<>	144:ef7eb2e8f9f7	41
<>	144:ef7eb2e8f9f7	42	(#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
<>	144:ef7eb2e8f9f7	43	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
<>	144:ef7eb2e8f9f7	44	(##) The encryption/decryption key.
<>	144:ef7eb2e8f9f7	45	(##) The initialization vector (counter). It is not used ECB mode.
<>	144:ef7eb2e8f9f7	46
<>	144:ef7eb2e8f9f7	47	(#)Three processing (encryption/decryption) functions are available:
<>	144:ef7eb2e8f9f7	48	(##) Polling mode: encryption and decryption APIs are blocking functions
<>	144:ef7eb2e8f9f7	49	i.e. they process the data and wait till the processing is finished
<>	144:ef7eb2e8f9f7	50	e.g. HAL_CRYP_AESCBC_Encrypt()
<>	144:ef7eb2e8f9f7	51	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
<>	144:ef7eb2e8f9f7	52	i.e. they process the data under interrupt
<>	144:ef7eb2e8f9f7	53	e.g. HAL_CRYP_AESCBC_Encrypt_IT()
<>	144:ef7eb2e8f9f7	54	(##) DMA mode: encryption and decryption APIs are not blocking functions
<>	144:ef7eb2e8f9f7	55	i.e. the data transfer is ensured by DMA
<>	144:ef7eb2e8f9f7	56	e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
<>	144:ef7eb2e8f9f7	57
<>	144:ef7eb2e8f9f7	58	(#)When the processing function is called for the first time after HAL_CRYP_Init()
<>	144:ef7eb2e8f9f7	59	the CRYP peripheral is initialized and processes the buffer in input.
<>	144:ef7eb2e8f9f7	60	At second call, the processing function performs an append of the already
<>	144:ef7eb2e8f9f7	61	processed buffer.
<>	144:ef7eb2e8f9f7	62	When a new data block is to be processed, call HAL_CRYP_Init() then the
<>	144:ef7eb2e8f9f7	63	processing function.
<>	144:ef7eb2e8f9f7	64
<>	144:ef7eb2e8f9f7	65	(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
<>	144:ef7eb2e8f9f7	66
<>	144:ef7eb2e8f9f7	67	@endverbatim
<>	144:ef7eb2e8f9f7	68	******************************************************************************
<>	144:ef7eb2e8f9f7	69	* @attention
<>	144:ef7eb2e8f9f7	70	*
<>	144:ef7eb2e8f9f7	71	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	72	*
<>	144:ef7eb2e8f9f7	73	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	74	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	75	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	76	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	77	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	78	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	79	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	80	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	81	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	82	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	83	*
<>	144:ef7eb2e8f9f7	84	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	85	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	86	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	87	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	88	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	89	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	90	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	91	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	92	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	93	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	94	*
<>	144:ef7eb2e8f9f7	95	******************************************************************************
<>	144:ef7eb2e8f9f7	96	*/
<>	144:ef7eb2e8f9f7	97
<>	151:5eaa88a5bcc7	98	#if defined (STM32L021xx) \|\| defined (STM32L041xx) \|\| defined (STM32L061xx) \|\| defined (STM32L062xx) \|\| defined (STM32L063xx) \|\| defined (STM32L081xx) \|\| defined (STM32L082xx) \|\| defined (STM32L083xx)
<>	144:ef7eb2e8f9f7	99	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	100	#include "stm32l0xx_hal.h"
<>	144:ef7eb2e8f9f7	101
<>	144:ef7eb2e8f9f7	102	#ifdef HAL_CRYP_MODULE_ENABLED
<>	144:ef7eb2e8f9f7	103	/** @addtogroup STM32L0xx_HAL_Driver
<>	144:ef7eb2e8f9f7	104	* @{
<>	144:ef7eb2e8f9f7	105	*/
<>	144:ef7eb2e8f9f7	106
<>	144:ef7eb2e8f9f7	107	/** @addtogroup CRYP
<>	144:ef7eb2e8f9f7	108	* @brief CRYP HAL module driver.
<>	144:ef7eb2e8f9f7	109	* @{
<>	144:ef7eb2e8f9f7	110	*/
<>	144:ef7eb2e8f9f7	111
<>	144:ef7eb2e8f9f7	112
<>	144:ef7eb2e8f9f7	113	/* Private typedef -----------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	114	/* Private define ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	115
<>	144:ef7eb2e8f9f7	116	/** @addtogroup CRYP_Private CRYP Private
<>	144:ef7eb2e8f9f7	117	* @{
<>	144:ef7eb2e8f9f7	118	*/
<>	144:ef7eb2e8f9f7	119
<>	144:ef7eb2e8f9f7	120	#define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE \| AES_CR_CHMOD)
<>	144:ef7eb2e8f9f7	121
<>	144:ef7eb2e8f9f7	122	/**
<>	144:ef7eb2e8f9f7	123	* @}
<>	144:ef7eb2e8f9f7	124	*/
<>	144:ef7eb2e8f9f7	125
<>	144:ef7eb2e8f9f7	126	/* Private macro -------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	127	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	128	/* Private function prototypes -----------------------------------------------*/
<>	144:ef7eb2e8f9f7	129
<>	144:ef7eb2e8f9f7	130	/** @addtogroup CRYP_Private
<>	144:ef7eb2e8f9f7	131	* @{
<>	144:ef7eb2e8f9f7	132	*/
<>	144:ef7eb2e8f9f7	133
<>	144:ef7eb2e8f9f7	134	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
<>	144:ef7eb2e8f9f7	135	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector);
<>	144:ef7eb2e8f9f7	136	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key);
<>	144:ef7eb2e8f9f7	137	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	138	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	139	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	140	static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	141	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
<>	144:ef7eb2e8f9f7	142
<>	144:ef7eb2e8f9f7	143	/**
<>	144:ef7eb2e8f9f7	144	* @}
<>	144:ef7eb2e8f9f7	145	*/
<>	144:ef7eb2e8f9f7	146
<>	144:ef7eb2e8f9f7	147	/* Private functions ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	148
<>	144:ef7eb2e8f9f7	149	/** @addtogroup CRYP_Exported_Functions
<>	144:ef7eb2e8f9f7	150	* @{
<>	144:ef7eb2e8f9f7	151	*/
<>	144:ef7eb2e8f9f7	152
<>	144:ef7eb2e8f9f7	153	/** @addtogroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	154	* @brief Initialization and Configuration functions.
<>	144:ef7eb2e8f9f7	155	*
<>	144:ef7eb2e8f9f7	156	@verbatim
<>	144:ef7eb2e8f9f7	157	==============================================================================
<>	144:ef7eb2e8f9f7	158	##### Initialization and de-initialization functions #####
<>	144:ef7eb2e8f9f7	159	==============================================================================
<>	144:ef7eb2e8f9f7	160	[..] This section provides functions allowing to:
<>	144:ef7eb2e8f9f7	161	(+) Initialize the CRYP according to the specified parameters
<>	144:ef7eb2e8f9f7	162	in the CRYP_InitTypeDef and creates the associated handle
<>	144:ef7eb2e8f9f7	163	(+) DeInitialize the CRYP peripheral
<>	144:ef7eb2e8f9f7	164	(+) Initialize the CRYP MSP
<>	144:ef7eb2e8f9f7	165	(+) DeInitialize CRYP MSP
<>	144:ef7eb2e8f9f7	166
<>	144:ef7eb2e8f9f7	167	@endverbatim
<>	144:ef7eb2e8f9f7	168	* @{
<>	144:ef7eb2e8f9f7	169	*/
<>	144:ef7eb2e8f9f7	170
<>	144:ef7eb2e8f9f7	171	/**
<>	144:ef7eb2e8f9f7	172	* @brief Initializes the CRYP according to the specified
<>	144:ef7eb2e8f9f7	173	* parameters in the CRYP_InitTypeDef and creates the associated handle.
<>	144:ef7eb2e8f9f7	174	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	175	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	176	* @retval HAL status
<>	144:ef7eb2e8f9f7	177	*/
<>	144:ef7eb2e8f9f7	178	HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	179	{
<>	144:ef7eb2e8f9f7	180	/* Check the CRYP handle allocation */
<>	144:ef7eb2e8f9f7	181	if(hcryp == NULL)
<>	144:ef7eb2e8f9f7	182	{
<>	144:ef7eb2e8f9f7	183	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	184	}
<>	144:ef7eb2e8f9f7	185
<>	144:ef7eb2e8f9f7	186	/* Check the parameters */
<>	144:ef7eb2e8f9f7	187	assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
<>	144:ef7eb2e8f9f7	188	assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
<>	144:ef7eb2e8f9f7	189
<>	144:ef7eb2e8f9f7	190	if(hcryp->State == HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	191	{
<>	144:ef7eb2e8f9f7	192	/* Allocate lock resource and initialize it */
<>	144:ef7eb2e8f9f7	193	hcryp->Lock = HAL_UNLOCKED;
<>	144:ef7eb2e8f9f7	194
<>	144:ef7eb2e8f9f7	195	/* Init the low level hardware */
<>	144:ef7eb2e8f9f7	196	HAL_CRYP_MspInit(hcryp);
<>	144:ef7eb2e8f9f7	197	}
<>	144:ef7eb2e8f9f7	198
<>	144:ef7eb2e8f9f7	199	/* Check if AES already enabled */
<>	144:ef7eb2e8f9f7	200	if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
<>	144:ef7eb2e8f9f7	201	{
<>	144:ef7eb2e8f9f7	202	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	203	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	204
<>	144:ef7eb2e8f9f7	205	/* Set the data type*/
<>	144:ef7eb2e8f9f7	206	MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
<>	144:ef7eb2e8f9f7	207
<>	144:ef7eb2e8f9f7	208	/* Reset CrypInCount and CrypOutCount */
<>	151:5eaa88a5bcc7	209	hcryp->CrypInCount = 0U;
<>	151:5eaa88a5bcc7	210	hcryp->CrypOutCount = 0U;
<>	144:ef7eb2e8f9f7	211
<>	144:ef7eb2e8f9f7	212	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	213	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	214
<>	144:ef7eb2e8f9f7	215	/* Set the default CRYP phase */
<>	144:ef7eb2e8f9f7	216	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	144:ef7eb2e8f9f7	217
<>	144:ef7eb2e8f9f7	218	/* Return function status */
<>	144:ef7eb2e8f9f7	219	return HAL_OK;
<>	144:ef7eb2e8f9f7	220	}
<>	144:ef7eb2e8f9f7	221	else
<>	144:ef7eb2e8f9f7	222	{
<>	144:ef7eb2e8f9f7	223	/* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
<>	144:ef7eb2e8f9f7	224	/* enabled is forbidden to avoid unpredictable AES behavior.*/
<>	144:ef7eb2e8f9f7	225
<>	144:ef7eb2e8f9f7	226	/* Return function status */
<>	144:ef7eb2e8f9f7	227	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	228	}
<>	144:ef7eb2e8f9f7	229
<>	144:ef7eb2e8f9f7	230	}
<>	144:ef7eb2e8f9f7	231
<>	144:ef7eb2e8f9f7	232	/**
<>	144:ef7eb2e8f9f7	233	* @brief DeInitializes the CRYP peripheral.
<>	144:ef7eb2e8f9f7	234	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	235	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	236	* @retval HAL status
<>	144:ef7eb2e8f9f7	237	*/
<>	144:ef7eb2e8f9f7	238	HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	239	{
<>	144:ef7eb2e8f9f7	240	/* Check the CRYP handle allocation */
<>	144:ef7eb2e8f9f7	241	if(hcryp == NULL)
<>	144:ef7eb2e8f9f7	242	{
<>	144:ef7eb2e8f9f7	243	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	244	}
<>	144:ef7eb2e8f9f7	245
<>	144:ef7eb2e8f9f7	246	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	247	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	248
<>	144:ef7eb2e8f9f7	249	/* Set the default CRYP phase */
<>	144:ef7eb2e8f9f7	250	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	144:ef7eb2e8f9f7	251
<>	144:ef7eb2e8f9f7	252	/* Reset CrypInCount and CrypOutCount */
<>	151:5eaa88a5bcc7	253	hcryp->CrypInCount = 0U;
<>	151:5eaa88a5bcc7	254	hcryp->CrypOutCount = 0U;
<>	144:ef7eb2e8f9f7	255
<>	144:ef7eb2e8f9f7	256	/* Disable the CRYP Peripheral Clock */
<>	144:ef7eb2e8f9f7	257	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	258
<>	144:ef7eb2e8f9f7	259	/* DeInit the low level hardware: CLOCK, NVIC.*/
<>	144:ef7eb2e8f9f7	260	HAL_CRYP_MspDeInit(hcryp);
<>	144:ef7eb2e8f9f7	261
<>	144:ef7eb2e8f9f7	262	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	263	hcryp->State = HAL_CRYP_STATE_RESET;
<>	144:ef7eb2e8f9f7	264
<>	144:ef7eb2e8f9f7	265	/* Release Lock */
<>	144:ef7eb2e8f9f7	266	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	267
<>	144:ef7eb2e8f9f7	268	/* Return function status */
<>	144:ef7eb2e8f9f7	269	return HAL_OK;
<>	144:ef7eb2e8f9f7	270	}
<>	144:ef7eb2e8f9f7	271
<>	144:ef7eb2e8f9f7	272	/**
<>	144:ef7eb2e8f9f7	273	* @brief Initializes the CRYP MSP.
<>	144:ef7eb2e8f9f7	274	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	275	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	276	* @retval None
<>	144:ef7eb2e8f9f7	277	*/
<>	144:ef7eb2e8f9f7	278	__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	279	{
<>	144:ef7eb2e8f9f7	280	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	281	UNUSED(hcryp);
<>	144:ef7eb2e8f9f7	282
<>	144:ef7eb2e8f9f7	283	/* NOTE : This function should not be modified; when the callback is needed,
<>	144:ef7eb2e8f9f7	284	the HAL_CRYP_MspInit can be implemented in the user file */
<>	144:ef7eb2e8f9f7	285	}
<>	144:ef7eb2e8f9f7	286
<>	144:ef7eb2e8f9f7	287	/**
<>	144:ef7eb2e8f9f7	288	* @brief DeInitializes CRYP MSP.
<>	144:ef7eb2e8f9f7	289	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	290	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	291	* @retval None
<>	144:ef7eb2e8f9f7	292	*/
<>	144:ef7eb2e8f9f7	293	__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	294	{
<>	144:ef7eb2e8f9f7	295	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	296	UNUSED(hcryp);
<>	144:ef7eb2e8f9f7	297
<>	144:ef7eb2e8f9f7	298	/* NOTE : This function should not be modified; when the callback is needed,
<>	144:ef7eb2e8f9f7	299	the HAL_CRYP_MspDeInit can be implemented in the user file */
<>	144:ef7eb2e8f9f7	300	}
<>	144:ef7eb2e8f9f7	301
<>	144:ef7eb2e8f9f7	302	/**
<>	144:ef7eb2e8f9f7	303	* @}
<>	144:ef7eb2e8f9f7	304	*/
<>	144:ef7eb2e8f9f7	305
<>	144:ef7eb2e8f9f7	306	/** @addtogroup CRYP_Exported_Functions_Group2
<>	144:ef7eb2e8f9f7	307	* @brief processing functions.
<>	144:ef7eb2e8f9f7	308	*
<>	144:ef7eb2e8f9f7	309	@verbatim
<>	144:ef7eb2e8f9f7	310	==============================================================================
<>	144:ef7eb2e8f9f7	311	##### AES processing functions #####
<>	144:ef7eb2e8f9f7	312	==============================================================================
<>	144:ef7eb2e8f9f7	313	[..] This section provides functions allowing to:
<>	144:ef7eb2e8f9f7	314	(+) Encrypt plaintext using AES algorithm in different chaining modes
<>	144:ef7eb2e8f9f7	315	(+) Decrypt cyphertext using AES algorithm in different chaining modes
<>	144:ef7eb2e8f9f7	316	[..] Three processing functions are available:
<>	144:ef7eb2e8f9f7	317	(+) Polling mode
<>	144:ef7eb2e8f9f7	318	(+) Interrupt mode
<>	144:ef7eb2e8f9f7	319	(+) DMA mode
<>	144:ef7eb2e8f9f7	320
<>	144:ef7eb2e8f9f7	321	@endverbatim
<>	144:ef7eb2e8f9f7	322	* @{
<>	144:ef7eb2e8f9f7	323	*/
<>	144:ef7eb2e8f9f7	324
<>	144:ef7eb2e8f9f7	325	/**
<>	144:ef7eb2e8f9f7	326	* @brief Initializes the CRYP peripheral in AES ECB encryption mode
<>	144:ef7eb2e8f9f7	327	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	144:ef7eb2e8f9f7	328	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	329	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	330	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	331	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	332	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	333	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	334	* @retval HAL status
<>	144:ef7eb2e8f9f7	335	*/
<>	144:ef7eb2e8f9f7	336	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	337	{
<>	144:ef7eb2e8f9f7	338	/* Process Locked */
<>	144:ef7eb2e8f9f7	339	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	340
<>	144:ef7eb2e8f9f7	341	/* Check that data aligned on u32 and Size multiple of 16*/
<>	151:5eaa88a5bcc7	342	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	343	{
<>	144:ef7eb2e8f9f7	344	/* Process Locked */
<>	144:ef7eb2e8f9f7	345	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	346
<>	144:ef7eb2e8f9f7	347	/* Return function status */
<>	144:ef7eb2e8f9f7	348	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	349	}
<>	144:ef7eb2e8f9f7	350
<>	144:ef7eb2e8f9f7	351	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	352	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	353	{
<>	144:ef7eb2e8f9f7	354	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	355	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	356
<>	144:ef7eb2e8f9f7	357	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	358	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	359	{
<>	144:ef7eb2e8f9f7	360	/* Set the key */
<>	144:ef7eb2e8f9f7	361	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	362
<>	144:ef7eb2e8f9f7	363	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	364	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	365
<>	144:ef7eb2e8f9f7	366	/* Set the CRYP peripheral in AES ECB mode */
<>	144:ef7eb2e8f9f7	367	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	144:ef7eb2e8f9f7	368
<>	144:ef7eb2e8f9f7	369	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	370	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	371
<>	144:ef7eb2e8f9f7	372	/* Set the phase */
<>	144:ef7eb2e8f9f7	373	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	374	}
<>	144:ef7eb2e8f9f7	375
<>	144:ef7eb2e8f9f7	376	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	377	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	378	{
<>	144:ef7eb2e8f9f7	379	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	380	}
<>	144:ef7eb2e8f9f7	381
<>	144:ef7eb2e8f9f7	382	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	383	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	384
<>	144:ef7eb2e8f9f7	385	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	386	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	387
<>	144:ef7eb2e8f9f7	388	/* Return function status */
<>	144:ef7eb2e8f9f7	389	return HAL_OK;
<>	144:ef7eb2e8f9f7	390	}
<>	144:ef7eb2e8f9f7	391	else
<>	144:ef7eb2e8f9f7	392	{
<>	144:ef7eb2e8f9f7	393	/* Process Locked */
<>	144:ef7eb2e8f9f7	394	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	395
<>	144:ef7eb2e8f9f7	396	/* Return function status */
<>	144:ef7eb2e8f9f7	397	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	398	}
<>	144:ef7eb2e8f9f7	399	}
<>	144:ef7eb2e8f9f7	400
<>	144:ef7eb2e8f9f7	401	/**
<>	144:ef7eb2e8f9f7	402	* @brief Initializes the CRYP peripheral in AES CBC encryption mode
<>	144:ef7eb2e8f9f7	403	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	144:ef7eb2e8f9f7	404	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	405	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	406	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	407	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	408	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	409	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	410	* @retval HAL status
<>	144:ef7eb2e8f9f7	411	*/
<>	144:ef7eb2e8f9f7	412	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	413	{
<>	144:ef7eb2e8f9f7	414	/* Process Locked */
<>	144:ef7eb2e8f9f7	415	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	416
<>	144:ef7eb2e8f9f7	417	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	418	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	419	{
<>	144:ef7eb2e8f9f7	420	/* Process Locked */
<>	144:ef7eb2e8f9f7	421	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	422
<>	144:ef7eb2e8f9f7	423	/* Return function status */
<>	144:ef7eb2e8f9f7	424	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	425	}
<>	144:ef7eb2e8f9f7	426
<>	144:ef7eb2e8f9f7	427	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	428	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	429	{
<>	144:ef7eb2e8f9f7	430	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	431	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	432
<>	144:ef7eb2e8f9f7	433	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	434	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	435	{
<>	144:ef7eb2e8f9f7	436	/* Set the key */
<>	144:ef7eb2e8f9f7	437	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	438
<>	144:ef7eb2e8f9f7	439	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	440	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	441
<>	144:ef7eb2e8f9f7	442	/* Set the CRYP peripheral in AES CBC mode */
<>	144:ef7eb2e8f9f7	443	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	144:ef7eb2e8f9f7	444
<>	144:ef7eb2e8f9f7	445	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	446	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	447
<>	144:ef7eb2e8f9f7	448	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	449	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	450
<>	144:ef7eb2e8f9f7	451	/* Set the phase */
<>	144:ef7eb2e8f9f7	452	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	453	}
<>	144:ef7eb2e8f9f7	454
<>	144:ef7eb2e8f9f7	455	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	456	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	457	{
<>	144:ef7eb2e8f9f7	458	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	459	}
<>	144:ef7eb2e8f9f7	460
<>	144:ef7eb2e8f9f7	461	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	462	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	463
<>	144:ef7eb2e8f9f7	464	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	465	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	466
<>	144:ef7eb2e8f9f7	467	/* Return function status */
<>	144:ef7eb2e8f9f7	468	return HAL_OK;
<>	144:ef7eb2e8f9f7	469	}
<>	144:ef7eb2e8f9f7	470	else
<>	144:ef7eb2e8f9f7	471	{
<>	144:ef7eb2e8f9f7	472	/* Process Locked */
<>	144:ef7eb2e8f9f7	473	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	474
<>	144:ef7eb2e8f9f7	475	/* Return function status */
<>	144:ef7eb2e8f9f7	476	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	477	}
<>	144:ef7eb2e8f9f7	478	}
<>	144:ef7eb2e8f9f7	479
<>	144:ef7eb2e8f9f7	480	/**
<>	144:ef7eb2e8f9f7	481	* @brief Initializes the CRYP peripheral in AES CTR encryption mode
<>	144:ef7eb2e8f9f7	482	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	144:ef7eb2e8f9f7	483	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	484	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	485	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	486	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	487	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	488	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	489	* @retval HAL status
<>	144:ef7eb2e8f9f7	490	*/
<>	144:ef7eb2e8f9f7	491	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	492	{
<>	144:ef7eb2e8f9f7	493	/* Process Locked */
<>	144:ef7eb2e8f9f7	494	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	495
<>	144:ef7eb2e8f9f7	496	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	497	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	498	{
<>	144:ef7eb2e8f9f7	499	/* Process Locked */
<>	144:ef7eb2e8f9f7	500	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	501
<>	144:ef7eb2e8f9f7	502	/* Return function status */
<>	144:ef7eb2e8f9f7	503	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	504	}
<>	144:ef7eb2e8f9f7	505
<>	144:ef7eb2e8f9f7	506	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	507	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	508	{
<>	144:ef7eb2e8f9f7	509	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	510	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	511
<>	144:ef7eb2e8f9f7	512	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	513	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	514	{
<>	144:ef7eb2e8f9f7	515	/* Set the key */
<>	144:ef7eb2e8f9f7	516	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	517
<>	144:ef7eb2e8f9f7	518	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	519	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	520
<>	144:ef7eb2e8f9f7	521	/* Set the CRYP peripheral in AES CTR mode */
<>	144:ef7eb2e8f9f7	522	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	144:ef7eb2e8f9f7	523
<>	144:ef7eb2e8f9f7	524	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	525	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	526
<>	144:ef7eb2e8f9f7	527	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	528	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	529
<>	144:ef7eb2e8f9f7	530	/* Set the phase */
<>	144:ef7eb2e8f9f7	531	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	532	}
<>	144:ef7eb2e8f9f7	533
<>	144:ef7eb2e8f9f7	534	/* Write Plain Data and Get Cypher Data */
<>	144:ef7eb2e8f9f7	535	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	536	{
<>	144:ef7eb2e8f9f7	537	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	538	}
<>	144:ef7eb2e8f9f7	539
<>	144:ef7eb2e8f9f7	540	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	541	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	542
<>	144:ef7eb2e8f9f7	543	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	544	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	545
<>	144:ef7eb2e8f9f7	546	/* Return function status */
<>	144:ef7eb2e8f9f7	547	return HAL_OK;
<>	144:ef7eb2e8f9f7	548	}
<>	144:ef7eb2e8f9f7	549	else
<>	144:ef7eb2e8f9f7	550	{
<>	144:ef7eb2e8f9f7	551	/* Release Lock */
<>	144:ef7eb2e8f9f7	552	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	553
<>	144:ef7eb2e8f9f7	554	/* Return function status */
<>	144:ef7eb2e8f9f7	555	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	556	}
<>	144:ef7eb2e8f9f7	557	}
<>	144:ef7eb2e8f9f7	558
<>	144:ef7eb2e8f9f7	559	/**
<>	144:ef7eb2e8f9f7	560	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	144:ef7eb2e8f9f7	561	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	144:ef7eb2e8f9f7	562	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	563	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	564	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	565	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	566	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	567	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	568	* @retval HAL status
<>	144:ef7eb2e8f9f7	569	*/
<>	144:ef7eb2e8f9f7	570	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	571	{
<>	144:ef7eb2e8f9f7	572	/* Process Locked */
<>	144:ef7eb2e8f9f7	573	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	574
<>	144:ef7eb2e8f9f7	575	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	576	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	577	{
<>	144:ef7eb2e8f9f7	578	/* Process Locked */
<>	144:ef7eb2e8f9f7	579	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	580
<>	144:ef7eb2e8f9f7	581	/* Return function status */
<>	144:ef7eb2e8f9f7	582	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	583	}
<>	144:ef7eb2e8f9f7	584
<>	144:ef7eb2e8f9f7	585	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	586	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	587	{
<>	144:ef7eb2e8f9f7	588	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	589	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	590
<>	144:ef7eb2e8f9f7	591	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	592	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	593	{
<>	144:ef7eb2e8f9f7	594	/* Set the key */
<>	144:ef7eb2e8f9f7	595	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	596
<>	144:ef7eb2e8f9f7	597	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	598	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	599
<>	144:ef7eb2e8f9f7	600	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	601	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	602
<>	144:ef7eb2e8f9f7	603	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	604	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	605
<>	144:ef7eb2e8f9f7	606	/* Set the phase */
<>	144:ef7eb2e8f9f7	607	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	608	}
<>	144:ef7eb2e8f9f7	609
<>	144:ef7eb2e8f9f7	610	/* Write Cypher Data and Get Plain Data */
<>	144:ef7eb2e8f9f7	611	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	612	{
<>	144:ef7eb2e8f9f7	613	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	614	}
<>	144:ef7eb2e8f9f7	615
<>	144:ef7eb2e8f9f7	616	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	617	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	618
<>	144:ef7eb2e8f9f7	619	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	620	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	621
<>	144:ef7eb2e8f9f7	622	/* Return function status */
<>	144:ef7eb2e8f9f7	623	return HAL_OK;
<>	144:ef7eb2e8f9f7	624	}
<>	144:ef7eb2e8f9f7	625	else
<>	144:ef7eb2e8f9f7	626	{
<>	144:ef7eb2e8f9f7	627	/* Release Lock */
<>	144:ef7eb2e8f9f7	628	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	629
<>	144:ef7eb2e8f9f7	630	/* Return function status */
<>	144:ef7eb2e8f9f7	631	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	632	}
<>	144:ef7eb2e8f9f7	633	}
<>	144:ef7eb2e8f9f7	634
<>	144:ef7eb2e8f9f7	635	/**
<>	144:ef7eb2e8f9f7	636	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	144:ef7eb2e8f9f7	637	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	144:ef7eb2e8f9f7	638	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	639	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	640	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	641	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	642	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	643	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	644	* @retval HAL status
<>	144:ef7eb2e8f9f7	645	*/
<>	144:ef7eb2e8f9f7	646	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	647	{
<>	144:ef7eb2e8f9f7	648	/* Process Locked */
<>	144:ef7eb2e8f9f7	649	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	650
<>	144:ef7eb2e8f9f7	651	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	652	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	653	{
<>	144:ef7eb2e8f9f7	654	/* Process Locked */
<>	144:ef7eb2e8f9f7	655	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	656
<>	144:ef7eb2e8f9f7	657	/* Return function status */
<>	144:ef7eb2e8f9f7	658	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	659	}
<>	144:ef7eb2e8f9f7	660
<>	144:ef7eb2e8f9f7	661	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	662	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	144:ef7eb2e8f9f7	663	{
<>	144:ef7eb2e8f9f7	664	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	665	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	666
<>	144:ef7eb2e8f9f7	667	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	668	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	669	{
<>	144:ef7eb2e8f9f7	670	/* Set the key */
<>	144:ef7eb2e8f9f7	671	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	672
<>	144:ef7eb2e8f9f7	673	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	674	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	675
<>	144:ef7eb2e8f9f7	676	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	677	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	678
<>	144:ef7eb2e8f9f7	679	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	680	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	681
<>	144:ef7eb2e8f9f7	682	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	683	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	684
<>	144:ef7eb2e8f9f7	685	/* Set the phase */
<>	144:ef7eb2e8f9f7	686	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	687	}
<>	144:ef7eb2e8f9f7	688
<>	144:ef7eb2e8f9f7	689	/* Write Cypher Data and Get Plain Data */
<>	144:ef7eb2e8f9f7	690	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	691	{
<>	144:ef7eb2e8f9f7	692	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	693	}
<>	144:ef7eb2e8f9f7	694
<>	144:ef7eb2e8f9f7	695	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	696	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	697
<>	144:ef7eb2e8f9f7	698	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	699	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	700
<>	144:ef7eb2e8f9f7	701	/* Return function status */
<>	144:ef7eb2e8f9f7	702	return HAL_OK;
<>	144:ef7eb2e8f9f7	703	}
<>	144:ef7eb2e8f9f7	704	else
<>	144:ef7eb2e8f9f7	705	{
<>	144:ef7eb2e8f9f7	706	/* Release Lock */
<>	144:ef7eb2e8f9f7	707	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	708
<>	144:ef7eb2e8f9f7	709	/* Return function status */
<>	144:ef7eb2e8f9f7	710	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	711	}
<>	144:ef7eb2e8f9f7	712	}
<>	144:ef7eb2e8f9f7	713
<>	144:ef7eb2e8f9f7	714	/**
<>	144:ef7eb2e8f9f7	715	* @brief Initializes the CRYP peripheral in AES CTR decryption mode
<>	144:ef7eb2e8f9f7	716	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	144:ef7eb2e8f9f7	717	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	718	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	719	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	720	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	721	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	722	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	723	* @retval HAL status
<>	144:ef7eb2e8f9f7	724	*/
<>	144:ef7eb2e8f9f7	725	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	726	{
<>	144:ef7eb2e8f9f7	727	/* Process Locked */
<>	144:ef7eb2e8f9f7	728	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	729
<>	144:ef7eb2e8f9f7	730	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	731	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	732	{
<>	144:ef7eb2e8f9f7	733	/* Process Locked */
<>	144:ef7eb2e8f9f7	734	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	735
<>	144:ef7eb2e8f9f7	736	/* Return function status */
<>	144:ef7eb2e8f9f7	737	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	738	}
<>	144:ef7eb2e8f9f7	739
<>	144:ef7eb2e8f9f7	740	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	741	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
<>	144:ef7eb2e8f9f7	742	{
<>	144:ef7eb2e8f9f7	743	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	744	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	745
<>	144:ef7eb2e8f9f7	746	/* Set the key */
<>	144:ef7eb2e8f9f7	747	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	748
<>	144:ef7eb2e8f9f7	749	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	750	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	751
<>	144:ef7eb2e8f9f7	752	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	144:ef7eb2e8f9f7	753	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	144:ef7eb2e8f9f7	754
<>	144:ef7eb2e8f9f7	755	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	756	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	757
<>	144:ef7eb2e8f9f7	758	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	759	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	760
<>	144:ef7eb2e8f9f7	761	/* Set the phase */
<>	144:ef7eb2e8f9f7	762	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	763	}
<>	144:ef7eb2e8f9f7	764
<>	144:ef7eb2e8f9f7	765	/* Write Cypher Data and Get Plain Data */
<>	144:ef7eb2e8f9f7	766	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	767	{
<>	144:ef7eb2e8f9f7	768	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	769	}
<>	144:ef7eb2e8f9f7	770
<>	144:ef7eb2e8f9f7	771	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	772	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	773
<>	144:ef7eb2e8f9f7	774	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	775	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	776
<>	144:ef7eb2e8f9f7	777	/* Return function status */
<>	144:ef7eb2e8f9f7	778	return HAL_OK;
<>	144:ef7eb2e8f9f7	779	}
<>	144:ef7eb2e8f9f7	780
<>	144:ef7eb2e8f9f7	781	/**
<>	144:ef7eb2e8f9f7	782	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
<>	144:ef7eb2e8f9f7	783	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	784	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	785	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	786	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	787	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	788	* @retval HAL status
<>	144:ef7eb2e8f9f7	789	*/
<>	144:ef7eb2e8f9f7	790	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	791	{
<>	151:5eaa88a5bcc7	792	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	793
<>	144:ef7eb2e8f9f7	794	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	795	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	796	{
<>	144:ef7eb2e8f9f7	797	/* Process Locked */
<>	144:ef7eb2e8f9f7	798	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	799
<>	144:ef7eb2e8f9f7	800	/* Return function status */
<>	144:ef7eb2e8f9f7	801	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	802	}
<>	144:ef7eb2e8f9f7	803
<>	144:ef7eb2e8f9f7	804	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	805	{
<>	144:ef7eb2e8f9f7	806	/* Process Locked */
<>	144:ef7eb2e8f9f7	807	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	808
<>	144:ef7eb2e8f9f7	809	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	810	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	811	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	812	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	813	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	814
<>	144:ef7eb2e8f9f7	815	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	816	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	817
<>	144:ef7eb2e8f9f7	818	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	819	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	820	{
<>	144:ef7eb2e8f9f7	821	/* Set the key */
<>	144:ef7eb2e8f9f7	822	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	823
<>	144:ef7eb2e8f9f7	824	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	825	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	826
<>	144:ef7eb2e8f9f7	827	/* Set the CRYP peripheral in AES ECB mode */
<>	144:ef7eb2e8f9f7	828	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	144:ef7eb2e8f9f7	829
<>	144:ef7eb2e8f9f7	830	/* Set the phase */
<>	144:ef7eb2e8f9f7	831	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	832	}
<>	144:ef7eb2e8f9f7	833
<>	144:ef7eb2e8f9f7	834	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	835	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	836
<>	144:ef7eb2e8f9f7	837	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	838	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	839
<>	144:ef7eb2e8f9f7	840	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	841	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	842
<>	144:ef7eb2e8f9f7	843	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	844	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	845	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	846	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	847	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	848	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	849	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	850	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	851	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	852	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	853
<>	144:ef7eb2e8f9f7	854	/* Return function status */
<>	144:ef7eb2e8f9f7	855	return HAL_OK;
<>	144:ef7eb2e8f9f7	856	}
<>	144:ef7eb2e8f9f7	857	else
<>	144:ef7eb2e8f9f7	858	{
<>	144:ef7eb2e8f9f7	859	/* Release Lock */
<>	144:ef7eb2e8f9f7	860	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	861
<>	144:ef7eb2e8f9f7	862	/* Return function status */
<>	144:ef7eb2e8f9f7	863	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	864	}
<>	144:ef7eb2e8f9f7	865	}
<>	144:ef7eb2e8f9f7	866
<>	144:ef7eb2e8f9f7	867	/**
<>	144:ef7eb2e8f9f7	868	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
<>	144:ef7eb2e8f9f7	869	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	870	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	871	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	872	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	873	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	874	* @retval HAL status
<>	144:ef7eb2e8f9f7	875	*/
<>	144:ef7eb2e8f9f7	876	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	877	{
<>	151:5eaa88a5bcc7	878	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	879
<>	144:ef7eb2e8f9f7	880	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	881	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	882	{
<>	144:ef7eb2e8f9f7	883	/* Process Locked */
<>	144:ef7eb2e8f9f7	884	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	885
<>	144:ef7eb2e8f9f7	886	/* Return function status */
<>	144:ef7eb2e8f9f7	887	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	888	}
<>	144:ef7eb2e8f9f7	889
<>	144:ef7eb2e8f9f7	890	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	891	{
<>	144:ef7eb2e8f9f7	892	/* Process Locked */
<>	144:ef7eb2e8f9f7	893	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	894
<>	144:ef7eb2e8f9f7	895	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	896	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	897	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	898	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	899	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	900
<>	144:ef7eb2e8f9f7	901	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	902	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	903
<>	144:ef7eb2e8f9f7	904	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	905	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	906	{
<>	144:ef7eb2e8f9f7	907	/* Set the key */
<>	144:ef7eb2e8f9f7	908	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	909
<>	144:ef7eb2e8f9f7	910	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	911	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	912
<>	144:ef7eb2e8f9f7	913	/* Set the CRYP peripheral in AES CBC mode */
<>	144:ef7eb2e8f9f7	914	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	144:ef7eb2e8f9f7	915
<>	144:ef7eb2e8f9f7	916	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	917	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	918
<>	144:ef7eb2e8f9f7	919	/* Set the phase */
<>	144:ef7eb2e8f9f7	920	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	921	}
<>	144:ef7eb2e8f9f7	922
<>	144:ef7eb2e8f9f7	923	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	924	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	925
<>	144:ef7eb2e8f9f7	926	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	927	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	928
<>	144:ef7eb2e8f9f7	929	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	930	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	931
<>	144:ef7eb2e8f9f7	932	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	933	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	934	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	935	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	936	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	937	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	938	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	939	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	940	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	941	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	942
<>	144:ef7eb2e8f9f7	943	/* Return function status */
<>	144:ef7eb2e8f9f7	944	return HAL_OK;
<>	144:ef7eb2e8f9f7	945	}
<>	144:ef7eb2e8f9f7	946	else
<>	144:ef7eb2e8f9f7	947	{
<>	144:ef7eb2e8f9f7	948	/* Release Lock */
<>	144:ef7eb2e8f9f7	949	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	950
<>	144:ef7eb2e8f9f7	951	/* Return function status */
<>	144:ef7eb2e8f9f7	952	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	953	}
<>	144:ef7eb2e8f9f7	954	}
<>	144:ef7eb2e8f9f7	955
<>	144:ef7eb2e8f9f7	956	/**
<>	144:ef7eb2e8f9f7	957	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
<>	144:ef7eb2e8f9f7	958	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	959	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	960	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	961	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	962	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	963	* @retval HAL status
<>	144:ef7eb2e8f9f7	964	*/
<>	144:ef7eb2e8f9f7	965	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	966	{
<>	151:5eaa88a5bcc7	967	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	968
<>	144:ef7eb2e8f9f7	969	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	970	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	971	{
<>	144:ef7eb2e8f9f7	972	/* Process Locked */
<>	144:ef7eb2e8f9f7	973	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	974
<>	144:ef7eb2e8f9f7	975	/* Return function status */
<>	144:ef7eb2e8f9f7	976	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	977	}
<>	144:ef7eb2e8f9f7	978
<>	144:ef7eb2e8f9f7	979	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	980	{
<>	144:ef7eb2e8f9f7	981	/* Process Locked */
<>	144:ef7eb2e8f9f7	982	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	983
<>	144:ef7eb2e8f9f7	984	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	985	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	986	hcryp->pCrypInBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	987	hcryp->pCrypOutBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	988	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	989
<>	144:ef7eb2e8f9f7	990	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	991	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	992
<>	144:ef7eb2e8f9f7	993	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	994	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	995	{
<>	144:ef7eb2e8f9f7	996	/* Set the key */
<>	144:ef7eb2e8f9f7	997	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	998
<>	144:ef7eb2e8f9f7	999	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1000	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1001
<>	144:ef7eb2e8f9f7	1002	/* Set the CRYP peripheral in AES CTR mode */
<>	144:ef7eb2e8f9f7	1003	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	144:ef7eb2e8f9f7	1004
<>	144:ef7eb2e8f9f7	1005	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1006	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1007
<>	144:ef7eb2e8f9f7	1008	/* Set the phase */
<>	144:ef7eb2e8f9f7	1009	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1010	}
<>	144:ef7eb2e8f9f7	1011
<>	144:ef7eb2e8f9f7	1012	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1013	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1014
<>	144:ef7eb2e8f9f7	1015	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	1016	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1017
<>	144:ef7eb2e8f9f7	1018	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	1019	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1020
<>	144:ef7eb2e8f9f7	1021	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	1022	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1023	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1024	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1025	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1026	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1027	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1028	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1029	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1030	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	1031
<>	144:ef7eb2e8f9f7	1032	/* Return function status */
<>	144:ef7eb2e8f9f7	1033	return HAL_OK;
<>	144:ef7eb2e8f9f7	1034	}
<>	144:ef7eb2e8f9f7	1035	else
<>	144:ef7eb2e8f9f7	1036	{
<>	144:ef7eb2e8f9f7	1037	/* Release Lock */
<>	144:ef7eb2e8f9f7	1038	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1039
<>	144:ef7eb2e8f9f7	1040	/* Return function status */
<>	144:ef7eb2e8f9f7	1041	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1042	}
<>	144:ef7eb2e8f9f7	1043	}
<>	144:ef7eb2e8f9f7	1044
<>	144:ef7eb2e8f9f7	1045	/**
<>	144:ef7eb2e8f9f7	1046	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
<>	144:ef7eb2e8f9f7	1047	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1048	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1049	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1050	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	1051	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1052	* @retval HAL status
<>	144:ef7eb2e8f9f7	1053	*/
<>	144:ef7eb2e8f9f7	1054	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1055	{
<>	151:5eaa88a5bcc7	1056	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	1057
<>	144:ef7eb2e8f9f7	1058	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1059	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1060	{
<>	144:ef7eb2e8f9f7	1061	/* Process Locked */
<>	144:ef7eb2e8f9f7	1062	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1063
<>	144:ef7eb2e8f9f7	1064	/* Return function status */
<>	144:ef7eb2e8f9f7	1065	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1066	}
<>	144:ef7eb2e8f9f7	1067
<>	144:ef7eb2e8f9f7	1068	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1069	{
<>	144:ef7eb2e8f9f7	1070	/* Process Locked */
<>	144:ef7eb2e8f9f7	1071	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1072
<>	144:ef7eb2e8f9f7	1073	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	1074	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1075	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1076	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1077	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1078
<>	144:ef7eb2e8f9f7	1079	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1080	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1081
<>	144:ef7eb2e8f9f7	1082	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1083	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1084	{
<>	144:ef7eb2e8f9f7	1085	/* Set the key */
<>	144:ef7eb2e8f9f7	1086	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1087
<>	144:ef7eb2e8f9f7	1088	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1089	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1090
<>	144:ef7eb2e8f9f7	1091	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	1092	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	1093
<>	144:ef7eb2e8f9f7	1094	/* Set the phase */
<>	144:ef7eb2e8f9f7	1095	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1096	}
<>	144:ef7eb2e8f9f7	1097
<>	144:ef7eb2e8f9f7	1098	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1099	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1100
<>	144:ef7eb2e8f9f7	1101	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	1102	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1103
<>	144:ef7eb2e8f9f7	1104	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	1105	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1106
<>	144:ef7eb2e8f9f7	1107	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	1108	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1109	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1110	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1111	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1112	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1113	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1114	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1115	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1116	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	1117
<>	144:ef7eb2e8f9f7	1118	/* Return function status */
<>	144:ef7eb2e8f9f7	1119	return HAL_OK;
<>	144:ef7eb2e8f9f7	1120	}
<>	144:ef7eb2e8f9f7	1121	else
<>	144:ef7eb2e8f9f7	1122	{
<>	144:ef7eb2e8f9f7	1123	/* Release Lock */
<>	144:ef7eb2e8f9f7	1124	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1125
<>	144:ef7eb2e8f9f7	1126	/* Return function status */
<>	144:ef7eb2e8f9f7	1127	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1128	}
<>	144:ef7eb2e8f9f7	1129	}
<>	144:ef7eb2e8f9f7	1130
<>	144:ef7eb2e8f9f7	1131	/**
<>	144:ef7eb2e8f9f7	1132	* @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
<>	144:ef7eb2e8f9f7	1133	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1134	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1135	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1136	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1137	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1138	* @retval HAL status
<>	144:ef7eb2e8f9f7	1139	*/
<>	144:ef7eb2e8f9f7	1140	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1141	{
<>	151:5eaa88a5bcc7	1142	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	1143
<>	144:ef7eb2e8f9f7	1144	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1145	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1146	{
<>	144:ef7eb2e8f9f7	1147	/* Process Locked */
<>	144:ef7eb2e8f9f7	1148	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1149
<>	144:ef7eb2e8f9f7	1150	/* Return function status */
<>	144:ef7eb2e8f9f7	1151	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1152	}
<>	144:ef7eb2e8f9f7	1153
<>	144:ef7eb2e8f9f7	1154	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1155	{
<>	144:ef7eb2e8f9f7	1156	/* Process Locked */
<>	144:ef7eb2e8f9f7	1157	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1158
<>	144:ef7eb2e8f9f7	1159	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	1160	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1161	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1162	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1163	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1164
<>	144:ef7eb2e8f9f7	1165	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1166	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1167
<>	144:ef7eb2e8f9f7	1168	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1169	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1170	{
<>	144:ef7eb2e8f9f7	1171	/* Set the key */
<>	144:ef7eb2e8f9f7	1172	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1173
<>	144:ef7eb2e8f9f7	1174	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1175	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1176
<>	144:ef7eb2e8f9f7	1177	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	1178	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	1179
<>	144:ef7eb2e8f9f7	1180	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1181	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1182
<>	144:ef7eb2e8f9f7	1183	/* Set the phase */
<>	144:ef7eb2e8f9f7	1184	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1185	}
<>	144:ef7eb2e8f9f7	1186
<>	144:ef7eb2e8f9f7	1187	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1188	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1189
<>	144:ef7eb2e8f9f7	1190	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	1191	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1192
<>	144:ef7eb2e8f9f7	1193	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	1194	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1195
<>	144:ef7eb2e8f9f7	1196	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	1197	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1198	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1199	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1200	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1201	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1202	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1203	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1204	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1205	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	1206
<>	144:ef7eb2e8f9f7	1207	/* Return function status */
<>	144:ef7eb2e8f9f7	1208	return HAL_OK;
<>	144:ef7eb2e8f9f7	1209	}
<>	144:ef7eb2e8f9f7	1210	else
<>	144:ef7eb2e8f9f7	1211	{
<>	144:ef7eb2e8f9f7	1212	/* Release Lock */
<>	144:ef7eb2e8f9f7	1213	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1214
<>	144:ef7eb2e8f9f7	1215	/* Return function status */
<>	144:ef7eb2e8f9f7	1216	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1217	}
<>	144:ef7eb2e8f9f7	1218	}
<>	144:ef7eb2e8f9f7	1219
<>	144:ef7eb2e8f9f7	1220	/**
<>	144:ef7eb2e8f9f7	1221	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
<>	144:ef7eb2e8f9f7	1222	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1223	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1224	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1225	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1226	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1227	* @retval HAL status
<>	144:ef7eb2e8f9f7	1228	*/
<>	144:ef7eb2e8f9f7	1229	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1230	{
<>	151:5eaa88a5bcc7	1231	uint32_t inputaddr = 0U;
<>	144:ef7eb2e8f9f7	1232
<>	144:ef7eb2e8f9f7	1233	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1234	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1235	{
<>	144:ef7eb2e8f9f7	1236	/* Process Locked */
<>	144:ef7eb2e8f9f7	1237	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1238
<>	144:ef7eb2e8f9f7	1239	/* Return function status */
<>	144:ef7eb2e8f9f7	1240	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1241	}
<>	144:ef7eb2e8f9f7	1242
<>	144:ef7eb2e8f9f7	1243	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1244	{
<>	144:ef7eb2e8f9f7	1245	/* Process Locked */
<>	144:ef7eb2e8f9f7	1246	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1247
<>	144:ef7eb2e8f9f7	1248	/* Get the buffer addresses and sizes */
<>	144:ef7eb2e8f9f7	1249	hcryp->CrypInCount = Size;
<>	144:ef7eb2e8f9f7	1250	hcryp->pCrypInBuffPtr = pCypherData;
<>	144:ef7eb2e8f9f7	1251	hcryp->pCrypOutBuffPtr = pPlainData;
<>	144:ef7eb2e8f9f7	1252	hcryp->CrypOutCount = Size;
<>	144:ef7eb2e8f9f7	1253
<>	144:ef7eb2e8f9f7	1254	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1255	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1256
<>	144:ef7eb2e8f9f7	1257	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1258	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1259	{
<>	144:ef7eb2e8f9f7	1260	/* Set the key */
<>	144:ef7eb2e8f9f7	1261	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1262
<>	144:ef7eb2e8f9f7	1263	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1264	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1265
<>	144:ef7eb2e8f9f7	1266	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	144:ef7eb2e8f9f7	1267	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	144:ef7eb2e8f9f7	1268
<>	144:ef7eb2e8f9f7	1269	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1270	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1271
<>	144:ef7eb2e8f9f7	1272	/* Set the phase */
<>	144:ef7eb2e8f9f7	1273	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1274	}
<>	144:ef7eb2e8f9f7	1275
<>	144:ef7eb2e8f9f7	1276	/* Enable Interrupts */
<>	144:ef7eb2e8f9f7	1277	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1278
<>	144:ef7eb2e8f9f7	1279	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	1280	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	1281
<>	144:ef7eb2e8f9f7	1282	/* Get the last input data adress */
<>	144:ef7eb2e8f9f7	1283	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1284
<>	144:ef7eb2e8f9f7	1285	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	1286	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1287	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1288	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1289	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1290	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1291	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1292	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1293	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1294	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	1295
<>	144:ef7eb2e8f9f7	1296	/* Return function status */
<>	144:ef7eb2e8f9f7	1297	return HAL_OK;
<>	144:ef7eb2e8f9f7	1298	}
<>	144:ef7eb2e8f9f7	1299	else
<>	144:ef7eb2e8f9f7	1300	{
<>	144:ef7eb2e8f9f7	1301	/* Release Lock */
<>	144:ef7eb2e8f9f7	1302	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1303
<>	144:ef7eb2e8f9f7	1304	/* Return function status */
<>	144:ef7eb2e8f9f7	1305	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1306	}
<>	144:ef7eb2e8f9f7	1307	}
<>	144:ef7eb2e8f9f7	1308
<>	144:ef7eb2e8f9f7	1309	/**
<>	144:ef7eb2e8f9f7	1310	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
<>	144:ef7eb2e8f9f7	1311	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1312	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1313	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1314	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	1315	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1316	* @retval HAL status
<>	144:ef7eb2e8f9f7	1317	*/
<>	144:ef7eb2e8f9f7	1318	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	1319	{
<>	151:5eaa88a5bcc7	1320	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1321
<>	144:ef7eb2e8f9f7	1322	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1323	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1324	{
<>	144:ef7eb2e8f9f7	1325	/* Process Locked */
<>	144:ef7eb2e8f9f7	1326	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1327
<>	144:ef7eb2e8f9f7	1328	/* Return function status */
<>	144:ef7eb2e8f9f7	1329	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1330	}
<>	144:ef7eb2e8f9f7	1331
<>	144:ef7eb2e8f9f7	1332	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1333	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1334	{
<>	144:ef7eb2e8f9f7	1335	/* Process Locked */
<>	144:ef7eb2e8f9f7	1336	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1337
<>	144:ef7eb2e8f9f7	1338	inputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1339	outputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1340
<>	144:ef7eb2e8f9f7	1341	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1342	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1343
<>	144:ef7eb2e8f9f7	1344	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1345	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1346	{
<>	144:ef7eb2e8f9f7	1347	/* Set the key */
<>	144:ef7eb2e8f9f7	1348	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1349
<>	144:ef7eb2e8f9f7	1350	/* Set the CRYP peripheral in AES ECB mode */
<>	144:ef7eb2e8f9f7	1351	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	144:ef7eb2e8f9f7	1352
<>	144:ef7eb2e8f9f7	1353	/* Set the phase */
<>	144:ef7eb2e8f9f7	1354	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1355	}
<>	144:ef7eb2e8f9f7	1356	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1357	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1358
<>	144:ef7eb2e8f9f7	1359	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1360	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1361
<>	144:ef7eb2e8f9f7	1362	/* Return function status */
<>	144:ef7eb2e8f9f7	1363	return HAL_OK;
<>	144:ef7eb2e8f9f7	1364	}
<>	144:ef7eb2e8f9f7	1365	else
<>	144:ef7eb2e8f9f7	1366	{
<>	144:ef7eb2e8f9f7	1367	/* Release Lock */
<>	144:ef7eb2e8f9f7	1368	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1369
<>	144:ef7eb2e8f9f7	1370	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1371	}
<>	144:ef7eb2e8f9f7	1372	}
<>	144:ef7eb2e8f9f7	1373
<>	144:ef7eb2e8f9f7	1374	/**
<>	144:ef7eb2e8f9f7	1375	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	144:ef7eb2e8f9f7	1376	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1377	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1378	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1379	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	1380	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1381	* @retval HAL status
<>	144:ef7eb2e8f9f7	1382	*/
<>	144:ef7eb2e8f9f7	1383	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	1384	{
<>	151:5eaa88a5bcc7	1385	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1386
<>	144:ef7eb2e8f9f7	1387	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1388	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1389	{
<>	144:ef7eb2e8f9f7	1390	/* Process Locked */
<>	144:ef7eb2e8f9f7	1391	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1392
<>	144:ef7eb2e8f9f7	1393	/* Return function status */
<>	144:ef7eb2e8f9f7	1394	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1395	}
<>	144:ef7eb2e8f9f7	1396
<>	144:ef7eb2e8f9f7	1397	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1398	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1399	{
<>	144:ef7eb2e8f9f7	1400	/* Process Locked */
<>	144:ef7eb2e8f9f7	1401	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1402
<>	144:ef7eb2e8f9f7	1403	inputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1404	outputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1405
<>	144:ef7eb2e8f9f7	1406	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1407	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1408
<>	144:ef7eb2e8f9f7	1409	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1410	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1411	{
<>	144:ef7eb2e8f9f7	1412	/* Set the key */
<>	144:ef7eb2e8f9f7	1413	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1414
<>	144:ef7eb2e8f9f7	1415	/* Set the CRYP peripheral in AES CBC mode */
<>	144:ef7eb2e8f9f7	1416	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	144:ef7eb2e8f9f7	1417
<>	144:ef7eb2e8f9f7	1418	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1419	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1420
<>	144:ef7eb2e8f9f7	1421	/* Set the phase */
<>	144:ef7eb2e8f9f7	1422	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1423	}
<>	144:ef7eb2e8f9f7	1424	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1425	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1426
<>	144:ef7eb2e8f9f7	1427	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1428	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1429
<>	144:ef7eb2e8f9f7	1430	/* Return function status */
<>	144:ef7eb2e8f9f7	1431	return HAL_OK;
<>	144:ef7eb2e8f9f7	1432	}
<>	144:ef7eb2e8f9f7	1433	else
<>	144:ef7eb2e8f9f7	1434	{
<>	144:ef7eb2e8f9f7	1435	/* Release Lock */
<>	144:ef7eb2e8f9f7	1436	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1437
<>	144:ef7eb2e8f9f7	1438	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1439	}
<>	144:ef7eb2e8f9f7	1440	}
<>	144:ef7eb2e8f9f7	1441
<>	144:ef7eb2e8f9f7	1442	/**
<>	144:ef7eb2e8f9f7	1443	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
<>	144:ef7eb2e8f9f7	1444	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1445	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1446	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1447	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	1448	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1449	* @retval HAL status
<>	144:ef7eb2e8f9f7	1450	*/
<>	144:ef7eb2e8f9f7	1451	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	144:ef7eb2e8f9f7	1452	{
<>	151:5eaa88a5bcc7	1453	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1454
<>	144:ef7eb2e8f9f7	1455	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1456	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1457	{
<>	144:ef7eb2e8f9f7	1458	/* Process Locked */
<>	144:ef7eb2e8f9f7	1459	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1460
<>	144:ef7eb2e8f9f7	1461	/* Return function status */
<>	144:ef7eb2e8f9f7	1462	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1463	}
<>	144:ef7eb2e8f9f7	1464
<>	144:ef7eb2e8f9f7	1465	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1466	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1467	{
<>	144:ef7eb2e8f9f7	1468	/* Process Locked */
<>	144:ef7eb2e8f9f7	1469	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1470
<>	144:ef7eb2e8f9f7	1471	inputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1472	outputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1473
<>	144:ef7eb2e8f9f7	1474	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1475	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1476
<>	144:ef7eb2e8f9f7	1477	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1478	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1479	{
<>	144:ef7eb2e8f9f7	1480	/* Set the key */
<>	144:ef7eb2e8f9f7	1481	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1482
<>	144:ef7eb2e8f9f7	1483	/* Set the CRYP peripheral in AES CTR mode */
<>	144:ef7eb2e8f9f7	1484	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	144:ef7eb2e8f9f7	1485
<>	144:ef7eb2e8f9f7	1486	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1487	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1488
<>	144:ef7eb2e8f9f7	1489	/* Set the phase */
<>	144:ef7eb2e8f9f7	1490	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1491	}
<>	144:ef7eb2e8f9f7	1492
<>	144:ef7eb2e8f9f7	1493	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1494	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1495
<>	144:ef7eb2e8f9f7	1496	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1497	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1498
<>	144:ef7eb2e8f9f7	1499	/* Return function status */
<>	144:ef7eb2e8f9f7	1500	return HAL_OK;
<>	144:ef7eb2e8f9f7	1501	}
<>	144:ef7eb2e8f9f7	1502	else
<>	144:ef7eb2e8f9f7	1503	{
<>	144:ef7eb2e8f9f7	1504	/* Release Lock */
<>	144:ef7eb2e8f9f7	1505	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1506
<>	144:ef7eb2e8f9f7	1507	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1508	}
<>	144:ef7eb2e8f9f7	1509	}
<>	144:ef7eb2e8f9f7	1510
<>	144:ef7eb2e8f9f7	1511	/**
<>	144:ef7eb2e8f9f7	1512	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
<>	144:ef7eb2e8f9f7	1513	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1514	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1515	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1516	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	1517	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1518	* @retval HAL status
<>	144:ef7eb2e8f9f7	1519	*/
<>	144:ef7eb2e8f9f7	1520	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1521	{
<>	151:5eaa88a5bcc7	1522	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1523
<>	144:ef7eb2e8f9f7	1524	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1525	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1526	{
<>	144:ef7eb2e8f9f7	1527	/* Process Locked */
<>	144:ef7eb2e8f9f7	1528	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1529
<>	144:ef7eb2e8f9f7	1530	/* Return function status */
<>	144:ef7eb2e8f9f7	1531	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1532	}
<>	144:ef7eb2e8f9f7	1533
<>	144:ef7eb2e8f9f7	1534	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1535	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1536	{
<>	144:ef7eb2e8f9f7	1537	/* Process Locked */
<>	144:ef7eb2e8f9f7	1538	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1539
<>	144:ef7eb2e8f9f7	1540	inputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1541	outputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1542
<>	144:ef7eb2e8f9f7	1543	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1544	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1545
<>	144:ef7eb2e8f9f7	1546	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1547	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1548	{
<>	144:ef7eb2e8f9f7	1549	/* Set the key */
<>	144:ef7eb2e8f9f7	1550	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1551
<>	144:ef7eb2e8f9f7	1552	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1553	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1554
<>	144:ef7eb2e8f9f7	1555	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	1556	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	1557
<>	144:ef7eb2e8f9f7	1558	/* Set the phase */
<>	144:ef7eb2e8f9f7	1559	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1560	}
<>	144:ef7eb2e8f9f7	1561
<>	144:ef7eb2e8f9f7	1562	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1563	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1564
<>	144:ef7eb2e8f9f7	1565	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1566	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1567
<>	144:ef7eb2e8f9f7	1568	/* Return function status */
<>	144:ef7eb2e8f9f7	1569	return HAL_OK;
<>	144:ef7eb2e8f9f7	1570	}
<>	144:ef7eb2e8f9f7	1571	else
<>	144:ef7eb2e8f9f7	1572	{
<>	144:ef7eb2e8f9f7	1573	/* Release Lock */
<>	144:ef7eb2e8f9f7	1574	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1575
<>	144:ef7eb2e8f9f7	1576	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1577	}
<>	144:ef7eb2e8f9f7	1578	}
<>	144:ef7eb2e8f9f7	1579
<>	144:ef7eb2e8f9f7	1580	/**
<>	144:ef7eb2e8f9f7	1581	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	144:ef7eb2e8f9f7	1582	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1583	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1584	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1585	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	144:ef7eb2e8f9f7	1586	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1587	* @retval HAL status
<>	144:ef7eb2e8f9f7	1588	*/
<>	144:ef7eb2e8f9f7	1589	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1590	{
<>	151:5eaa88a5bcc7	1591	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1592
<>	144:ef7eb2e8f9f7	1593	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1594	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1595	{
<>	144:ef7eb2e8f9f7	1596	/* Process Locked */
<>	144:ef7eb2e8f9f7	1597	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1598
<>	144:ef7eb2e8f9f7	1599	/* Return function status */
<>	144:ef7eb2e8f9f7	1600	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1601	}
<>	144:ef7eb2e8f9f7	1602
<>	144:ef7eb2e8f9f7	1603	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1604	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1605	{
<>	144:ef7eb2e8f9f7	1606	/* Process Locked */
<>	144:ef7eb2e8f9f7	1607	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1608
<>	144:ef7eb2e8f9f7	1609	inputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1610	outputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1611
<>	144:ef7eb2e8f9f7	1612	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1613	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1614
<>	144:ef7eb2e8f9f7	1615	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1616	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1617	{
<>	144:ef7eb2e8f9f7	1618	/* Set the key */
<>	144:ef7eb2e8f9f7	1619	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1620
<>	144:ef7eb2e8f9f7	1621	/* Reset the CHMOD & MODE bits */
<>	144:ef7eb2e8f9f7	1622	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	144:ef7eb2e8f9f7	1623
<>	144:ef7eb2e8f9f7	1624	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	144:ef7eb2e8f9f7	1625	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	144:ef7eb2e8f9f7	1626
<>	144:ef7eb2e8f9f7	1627	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1628	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1629
<>	144:ef7eb2e8f9f7	1630	/* Set the phase */
<>	144:ef7eb2e8f9f7	1631	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1632	}
<>	144:ef7eb2e8f9f7	1633
<>	144:ef7eb2e8f9f7	1634	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1635	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1636
<>	144:ef7eb2e8f9f7	1637	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1638	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1639
<>	144:ef7eb2e8f9f7	1640	/* Return function status */
<>	144:ef7eb2e8f9f7	1641	return HAL_OK;
<>	144:ef7eb2e8f9f7	1642	}
<>	144:ef7eb2e8f9f7	1643	else
<>	144:ef7eb2e8f9f7	1644	{
<>	144:ef7eb2e8f9f7	1645	/* Release Lock */
<>	144:ef7eb2e8f9f7	1646	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1647
<>	144:ef7eb2e8f9f7	1648	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1649	}
<>	144:ef7eb2e8f9f7	1650	}
<>	144:ef7eb2e8f9f7	1651
<>	144:ef7eb2e8f9f7	1652	/**
<>	144:ef7eb2e8f9f7	1653	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
<>	144:ef7eb2e8f9f7	1654	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1655	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1656	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1657	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	144:ef7eb2e8f9f7	1658	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	144:ef7eb2e8f9f7	1659	* @retval HAL status
<>	144:ef7eb2e8f9f7	1660	*/
<>	144:ef7eb2e8f9f7	1661	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	144:ef7eb2e8f9f7	1662	{
<>	151:5eaa88a5bcc7	1663	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1664
<>	144:ef7eb2e8f9f7	1665	/* Check that data aligned on u32 */
<>	151:5eaa88a5bcc7	1666	if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) \|\| ((Size & (uint16_t)0x000FU) != 0U))
<>	144:ef7eb2e8f9f7	1667	{
<>	144:ef7eb2e8f9f7	1668	/* Process Locked */
<>	144:ef7eb2e8f9f7	1669	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1670
<>	144:ef7eb2e8f9f7	1671	/* Return function status */
<>	144:ef7eb2e8f9f7	1672	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1673	}
<>	144:ef7eb2e8f9f7	1674
<>	144:ef7eb2e8f9f7	1675	/* Check if HAL_CRYP_Init has been called */
<>	144:ef7eb2e8f9f7	1676	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	144:ef7eb2e8f9f7	1677	{
<>	144:ef7eb2e8f9f7	1678	/* Process Locked */
<>	144:ef7eb2e8f9f7	1679	__HAL_LOCK(hcryp);
<>	144:ef7eb2e8f9f7	1680
<>	144:ef7eb2e8f9f7	1681	inputaddr = (uint32_t)pCypherData;
<>	144:ef7eb2e8f9f7	1682	outputaddr = (uint32_t)pPlainData;
<>	144:ef7eb2e8f9f7	1683
<>	144:ef7eb2e8f9f7	1684	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1685	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1686
<>	144:ef7eb2e8f9f7	1687	/* Check if initialization phase has already been performed */
<>	144:ef7eb2e8f9f7	1688	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	144:ef7eb2e8f9f7	1689	{
<>	144:ef7eb2e8f9f7	1690	/* Set the key */
<>	144:ef7eb2e8f9f7	1691	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	144:ef7eb2e8f9f7	1692
<>	144:ef7eb2e8f9f7	1693	/* Set the CRYP peripheral in AES CTR mode */
<>	144:ef7eb2e8f9f7	1694	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	144:ef7eb2e8f9f7	1695
<>	144:ef7eb2e8f9f7	1696	/* Set the Initialization Vector */
<>	144:ef7eb2e8f9f7	1697	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	144:ef7eb2e8f9f7	1698
<>	144:ef7eb2e8f9f7	1699	/* Set the phase */
<>	144:ef7eb2e8f9f7	1700	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	144:ef7eb2e8f9f7	1701	}
<>	144:ef7eb2e8f9f7	1702
<>	144:ef7eb2e8f9f7	1703	/* Set the input and output addresses and start DMA transfer */
<>	144:ef7eb2e8f9f7	1704	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	144:ef7eb2e8f9f7	1705
<>	144:ef7eb2e8f9f7	1706	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1707	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1708
<>	144:ef7eb2e8f9f7	1709	/* Return function status */
<>	144:ef7eb2e8f9f7	1710	return HAL_OK;
<>	144:ef7eb2e8f9f7	1711	}
<>	144:ef7eb2e8f9f7	1712	else
<>	144:ef7eb2e8f9f7	1713	{
<>	144:ef7eb2e8f9f7	1714	/* Release Lock */
<>	144:ef7eb2e8f9f7	1715	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1716
<>	144:ef7eb2e8f9f7	1717	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1718	}
<>	144:ef7eb2e8f9f7	1719	}
<>	144:ef7eb2e8f9f7	1720
<>	144:ef7eb2e8f9f7	1721	/**
<>	144:ef7eb2e8f9f7	1722	* @}
<>	144:ef7eb2e8f9f7	1723	*/
<>	144:ef7eb2e8f9f7	1724
<>	144:ef7eb2e8f9f7	1725	/** @addtogroup CRYP_Exported_Functions_Group3
<>	144:ef7eb2e8f9f7	1726	* @brief DMA callback functions.
<>	144:ef7eb2e8f9f7	1727	*
<>	144:ef7eb2e8f9f7	1728	@verbatim
<>	144:ef7eb2e8f9f7	1729	==============================================================================
<>	144:ef7eb2e8f9f7	1730	##### DMA callback functions #####
<>	144:ef7eb2e8f9f7	1731	==============================================================================
<>	144:ef7eb2e8f9f7	1732	[..] This section provides DMA callback functions:
<>	144:ef7eb2e8f9f7	1733	(+) DMA Input data transfer complete
<>	144:ef7eb2e8f9f7	1734	(+) DMA Output data transfer complete
<>	144:ef7eb2e8f9f7	1735	(+) DMA error
<>	144:ef7eb2e8f9f7	1736
<>	144:ef7eb2e8f9f7	1737	@endverbatim
<>	144:ef7eb2e8f9f7	1738	* @{
<>	144:ef7eb2e8f9f7	1739	*/
<>	144:ef7eb2e8f9f7	1740
<>	144:ef7eb2e8f9f7	1741	/**
<>	144:ef7eb2e8f9f7	1742	* @brief CRYP error callback.
<>	144:ef7eb2e8f9f7	1743	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1744	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1745	* @retval None
<>	144:ef7eb2e8f9f7	1746	*/
<>	144:ef7eb2e8f9f7	1747	__weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1748	{
<>	144:ef7eb2e8f9f7	1749	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1750	UNUSED(hcryp);
<>	144:ef7eb2e8f9f7	1751
<>	144:ef7eb2e8f9f7	1752	/* NOTE : This function should not be modified; when the callback is needed,
<>	144:ef7eb2e8f9f7	1753	the HAL_CRYP_ErrorCallback can be implemented in the user file
<>	144:ef7eb2e8f9f7	1754	*/
<>	144:ef7eb2e8f9f7	1755	}
<>	144:ef7eb2e8f9f7	1756
<>	144:ef7eb2e8f9f7	1757	/**
<>	144:ef7eb2e8f9f7	1758	* @brief Input transfer completed callback.
<>	144:ef7eb2e8f9f7	1759	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1760	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1761	* @retval None
<>	144:ef7eb2e8f9f7	1762	*/
<>	144:ef7eb2e8f9f7	1763	__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1764	{
<>	144:ef7eb2e8f9f7	1765	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1766	UNUSED(hcryp);
<>	144:ef7eb2e8f9f7	1767
<>	144:ef7eb2e8f9f7	1768	/* NOTE : This function should not be modified; when the callback is needed,
<>	144:ef7eb2e8f9f7	1769	the HAL_CRYP_InCpltCallback can be implemented in the user file
<>	144:ef7eb2e8f9f7	1770	*/
<>	144:ef7eb2e8f9f7	1771	}
<>	144:ef7eb2e8f9f7	1772
<>	144:ef7eb2e8f9f7	1773	/**
<>	144:ef7eb2e8f9f7	1774	* @brief Output transfer completed callback.
<>	144:ef7eb2e8f9f7	1775	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1776	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1777	* @retval None
<>	144:ef7eb2e8f9f7	1778	*/
<>	144:ef7eb2e8f9f7	1779	__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1780	{
<>	144:ef7eb2e8f9f7	1781	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1782	UNUSED(hcryp);
<>	144:ef7eb2e8f9f7	1783
<>	144:ef7eb2e8f9f7	1784	/* NOTE : This function should not be modified; when the callback is needed,
<>	144:ef7eb2e8f9f7	1785	the HAL_CRYP_OutCpltCallback can be implemented in the user file
<>	144:ef7eb2e8f9f7	1786	*/
<>	144:ef7eb2e8f9f7	1787	}
<>	144:ef7eb2e8f9f7	1788
<>	144:ef7eb2e8f9f7	1789	/**
<>	144:ef7eb2e8f9f7	1790	* @}
<>	144:ef7eb2e8f9f7	1791	*/
<>	144:ef7eb2e8f9f7	1792
<>	144:ef7eb2e8f9f7	1793	/** @addtogroup CRYP_Exported_Functions_Group4
<>	144:ef7eb2e8f9f7	1794	* @brief CRYP IRQ handler.
<>	144:ef7eb2e8f9f7	1795	*
<>	144:ef7eb2e8f9f7	1796	@verbatim
<>	144:ef7eb2e8f9f7	1797	==============================================================================
<>	144:ef7eb2e8f9f7	1798	##### CRYP IRQ handler management #####
<>	144:ef7eb2e8f9f7	1799	==============================================================================
<>	144:ef7eb2e8f9f7	1800	[..] This section provides CRYP IRQ handler function.
<>	144:ef7eb2e8f9f7	1801
<>	144:ef7eb2e8f9f7	1802	@endverbatim
<>	144:ef7eb2e8f9f7	1803	* @{
<>	144:ef7eb2e8f9f7	1804	*/
<>	144:ef7eb2e8f9f7	1805
<>	144:ef7eb2e8f9f7	1806	/**
<>	144:ef7eb2e8f9f7	1807	* @brief This function handles CRYP interrupt request.
<>	144:ef7eb2e8f9f7	1808	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1809	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1810	* @retval None
<>	144:ef7eb2e8f9f7	1811	*/
<>	144:ef7eb2e8f9f7	1812	void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1813	{
<>	144:ef7eb2e8f9f7	1814	/* Check if error occurred*/
<>	144:ef7eb2e8f9f7	1815	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
<>	144:ef7eb2e8f9f7	1816	{
<>	144:ef7eb2e8f9f7	1817	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
<>	144:ef7eb2e8f9f7	1818	{
<>	144:ef7eb2e8f9f7	1819	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
<>	144:ef7eb2e8f9f7	1820	}
<>	144:ef7eb2e8f9f7	1821
<>	144:ef7eb2e8f9f7	1822	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
<>	144:ef7eb2e8f9f7	1823	{
<>	144:ef7eb2e8f9f7	1824	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
<>	144:ef7eb2e8f9f7	1825	}
<>	144:ef7eb2e8f9f7	1826
<>	144:ef7eb2e8f9f7	1827	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_CCF) != RESET)
<>	144:ef7eb2e8f9f7	1828	{
<>	144:ef7eb2e8f9f7	1829	__HAL_CRYP_CLEAR_FLAG(hcryp,CRYP_CLEARFLAG_CCF);
<>	144:ef7eb2e8f9f7	1830	}
<>	144:ef7eb2e8f9f7	1831
<>	144:ef7eb2e8f9f7	1832	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	144:ef7eb2e8f9f7	1833	/* Disable Computation Complete Interrupt */
<>	144:ef7eb2e8f9f7	1834	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1835	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
<>	144:ef7eb2e8f9f7	1836
<>	144:ef7eb2e8f9f7	1837	HAL_CRYP_ErrorCallback(hcryp);
<>	144:ef7eb2e8f9f7	1838
<>	144:ef7eb2e8f9f7	1839	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1840	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1841
<>	144:ef7eb2e8f9f7	1842	return;
<>	144:ef7eb2e8f9f7	1843	}
<>	144:ef7eb2e8f9f7	1844
<>	144:ef7eb2e8f9f7	1845	/* Check if computation complete interrupt was enabled*/
<>	144:ef7eb2e8f9f7	1846	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
<>	144:ef7eb2e8f9f7	1847	{
<>	144:ef7eb2e8f9f7	1848	/* Clear CCF Flag */
<>	144:ef7eb2e8f9f7	1849	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	144:ef7eb2e8f9f7	1850
<>	144:ef7eb2e8f9f7	1851	CRYP_EncryptDecrypt_IT(hcryp);
<>	144:ef7eb2e8f9f7	1852	}
<>	144:ef7eb2e8f9f7	1853	}
<>	144:ef7eb2e8f9f7	1854
<>	144:ef7eb2e8f9f7	1855	/**
<>	144:ef7eb2e8f9f7	1856	* @}
<>	144:ef7eb2e8f9f7	1857	*/
<>	144:ef7eb2e8f9f7	1858
<>	144:ef7eb2e8f9f7	1859	/** @addtogroup CRYP_Exported_Functions_Group5
<>	144:ef7eb2e8f9f7	1860	* @brief Peripheral State functions.
<>	144:ef7eb2e8f9f7	1861	*
<>	144:ef7eb2e8f9f7	1862	@verbatim
<>	144:ef7eb2e8f9f7	1863	==============================================================================
<>	144:ef7eb2e8f9f7	1864	##### Peripheral State functions #####
<>	144:ef7eb2e8f9f7	1865	==============================================================================
<>	144:ef7eb2e8f9f7	1866	[..]
<>	144:ef7eb2e8f9f7	1867	This subsection permits to get in run-time the status of the peripheral.
<>	144:ef7eb2e8f9f7	1868
<>	144:ef7eb2e8f9f7	1869	@endverbatim
<>	144:ef7eb2e8f9f7	1870	* @{
<>	144:ef7eb2e8f9f7	1871	*/
<>	144:ef7eb2e8f9f7	1872
<>	144:ef7eb2e8f9f7	1873	/**
<>	144:ef7eb2e8f9f7	1874	* @brief Returns the CRYP state.
<>	144:ef7eb2e8f9f7	1875	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1876	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1877	* @retval HAL state
<>	144:ef7eb2e8f9f7	1878	*/
<>	144:ef7eb2e8f9f7	1879	HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1880	{
<>	144:ef7eb2e8f9f7	1881	return hcryp->State;
<>	144:ef7eb2e8f9f7	1882	}
<>	144:ef7eb2e8f9f7	1883
<>	144:ef7eb2e8f9f7	1884	/**
<>	144:ef7eb2e8f9f7	1885	* @}
<>	144:ef7eb2e8f9f7	1886	*/
<>	144:ef7eb2e8f9f7	1887
<>	144:ef7eb2e8f9f7	1888	/**
<>	144:ef7eb2e8f9f7	1889	* @}
<>	144:ef7eb2e8f9f7	1890	*/
<>	144:ef7eb2e8f9f7	1891
<>	144:ef7eb2e8f9f7	1892	/** @addtogroup CRYP_Private
<>	144:ef7eb2e8f9f7	1893	* @{
<>	144:ef7eb2e8f9f7	1894	*/
<>	144:ef7eb2e8f9f7	1895
<>	144:ef7eb2e8f9f7	1896	/**
<>	144:ef7eb2e8f9f7	1897	* @brief IT function called under interruption context to continue encryption or decryption
<>	144:ef7eb2e8f9f7	1898	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1899	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	1900	* @retval HAL status
<>	144:ef7eb2e8f9f7	1901	*/
<>	144:ef7eb2e8f9f7	1902	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
<>	144:ef7eb2e8f9f7	1903	{
<>	151:5eaa88a5bcc7	1904	uint32_t inputaddr = 0U, outputaddr = 0U;
<>	144:ef7eb2e8f9f7	1905
<>	144:ef7eb2e8f9f7	1906	/* Get the last Output data adress */
<>	144:ef7eb2e8f9f7	1907	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	144:ef7eb2e8f9f7	1908
<>	144:ef7eb2e8f9f7	1909	/* Read the Output block from the Output Register */
<>	144:ef7eb2e8f9f7	1910	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	1911	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	1912	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	1913	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	1914	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	1915	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	1916	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	144:ef7eb2e8f9f7	1917
<>	151:5eaa88a5bcc7	1918	hcryp->pCrypOutBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1919	hcryp->CrypOutCount -= 16U;
<>	144:ef7eb2e8f9f7	1920
<>	144:ef7eb2e8f9f7	1921	/* Check if all input text is encrypted or decrypted */
<>	151:5eaa88a5bcc7	1922	if(hcryp->CrypOutCount == 0U)
<>	144:ef7eb2e8f9f7	1923	{
<>	144:ef7eb2e8f9f7	1924	/* Disable Computation Complete Interrupt */
<>	144:ef7eb2e8f9f7	1925	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
<>	144:ef7eb2e8f9f7	1926	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
<>	144:ef7eb2e8f9f7	1927
<>	144:ef7eb2e8f9f7	1928	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1929	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	1930
<>	144:ef7eb2e8f9f7	1931	/* Change the CRYP state */
<>	144:ef7eb2e8f9f7	1932	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1933
<>	144:ef7eb2e8f9f7	1934	/* Call computation complete callback */
<>	144:ef7eb2e8f9f7	1935	HAL_CRYPEx_ComputationCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1936	}
<>	144:ef7eb2e8f9f7	1937	else /* Process the rest of input text */
<>	144:ef7eb2e8f9f7	1938	{
<>	144:ef7eb2e8f9f7	1939	/* Get the last Intput data adress */
<>	144:ef7eb2e8f9f7	1940	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	144:ef7eb2e8f9f7	1941
<>	144:ef7eb2e8f9f7	1942	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	1943	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1944	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1945	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1946	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1947	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1948	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	1949	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	1950	hcryp->pCrypInBuffPtr += 16U;
<>	151:5eaa88a5bcc7	1951	hcryp->CrypInCount -= 16U;
<>	144:ef7eb2e8f9f7	1952	}
<>	144:ef7eb2e8f9f7	1953	return HAL_OK;
<>	144:ef7eb2e8f9f7	1954	}
<>	144:ef7eb2e8f9f7	1955	/**
<>	144:ef7eb2e8f9f7	1956	* @brief DMA CRYP Input Data process complete callback.
<>	144:ef7eb2e8f9f7	1957	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	1958	* @retval None
<>	144:ef7eb2e8f9f7	1959	*/
<>	144:ef7eb2e8f9f7	1960	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1961	{
<>	144:ef7eb2e8f9f7	1962	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	144:ef7eb2e8f9f7	1963
<>	144:ef7eb2e8f9f7	1964	/* Disable the DMA transfer for input request */
<>	144:ef7eb2e8f9f7	1965	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
<>	144:ef7eb2e8f9f7	1966
<>	144:ef7eb2e8f9f7	1967	/* Call input data transfer complete callback */
<>	144:ef7eb2e8f9f7	1968	HAL_CRYP_InCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1969	}
<>	144:ef7eb2e8f9f7	1970
<>	144:ef7eb2e8f9f7	1971	/**
<>	144:ef7eb2e8f9f7	1972	* @brief DMA CRYP Output Data process complete callback.
<>	144:ef7eb2e8f9f7	1973	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	1974	* @retval None
<>	144:ef7eb2e8f9f7	1975	*/
<>	144:ef7eb2e8f9f7	1976	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1977	{
<>	144:ef7eb2e8f9f7	1978	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	144:ef7eb2e8f9f7	1979
<>	144:ef7eb2e8f9f7	1980	/* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
<>	144:ef7eb2e8f9f7	1981	in the DMACR register */
<>	144:ef7eb2e8f9f7	1982	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
<>	144:ef7eb2e8f9f7	1983
<>	144:ef7eb2e8f9f7	1984	/* Clear CCF Flag */
<>	144:ef7eb2e8f9f7	1985	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	144:ef7eb2e8f9f7	1986
<>	144:ef7eb2e8f9f7	1987	/* Disable CRYP */
<>	144:ef7eb2e8f9f7	1988	__HAL_CRYP_DISABLE(hcryp);
<>	144:ef7eb2e8f9f7	1989
<>	144:ef7eb2e8f9f7	1990	/* Change the CRYP state to ready */
<>	144:ef7eb2e8f9f7	1991	hcryp->State = HAL_CRYP_STATE_READY;
<>	144:ef7eb2e8f9f7	1992
<>	144:ef7eb2e8f9f7	1993	/* Call output data transfer complete callback */
<>	144:ef7eb2e8f9f7	1994	HAL_CRYP_OutCpltCallback(hcryp);
<>	144:ef7eb2e8f9f7	1995	}
<>	144:ef7eb2e8f9f7	1996
<>	144:ef7eb2e8f9f7	1997	/**
<>	144:ef7eb2e8f9f7	1998	* @brief DMA CRYP communication error callback.
<>	144:ef7eb2e8f9f7	1999	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	2000	* @retval None
<>	144:ef7eb2e8f9f7	2001	*/
<>	144:ef7eb2e8f9f7	2002	static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	2003	{
<>	144:ef7eb2e8f9f7	2004	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	144:ef7eb2e8f9f7	2005	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	144:ef7eb2e8f9f7	2006	HAL_CRYP_ErrorCallback(hcryp);
<>	144:ef7eb2e8f9f7	2007	}
<>	144:ef7eb2e8f9f7	2008
<>	144:ef7eb2e8f9f7	2009	/**
<>	144:ef7eb2e8f9f7	2010	* @brief Writes the Key in Key registers.
<>	144:ef7eb2e8f9f7	2011	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2012	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2013	* @param Key: Pointer to Key buffer
<>	144:ef7eb2e8f9f7	2014	* @note Key must be written as little endian.
<>	144:ef7eb2e8f9f7	2015	* If Key pointer points at address n,
<>	144:ef7eb2e8f9f7	2016	* n[15:0] contains key[96:127],
<>	144:ef7eb2e8f9f7	2017	* (n+4)[15:0] contains key[64:95],
<>	144:ef7eb2e8f9f7	2018	* (n+8)[15:0] contains key[32:63] and
<>	144:ef7eb2e8f9f7	2019	* (n+12)[15:0] contains key[0:31]
<>	144:ef7eb2e8f9f7	2020	* @retval None
<>	144:ef7eb2e8f9f7	2021	*/
<>	144:ef7eb2e8f9f7	2022	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key)
<>	144:ef7eb2e8f9f7	2023	{
<>	144:ef7eb2e8f9f7	2024	uint32_t keyaddr = (uint32_t)Key;
<>	144:ef7eb2e8f9f7	2025
<>	144:ef7eb2e8f9f7	2026	hcryp->Instance->KEYR3 = __REV((uint32_t)(keyaddr));
<>	151:5eaa88a5bcc7	2027	keyaddr+=4U;
<>	144:ef7eb2e8f9f7	2028	hcryp->Instance->KEYR2 = __REV((uint32_t)(keyaddr));
<>	151:5eaa88a5bcc7	2029	keyaddr+=4U;
<>	144:ef7eb2e8f9f7	2030	hcryp->Instance->KEYR1 = __REV((uint32_t)(keyaddr));
<>	151:5eaa88a5bcc7	2031	keyaddr+=4U;
<>	144:ef7eb2e8f9f7	2032	hcryp->Instance->KEYR0 = __REV((uint32_t)(keyaddr));
<>	144:ef7eb2e8f9f7	2033	}
<>	144:ef7eb2e8f9f7	2034
<>	144:ef7eb2e8f9f7	2035	/**
<>	144:ef7eb2e8f9f7	2036	* @brief Writes the InitVector/InitCounter in IV registers.
<>	144:ef7eb2e8f9f7	2037	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2038	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2039	* @param InitVector: Pointer to InitVector/InitCounter buffer
<>	144:ef7eb2e8f9f7	2040	* @note Init Vector must be written as little endian.
<>	144:ef7eb2e8f9f7	2041	* If Init Vector pointer points at address n,
<>	144:ef7eb2e8f9f7	2042	* n[15:0] contains Vector[96:127],
<>	144:ef7eb2e8f9f7	2043	* (n+4)[15:0] contains Vector[64:95],
<>	144:ef7eb2e8f9f7	2044	* (n+8)[15:0] contains Vector[32:63] and
<>	144:ef7eb2e8f9f7	2045	* (n+12)[15:0] contains Vector[0:31]
<>	144:ef7eb2e8f9f7	2046	* @retval None
<>	144:ef7eb2e8f9f7	2047	*/
<>	144:ef7eb2e8f9f7	2048	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector)
<>	144:ef7eb2e8f9f7	2049	{
<>	144:ef7eb2e8f9f7	2050	uint32_t ivaddr = (uint32_t)InitVector;
<>	144:ef7eb2e8f9f7	2051
<>	144:ef7eb2e8f9f7	2052	hcryp->Instance->IVR3 = __REV((uint32_t)(ivaddr));
<>	151:5eaa88a5bcc7	2053	ivaddr+=4U;
<>	144:ef7eb2e8f9f7	2054	hcryp->Instance->IVR2 = __REV((uint32_t)(ivaddr));
<>	151:5eaa88a5bcc7	2055	ivaddr+=4U;
<>	144:ef7eb2e8f9f7	2056	hcryp->Instance->IVR1 = __REV((uint32_t)(ivaddr));
<>	151:5eaa88a5bcc7	2057	ivaddr+=4U;
<>	144:ef7eb2e8f9f7	2058	hcryp->Instance->IVR0 = __REV((uint32_t)(ivaddr));
<>	144:ef7eb2e8f9f7	2059	}
<>	144:ef7eb2e8f9f7	2060
<>	144:ef7eb2e8f9f7	2061	/**
<>	144:ef7eb2e8f9f7	2062	* @brief Process Data: Writes Input data in polling mode and reads the output data
<>	144:ef7eb2e8f9f7	2063	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2064	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2065	* @param Input: Pointer to the Input buffer
<>	144:ef7eb2e8f9f7	2066	* @param Ilength: Length of the Input buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	2067	* @param Output: Pointer to the returned buffer
<>	144:ef7eb2e8f9f7	2068	* @param Timeout: Specify Timeout value
<>	144:ef7eb2e8f9f7	2069	* @retval None
<>	144:ef7eb2e8f9f7	2070	*/
<>	144:ef7eb2e8f9f7	2071	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	2072	{
<>	151:5eaa88a5bcc7	2073	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	2074
<>	151:5eaa88a5bcc7	2075	uint32_t index = 0U;
<>	144:ef7eb2e8f9f7	2076	uint32_t inputaddr = (uint32_t)Input;
<>	144:ef7eb2e8f9f7	2077	uint32_t outputaddr = (uint32_t)Output;
<>	144:ef7eb2e8f9f7	2078
<>	151:5eaa88a5bcc7	2079	for(index=0U; (index < Ilength); index += 16U)
<>	144:ef7eb2e8f9f7	2080	{
<>	144:ef7eb2e8f9f7	2081	/* Write the Input block in the Data Input register */
<>	144:ef7eb2e8f9f7	2082	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	2083	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	2084	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	2085	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	2086	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	2087	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	2088	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	151:5eaa88a5bcc7	2089	inputaddr+=4U;
<>	144:ef7eb2e8f9f7	2090
<>	144:ef7eb2e8f9f7	2091	/* Get timeout */
<>	144:ef7eb2e8f9f7	2092	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	2093
<>	144:ef7eb2e8f9f7	2094	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
<>	144:ef7eb2e8f9f7	2095	{
<>	144:ef7eb2e8f9f7	2096	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	2097	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	2098	{
<>	151:5eaa88a5bcc7	2099	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	2100	{
<>	144:ef7eb2e8f9f7	2101	/* Change state */
<>	144:ef7eb2e8f9f7	2102	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	2103
<>	144:ef7eb2e8f9f7	2104	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	2105	__HAL_UNLOCK(hcryp);
<>	144:ef7eb2e8f9f7	2106
<>	144:ef7eb2e8f9f7	2107	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	2108	}
<>	144:ef7eb2e8f9f7	2109	}
<>	144:ef7eb2e8f9f7	2110	}
<>	144:ef7eb2e8f9f7	2111	/* Clear CCF Flag */
<>	144:ef7eb2e8f9f7	2112	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	144:ef7eb2e8f9f7	2113
<>	144:ef7eb2e8f9f7	2114	/* Read the Output block from the Data Output Register */
<>	144:ef7eb2e8f9f7	2115	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	2116	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	2117	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	2118	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	2119	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	2120	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	2121	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	151:5eaa88a5bcc7	2122	outputaddr+=4U;
<>	144:ef7eb2e8f9f7	2123	}
<>	144:ef7eb2e8f9f7	2124	/* Return function status */
<>	144:ef7eb2e8f9f7	2125	return HAL_OK;
<>	144:ef7eb2e8f9f7	2126	}
<>	144:ef7eb2e8f9f7	2127
<>	144:ef7eb2e8f9f7	2128	/**
<>	144:ef7eb2e8f9f7	2129	* @brief Set the DMA configuration and start the DMA transfer
<>	144:ef7eb2e8f9f7	2130	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	2131	* the configuration information for CRYP module
<>	144:ef7eb2e8f9f7	2132	* @param inputaddr: address of the Input buffer
<>	144:ef7eb2e8f9f7	2133	* @param Size: Size of the Input buffer, must be a multiple of 16.
<>	144:ef7eb2e8f9f7	2134	* @param outputaddr: address of the Output buffer
<>	144:ef7eb2e8f9f7	2135	* @retval None
<>	144:ef7eb2e8f9f7	2136	*/
<>	144:ef7eb2e8f9f7	2137	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
<>	144:ef7eb2e8f9f7	2138	{
<>	144:ef7eb2e8f9f7	2139	/* Set the CRYP DMA transfer complete callback */
<>	144:ef7eb2e8f9f7	2140	hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
<>	144:ef7eb2e8f9f7	2141	/* Set the DMA error callback */
<>	144:ef7eb2e8f9f7	2142	hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
<>	144:ef7eb2e8f9f7	2143
<>	144:ef7eb2e8f9f7	2144	/* Set the CRYP DMA transfer complete callback */
<>	144:ef7eb2e8f9f7	2145	hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
<>	144:ef7eb2e8f9f7	2146	/* Set the DMA error callback */
<>	144:ef7eb2e8f9f7	2147	hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
<>	144:ef7eb2e8f9f7	2148
<>	144:ef7eb2e8f9f7	2149	/* Enable the DMA In DMA Stream */
<>	144:ef7eb2e8f9f7	2150	HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
<>	144:ef7eb2e8f9f7	2151
<>	144:ef7eb2e8f9f7	2152	/* Enable the DMA Out DMA Stream */
<>	144:ef7eb2e8f9f7	2153	HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
<>	144:ef7eb2e8f9f7	2154
<>	144:ef7eb2e8f9f7	2155	/* Enable In and Out DMA requests */
<>	144:ef7eb2e8f9f7	2156	SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN \| AES_CR_DMAOUTEN));
<>	144:ef7eb2e8f9f7	2157
<>	144:ef7eb2e8f9f7	2158	/* Enable CRYP */
<>	144:ef7eb2e8f9f7	2159	__HAL_CRYP_ENABLE(hcryp);
<>	144:ef7eb2e8f9f7	2160	}
<>	144:ef7eb2e8f9f7	2161
<>	144:ef7eb2e8f9f7	2162	/**
<>	144:ef7eb2e8f9f7	2163	* @}
<>	144:ef7eb2e8f9f7	2164	*/
<>	144:ef7eb2e8f9f7	2165
<>	144:ef7eb2e8f9f7	2166	/**
<>	144:ef7eb2e8f9f7	2167	* @}
<>	144:ef7eb2e8f9f7	2168	*/
<>	144:ef7eb2e8f9f7	2169
<>	144:ef7eb2e8f9f7	2170	/**
<>	144:ef7eb2e8f9f7	2171	* @}
<>	144:ef7eb2e8f9f7	2172	*/
<>	144:ef7eb2e8f9f7	2173
<>	144:ef7eb2e8f9f7	2174	#endif /* HAL_CRYP_MODULE_ENABLED */
<>	144:ef7eb2e8f9f7	2175	#endif /* STM32L021xx \|\| STM32L041xx \|\| STM32L061xx \|\| STM32L062xx \|\| STM32L063xx \|\| STM32L081xx \|\| STM32L082xx \|\| STM32L083xx */
<>	144:ef7eb2e8f9f7	2176	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
<>	144:ef7eb2e8f9f7	2177