mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 167:e84263d55307
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f2xx_hal_flash_ex.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
AnnaBridge | 167:e84263d55307 | 5 | * @version V1.2.1 |
AnnaBridge | 167:e84263d55307 | 6 | * @date 14-April-2017 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of FLASH HAL Extension module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
AnnaBridge | 167:e84263d55307 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F2xx_HAL_FLASH_EX_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F2xx_HAL_FLASH_EX_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 47 | #include "stm32f2xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** @addtogroup STM32F2xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 50 | * @{ |
<> | 144:ef7eb2e8f9f7 | 51 | */ |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /** @addtogroup FLASHEx |
<> | 144:ef7eb2e8f9f7 | 54 | * @{ |
<> | 144:ef7eb2e8f9f7 | 55 | */ |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 58 | /** @defgroup FLASHEx_Exported_Types FLASH Exported Types |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /** |
<> | 144:ef7eb2e8f9f7 | 63 | * @brief FLASH Erase structure definition |
<> | 144:ef7eb2e8f9f7 | 64 | */ |
<> | 144:ef7eb2e8f9f7 | 65 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 66 | { |
<> | 144:ef7eb2e8f9f7 | 67 | uint32_t TypeErase; /*!< Mass erase or sector Erase. |
<> | 144:ef7eb2e8f9f7 | 68 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
<> | 144:ef7eb2e8f9f7 | 69 | |
<> | 144:ef7eb2e8f9f7 | 70 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
AnnaBridge | 167:e84263d55307 | 71 | This parameter must be a value of @ref FLASHEx_Banks */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled |
AnnaBridge | 167:e84263d55307 | 74 | This parameter must be a value of @ref FLASHEx_Sectors */ |
AnnaBridge | 167:e84263d55307 | 75 | |
<> | 144:ef7eb2e8f9f7 | 76 | uint32_t NbSectors; /*!< Number of sectors to be erased. |
AnnaBridge | 167:e84263d55307 | 77 | This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ |
AnnaBridge | 167:e84263d55307 | 78 | |
<> | 144:ef7eb2e8f9f7 | 79 | uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism |
AnnaBridge | 167:e84263d55307 | 80 | This parameter must be a value of @ref FLASHEx_Voltage_Range */ |
AnnaBridge | 167:e84263d55307 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | } FLASH_EraseInitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | /** |
<> | 144:ef7eb2e8f9f7 | 85 | * @brief FLASH Option Bytes Program structure definition |
<> | 144:ef7eb2e8f9f7 | 86 | */ |
<> | 144:ef7eb2e8f9f7 | 87 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 88 | { |
<> | 144:ef7eb2e8f9f7 | 89 | uint32_t OptionType; /*!< Option byte to be configured. |
<> | 144:ef7eb2e8f9f7 | 90 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | uint32_t WRPState; /*!< Write protection activation or deactivation. |
<> | 144:ef7eb2e8f9f7 | 93 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
<> | 144:ef7eb2e8f9f7 | 94 | |
<> | 144:ef7eb2e8f9f7 | 95 | uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. |
<> | 144:ef7eb2e8f9f7 | 96 | The value of this parameter depend on device used within the same series */ |
<> | 144:ef7eb2e8f9f7 | 97 | |
<> | 144:ef7eb2e8f9f7 | 98 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
<> | 144:ef7eb2e8f9f7 | 99 | This parameter must be a value of @ref FLASHEx_Banks */ |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | uint32_t RDPLevel; /*!< Set the read protection level. |
<> | 144:ef7eb2e8f9f7 | 102 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
<> | 144:ef7eb2e8f9f7 | 103 | |
<> | 144:ef7eb2e8f9f7 | 104 | uint32_t BORLevel; /*!< Set the BOR Level. |
<> | 144:ef7eb2e8f9f7 | 105 | This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */ |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | } FLASH_OBProgramInitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 112 | |
<> | 144:ef7eb2e8f9f7 | 113 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants |
<> | 144:ef7eb2e8f9f7 | 114 | * @{ |
<> | 144:ef7eb2e8f9f7 | 115 | */ |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
<> | 144:ef7eb2e8f9f7 | 118 | * @{ |
<> | 144:ef7eb2e8f9f7 | 119 | */ |
AnnaBridge | 167:e84263d55307 | 120 | #define FLASH_TYPEERASE_SECTORS 0x00000000U /*!< Sectors erase only */ |
AnnaBridge | 167:e84263d55307 | 121 | #define FLASH_TYPEERASE_MASSERASE 0x00000001U /*!< Flash Mass erase activation */ |
<> | 144:ef7eb2e8f9f7 | 122 | /** |
<> | 144:ef7eb2e8f9f7 | 123 | * @} |
<> | 144:ef7eb2e8f9f7 | 124 | */ |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range |
<> | 144:ef7eb2e8f9f7 | 127 | * @{ |
<> | 144:ef7eb2e8f9f7 | 128 | */ |
AnnaBridge | 167:e84263d55307 | 129 | #define FLASH_VOLTAGE_RANGE_1 0x00000000U /*!< Device operating range: 1.8V to 2.1V */ |
AnnaBridge | 167:e84263d55307 | 130 | #define FLASH_VOLTAGE_RANGE_2 0x00000001U /*!< Device operating range: 2.1V to 2.7V */ |
AnnaBridge | 167:e84263d55307 | 131 | #define FLASH_VOLTAGE_RANGE_3 0x00000002U /*!< Device operating range: 2.7V to 3.6V */ |
AnnaBridge | 167:e84263d55307 | 132 | #define FLASH_VOLTAGE_RANGE_4 0x00000003U /*!< Device operating range: 2.7V to 3.6V + External Vpp */ |
<> | 144:ef7eb2e8f9f7 | 133 | /** |
<> | 144:ef7eb2e8f9f7 | 134 | * @} |
<> | 144:ef7eb2e8f9f7 | 135 | */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
<> | 144:ef7eb2e8f9f7 | 138 | * @{ |
<> | 144:ef7eb2e8f9f7 | 139 | */ |
AnnaBridge | 167:e84263d55307 | 140 | #define OB_WRPSTATE_DISABLE 0x00000000U /*!< Disable the write protection of the desired bank 1 sectors */ |
AnnaBridge | 167:e84263d55307 | 141 | #define OB_WRPSTATE_ENABLE 0x00000001U /*!< Enable the write protection of the desired bank 1 sectors */ |
<> | 144:ef7eb2e8f9f7 | 142 | /** |
<> | 144:ef7eb2e8f9f7 | 143 | * @} |
<> | 144:ef7eb2e8f9f7 | 144 | */ |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
<> | 144:ef7eb2e8f9f7 | 147 | * @{ |
<> | 144:ef7eb2e8f9f7 | 148 | */ |
AnnaBridge | 167:e84263d55307 | 149 | #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */ |
AnnaBridge | 167:e84263d55307 | 150 | #define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */ |
AnnaBridge | 167:e84263d55307 | 151 | #define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */ |
AnnaBridge | 167:e84263d55307 | 152 | #define OPTIONBYTE_BOR 0x00000008U /*!< BOR option byte configuration */ |
<> | 144:ef7eb2e8f9f7 | 153 | /** |
<> | 144:ef7eb2e8f9f7 | 154 | * @} |
<> | 144:ef7eb2e8f9f7 | 155 | */ |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
<> | 144:ef7eb2e8f9f7 | 158 | * @{ |
<> | 144:ef7eb2e8f9f7 | 159 | */ |
AnnaBridge | 167:e84263d55307 | 160 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) |
AnnaBridge | 167:e84263d55307 | 161 | #define OB_RDP_LEVEL_1 ((uint8_t)0x55) |
AnnaBridge | 167:e84263d55307 | 162 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 |
AnnaBridge | 167:e84263d55307 | 163 | it s no more possible to go back to level 1 or 0 */ |
<> | 144:ef7eb2e8f9f7 | 164 | /** |
<> | 144:ef7eb2e8f9f7 | 165 | * @} |
<> | 144:ef7eb2e8f9f7 | 166 | */ |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
<> | 144:ef7eb2e8f9f7 | 169 | * @{ |
<> | 144:ef7eb2e8f9f7 | 170 | */ |
AnnaBridge | 167:e84263d55307 | 171 | #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ |
AnnaBridge | 167:e84263d55307 | 172 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ |
<> | 144:ef7eb2e8f9f7 | 173 | /** |
<> | 144:ef7eb2e8f9f7 | 174 | * @} |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | |
<> | 144:ef7eb2e8f9f7 | 177 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP |
<> | 144:ef7eb2e8f9f7 | 178 | * @{ |
<> | 144:ef7eb2e8f9f7 | 179 | */ |
AnnaBridge | 167:e84263d55307 | 180 | #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ |
AnnaBridge | 167:e84263d55307 | 181 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
<> | 144:ef7eb2e8f9f7 | 182 | /** |
<> | 144:ef7eb2e8f9f7 | 183 | * @} |
<> | 144:ef7eb2e8f9f7 | 184 | */ |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | |
<> | 144:ef7eb2e8f9f7 | 187 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
<> | 144:ef7eb2e8f9f7 | 188 | * @{ |
<> | 144:ef7eb2e8f9f7 | 189 | */ |
AnnaBridge | 167:e84263d55307 | 190 | #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ |
AnnaBridge | 167:e84263d55307 | 191 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
<> | 144:ef7eb2e8f9f7 | 192 | /** |
<> | 144:ef7eb2e8f9f7 | 193 | * @} |
<> | 144:ef7eb2e8f9f7 | 194 | */ |
<> | 144:ef7eb2e8f9f7 | 195 | |
<> | 144:ef7eb2e8f9f7 | 196 | /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level |
<> | 144:ef7eb2e8f9f7 | 197 | * @{ |
<> | 144:ef7eb2e8f9f7 | 198 | */ |
AnnaBridge | 167:e84263d55307 | 199 | #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ |
AnnaBridge | 167:e84263d55307 | 200 | #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ |
AnnaBridge | 167:e84263d55307 | 201 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ |
AnnaBridge | 167:e84263d55307 | 202 | #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ |
<> | 144:ef7eb2e8f9f7 | 203 | /** |
<> | 144:ef7eb2e8f9f7 | 204 | * @} |
<> | 144:ef7eb2e8f9f7 | 205 | */ |
<> | 144:ef7eb2e8f9f7 | 206 | |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | /** |
<> | 144:ef7eb2e8f9f7 | 209 | * @} |
<> | 144:ef7eb2e8f9f7 | 210 | */ |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /** @defgroup FLASH_Latency FLASH Latency |
<> | 144:ef7eb2e8f9f7 | 213 | * @{ |
<> | 144:ef7eb2e8f9f7 | 214 | */ |
<> | 144:ef7eb2e8f9f7 | 215 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
<> | 144:ef7eb2e8f9f7 | 216 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
<> | 144:ef7eb2e8f9f7 | 217 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 218 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 219 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 220 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 221 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 222 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | /** |
<> | 144:ef7eb2e8f9f7 | 225 | * @} |
<> | 144:ef7eb2e8f9f7 | 226 | */ |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /** @defgroup FLASHEx_Banks FLASH Banks |
<> | 144:ef7eb2e8f9f7 | 230 | * @{ |
<> | 144:ef7eb2e8f9f7 | 231 | */ |
AnnaBridge | 167:e84263d55307 | 232 | #define FLASH_BANK_1 1U /*!< Bank 1 */ |
<> | 144:ef7eb2e8f9f7 | 233 | /** |
<> | 144:ef7eb2e8f9f7 | 234 | * @} |
<> | 144:ef7eb2e8f9f7 | 235 | */ |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit |
<> | 144:ef7eb2e8f9f7 | 238 | * @{ |
<> | 144:ef7eb2e8f9f7 | 239 | */ |
AnnaBridge | 167:e84263d55307 | 240 | #define FLASH_MER_BIT FLASH_CR_MER /*!< only 1 MER Bit */ |
<> | 144:ef7eb2e8f9f7 | 241 | /** |
<> | 144:ef7eb2e8f9f7 | 242 | * @} |
<> | 144:ef7eb2e8f9f7 | 243 | */ |
<> | 144:ef7eb2e8f9f7 | 244 | |
<> | 144:ef7eb2e8f9f7 | 245 | /** @defgroup FLASHEx_Sectors FLASH Sectors |
<> | 144:ef7eb2e8f9f7 | 246 | * @{ |
<> | 144:ef7eb2e8f9f7 | 247 | */ |
AnnaBridge | 167:e84263d55307 | 248 | #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ |
AnnaBridge | 167:e84263d55307 | 249 | #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ |
AnnaBridge | 167:e84263d55307 | 250 | #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ |
AnnaBridge | 167:e84263d55307 | 251 | #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ |
AnnaBridge | 167:e84263d55307 | 252 | #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ |
AnnaBridge | 167:e84263d55307 | 253 | #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ |
AnnaBridge | 167:e84263d55307 | 254 | #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ |
AnnaBridge | 167:e84263d55307 | 255 | #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ |
AnnaBridge | 167:e84263d55307 | 256 | #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ |
AnnaBridge | 167:e84263d55307 | 257 | #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ |
AnnaBridge | 167:e84263d55307 | 258 | #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ |
AnnaBridge | 167:e84263d55307 | 259 | #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ |
<> | 144:ef7eb2e8f9f7 | 260 | |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | |
<> | 144:ef7eb2e8f9f7 | 263 | /** |
<> | 144:ef7eb2e8f9f7 | 264 | * @} |
<> | 144:ef7eb2e8f9f7 | 265 | */ |
<> | 144:ef7eb2e8f9f7 | 266 | |
<> | 144:ef7eb2e8f9f7 | 267 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
<> | 144:ef7eb2e8f9f7 | 268 | * @{ |
<> | 144:ef7eb2e8f9f7 | 269 | */ |
AnnaBridge | 167:e84263d55307 | 270 | #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */ |
AnnaBridge | 167:e84263d55307 | 271 | #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */ |
AnnaBridge | 167:e84263d55307 | 272 | #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */ |
AnnaBridge | 167:e84263d55307 | 273 | #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */ |
AnnaBridge | 167:e84263d55307 | 274 | #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */ |
AnnaBridge | 167:e84263d55307 | 275 | #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */ |
AnnaBridge | 167:e84263d55307 | 276 | #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */ |
AnnaBridge | 167:e84263d55307 | 277 | #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */ |
AnnaBridge | 167:e84263d55307 | 278 | #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */ |
AnnaBridge | 167:e84263d55307 | 279 | #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */ |
AnnaBridge | 167:e84263d55307 | 280 | #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */ |
AnnaBridge | 167:e84263d55307 | 281 | #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */ |
AnnaBridge | 167:e84263d55307 | 282 | #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */ |
<> | 144:ef7eb2e8f9f7 | 283 | |
<> | 144:ef7eb2e8f9f7 | 284 | |
<> | 144:ef7eb2e8f9f7 | 285 | /** |
<> | 144:ef7eb2e8f9f7 | 286 | * @} |
<> | 144:ef7eb2e8f9f7 | 287 | */ |
<> | 144:ef7eb2e8f9f7 | 288 | |
<> | 144:ef7eb2e8f9f7 | 289 | /** |
<> | 144:ef7eb2e8f9f7 | 290 | * @} |
<> | 144:ef7eb2e8f9f7 | 291 | */ |
<> | 144:ef7eb2e8f9f7 | 292 | |
<> | 144:ef7eb2e8f9f7 | 293 | /* Exported macro ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 294 | |
<> | 144:ef7eb2e8f9f7 | 295 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 296 | /** @addtogroup FLASHEx_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 297 | * @{ |
<> | 144:ef7eb2e8f9f7 | 298 | */ |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 301 | * @{ |
<> | 144:ef7eb2e8f9f7 | 302 | */ |
<> | 144:ef7eb2e8f9f7 | 303 | /* Extension Program operation functions *************************************/ |
<> | 144:ef7eb2e8f9f7 | 304 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); |
<> | 144:ef7eb2e8f9f7 | 305 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
<> | 144:ef7eb2e8f9f7 | 306 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
<> | 144:ef7eb2e8f9f7 | 307 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
<> | 144:ef7eb2e8f9f7 | 308 | |
<> | 144:ef7eb2e8f9f7 | 309 | /** |
<> | 144:ef7eb2e8f9f7 | 310 | * @} |
<> | 144:ef7eb2e8f9f7 | 311 | */ |
<> | 144:ef7eb2e8f9f7 | 312 | |
<> | 144:ef7eb2e8f9f7 | 313 | /** |
<> | 144:ef7eb2e8f9f7 | 314 | * @} |
<> | 144:ef7eb2e8f9f7 | 315 | */ |
<> | 144:ef7eb2e8f9f7 | 316 | /* Private types -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 317 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 318 | /** @defgroup FLASHEx_Private_Variables FLASH Private Variables |
<> | 144:ef7eb2e8f9f7 | 319 | * @{ |
<> | 144:ef7eb2e8f9f7 | 320 | */ |
<> | 144:ef7eb2e8f9f7 | 321 | |
<> | 144:ef7eb2e8f9f7 | 322 | /** |
<> | 144:ef7eb2e8f9f7 | 323 | * @} |
<> | 144:ef7eb2e8f9f7 | 324 | */ |
<> | 144:ef7eb2e8f9f7 | 325 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 326 | /** @defgroup FLASHEx_Private_Constants FLASH Private Constants |
<> | 144:ef7eb2e8f9f7 | 327 | * @{ |
<> | 144:ef7eb2e8f9f7 | 328 | */ |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | #define FLASH_SECTOR_TOTAL 12U |
<> | 144:ef7eb2e8f9f7 | 331 | |
<> | 144:ef7eb2e8f9f7 | 332 | /** |
<> | 144:ef7eb2e8f9f7 | 333 | * @} |
<> | 144:ef7eb2e8f9f7 | 334 | */ |
<> | 144:ef7eb2e8f9f7 | 335 | |
<> | 144:ef7eb2e8f9f7 | 336 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 337 | /** @defgroup FLASHEx_Private_Macros FLASH Private Macros |
<> | 144:ef7eb2e8f9f7 | 338 | * @{ |
<> | 144:ef7eb2e8f9f7 | 339 | */ |
<> | 144:ef7eb2e8f9f7 | 340 | |
<> | 144:ef7eb2e8f9f7 | 341 | /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters |
<> | 144:ef7eb2e8f9f7 | 342 | * @{ |
<> | 144:ef7eb2e8f9f7 | 343 | */ |
<> | 144:ef7eb2e8f9f7 | 344 | |
<> | 144:ef7eb2e8f9f7 | 345 | #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ |
<> | 144:ef7eb2e8f9f7 | 346 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
<> | 144:ef7eb2e8f9f7 | 347 | |
<> | 144:ef7eb2e8f9f7 | 348 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ |
<> | 144:ef7eb2e8f9f7 | 349 | ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ |
<> | 144:ef7eb2e8f9f7 | 350 | ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ |
<> | 144:ef7eb2e8f9f7 | 351 | ((RANGE) == FLASH_VOLTAGE_RANGE_4)) |
<> | 144:ef7eb2e8f9f7 | 352 | |
<> | 144:ef7eb2e8f9f7 | 353 | #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ |
<> | 144:ef7eb2e8f9f7 | 354 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
<> | 144:ef7eb2e8f9f7 | 355 | |
<> | 144:ef7eb2e8f9f7 | 356 | #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
<> | 144:ef7eb2e8f9f7 | 357 | |
<> | 144:ef7eb2e8f9f7 | 358 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
<> | 144:ef7eb2e8f9f7 | 359 | ((LEVEL) == OB_RDP_LEVEL_1) ||\ |
<> | 144:ef7eb2e8f9f7 | 360 | ((LEVEL) == OB_RDP_LEVEL_2)) |
<> | 144:ef7eb2e8f9f7 | 361 | |
<> | 144:ef7eb2e8f9f7 | 362 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
<> | 144:ef7eb2e8f9f7 | 363 | |
<> | 144:ef7eb2e8f9f7 | 364 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
<> | 144:ef7eb2e8f9f7 | 365 | |
<> | 144:ef7eb2e8f9f7 | 366 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
<> | 144:ef7eb2e8f9f7 | 367 | |
<> | 144:ef7eb2e8f9f7 | 368 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
<> | 144:ef7eb2e8f9f7 | 369 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
<> | 144:ef7eb2e8f9f7 | 370 | |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
<> | 144:ef7eb2e8f9f7 | 373 | ((LATENCY) == FLASH_LATENCY_1) || \ |
<> | 144:ef7eb2e8f9f7 | 374 | ((LATENCY) == FLASH_LATENCY_2) || \ |
<> | 144:ef7eb2e8f9f7 | 375 | ((LATENCY) == FLASH_LATENCY_3) || \ |
<> | 144:ef7eb2e8f9f7 | 376 | ((LATENCY) == FLASH_LATENCY_4) || \ |
<> | 144:ef7eb2e8f9f7 | 377 | ((LATENCY) == FLASH_LATENCY_5) || \ |
<> | 144:ef7eb2e8f9f7 | 378 | ((LATENCY) == FLASH_LATENCY_6) || \ |
<> | 144:ef7eb2e8f9f7 | 379 | ((LATENCY) == FLASH_LATENCY_7)) |
<> | 144:ef7eb2e8f9f7 | 380 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
<> | 144:ef7eb2e8f9f7 | 381 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
<> | 144:ef7eb2e8f9f7 | 382 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
<> | 144:ef7eb2e8f9f7 | 383 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
<> | 144:ef7eb2e8f9f7 | 384 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
<> | 144:ef7eb2e8f9f7 | 385 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
<> | 144:ef7eb2e8f9f7 | 386 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11)) |
<> | 144:ef7eb2e8f9f7 | 387 | |
<> | 144:ef7eb2e8f9f7 | 388 | |
<> | 144:ef7eb2e8f9f7 | 389 | |
AnnaBridge | 167:e84263d55307 | 390 | #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \ |
AnnaBridge | 167:e84263d55307 | 391 | (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END))) |
<> | 144:ef7eb2e8f9f7 | 392 | #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0U) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) |
AnnaBridge | 167:e84263d55307 | 393 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U)) |
<> | 144:ef7eb2e8f9f7 | 394 | |
<> | 144:ef7eb2e8f9f7 | 395 | /** |
<> | 144:ef7eb2e8f9f7 | 396 | * @} |
<> | 144:ef7eb2e8f9f7 | 397 | */ |
<> | 144:ef7eb2e8f9f7 | 398 | |
<> | 144:ef7eb2e8f9f7 | 399 | /** |
<> | 144:ef7eb2e8f9f7 | 400 | * @} |
<> | 144:ef7eb2e8f9f7 | 401 | */ |
<> | 144:ef7eb2e8f9f7 | 402 | |
<> | 144:ef7eb2e8f9f7 | 403 | /* Private functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 404 | /** @defgroup FLASHEx_Private_Functions FLASH Private Functions |
<> | 144:ef7eb2e8f9f7 | 405 | * @{ |
<> | 144:ef7eb2e8f9f7 | 406 | */ |
<> | 144:ef7eb2e8f9f7 | 407 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); |
<> | 144:ef7eb2e8f9f7 | 408 | void FLASH_FlushCaches(void); |
<> | 144:ef7eb2e8f9f7 | 409 | /** |
<> | 144:ef7eb2e8f9f7 | 410 | * @} |
<> | 144:ef7eb2e8f9f7 | 411 | */ |
<> | 144:ef7eb2e8f9f7 | 412 | |
<> | 144:ef7eb2e8f9f7 | 413 | /** |
<> | 144:ef7eb2e8f9f7 | 414 | * @} |
<> | 144:ef7eb2e8f9f7 | 415 | */ |
<> | 144:ef7eb2e8f9f7 | 416 | |
<> | 144:ef7eb2e8f9f7 | 417 | /** |
<> | 144:ef7eb2e8f9f7 | 418 | * @} |
<> | 144:ef7eb2e8f9f7 | 419 | */ |
<> | 144:ef7eb2e8f9f7 | 420 | |
<> | 144:ef7eb2e8f9f7 | 421 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 422 | } |
<> | 144:ef7eb2e8f9f7 | 423 | #endif |
<> | 144:ef7eb2e8f9f7 | 424 | |
<> | 144:ef7eb2e8f9f7 | 425 | #endif /* __STM32F2xx_HAL_FLASH_EX_H */ |
<> | 144:ef7eb2e8f9f7 | 426 | |
<> | 144:ef7eb2e8f9f7 | 427 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |