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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_comp.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_comp.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of COMP HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32F0xx_HAL_COMP_H
<> 144:ef7eb2e8f9f7 38 #define __STM32F0xx_HAL_COMP_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #if defined(STM32F051x8) || defined(STM32F058xx) || \
<> 144:ef7eb2e8f9f7 45 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
<> 144:ef7eb2e8f9f7 46 defined(STM32F091xC) || defined(STM32F098xx)
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 49 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /** @addtogroup COMP COMP
<> 144:ef7eb2e8f9f7 56 * @{
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup COMP_Exported_Types COMP Exported Types
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @brief COMP Init structure definition
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67 typedef struct
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 uint32_t InvertingInput; /*!< Selects the inverting input of the comparator.
<> 144:ef7eb2e8f9f7 71 This parameter can be a value of @ref COMP_InvertingInput */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t NonInvertingInput; /*!< Selects the non inverting input of the comparator.
<> 144:ef7eb2e8f9f7 74 This parameter can be a value of @ref COMP_NonInvertingInput */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t Output; /*!< Selects the output redirection of the comparator.
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref COMP_Output */
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 uint32_t OutputPol; /*!< Selects the output polarity of the comparator.
<> 144:ef7eb2e8f9f7 80 This parameter can be a value of @ref COMP_OutputPolarity */
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 uint32_t Hysteresis; /*!< Selects the hysteresis voltage of the comparator.
<> 144:ef7eb2e8f9f7 83 This parameter can be a value of @ref COMP_Hysteresis */
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 uint32_t Mode; /*!< Selects the operating comsumption mode of the comparator
<> 144:ef7eb2e8f9f7 86 to adjust the speed/consumption.
<> 144:ef7eb2e8f9f7 87 This parameter can be a value of @ref COMP_Mode */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 uint32_t WindowMode; /*!< Selects the window mode of the comparator 1 & 2.
<> 144:ef7eb2e8f9f7 90 This parameter can be a value of @ref COMP_WindowMode */
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 uint32_t TriggerMode; /*!< Selects the trigger mode of the comparator (interrupt mode).
<> 144:ef7eb2e8f9f7 93 This parameter can be a value of @ref COMP_TriggerMode */
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 }COMP_InitTypeDef;
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @brief COMP Handle Structure definition
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100 typedef struct
<> 144:ef7eb2e8f9f7 101 {
<> 144:ef7eb2e8f9f7 102 COMP_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 103 COMP_InitTypeDef Init; /*!< COMP required parameters */
<> 144:ef7eb2e8f9f7 104 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 105 __IO uint32_t State; /*!< COMP communication state
<> 144:ef7eb2e8f9f7 106 This parameter can be a value of @ref COMP_State */
<> 144:ef7eb2e8f9f7 107 }COMP_HandleTypeDef;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /**
<> 144:ef7eb2e8f9f7 110 * @}
<> 144:ef7eb2e8f9f7 111 */
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 114 /** @defgroup COMP_Exported_Constants COMP Exported Constants
<> 144:ef7eb2e8f9f7 115 * @{
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /** @defgroup COMP_State COMP State
<> 144:ef7eb2e8f9f7 119 * @{
<> 144:ef7eb2e8f9f7 120 */
<> 156:95d6b41a828b 121 #define HAL_COMP_STATE_RESET (0x00000000U) /*!< COMP not yet initialized or disabled */
<> 156:95d6b41a828b 122 #define HAL_COMP_STATE_READY (0x00000001U) /*!< COMP initialized and ready for use */
<> 156:95d6b41a828b 123 #define HAL_COMP_STATE_READY_LOCKED (0x00000011U) /*!< COMP initialized but the configuration is locked */
<> 156:95d6b41a828b 124 #define HAL_COMP_STATE_BUSY (0x00000002U) /*!< COMP is running */
<> 156:95d6b41a828b 125 #define HAL_COMP_STATE_BUSY_LOCKED (0x00000012U) /*!< COMP is running and the configuration is locked */
<> 144:ef7eb2e8f9f7 126 /**
<> 144:ef7eb2e8f9f7 127 * @}
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /** @defgroup COMP_OutputPolarity COMP OutputPolarity
<> 144:ef7eb2e8f9f7 131 * @{
<> 144:ef7eb2e8f9f7 132 */
<> 156:95d6b41a828b 133 #define COMP_OUTPUTPOL_NONINVERTED (0x00000000U) /*!< COMP output on GPIO isn't inverted */
<> 144:ef7eb2e8f9f7 134 #define COMP_OUTPUTPOL_INVERTED COMP_CSR_COMP1POL /*!< COMP output on GPIO is inverted */
<> 144:ef7eb2e8f9f7 135 /**
<> 144:ef7eb2e8f9f7 136 * @}
<> 144:ef7eb2e8f9f7 137 */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /** @defgroup COMP_Hysteresis COMP Hysteresis
<> 144:ef7eb2e8f9f7 140 * @{
<> 144:ef7eb2e8f9f7 141 */
<> 156:95d6b41a828b 142 #define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
<> 144:ef7eb2e8f9f7 143 #define COMP_HYSTERESIS_LOW COMP_CSR_COMP1HYST_0 /*!< Hysteresis level low */
<> 144:ef7eb2e8f9f7 144 #define COMP_HYSTERESIS_MEDIUM COMP_CSR_COMP1HYST_1 /*!< Hysteresis level medium */
<> 144:ef7eb2e8f9f7 145 #define COMP_HYSTERESIS_HIGH COMP_CSR_COMP1HYST /*!< Hysteresis level high */
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @}
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /** @defgroup COMP_Mode COMP Mode
<> 144:ef7eb2e8f9f7 151 * @{
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 /* Please refer to the electrical characteristics in the device datasheet for
<> 144:ef7eb2e8f9f7 154 the power consumption values */
<> 156:95d6b41a828b 155 #define COMP_MODE_HIGHSPEED (0x00000000U) /*!< High Speed */
<> 144:ef7eb2e8f9f7 156 #define COMP_MODE_MEDIUMSPEED COMP_CSR_COMP1MODE_0 /*!< Medium Speed */
<> 144:ef7eb2e8f9f7 157 #define COMP_MODE_LOWPOWER COMP_CSR_COMP1MODE_1 /*!< Low power mode */
<> 144:ef7eb2e8f9f7 158 #define COMP_MODE_ULTRALOWPOWER COMP_CSR_COMP1MODE /*!< Ultra-low power mode */
<> 144:ef7eb2e8f9f7 159 /**
<> 144:ef7eb2e8f9f7 160 * @}
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /** @defgroup COMP_InvertingInput COMP InvertingInput
<> 144:ef7eb2e8f9f7 164 * @{
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166
<> 156:95d6b41a828b 167 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1/4 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 168 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMP1INSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 169 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMP1INSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 170 #define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMP1INSEL_1|COMP_CSR_COMP1INSEL_0) /*!< VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 171 #define COMP_INVERTINGINPUT_DAC1 COMP_CSR_COMP1INSEL_2 /*!< DAC_OUT1 (PA4) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 172 #define COMP_INVERTINGINPUT_DAC1SWITCHCLOSED (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1SW1) /*!< DAC_OUT1 (PA4) connected to comparator inverting input
<> 144:ef7eb2e8f9f7 173 and close switch (PA0 for COMP1 only) */
<> 144:ef7eb2e8f9f7 174 #define COMP_INVERTINGINPUT_DAC2 (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1INSEL_0) /*!< DAC_OUT2 (PA5) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 175 #define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1INSEL_1) /*!< IO (PA0 for COMP1 and PA2 for COMP2) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 176 /**
<> 144:ef7eb2e8f9f7 177 * @}
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /** @defgroup COMP_NonInvertingInput COMP NonInvertingInput
<> 144:ef7eb2e8f9f7 181 * @{
<> 144:ef7eb2e8f9f7 182 */
<> 156:95d6b41a828b 183 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< I/O1 (PA1 for COMP1, PA3 for COMP2)
<> 144:ef7eb2e8f9f7 184 connected to comparator non inverting input */
<> 144:ef7eb2e8f9f7 185 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP_CSR_COMP1SW1 /*!< DAC ouput connected to comparator COMP1 non inverting input */
<> 144:ef7eb2e8f9f7 186 /**
<> 144:ef7eb2e8f9f7 187 * @}
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /** @defgroup COMP_Output COMP Output
<> 144:ef7eb2e8f9f7 191 * @{
<> 144:ef7eb2e8f9f7 192 */
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /* Output Redirection common for COMP1 and COMP2 */
<> 156:95d6b41a828b 195 #define COMP_OUTPUT_NONE (0x00000000U) /*!< COMP output isn't connected to other peripherals */
<> 144:ef7eb2e8f9f7 196 #define COMP_OUTPUT_TIM1BKIN COMP_CSR_COMP1OUTSEL_0 /*!< COMP output connected to TIM1 Break Input (BKIN) */
<> 144:ef7eb2e8f9f7 197 #define COMP_OUTPUT_TIM1IC1 COMP_CSR_COMP1OUTSEL_1 /*!< COMP output connected to TIM1 Input Capture 1 */
<> 144:ef7eb2e8f9f7 198 #define COMP_OUTPUT_TIM1OCREFCLR (COMP_CSR_COMP1OUTSEL_1|COMP_CSR_COMP1OUTSEL_0) /*!< COMP output connected to TIM1 OCREF Clear */
<> 144:ef7eb2e8f9f7 199 #define COMP_OUTPUT_TIM2IC4 COMP_CSR_COMP1OUTSEL_2 /*!< COMP output connected to TIM2 Input Capture 4 */
<> 144:ef7eb2e8f9f7 200 #define COMP_OUTPUT_TIM2OCREFCLR (COMP_CSR_COMP1OUTSEL_2|COMP_CSR_COMP1OUTSEL_0) /*!< COMP output connected to TIM2 OCREF Clear */
<> 144:ef7eb2e8f9f7 201 #define COMP_OUTPUT_TIM3IC1 (COMP_CSR_COMP1OUTSEL_2|COMP_CSR_COMP1OUTSEL_1) /*!< COMP output connected to TIM3 Input Capture 1 */
<> 144:ef7eb2e8f9f7 202 #define COMP_OUTPUT_TIM3OCREFCLR COMP_CSR_COMP1OUTSEL /*!< COMP output connected to TIM3 OCREF Clear */
<> 144:ef7eb2e8f9f7 203 /**
<> 144:ef7eb2e8f9f7 204 * @}
<> 144:ef7eb2e8f9f7 205 */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /** @defgroup COMP_OutputLevel COMP OutputLevel
<> 144:ef7eb2e8f9f7 208 * @{
<> 144:ef7eb2e8f9f7 209 */
<> 144:ef7eb2e8f9f7 210 /* When output polarity is not inverted, comparator output is low when
<> 144:ef7eb2e8f9f7 211 the non-inverting input is at a lower voltage than the inverting input*/
<> 156:95d6b41a828b 212 #define COMP_OUTPUTLEVEL_LOW (0x00000000U)
<> 144:ef7eb2e8f9f7 213 /* When output polarity is not inverted, comparator output is high when
<> 144:ef7eb2e8f9f7 214 the non-inverting input is at a higher voltage than the inverting input */
<> 144:ef7eb2e8f9f7 215 #define COMP_OUTPUTLEVEL_HIGH COMP_CSR_COMP1OUT
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @}
<> 144:ef7eb2e8f9f7 218 */
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /** @defgroup COMP_TriggerMode COMP TriggerMode
<> 144:ef7eb2e8f9f7 221 * @{
<> 144:ef7eb2e8f9f7 222 */
<> 156:95d6b41a828b 223 #define COMP_TRIGGERMODE_NONE (0x00000000U) /*!< No External Interrupt trigger detection */
<> 156:95d6b41a828b 224 #define COMP_TRIGGERMODE_IT_RISING (0x00000001U) /*!< External Interrupt Mode with Rising edge trigger detection */
<> 156:95d6b41a828b 225 #define COMP_TRIGGERMODE_IT_FALLING (0x00000002U) /*!< External Interrupt Mode with Falling edge trigger detection */
<> 156:95d6b41a828b 226 #define COMP_TRIGGERMODE_IT_RISING_FALLING (0x00000003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
<> 156:95d6b41a828b 227 #define COMP_TRIGGERMODE_EVENT_RISING (0x00000010U) /*!< Event Mode with Rising edge trigger detection */
<> 156:95d6b41a828b 228 #define COMP_TRIGGERMODE_EVENT_FALLING (0x00000020U) /*!< Event Mode with Falling edge trigger detection */
<> 156:95d6b41a828b 229 #define COMP_TRIGGERMODE_EVENT_RISING_FALLING (0x00000030U) /*!< Event Mode with Rising/Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 230 /**
<> 144:ef7eb2e8f9f7 231 * @}
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /** @defgroup COMP_WindowMode COMP WindowMode
<> 144:ef7eb2e8f9f7 235 * @{
<> 144:ef7eb2e8f9f7 236 */
<> 156:95d6b41a828b 237 #define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */
<> 144:ef7eb2e8f9f7 238 #define COMP_WINDOWMODE_ENABLE COMP_CSR_WNDWEN /*!< Window mode enabled: non inverting input of comparator 2
<> 144:ef7eb2e8f9f7 239 is connected to the non inverting input of comparator 1 (PA1) */
<> 144:ef7eb2e8f9f7 240 /**
<> 144:ef7eb2e8f9f7 241 * @}
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /** @defgroup COMP_Flag COMP Flag
<> 144:ef7eb2e8f9f7 245 * @{
<> 144:ef7eb2e8f9f7 246 */
<> 144:ef7eb2e8f9f7 247 #define COMP_FLAG_LOCK ((uint32_t)COMP_CSR_COMPxLOCK) /*!< Lock flag */
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /**
<> 144:ef7eb2e8f9f7 250 * @}
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /**
<> 144:ef7eb2e8f9f7 254 * @}
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 258 /** @defgroup COMP_Exported_Macros COMP Exported Macros
<> 144:ef7eb2e8f9f7 259 * @{
<> 144:ef7eb2e8f9f7 260 */
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /** @brief Reset COMP handle state
Anna Bridge 180:96ed750bd169 263 * @param __HANDLE__ COMP handle.
<> 144:ef7eb2e8f9f7 264 * @retval None
<> 144:ef7eb2e8f9f7 265 */
<> 144:ef7eb2e8f9f7 266 #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /**
<> 144:ef7eb2e8f9f7 269 * @brief Enable the specified comparator.
Anna Bridge 180:96ed750bd169 270 * @param __HANDLE__ COMP handle.
<> 144:ef7eb2e8f9f7 271 * @retval None
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273 #define __HAL_COMP_ENABLE(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 274 SET_BIT(COMP->CSR, COMP_CSR_COMP1EN) : \
<> 144:ef7eb2e8f9f7 275 SET_BIT(COMP->CSR, COMP_CSR_COMP2EN))
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /**
<> 144:ef7eb2e8f9f7 278 * @brief Disable the specified comparator.
Anna Bridge 180:96ed750bd169 279 * @param __HANDLE__ COMP handle.
<> 144:ef7eb2e8f9f7 280 * @retval None
<> 144:ef7eb2e8f9f7 281 */
<> 144:ef7eb2e8f9f7 282 #define __HAL_COMP_DISABLE(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 283 CLEAR_BIT(COMP->CSR, COMP_CSR_COMP1EN) : \
<> 144:ef7eb2e8f9f7 284 CLEAR_BIT(COMP->CSR, COMP_CSR_COMP2EN))
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /**
<> 144:ef7eb2e8f9f7 287 * @brief Lock the specified comparator configuration.
Anna Bridge 180:96ed750bd169 288 * @param __HANDLE__ COMP handle.
<> 144:ef7eb2e8f9f7 289 * @retval None
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291 #define __HAL_COMP_LOCK(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 292 SET_BIT(COMP->CSR, COMP_CSR_COMP1LOCK) : \
<> 144:ef7eb2e8f9f7 293 SET_BIT(COMP->CSR, COMP_CSR_COMP2LOCK))
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @brief Enable the COMP1 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 297 * @retval None
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 /**
<> 144:ef7eb2e8f9f7 302 * @brief Disable the COMP1 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 303 * @retval None
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @brief Enable the COMP1 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 309 * @retval None
<> 144:ef7eb2e8f9f7 310 */
<> 144:ef7eb2e8f9f7 311 #define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /**
<> 144:ef7eb2e8f9f7 314 * @brief Disable the COMP1 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 315 * @retval None
<> 144:ef7eb2e8f9f7 316 */
<> 144:ef7eb2e8f9f7 317 #define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /**
<> 144:ef7eb2e8f9f7 320 * @brief Enable the COMP1 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 321 * @retval None
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 324 __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 325 __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 326 } while(0)
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /**
<> 144:ef7eb2e8f9f7 329 * @brief Disable the COMP1 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 330 * @retval None
<> 144:ef7eb2e8f9f7 331 */
<> 144:ef7eb2e8f9f7 332 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 333 __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 334 __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 335 } while(0)
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /**
<> 144:ef7eb2e8f9f7 338 * @brief Enable the COMP1 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 339 * @retval None
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341 #define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @brief Disable the COMP1 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 345 * @retval None
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 #define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /**
<> 144:ef7eb2e8f9f7 350 * @brief Generate a software interrupt on the COMP1 EXTI line.
<> 144:ef7eb2e8f9f7 351 * @retval None
<> 144:ef7eb2e8f9f7 352 */
<> 144:ef7eb2e8f9f7 353 #define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /**
<> 144:ef7eb2e8f9f7 356 * @brief Enable the COMP1 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 357 * @retval None
<> 144:ef7eb2e8f9f7 358 */
<> 144:ef7eb2e8f9f7 359 #define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /**
<> 144:ef7eb2e8f9f7 362 * @brief Disable the COMP1 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 363 * @retval None
<> 144:ef7eb2e8f9f7 364 */
<> 144:ef7eb2e8f9f7 365 #define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /**
<> 144:ef7eb2e8f9f7 368 * @brief Check whether the COMP1 EXTI line flag is set or not.
<> 144:ef7eb2e8f9f7 369 * @retval RESET or SET
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371 #define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /**
<> 144:ef7eb2e8f9f7 374 * @brief Clear the COMP1 EXTI flag.
<> 144:ef7eb2e8f9f7 375 * @retval None
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377 #define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /**
<> 144:ef7eb2e8f9f7 380 * @brief Enable the COMP2 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 381 * @retval None
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @brief Disable the COMP2 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 387 * @retval None
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 /**
<> 144:ef7eb2e8f9f7 392 * @brief Enable the COMP2 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 393 * @retval None
<> 144:ef7eb2e8f9f7 394 */
<> 144:ef7eb2e8f9f7 395 #define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /**
<> 144:ef7eb2e8f9f7 398 * @brief Disable the COMP2 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 399 * @retval None
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401 #define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403 /**
<> 144:ef7eb2e8f9f7 404 * @brief Enable the COMP2 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 405 * @retval None
<> 144:ef7eb2e8f9f7 406 */
<> 144:ef7eb2e8f9f7 407 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 408 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 409 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 410 } while(0)
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /**
<> 144:ef7eb2e8f9f7 413 * @brief Disable the COMP2 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 414 * @retval None
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 417 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 418 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 419 } while(0)
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /**
<> 144:ef7eb2e8f9f7 422 * @brief Enable the COMP2 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 423 * @retval None
<> 144:ef7eb2e8f9f7 424 */
<> 144:ef7eb2e8f9f7 425 #define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /**
<> 144:ef7eb2e8f9f7 428 * @brief Disable the COMP2 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 429 * @retval None
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 #define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 /**
<> 144:ef7eb2e8f9f7 434 * @brief Generate a software interrupt on the COMP2 EXTI line.
<> 144:ef7eb2e8f9f7 435 * @retval None
<> 144:ef7eb2e8f9f7 436 */
<> 144:ef7eb2e8f9f7 437 #define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /**
<> 144:ef7eb2e8f9f7 440 * @brief Enable the COMP2 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 441 * @retval None
<> 144:ef7eb2e8f9f7 442 */
<> 144:ef7eb2e8f9f7 443 #define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 /**
<> 144:ef7eb2e8f9f7 446 * @brief Disable the COMP2 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 447 * @retval None
<> 144:ef7eb2e8f9f7 448 */
<> 144:ef7eb2e8f9f7 449 #define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 450
<> 144:ef7eb2e8f9f7 451 /**
<> 144:ef7eb2e8f9f7 452 * @brief Check whether the COMP2 EXTI line flag is set or not.
<> 144:ef7eb2e8f9f7 453 * @retval RESET or SET
<> 144:ef7eb2e8f9f7 454 */
<> 144:ef7eb2e8f9f7 455 #define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 /**
<> 144:ef7eb2e8f9f7 458 * @brief Clear the COMP2 EXTI flag.
<> 144:ef7eb2e8f9f7 459 * @retval None
<> 144:ef7eb2e8f9f7 460 */
<> 144:ef7eb2e8f9f7 461 #define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 /** @brief Check whether the specified COMP flag is set or not.
Anna Bridge 180:96ed750bd169 464 * @param __HANDLE__ specifies the COMP Handle.
Anna Bridge 180:96ed750bd169 465 * @param __FLAG__ specifies the flag to check.
<> 144:ef7eb2e8f9f7 466 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 467 * @arg COMP_FLAG_LOCK: lock flag
<> 144:ef7eb2e8f9f7 468 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 469 */
<> 144:ef7eb2e8f9f7 470 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 /**
<> 144:ef7eb2e8f9f7 473 * @}
<> 144:ef7eb2e8f9f7 474 */
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 477 /** @addtogroup COMP_Exported_Functions COMP Exported Functions
<> 144:ef7eb2e8f9f7 478 * @{
<> 144:ef7eb2e8f9f7 479 */
<> 144:ef7eb2e8f9f7 480 /** @addtogroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 481 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 482 * @{
<> 144:ef7eb2e8f9f7 483 */
<> 144:ef7eb2e8f9f7 484 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 485 HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 486 HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 487 void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 488 void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 489 /**
<> 144:ef7eb2e8f9f7 490 * @}
<> 144:ef7eb2e8f9f7 491 */
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /** @addtogroup COMP_Exported_Functions_Group2 I/O operation functions
<> 144:ef7eb2e8f9f7 494 * @brief Data transfers functions
<> 144:ef7eb2e8f9f7 495 * @{
<> 144:ef7eb2e8f9f7 496 */
<> 144:ef7eb2e8f9f7 497 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 498 HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 499 HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 500 HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 502 void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 503 /**
<> 144:ef7eb2e8f9f7 504 * @}
<> 144:ef7eb2e8f9f7 505 */
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 /** @addtogroup COMP_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 508 * @brief management functions
<> 144:ef7eb2e8f9f7 509 * @{
<> 144:ef7eb2e8f9f7 510 */
<> 144:ef7eb2e8f9f7 511 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 512 HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 513 uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /* Callback in Interrupt mode */
<> 144:ef7eb2e8f9f7 516 void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 517 /**
<> 144:ef7eb2e8f9f7 518 * @}
<> 144:ef7eb2e8f9f7 519 */
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /** @addtogroup COMP_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 522 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 523 * @{
<> 144:ef7eb2e8f9f7 524 */
<> 144:ef7eb2e8f9f7 525 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 526 uint32_t HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 527 /**
<> 144:ef7eb2e8f9f7 528 * @}
<> 144:ef7eb2e8f9f7 529 */
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /**
<> 144:ef7eb2e8f9f7 532 * @}
<> 144:ef7eb2e8f9f7 533 */
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 536 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 537 /** @defgroup COMP_Private_Constants COMP Private Constants
<> 144:ef7eb2e8f9f7 538 * @{
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540 /** @defgroup COMP_ExtiLine COMP EXTI Lines
<> 144:ef7eb2e8f9f7 541 * Elements values convention: XXXX0000
<> 144:ef7eb2e8f9f7 542 * - XXXX : Interrupt mask in the EMR/IMR/RTSR/FTSR register
<> 144:ef7eb2e8f9f7 543 * @{
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545 #define COMP_EXTI_LINE_COMP1 ((uint32_t)EXTI_IMR_MR21) /*!< EXTI line 21 connected to COMP1 output */
<> 144:ef7eb2e8f9f7 546 #define COMP_EXTI_LINE_COMP2 ((uint32_t)EXTI_IMR_MR22) /*!< EXTI line 22 connected to COMP2 output */
<> 144:ef7eb2e8f9f7 547
<> 144:ef7eb2e8f9f7 548 /**
<> 144:ef7eb2e8f9f7 549 * @}
<> 144:ef7eb2e8f9f7 550 */
<> 144:ef7eb2e8f9f7 551
<> 144:ef7eb2e8f9f7 552 /**
<> 144:ef7eb2e8f9f7 553 * @}
<> 144:ef7eb2e8f9f7 554 */
<> 144:ef7eb2e8f9f7 555
<> 144:ef7eb2e8f9f7 556 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 557 /** @defgroup COMP_Private_Macros COMP Private Macros
<> 144:ef7eb2e8f9f7 558 * @{
<> 144:ef7eb2e8f9f7 559 */
<> 144:ef7eb2e8f9f7 560 /** @defgroup COMP_GET_EXTI_LINE COMP Private macros to get EXTI line associated with Comparators
<> 144:ef7eb2e8f9f7 561 * @{
<> 144:ef7eb2e8f9f7 562 */
<> 144:ef7eb2e8f9f7 563 /**
<> 144:ef7eb2e8f9f7 564 * @brief Get the specified EXTI line for a comparator instance.
Anna Bridge 180:96ed750bd169 565 * @param __INSTANCE__ specifies the COMP instance.
<> 144:ef7eb2e8f9f7 566 * @retval value of @ref COMP_ExtiLine
<> 144:ef7eb2e8f9f7 567 */
<> 144:ef7eb2e8f9f7 568 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \
<> 144:ef7eb2e8f9f7 569 COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 570 /**
<> 144:ef7eb2e8f9f7 571 * @}
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573
<> 144:ef7eb2e8f9f7 574 /** @defgroup COMP_IS_COMP_Definitions COMP Private macros to check input parameters
<> 144:ef7eb2e8f9f7 575 * @{
<> 144:ef7eb2e8f9f7 576 */
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 #define IS_COMP_OUTPUTPOL(POL) (((POL) == COMP_OUTPUTPOL_NONINVERTED) || \
<> 144:ef7eb2e8f9f7 579 ((POL) == COMP_OUTPUTPOL_INVERTED))
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 #define IS_COMP_HYSTERESIS(HYSTERESIS) (((HYSTERESIS) == COMP_HYSTERESIS_NONE) || \
<> 144:ef7eb2e8f9f7 582 ((HYSTERESIS) == COMP_HYSTERESIS_LOW) || \
<> 144:ef7eb2e8f9f7 583 ((HYSTERESIS) == COMP_HYSTERESIS_MEDIUM) || \
<> 144:ef7eb2e8f9f7 584 ((HYSTERESIS) == COMP_HYSTERESIS_HIGH))
<> 144:ef7eb2e8f9f7 585
<> 144:ef7eb2e8f9f7 586 #define IS_COMP_MODE(MODE) (((MODE) == COMP_MODE_HIGHSPEED) || \
<> 144:ef7eb2e8f9f7 587 ((MODE) == COMP_MODE_MEDIUMSPEED) || \
<> 144:ef7eb2e8f9f7 588 ((MODE) == COMP_MODE_LOWPOWER) || \
<> 144:ef7eb2e8f9f7 589 ((MODE) == COMP_MODE_ULTRALOWPOWER))
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \
<> 144:ef7eb2e8f9f7 592 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \
<> 144:ef7eb2e8f9f7 593 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \
<> 144:ef7eb2e8f9f7 594 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \
<> 144:ef7eb2e8f9f7 595 ((INPUT) == COMP_INVERTINGINPUT_DAC1) || \
<> 144:ef7eb2e8f9f7 596 ((INPUT) == COMP_INVERTINGINPUT_DAC1SWITCHCLOSED) || \
<> 144:ef7eb2e8f9f7 597 ((INPUT) == COMP_INVERTINGINPUT_DAC2) || \
<> 144:ef7eb2e8f9f7 598 ((INPUT) == COMP_INVERTINGINPUT_IO1))
<> 144:ef7eb2e8f9f7 599
<> 144:ef7eb2e8f9f7 600 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \
<> 144:ef7eb2e8f9f7 601 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))
<> 144:ef7eb2e8f9f7 602
<> 144:ef7eb2e8f9f7 603 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \
<> 144:ef7eb2e8f9f7 604 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \
<> 144:ef7eb2e8f9f7 605 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \
<> 144:ef7eb2e8f9f7 606 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \
<> 144:ef7eb2e8f9f7 607 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \
<> 144:ef7eb2e8f9f7 608 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \
<> 144:ef7eb2e8f9f7 609 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \
<> 144:ef7eb2e8f9f7 610 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 #define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLE) || \
<> 144:ef7eb2e8f9f7 613 ((WINDOWMODE) == COMP_WINDOWMODE_ENABLE))
<> 144:ef7eb2e8f9f7 614
<> 144:ef7eb2e8f9f7 615 #define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \
<> 144:ef7eb2e8f9f7 616 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \
<> 144:ef7eb2e8f9f7 617 ((__MODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
<> 144:ef7eb2e8f9f7 618 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
<> 144:ef7eb2e8f9f7 619 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
<> 144:ef7eb2e8f9f7 620 ((__MODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
<> 144:ef7eb2e8f9f7 621 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING))
<> 144:ef7eb2e8f9f7 622 /**
<> 144:ef7eb2e8f9f7 623 * @}
<> 144:ef7eb2e8f9f7 624 */
<> 144:ef7eb2e8f9f7 625
<> 144:ef7eb2e8f9f7 626 /** @defgroup COMP_Lock COMP Lock
<> 144:ef7eb2e8f9f7 627 * @{
<> 144:ef7eb2e8f9f7 628 */
<> 156:95d6b41a828b 629 #define COMP_LOCK_DISABLE (0x00000000U)
<> 144:ef7eb2e8f9f7 630 #define COMP_LOCK_ENABLE COMP_CSR_COMP1LOCK
<> 144:ef7eb2e8f9f7 631
<> 156:95d6b41a828b 632 #define COMP_STATE_BIT_LOCK (0x10U)
<> 144:ef7eb2e8f9f7 633 /**
<> 144:ef7eb2e8f9f7 634 * @}
<> 144:ef7eb2e8f9f7 635 */
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 /**
<> 144:ef7eb2e8f9f7 638 * @}
<> 144:ef7eb2e8f9f7 639 */
<> 144:ef7eb2e8f9f7 640
<> 144:ef7eb2e8f9f7 641 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 /**
<> 144:ef7eb2e8f9f7 644 * @}
<> 144:ef7eb2e8f9f7 645 */
<> 144:ef7eb2e8f9f7 646
<> 144:ef7eb2e8f9f7 647 /**
<> 144:ef7eb2e8f9f7 648 * @}
<> 144:ef7eb2e8f9f7 649 */
<> 144:ef7eb2e8f9f7 650
<> 144:ef7eb2e8f9f7 651 #endif /* STM32F051x8 || STM32F058xx || */
<> 144:ef7eb2e8f9f7 652 /* STM32F071xB || STM32F072xB || STM32F078xx || */
<> 144:ef7eb2e8f9f7 653 /* STM32F091xC || STM32F098xx */
<> 144:ef7eb2e8f9f7 654
<> 144:ef7eb2e8f9f7 655 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 656 }
<> 144:ef7eb2e8f9f7 657 #endif
<> 144:ef7eb2e8f9f7 658
<> 144:ef7eb2e8f9f7 659 #endif /* __STM32F0xx_HAL_COMP_H */
<> 144:ef7eb2e8f9f7 660
<> 144:ef7eb2e8f9f7 661 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 662