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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_comp.h@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_comp.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of COMP HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F0xx_HAL_COMP_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F0xx_HAL_COMP_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #if defined(STM32F051x8) || defined(STM32F058xx) || \
<> 144:ef7eb2e8f9f7 47 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
<> 144:ef7eb2e8f9f7 48 defined(STM32F091xC) || defined(STM32F098xx)
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 51 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @addtogroup COMP COMP
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 62 /** @defgroup COMP_Exported_Types COMP Exported Types
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 /**
<> 144:ef7eb2e8f9f7 67 * @brief COMP Init structure definition
<> 144:ef7eb2e8f9f7 68 */
<> 144:ef7eb2e8f9f7 69 typedef struct
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t InvertingInput; /*!< Selects the inverting input of the comparator.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref COMP_InvertingInput */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t NonInvertingInput; /*!< Selects the non inverting input of the comparator.
<> 144:ef7eb2e8f9f7 76 This parameter can be a value of @ref COMP_NonInvertingInput */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 uint32_t Output; /*!< Selects the output redirection of the comparator.
<> 144:ef7eb2e8f9f7 79 This parameter can be a value of @ref COMP_Output */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 uint32_t OutputPol; /*!< Selects the output polarity of the comparator.
<> 144:ef7eb2e8f9f7 82 This parameter can be a value of @ref COMP_OutputPolarity */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 uint32_t Hysteresis; /*!< Selects the hysteresis voltage of the comparator.
<> 144:ef7eb2e8f9f7 85 This parameter can be a value of @ref COMP_Hysteresis */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 uint32_t Mode; /*!< Selects the operating comsumption mode of the comparator
<> 144:ef7eb2e8f9f7 88 to adjust the speed/consumption.
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref COMP_Mode */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 uint32_t WindowMode; /*!< Selects the window mode of the comparator 1 & 2.
<> 144:ef7eb2e8f9f7 92 This parameter can be a value of @ref COMP_WindowMode */
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 uint32_t TriggerMode; /*!< Selects the trigger mode of the comparator (interrupt mode).
<> 144:ef7eb2e8f9f7 95 This parameter can be a value of @ref COMP_TriggerMode */
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 }COMP_InitTypeDef;
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /**
<> 144:ef7eb2e8f9f7 100 * @brief COMP Handle Structure definition
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 typedef struct
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 COMP_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 105 COMP_InitTypeDef Init; /*!< COMP required parameters */
<> 144:ef7eb2e8f9f7 106 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 107 __IO uint32_t State; /*!< COMP communication state
<> 144:ef7eb2e8f9f7 108 This parameter can be a value of @ref COMP_State */
<> 144:ef7eb2e8f9f7 109 }COMP_HandleTypeDef;
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /**
<> 144:ef7eb2e8f9f7 112 * @}
<> 144:ef7eb2e8f9f7 113 */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 116 /** @defgroup COMP_Exported_Constants COMP Exported Constants
<> 144:ef7eb2e8f9f7 117 * @{
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /** @defgroup COMP_State COMP State
<> 144:ef7eb2e8f9f7 121 * @{
<> 144:ef7eb2e8f9f7 122 */
<> 156:95d6b41a828b 123 #define HAL_COMP_STATE_RESET (0x00000000U) /*!< COMP not yet initialized or disabled */
<> 156:95d6b41a828b 124 #define HAL_COMP_STATE_READY (0x00000001U) /*!< COMP initialized and ready for use */
<> 156:95d6b41a828b 125 #define HAL_COMP_STATE_READY_LOCKED (0x00000011U) /*!< COMP initialized but the configuration is locked */
<> 156:95d6b41a828b 126 #define HAL_COMP_STATE_BUSY (0x00000002U) /*!< COMP is running */
<> 156:95d6b41a828b 127 #define HAL_COMP_STATE_BUSY_LOCKED (0x00000012U) /*!< COMP is running and the configuration is locked */
<> 144:ef7eb2e8f9f7 128 /**
<> 144:ef7eb2e8f9f7 129 * @}
<> 144:ef7eb2e8f9f7 130 */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /** @defgroup COMP_OutputPolarity COMP OutputPolarity
<> 144:ef7eb2e8f9f7 133 * @{
<> 144:ef7eb2e8f9f7 134 */
<> 156:95d6b41a828b 135 #define COMP_OUTPUTPOL_NONINVERTED (0x00000000U) /*!< COMP output on GPIO isn't inverted */
<> 144:ef7eb2e8f9f7 136 #define COMP_OUTPUTPOL_INVERTED COMP_CSR_COMP1POL /*!< COMP output on GPIO is inverted */
<> 144:ef7eb2e8f9f7 137 /**
<> 144:ef7eb2e8f9f7 138 * @}
<> 144:ef7eb2e8f9f7 139 */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /** @defgroup COMP_Hysteresis COMP Hysteresis
<> 144:ef7eb2e8f9f7 142 * @{
<> 144:ef7eb2e8f9f7 143 */
<> 156:95d6b41a828b 144 #define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
<> 144:ef7eb2e8f9f7 145 #define COMP_HYSTERESIS_LOW COMP_CSR_COMP1HYST_0 /*!< Hysteresis level low */
<> 144:ef7eb2e8f9f7 146 #define COMP_HYSTERESIS_MEDIUM COMP_CSR_COMP1HYST_1 /*!< Hysteresis level medium */
<> 144:ef7eb2e8f9f7 147 #define COMP_HYSTERESIS_HIGH COMP_CSR_COMP1HYST /*!< Hysteresis level high */
<> 144:ef7eb2e8f9f7 148 /**
<> 144:ef7eb2e8f9f7 149 * @}
<> 144:ef7eb2e8f9f7 150 */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /** @defgroup COMP_Mode COMP Mode
<> 144:ef7eb2e8f9f7 153 * @{
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155 /* Please refer to the electrical characteristics in the device datasheet for
<> 144:ef7eb2e8f9f7 156 the power consumption values */
<> 156:95d6b41a828b 157 #define COMP_MODE_HIGHSPEED (0x00000000U) /*!< High Speed */
<> 144:ef7eb2e8f9f7 158 #define COMP_MODE_MEDIUMSPEED COMP_CSR_COMP1MODE_0 /*!< Medium Speed */
<> 144:ef7eb2e8f9f7 159 #define COMP_MODE_LOWPOWER COMP_CSR_COMP1MODE_1 /*!< Low power mode */
<> 144:ef7eb2e8f9f7 160 #define COMP_MODE_ULTRALOWPOWER COMP_CSR_COMP1MODE /*!< Ultra-low power mode */
<> 144:ef7eb2e8f9f7 161 /**
<> 144:ef7eb2e8f9f7 162 * @}
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /** @defgroup COMP_InvertingInput COMP InvertingInput
<> 144:ef7eb2e8f9f7 166 * @{
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 156:95d6b41a828b 169 #define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1/4 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 170 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMP1INSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 171 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMP1INSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 172 #define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMP1INSEL_1|COMP_CSR_COMP1INSEL_0) /*!< VREFINT connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 173 #define COMP_INVERTINGINPUT_DAC1 COMP_CSR_COMP1INSEL_2 /*!< DAC_OUT1 (PA4) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 174 #define COMP_INVERTINGINPUT_DAC1SWITCHCLOSED (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1SW1) /*!< DAC_OUT1 (PA4) connected to comparator inverting input
<> 144:ef7eb2e8f9f7 175 and close switch (PA0 for COMP1 only) */
<> 144:ef7eb2e8f9f7 176 #define COMP_INVERTINGINPUT_DAC2 (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1INSEL_0) /*!< DAC_OUT2 (PA5) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 177 #define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMP1INSEL_2|COMP_CSR_COMP1INSEL_1) /*!< IO (PA0 for COMP1 and PA2 for COMP2) connected to comparator inverting input */
<> 144:ef7eb2e8f9f7 178 /**
<> 144:ef7eb2e8f9f7 179 * @}
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /** @defgroup COMP_NonInvertingInput COMP NonInvertingInput
<> 144:ef7eb2e8f9f7 183 * @{
<> 144:ef7eb2e8f9f7 184 */
<> 156:95d6b41a828b 185 #define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< I/O1 (PA1 for COMP1, PA3 for COMP2)
<> 144:ef7eb2e8f9f7 186 connected to comparator non inverting input */
<> 144:ef7eb2e8f9f7 187 #define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP_CSR_COMP1SW1 /*!< DAC ouput connected to comparator COMP1 non inverting input */
<> 144:ef7eb2e8f9f7 188 /**
<> 144:ef7eb2e8f9f7 189 * @}
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /** @defgroup COMP_Output COMP Output
<> 144:ef7eb2e8f9f7 193 * @{
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /* Output Redirection common for COMP1 and COMP2 */
<> 156:95d6b41a828b 197 #define COMP_OUTPUT_NONE (0x00000000U) /*!< COMP output isn't connected to other peripherals */
<> 144:ef7eb2e8f9f7 198 #define COMP_OUTPUT_TIM1BKIN COMP_CSR_COMP1OUTSEL_0 /*!< COMP output connected to TIM1 Break Input (BKIN) */
<> 144:ef7eb2e8f9f7 199 #define COMP_OUTPUT_TIM1IC1 COMP_CSR_COMP1OUTSEL_1 /*!< COMP output connected to TIM1 Input Capture 1 */
<> 144:ef7eb2e8f9f7 200 #define COMP_OUTPUT_TIM1OCREFCLR (COMP_CSR_COMP1OUTSEL_1|COMP_CSR_COMP1OUTSEL_0) /*!< COMP output connected to TIM1 OCREF Clear */
<> 144:ef7eb2e8f9f7 201 #define COMP_OUTPUT_TIM2IC4 COMP_CSR_COMP1OUTSEL_2 /*!< COMP output connected to TIM2 Input Capture 4 */
<> 144:ef7eb2e8f9f7 202 #define COMP_OUTPUT_TIM2OCREFCLR (COMP_CSR_COMP1OUTSEL_2|COMP_CSR_COMP1OUTSEL_0) /*!< COMP output connected to TIM2 OCREF Clear */
<> 144:ef7eb2e8f9f7 203 #define COMP_OUTPUT_TIM3IC1 (COMP_CSR_COMP1OUTSEL_2|COMP_CSR_COMP1OUTSEL_1) /*!< COMP output connected to TIM3 Input Capture 1 */
<> 144:ef7eb2e8f9f7 204 #define COMP_OUTPUT_TIM3OCREFCLR COMP_CSR_COMP1OUTSEL /*!< COMP output connected to TIM3 OCREF Clear */
<> 144:ef7eb2e8f9f7 205 /**
<> 144:ef7eb2e8f9f7 206 * @}
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup COMP_OutputLevel COMP OutputLevel
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212 /* When output polarity is not inverted, comparator output is low when
<> 144:ef7eb2e8f9f7 213 the non-inverting input is at a lower voltage than the inverting input*/
<> 156:95d6b41a828b 214 #define COMP_OUTPUTLEVEL_LOW (0x00000000U)
<> 144:ef7eb2e8f9f7 215 /* When output polarity is not inverted, comparator output is high when
<> 144:ef7eb2e8f9f7 216 the non-inverting input is at a higher voltage than the inverting input */
<> 144:ef7eb2e8f9f7 217 #define COMP_OUTPUTLEVEL_HIGH COMP_CSR_COMP1OUT
<> 144:ef7eb2e8f9f7 218 /**
<> 144:ef7eb2e8f9f7 219 * @}
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /** @defgroup COMP_TriggerMode COMP TriggerMode
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
<> 156:95d6b41a828b 225 #define COMP_TRIGGERMODE_NONE (0x00000000U) /*!< No External Interrupt trigger detection */
<> 156:95d6b41a828b 226 #define COMP_TRIGGERMODE_IT_RISING (0x00000001U) /*!< External Interrupt Mode with Rising edge trigger detection */
<> 156:95d6b41a828b 227 #define COMP_TRIGGERMODE_IT_FALLING (0x00000002U) /*!< External Interrupt Mode with Falling edge trigger detection */
<> 156:95d6b41a828b 228 #define COMP_TRIGGERMODE_IT_RISING_FALLING (0x00000003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
<> 156:95d6b41a828b 229 #define COMP_TRIGGERMODE_EVENT_RISING (0x00000010U) /*!< Event Mode with Rising edge trigger detection */
<> 156:95d6b41a828b 230 #define COMP_TRIGGERMODE_EVENT_FALLING (0x00000020U) /*!< Event Mode with Falling edge trigger detection */
<> 156:95d6b41a828b 231 #define COMP_TRIGGERMODE_EVENT_RISING_FALLING (0x00000030U) /*!< Event Mode with Rising/Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 232 /**
<> 144:ef7eb2e8f9f7 233 * @}
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /** @defgroup COMP_WindowMode COMP WindowMode
<> 144:ef7eb2e8f9f7 237 * @{
<> 144:ef7eb2e8f9f7 238 */
<> 156:95d6b41a828b 239 #define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */
<> 144:ef7eb2e8f9f7 240 #define COMP_WINDOWMODE_ENABLE COMP_CSR_WNDWEN /*!< Window mode enabled: non inverting input of comparator 2
<> 144:ef7eb2e8f9f7 241 is connected to the non inverting input of comparator 1 (PA1) */
<> 144:ef7eb2e8f9f7 242 /**
<> 144:ef7eb2e8f9f7 243 * @}
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /** @defgroup COMP_Flag COMP Flag
<> 144:ef7eb2e8f9f7 247 * @{
<> 144:ef7eb2e8f9f7 248 */
<> 144:ef7eb2e8f9f7 249 #define COMP_FLAG_LOCK ((uint32_t)COMP_CSR_COMPxLOCK) /*!< Lock flag */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @}
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /**
<> 144:ef7eb2e8f9f7 256 * @}
<> 144:ef7eb2e8f9f7 257 */
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 260 /** @defgroup COMP_Exported_Macros COMP Exported Macros
<> 144:ef7eb2e8f9f7 261 * @{
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /** @brief Reset COMP handle state
<> 144:ef7eb2e8f9f7 265 * @param __HANDLE__: COMP handle.
<> 144:ef7eb2e8f9f7 266 * @retval None
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268 #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 /**
<> 144:ef7eb2e8f9f7 271 * @brief Enable the specified comparator.
<> 144:ef7eb2e8f9f7 272 * @param __HANDLE__: COMP handle.
<> 144:ef7eb2e8f9f7 273 * @retval None
<> 144:ef7eb2e8f9f7 274 */
<> 144:ef7eb2e8f9f7 275 #define __HAL_COMP_ENABLE(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 276 SET_BIT(COMP->CSR, COMP_CSR_COMP1EN) : \
<> 144:ef7eb2e8f9f7 277 SET_BIT(COMP->CSR, COMP_CSR_COMP2EN))
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /**
<> 144:ef7eb2e8f9f7 280 * @brief Disable the specified comparator.
<> 144:ef7eb2e8f9f7 281 * @param __HANDLE__: COMP handle.
<> 144:ef7eb2e8f9f7 282 * @retval None
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284 #define __HAL_COMP_DISABLE(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 285 CLEAR_BIT(COMP->CSR, COMP_CSR_COMP1EN) : \
<> 144:ef7eb2e8f9f7 286 CLEAR_BIT(COMP->CSR, COMP_CSR_COMP2EN))
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /**
<> 144:ef7eb2e8f9f7 289 * @brief Lock the specified comparator configuration.
<> 144:ef7eb2e8f9f7 290 * @param __HANDLE__: COMP handle.
<> 144:ef7eb2e8f9f7 291 * @retval None
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293 #define __HAL_COMP_LOCK(__HANDLE__) (((__HANDLE__)->Instance == COMP1) ? \
<> 144:ef7eb2e8f9f7 294 SET_BIT(COMP->CSR, COMP_CSR_COMP1LOCK) : \
<> 144:ef7eb2e8f9f7 295 SET_BIT(COMP->CSR, COMP_CSR_COMP2LOCK))
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @brief Enable the COMP1 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 299 * @retval None
<> 144:ef7eb2e8f9f7 300 */
<> 144:ef7eb2e8f9f7 301 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @brief Disable the COMP1 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 305 * @retval None
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 /**
<> 144:ef7eb2e8f9f7 310 * @brief Enable the COMP1 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 311 * @retval None
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 #define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @brief Disable the COMP1 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 317 * @retval None
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319 #define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /**
<> 144:ef7eb2e8f9f7 322 * @brief Enable the COMP1 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 323 * @retval None
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325 #define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 326 __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 327 __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 328 } while(0)
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @brief Disable the COMP1 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 332 * @retval None
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334 #define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 335 __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 336 __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 337 } while(0)
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /**
<> 144:ef7eb2e8f9f7 340 * @brief Enable the COMP1 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 341 * @retval None
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343 #define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /**
<> 144:ef7eb2e8f9f7 346 * @brief Disable the COMP1 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 347 * @retval None
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349 #define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @brief Generate a software interrupt on the COMP1 EXTI line.
<> 144:ef7eb2e8f9f7 353 * @retval None
<> 144:ef7eb2e8f9f7 354 */
<> 144:ef7eb2e8f9f7 355 #define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /**
<> 144:ef7eb2e8f9f7 358 * @brief Enable the COMP1 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 359 * @retval None
<> 144:ef7eb2e8f9f7 360 */
<> 144:ef7eb2e8f9f7 361 #define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @brief Disable the COMP1 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 365 * @retval None
<> 144:ef7eb2e8f9f7 366 */
<> 144:ef7eb2e8f9f7 367 #define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /**
<> 144:ef7eb2e8f9f7 370 * @brief Check whether the COMP1 EXTI line flag is set or not.
<> 144:ef7eb2e8f9f7 371 * @retval RESET or SET
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373 #define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /**
<> 144:ef7eb2e8f9f7 376 * @brief Clear the COMP1 EXTI flag.
<> 144:ef7eb2e8f9f7 377 * @retval None
<> 144:ef7eb2e8f9f7 378 */
<> 144:ef7eb2e8f9f7 379 #define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1)
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /**
<> 144:ef7eb2e8f9f7 382 * @brief Enable the COMP2 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 383 * @retval None
<> 144:ef7eb2e8f9f7 384 */
<> 144:ef7eb2e8f9f7 385 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /**
<> 144:ef7eb2e8f9f7 388 * @brief Disable the COMP2 EXTI line rising edge trigger.
<> 144:ef7eb2e8f9f7 389 * @retval None
<> 144:ef7eb2e8f9f7 390 */
<> 144:ef7eb2e8f9f7 391 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 /**
<> 144:ef7eb2e8f9f7 394 * @brief Enable the COMP2 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 395 * @retval None
<> 144:ef7eb2e8f9f7 396 */
<> 144:ef7eb2e8f9f7 397 #define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /**
<> 144:ef7eb2e8f9f7 400 * @brief Disable the COMP2 EXTI line falling edge trigger.
<> 144:ef7eb2e8f9f7 401 * @retval None
<> 144:ef7eb2e8f9f7 402 */
<> 144:ef7eb2e8f9f7 403 #define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 /**
<> 144:ef7eb2e8f9f7 406 * @brief Enable the COMP2 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 407 * @retval None
<> 144:ef7eb2e8f9f7 408 */
<> 144:ef7eb2e8f9f7 409 #define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 410 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 411 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 412 } while(0)
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 /**
<> 144:ef7eb2e8f9f7 415 * @brief Disable the COMP2 EXTI line rising & falling edge trigger.
<> 144:ef7eb2e8f9f7 416 * @retval None
<> 144:ef7eb2e8f9f7 417 */
<> 144:ef7eb2e8f9f7 418 #define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
<> 144:ef7eb2e8f9f7 419 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 420 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 421 } while(0)
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /**
<> 144:ef7eb2e8f9f7 424 * @brief Enable the COMP2 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 425 * @retval None
<> 144:ef7eb2e8f9f7 426 */
<> 144:ef7eb2e8f9f7 427 #define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 /**
<> 144:ef7eb2e8f9f7 430 * @brief Disable the COMP2 EXTI line in interrupt mode.
<> 144:ef7eb2e8f9f7 431 * @retval None
<> 144:ef7eb2e8f9f7 432 */
<> 144:ef7eb2e8f9f7 433 #define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /**
<> 144:ef7eb2e8f9f7 436 * @brief Generate a software interrupt on the COMP2 EXTI line.
<> 144:ef7eb2e8f9f7 437 * @retval None
<> 144:ef7eb2e8f9f7 438 */
<> 144:ef7eb2e8f9f7 439 #define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441 /**
<> 144:ef7eb2e8f9f7 442 * @brief Enable the COMP2 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 443 * @retval None
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 #define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /**
<> 144:ef7eb2e8f9f7 448 * @brief Disable the COMP2 EXTI Line in event mode.
<> 144:ef7eb2e8f9f7 449 * @retval None
<> 144:ef7eb2e8f9f7 450 */
<> 144:ef7eb2e8f9f7 451 #define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /**
<> 144:ef7eb2e8f9f7 454 * @brief Check whether the COMP2 EXTI line flag is set or not.
<> 144:ef7eb2e8f9f7 455 * @retval RESET or SET
<> 144:ef7eb2e8f9f7 456 */
<> 144:ef7eb2e8f9f7 457 #define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 458
<> 144:ef7eb2e8f9f7 459 /**
<> 144:ef7eb2e8f9f7 460 * @brief Clear the COMP2 EXTI flag.
<> 144:ef7eb2e8f9f7 461 * @retval None
<> 144:ef7eb2e8f9f7 462 */
<> 144:ef7eb2e8f9f7 463 #define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 /** @brief Check whether the specified COMP flag is set or not.
<> 144:ef7eb2e8f9f7 466 * @param __HANDLE__: specifies the COMP Handle.
<> 144:ef7eb2e8f9f7 467 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 468 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 469 * @arg COMP_FLAG_LOCK: lock flag
<> 144:ef7eb2e8f9f7 470 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 471 */
<> 144:ef7eb2e8f9f7 472 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 /**
<> 144:ef7eb2e8f9f7 475 * @}
<> 144:ef7eb2e8f9f7 476 */
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 479 /** @addtogroup COMP_Exported_Functions COMP Exported Functions
<> 144:ef7eb2e8f9f7 480 * @{
<> 144:ef7eb2e8f9f7 481 */
<> 144:ef7eb2e8f9f7 482 /** @addtogroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 483 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 484 * @{
<> 144:ef7eb2e8f9f7 485 */
<> 144:ef7eb2e8f9f7 486 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 487 HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 488 HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 489 void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 490 void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 491 /**
<> 144:ef7eb2e8f9f7 492 * @}
<> 144:ef7eb2e8f9f7 493 */
<> 144:ef7eb2e8f9f7 494
<> 144:ef7eb2e8f9f7 495 /** @addtogroup COMP_Exported_Functions_Group2 I/O operation functions
<> 144:ef7eb2e8f9f7 496 * @brief Data transfers functions
<> 144:ef7eb2e8f9f7 497 * @{
<> 144:ef7eb2e8f9f7 498 */
<> 144:ef7eb2e8f9f7 499 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 500 HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 502 HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 503 HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 504 void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 505 /**
<> 144:ef7eb2e8f9f7 506 * @}
<> 144:ef7eb2e8f9f7 507 */
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 /** @addtogroup COMP_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 510 * @brief management functions
<> 144:ef7eb2e8f9f7 511 * @{
<> 144:ef7eb2e8f9f7 512 */
<> 144:ef7eb2e8f9f7 513 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 514 HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 515 uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /* Callback in Interrupt mode */
<> 144:ef7eb2e8f9f7 518 void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 519 /**
<> 144:ef7eb2e8f9f7 520 * @}
<> 144:ef7eb2e8f9f7 521 */
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /** @addtogroup COMP_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 524 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 525 * @{
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 528 uint32_t HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
<> 144:ef7eb2e8f9f7 529 /**
<> 144:ef7eb2e8f9f7 530 * @}
<> 144:ef7eb2e8f9f7 531 */
<> 144:ef7eb2e8f9f7 532
<> 144:ef7eb2e8f9f7 533 /**
<> 144:ef7eb2e8f9f7 534 * @}
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 538 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 539 /** @defgroup COMP_Private_Constants COMP Private Constants
<> 144:ef7eb2e8f9f7 540 * @{
<> 144:ef7eb2e8f9f7 541 */
<> 144:ef7eb2e8f9f7 542 /** @defgroup COMP_ExtiLine COMP EXTI Lines
<> 144:ef7eb2e8f9f7 543 * Elements values convention: XXXX0000
<> 144:ef7eb2e8f9f7 544 * - XXXX : Interrupt mask in the EMR/IMR/RTSR/FTSR register
<> 144:ef7eb2e8f9f7 545 * @{
<> 144:ef7eb2e8f9f7 546 */
<> 144:ef7eb2e8f9f7 547 #define COMP_EXTI_LINE_COMP1 ((uint32_t)EXTI_IMR_MR21) /*!< EXTI line 21 connected to COMP1 output */
<> 144:ef7eb2e8f9f7 548 #define COMP_EXTI_LINE_COMP2 ((uint32_t)EXTI_IMR_MR22) /*!< EXTI line 22 connected to COMP2 output */
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /**
<> 144:ef7eb2e8f9f7 551 * @}
<> 144:ef7eb2e8f9f7 552 */
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 /**
<> 144:ef7eb2e8f9f7 555 * @}
<> 144:ef7eb2e8f9f7 556 */
<> 144:ef7eb2e8f9f7 557
<> 144:ef7eb2e8f9f7 558 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 559 /** @defgroup COMP_Private_Macros COMP Private Macros
<> 144:ef7eb2e8f9f7 560 * @{
<> 144:ef7eb2e8f9f7 561 */
<> 144:ef7eb2e8f9f7 562 /** @defgroup COMP_GET_EXTI_LINE COMP Private macros to get EXTI line associated with Comparators
<> 144:ef7eb2e8f9f7 563 * @{
<> 144:ef7eb2e8f9f7 564 */
<> 144:ef7eb2e8f9f7 565 /**
<> 144:ef7eb2e8f9f7 566 * @brief Get the specified EXTI line for a comparator instance.
<> 144:ef7eb2e8f9f7 567 * @param __INSTANCE__: specifies the COMP instance.
<> 144:ef7eb2e8f9f7 568 * @retval value of @ref COMP_ExtiLine
<> 144:ef7eb2e8f9f7 569 */
<> 144:ef7eb2e8f9f7 570 #define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \
<> 144:ef7eb2e8f9f7 571 COMP_EXTI_LINE_COMP2)
<> 144:ef7eb2e8f9f7 572 /**
<> 144:ef7eb2e8f9f7 573 * @}
<> 144:ef7eb2e8f9f7 574 */
<> 144:ef7eb2e8f9f7 575
<> 144:ef7eb2e8f9f7 576 /** @defgroup COMP_IS_COMP_Definitions COMP Private macros to check input parameters
<> 144:ef7eb2e8f9f7 577 * @{
<> 144:ef7eb2e8f9f7 578 */
<> 144:ef7eb2e8f9f7 579
<> 144:ef7eb2e8f9f7 580 #define IS_COMP_OUTPUTPOL(POL) (((POL) == COMP_OUTPUTPOL_NONINVERTED) || \
<> 144:ef7eb2e8f9f7 581 ((POL) == COMP_OUTPUTPOL_INVERTED))
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 #define IS_COMP_HYSTERESIS(HYSTERESIS) (((HYSTERESIS) == COMP_HYSTERESIS_NONE) || \
<> 144:ef7eb2e8f9f7 584 ((HYSTERESIS) == COMP_HYSTERESIS_LOW) || \
<> 144:ef7eb2e8f9f7 585 ((HYSTERESIS) == COMP_HYSTERESIS_MEDIUM) || \
<> 144:ef7eb2e8f9f7 586 ((HYSTERESIS) == COMP_HYSTERESIS_HIGH))
<> 144:ef7eb2e8f9f7 587
<> 144:ef7eb2e8f9f7 588 #define IS_COMP_MODE(MODE) (((MODE) == COMP_MODE_HIGHSPEED) || \
<> 144:ef7eb2e8f9f7 589 ((MODE) == COMP_MODE_MEDIUMSPEED) || \
<> 144:ef7eb2e8f9f7 590 ((MODE) == COMP_MODE_LOWPOWER) || \
<> 144:ef7eb2e8f9f7 591 ((MODE) == COMP_MODE_ULTRALOWPOWER))
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 #define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \
<> 144:ef7eb2e8f9f7 594 ((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \
<> 144:ef7eb2e8f9f7 595 ((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \
<> 144:ef7eb2e8f9f7 596 ((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \
<> 144:ef7eb2e8f9f7 597 ((INPUT) == COMP_INVERTINGINPUT_DAC1) || \
<> 144:ef7eb2e8f9f7 598 ((INPUT) == COMP_INVERTINGINPUT_DAC1SWITCHCLOSED) || \
<> 144:ef7eb2e8f9f7 599 ((INPUT) == COMP_INVERTINGINPUT_DAC2) || \
<> 144:ef7eb2e8f9f7 600 ((INPUT) == COMP_INVERTINGINPUT_IO1))
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \
<> 144:ef7eb2e8f9f7 603 ((INPUT) == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED))
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_OUTPUT_NONE) || \
<> 144:ef7eb2e8f9f7 606 ((OUTPUT) == COMP_OUTPUT_TIM1BKIN) || \
<> 144:ef7eb2e8f9f7 607 ((OUTPUT) == COMP_OUTPUT_TIM1IC1) || \
<> 144:ef7eb2e8f9f7 608 ((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \
<> 144:ef7eb2e8f9f7 609 ((OUTPUT) == COMP_OUTPUT_TIM2IC4) || \
<> 144:ef7eb2e8f9f7 610 ((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \
<> 144:ef7eb2e8f9f7 611 ((OUTPUT) == COMP_OUTPUT_TIM3IC1) || \
<> 144:ef7eb2e8f9f7 612 ((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR))
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 #define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLE) || \
<> 144:ef7eb2e8f9f7 615 ((WINDOWMODE) == COMP_WINDOWMODE_ENABLE))
<> 144:ef7eb2e8f9f7 616
<> 144:ef7eb2e8f9f7 617 #define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \
<> 144:ef7eb2e8f9f7 618 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \
<> 144:ef7eb2e8f9f7 619 ((__MODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
<> 144:ef7eb2e8f9f7 620 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
<> 144:ef7eb2e8f9f7 621 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
<> 144:ef7eb2e8f9f7 622 ((__MODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
<> 144:ef7eb2e8f9f7 623 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING))
<> 144:ef7eb2e8f9f7 624 /**
<> 144:ef7eb2e8f9f7 625 * @}
<> 144:ef7eb2e8f9f7 626 */
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 /** @defgroup COMP_Lock COMP Lock
<> 144:ef7eb2e8f9f7 629 * @{
<> 144:ef7eb2e8f9f7 630 */
<> 156:95d6b41a828b 631 #define COMP_LOCK_DISABLE (0x00000000U)
<> 144:ef7eb2e8f9f7 632 #define COMP_LOCK_ENABLE COMP_CSR_COMP1LOCK
<> 144:ef7eb2e8f9f7 633
<> 156:95d6b41a828b 634 #define COMP_STATE_BIT_LOCK (0x10U)
<> 144:ef7eb2e8f9f7 635 /**
<> 144:ef7eb2e8f9f7 636 * @}
<> 144:ef7eb2e8f9f7 637 */
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 /**
<> 144:ef7eb2e8f9f7 640 * @}
<> 144:ef7eb2e8f9f7 641 */
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 644
<> 144:ef7eb2e8f9f7 645 /**
<> 144:ef7eb2e8f9f7 646 * @}
<> 144:ef7eb2e8f9f7 647 */
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 /**
<> 144:ef7eb2e8f9f7 650 * @}
<> 144:ef7eb2e8f9f7 651 */
<> 144:ef7eb2e8f9f7 652
<> 144:ef7eb2e8f9f7 653 #endif /* STM32F051x8 || STM32F058xx || */
<> 144:ef7eb2e8f9f7 654 /* STM32F071xB || STM32F072xB || STM32F078xx || */
<> 144:ef7eb2e8f9f7 655 /* STM32F091xC || STM32F098xx */
<> 144:ef7eb2e8f9f7 656
<> 144:ef7eb2e8f9f7 657 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 658 }
<> 144:ef7eb2e8f9f7 659 #endif
<> 144:ef7eb2e8f9f7 660
<> 144:ef7eb2e8f9f7 661 #endif /* __STM32F0xx_HAL_COMP_H */
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 664