mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_M451/PeripheralNames.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16
<> 149:156823d33999 17 #ifndef MBED_PERIPHERALNAMES_H
<> 149:156823d33999 18 #define MBED_PERIPHERALNAMES_H
<> 149:156823d33999 19
<> 149:156823d33999 20 #include "cmsis.h"
<> 149:156823d33999 21
<> 149:156823d33999 22 #ifdef __cplusplus
<> 149:156823d33999 23 extern "C" {
<> 149:156823d33999 24 #endif
<> 149:156823d33999 25
<> 161:2cc1468da177 26 // NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
<> 161:2cc1468da177 27 // which encodes module base address and module index/subindex.
<> 161:2cc1468da177 28 #define NU_MODSUBINDEX_Pos 0
<> 161:2cc1468da177 29 #define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
<> 161:2cc1468da177 30 #define NU_MODINDEX_Pos 20
<> 161:2cc1468da177 31 #define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)
<> 161:2cc1468da177 32
<> 161:2cc1468da177 33 #define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
<> 161:2cc1468da177 34 #define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
<> 161:2cc1468da177 35 #define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
<> 161:2cc1468da177 36 #define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)
<> 149:156823d33999 37
<> 149:156823d33999 38 #if 0
<> 149:156823d33999 39 typedef enum {
<> 161:2cc1468da177 40 GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0),
<> 161:2cc1468da177 41 GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0),
<> 161:2cc1468da177 42 GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0),
<> 161:2cc1468da177 43 GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0),
<> 161:2cc1468da177 44 GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
<> 161:2cc1468da177 45 GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0)
<> 149:156823d33999 46 } GPIOName;
<> 149:156823d33999 47 #endif
<> 149:156823d33999 48
<> 149:156823d33999 49 typedef enum {
<> 161:2cc1468da177 50 ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0, 0),
<> 161:2cc1468da177 51 ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 0, 1),
<> 161:2cc1468da177 52 ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 0, 2),
<> 161:2cc1468da177 53 ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 0, 3),
<> 161:2cc1468da177 54 ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 0, 4),
<> 161:2cc1468da177 55 ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 0, 5),
<> 161:2cc1468da177 56 ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 0, 6),
<> 161:2cc1468da177 57 ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 0, 7),
<> 161:2cc1468da177 58 ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 0, 8),
<> 161:2cc1468da177 59 ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 0, 9),
<> 161:2cc1468da177 60 ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 0, 10),
<> 161:2cc1468da177 61 ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 0, 11),
<> 161:2cc1468da177 62 ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 0, 12),
<> 161:2cc1468da177 63 ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 0, 13),
<> 161:2cc1468da177 64 ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 0, 14),
<> 161:2cc1468da177 65 ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 0, 15)
<> 149:156823d33999 66 } ADCName;
<> 149:156823d33999 67
<> 149:156823d33999 68 typedef enum {
AnnaBridge 189:f392fc9709a3 69 DAC_0_0 = (int) NU_MODNAME(DAC_BASE, 0, 0)
AnnaBridge 189:f392fc9709a3 70 } DACName;
AnnaBridge 189:f392fc9709a3 71
AnnaBridge 189:f392fc9709a3 72 typedef enum {
<> 161:2cc1468da177 73 UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
<> 161:2cc1468da177 74 UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
<> 161:2cc1468da177 75 UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
<> 161:2cc1468da177 76 UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
<> 149:156823d33999 77 // FIXME: board-specific
<> 149:156823d33999 78 STDIO_UART = UART_3
<> 149:156823d33999 79 } UARTName;
<> 149:156823d33999 80
<> 149:156823d33999 81 typedef enum {
<> 161:2cc1468da177 82 SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
<> 161:2cc1468da177 83 SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
<> 161:2cc1468da177 84 SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0)
<> 149:156823d33999 85 } SPIName;
<> 149:156823d33999 86
<> 149:156823d33999 87 typedef enum {
<> 161:2cc1468da177 88 I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
<> 161:2cc1468da177 89 I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0)
<> 149:156823d33999 90 } I2CName;
<> 149:156823d33999 91
<> 149:156823d33999 92 typedef enum {
<> 161:2cc1468da177 93 PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0),
<> 161:2cc1468da177 94 PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1),
<> 161:2cc1468da177 95 PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2),
<> 161:2cc1468da177 96 PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3),
<> 161:2cc1468da177 97 PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4),
<> 161:2cc1468da177 98 PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5),
<> 149:156823d33999 99
<> 161:2cc1468da177 100 PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0),
<> 161:2cc1468da177 101 PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1),
<> 161:2cc1468da177 102 PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2),
<> 161:2cc1468da177 103 PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3),
<> 161:2cc1468da177 104 PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4),
<> 161:2cc1468da177 105 PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5)
<> 149:156823d33999 106 } PWMName;
<> 149:156823d33999 107
<> 149:156823d33999 108 typedef enum {
<> 161:2cc1468da177 109 TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0, 0),
<> 161:2cc1468da177 110 TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 1, 0),
<> 161:2cc1468da177 111 TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 2, 0),
<> 161:2cc1468da177 112 TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 3, 0),
<> 149:156823d33999 113 } TIMERName;
<> 149:156823d33999 114
<> 149:156823d33999 115 typedef enum {
<> 161:2cc1468da177 116 RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
<> 149:156823d33999 117 } RTCName;
<> 149:156823d33999 118
<> 149:156823d33999 119 typedef enum {
<> 161:2cc1468da177 120 DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
<> 149:156823d33999 121 } DMAName;
<> 149:156823d33999 122
<> 150:02e0a0aed4ec 123 typedef enum {
<> 161:2cc1468da177 124 CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0)
<> 150:02e0a0aed4ec 125 } CANName;
<> 150:02e0a0aed4ec 126
<> 149:156823d33999 127 #ifdef __cplusplus
<> 149:156823d33999 128 }
<> 149:156823d33999 129 #endif
<> 149:156823d33999 130
<> 149:156823d33999 131 #endif