mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PeripheralNames.h@150:02e0a0aed4ec, 2016-11-08 (annotated)
- Committer:
- <>
- Date:
- Tue Nov 08 17:45:16 2016 +0000
- Revision:
- 150:02e0a0aed4ec
- Parent:
- 149:156823d33999
- Child:
- 161:2cc1468da177
This updates the lib to the mbed lib v129
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2015-2016 Nuvoton |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
<> | 149:156823d33999 | 16 | |
<> | 149:156823d33999 | 17 | #ifndef MBED_PERIPHERALNAMES_H |
<> | 149:156823d33999 | 18 | #define MBED_PERIPHERALNAMES_H |
<> | 149:156823d33999 | 19 | |
<> | 149:156823d33999 | 20 | #include "cmsis.h" |
<> | 149:156823d33999 | 21 | |
<> | 149:156823d33999 | 22 | #ifdef __cplusplus |
<> | 149:156823d33999 | 23 | extern "C" { |
<> | 149:156823d33999 | 24 | #endif |
<> | 149:156823d33999 | 25 | |
<> | 149:156823d33999 | 26 | // NOTE: TIMER0_BASE=(APBPERIPH_BASE + 0x10000) |
<> | 149:156823d33999 | 27 | // TIMER1_BASE=(APBPERIPH_BASE + 0x10020) |
<> | 149:156823d33999 | 28 | #define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX)) |
<> | 149:156823d33999 | 29 | #define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0) |
<> | 149:156823d33999 | 30 | #define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F) |
<> | 149:156823d33999 | 31 | |
<> | 149:156823d33999 | 32 | #if 0 |
<> | 149:156823d33999 | 33 | typedef enum { |
<> | 149:156823d33999 | 34 | GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0), |
<> | 149:156823d33999 | 35 | GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0), |
<> | 149:156823d33999 | 36 | GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0), |
<> | 149:156823d33999 | 37 | GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0), |
<> | 149:156823d33999 | 38 | GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0), |
<> | 149:156823d33999 | 39 | GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0) |
<> | 149:156823d33999 | 40 | } GPIOName; |
<> | 149:156823d33999 | 41 | #endif |
<> | 149:156823d33999 | 42 | |
<> | 149:156823d33999 | 43 | typedef enum { |
<> | 149:156823d33999 | 44 | ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0), |
<> | 149:156823d33999 | 45 | ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 1), |
<> | 149:156823d33999 | 46 | ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 2), |
<> | 149:156823d33999 | 47 | ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 3), |
<> | 149:156823d33999 | 48 | ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 4), |
<> | 149:156823d33999 | 49 | ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 5), |
<> | 149:156823d33999 | 50 | ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 6), |
<> | 149:156823d33999 | 51 | ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 7), |
<> | 149:156823d33999 | 52 | ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 8), |
<> | 149:156823d33999 | 53 | ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 9), |
<> | 149:156823d33999 | 54 | ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 10), |
<> | 149:156823d33999 | 55 | ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 11), |
<> | 149:156823d33999 | 56 | ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 12), |
<> | 149:156823d33999 | 57 | ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 13), |
<> | 149:156823d33999 | 58 | ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 14), |
<> | 149:156823d33999 | 59 | ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 15) |
<> | 149:156823d33999 | 60 | } ADCName; |
<> | 149:156823d33999 | 61 | |
<> | 149:156823d33999 | 62 | typedef enum { |
<> | 149:156823d33999 | 63 | UART_0 = (int) NU_MODNAME(UART0_BASE, 0), |
<> | 149:156823d33999 | 64 | UART_1 = (int) NU_MODNAME(UART1_BASE, 0), |
<> | 149:156823d33999 | 65 | UART_2 = (int) NU_MODNAME(UART2_BASE, 0), |
<> | 149:156823d33999 | 66 | UART_3 = (int) NU_MODNAME(UART3_BASE, 0), |
<> | 149:156823d33999 | 67 | // FIXME: board-specific |
<> | 149:156823d33999 | 68 | STDIO_UART = UART_3 |
<> | 149:156823d33999 | 69 | } UARTName; |
<> | 149:156823d33999 | 70 | |
<> | 149:156823d33999 | 71 | typedef enum { |
<> | 149:156823d33999 | 72 | SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0), |
<> | 149:156823d33999 | 73 | SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0), |
<> | 149:156823d33999 | 74 | SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0) |
<> | 149:156823d33999 | 75 | } SPIName; |
<> | 149:156823d33999 | 76 | |
<> | 149:156823d33999 | 77 | typedef enum { |
<> | 149:156823d33999 | 78 | I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0), |
<> | 149:156823d33999 | 79 | I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0) |
<> | 149:156823d33999 | 80 | } I2CName; |
<> | 149:156823d33999 | 81 | |
<> | 149:156823d33999 | 82 | typedef enum { |
<> | 149:156823d33999 | 83 | PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0), |
<> | 149:156823d33999 | 84 | PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1), |
<> | 149:156823d33999 | 85 | PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2), |
<> | 149:156823d33999 | 86 | PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3), |
<> | 149:156823d33999 | 87 | PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4), |
<> | 149:156823d33999 | 88 | PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5), |
<> | 149:156823d33999 | 89 | |
<> | 149:156823d33999 | 90 | PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0), |
<> | 149:156823d33999 | 91 | PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1), |
<> | 149:156823d33999 | 92 | PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2), |
<> | 149:156823d33999 | 93 | PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3), |
<> | 149:156823d33999 | 94 | PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4), |
<> | 149:156823d33999 | 95 | PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5) |
<> | 149:156823d33999 | 96 | } PWMName; |
<> | 149:156823d33999 | 97 | |
<> | 149:156823d33999 | 98 | typedef enum { |
<> | 149:156823d33999 | 99 | TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0), |
<> | 149:156823d33999 | 100 | TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 0), |
<> | 149:156823d33999 | 101 | TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 0), |
<> | 149:156823d33999 | 102 | TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 0), |
<> | 149:156823d33999 | 103 | } TIMERName; |
<> | 149:156823d33999 | 104 | |
<> | 149:156823d33999 | 105 | typedef enum { |
<> | 149:156823d33999 | 106 | RTC_0 = (int) NU_MODNAME(RTC_BASE, 0) |
<> | 149:156823d33999 | 107 | } RTCName; |
<> | 149:156823d33999 | 108 | |
<> | 149:156823d33999 | 109 | typedef enum { |
<> | 149:156823d33999 | 110 | DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0) |
<> | 149:156823d33999 | 111 | } DMAName; |
<> | 149:156823d33999 | 112 | |
<> | 150:02e0a0aed4ec | 113 | typedef enum { |
<> | 150:02e0a0aed4ec | 114 | CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0) |
<> | 150:02e0a0aed4ec | 115 | } CANName; |
<> | 150:02e0a0aed4ec | 116 | |
<> | 149:156823d33999 | 117 | #ifdef __cplusplus |
<> | 149:156823d33999 | 118 | } |
<> | 149:156823d33999 | 119 | #endif |
<> | 149:156823d33999 | 120 | |
<> | 149:156823d33999 | 121 | #endif |