mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_irq_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
149:156823d33999 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2013 Nordic Semiconductor
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include <stddef.h>
<> 144:ef7eb2e8f9f7 17 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include "gpio_irq_api.h"
<> 144:ef7eb2e8f9f7 20 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 #define CHANNEL_NUM 31
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 static uint32_t channel_ids[CHANNEL_NUM] = {0}; //each pin will be given an id, if id is 0 the pin can be ignored.
<> 144:ef7eb2e8f9f7 25 static uint8_t channel_enabled[CHANNEL_NUM] = {0};
<> 144:ef7eb2e8f9f7 26 static uint32_t portRISE = 0;
<> 144:ef7eb2e8f9f7 27 static uint32_t portFALL = 0;
<> 144:ef7eb2e8f9f7 28 static gpio_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 31 extern "C" {
<> 144:ef7eb2e8f9f7 32 #endif
<> 144:ef7eb2e8f9f7 33 void GPIOTE_IRQHandler(void)
<> 144:ef7eb2e8f9f7 34 {
<> 144:ef7eb2e8f9f7 35 volatile uint32_t newVal = NRF_GPIO->IN;
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 if ((NRF_GPIOTE->EVENTS_PORT != 0) && ((NRF_GPIOTE->INTENSET & GPIOTE_INTENSET_PORT_Msk) != 0)) {
<> 144:ef7eb2e8f9f7 38 NRF_GPIOTE->EVENTS_PORT = 0;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 for (uint8_t i = 0; i<31; i++) {
<> 144:ef7eb2e8f9f7 41 if (channel_ids[i]>0) {
<> 144:ef7eb2e8f9f7 42 if (channel_enabled[i]) {
<> 144:ef7eb2e8f9f7 43 if( ((newVal>>i)&1) && ( ( (NRF_GPIO->PIN_CNF[i] >>GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) != GPIO_PIN_CNF_SENSE_Low) && ( (portRISE>>i)&1) ){
<> 144:ef7eb2e8f9f7 44 irq_handler(channel_ids[i], IRQ_RISE);
<> 144:ef7eb2e8f9f7 45 } else if ((((newVal >> i) & 1) == 0) &&
<> 144:ef7eb2e8f9f7 46 (((NRF_GPIO->PIN_CNF[i] >> GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) == GPIO_PIN_CNF_SENSE_Low) &&
<> 144:ef7eb2e8f9f7 47 ((portFALL >> i) & 1)) {
<> 144:ef7eb2e8f9f7 48 irq_handler(channel_ids[i], IRQ_FALL);
<> 144:ef7eb2e8f9f7 49 }
<> 144:ef7eb2e8f9f7 50 }
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 if (NRF_GPIO->PIN_CNF[i] & GPIO_PIN_CNF_SENSE_Msk) {
<> 144:ef7eb2e8f9f7 53 NRF_GPIO->PIN_CNF[i] &= ~(GPIO_PIN_CNF_SENSE_Msk);
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 if (newVal >> i & 1) {
<> 144:ef7eb2e8f9f7 56 NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
<> 144:ef7eb2e8f9f7 57 } else {
<> 144:ef7eb2e8f9f7 58 NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
<> 144:ef7eb2e8f9f7 59 }
<> 144:ef7eb2e8f9f7 60 }
<> 144:ef7eb2e8f9f7 61 }
<> 144:ef7eb2e8f9f7 62 }
<> 144:ef7eb2e8f9f7 63 }
<> 144:ef7eb2e8f9f7 64 }
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 67 }
<> 144:ef7eb2e8f9f7 68 #endif
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
<> 144:ef7eb2e8f9f7 71 {
<> 144:ef7eb2e8f9f7 72 if (pin == NC) {
<> 144:ef7eb2e8f9f7 73 return -1;
<> 144:ef7eb2e8f9f7 74 }
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 irq_handler = handler;
<> 144:ef7eb2e8f9f7 77 obj->ch = pin;
<> 144:ef7eb2e8f9f7 78 NRF_GPIOTE->EVENTS_PORT = 0;
<> 144:ef7eb2e8f9f7 79 channel_ids[pin] = id;
<> 144:ef7eb2e8f9f7 80 channel_enabled[pin] = 1;
<> 144:ef7eb2e8f9f7 81 NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set << GPIOTE_INTENSET_PORT_Pos;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 NVIC_SetPriority(GPIOTE_IRQn, 3);
<> 144:ef7eb2e8f9f7 84 NVIC_EnableIRQ (GPIOTE_IRQn);
<> 144:ef7eb2e8f9f7 85 return 0;
<> 144:ef7eb2e8f9f7 86 }
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 void gpio_irq_free(gpio_irq_t *obj)
<> 144:ef7eb2e8f9f7 89 {
<> 144:ef7eb2e8f9f7 90 channel_ids[obj->ch] = 0;
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
<> 144:ef7eb2e8f9f7 94 {
<> 144:ef7eb2e8f9f7 95 NRF_GPIO->PIN_CNF[obj->ch] &= ~(GPIO_PIN_CNF_SENSE_Msk);
<> 144:ef7eb2e8f9f7 96 if (enable) {
<> 144:ef7eb2e8f9f7 97 if (event == IRQ_RISE) {
<> 144:ef7eb2e8f9f7 98 portRISE |= (1 << obj->ch);
<> 144:ef7eb2e8f9f7 99 } else if (event == IRQ_FALL) {
<> 144:ef7eb2e8f9f7 100 portFALL |= (1 << obj->ch);
<> 144:ef7eb2e8f9f7 101 }
<> 144:ef7eb2e8f9f7 102 } else {
<> 144:ef7eb2e8f9f7 103 if (event == IRQ_RISE) {
<> 144:ef7eb2e8f9f7 104 portRISE &= ~(1 << obj->ch);
<> 144:ef7eb2e8f9f7 105 } else if (event == IRQ_FALL) {
<> 144:ef7eb2e8f9f7 106 portFALL &= ~(1 << obj->ch);
<> 144:ef7eb2e8f9f7 107 }
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 if (((portRISE >> obj->ch) & 1) || ((portFALL >> obj->ch) & 1)) {
<> 144:ef7eb2e8f9f7 111 if ((NRF_GPIO->IN >> obj->ch) & 1) {
<> 144:ef7eb2e8f9f7 112 NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos); // | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
<> 144:ef7eb2e8f9f7 113 } else {
<> 144:ef7eb2e8f9f7 114 NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos); //| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
<> 144:ef7eb2e8f9f7 115 }
<> 144:ef7eb2e8f9f7 116 }
<> 144:ef7eb2e8f9f7 117 }
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 void gpio_irq_enable(gpio_irq_t *obj)
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 channel_enabled[obj->ch] = 1;
<> 144:ef7eb2e8f9f7 122 }
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 void gpio_irq_disable(gpio_irq_t *obj)
<> 144:ef7eb2e8f9f7 125 {
<> 144:ef7eb2e8f9f7 126 channel_enabled[obj->ch] = 0;
<> 144:ef7eb2e8f9f7 127 }