mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_GigaDevice/TARGET_GD32F4XX/pinmap.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 189:f392fc9709a3 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 189:f392fc9709a3 | 2 | * Copyright (c) 2018 GigaDevice Semiconductor Inc. |
AnnaBridge | 189:f392fc9709a3 | 3 | * |
AnnaBridge | 189:f392fc9709a3 | 4 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 189:f392fc9709a3 | 5 | * |
AnnaBridge | 189:f392fc9709a3 | 6 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 189:f392fc9709a3 | 7 | * you may not use this file except in compliance with the License. |
AnnaBridge | 189:f392fc9709a3 | 8 | * You may obtain a copy of the License at |
AnnaBridge | 189:f392fc9709a3 | 9 | * |
AnnaBridge | 189:f392fc9709a3 | 10 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 189:f392fc9709a3 | 11 | * |
AnnaBridge | 189:f392fc9709a3 | 12 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 189:f392fc9709a3 | 13 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 189:f392fc9709a3 | 14 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 189:f392fc9709a3 | 15 | * See the License for the specific language governing permissions and |
AnnaBridge | 189:f392fc9709a3 | 16 | * limitations under the License. |
AnnaBridge | 189:f392fc9709a3 | 17 | */ |
AnnaBridge | 189:f392fc9709a3 | 18 | #include "mbed_assert.h" |
AnnaBridge | 189:f392fc9709a3 | 19 | #include "pinmap.h" |
AnnaBridge | 189:f392fc9709a3 | 20 | #include "PortNames.h" |
AnnaBridge | 189:f392fc9709a3 | 21 | #include "mbed_error.h" |
AnnaBridge | 189:f392fc9709a3 | 22 | |
AnnaBridge | 189:f392fc9709a3 | 23 | extern uint32_t gpio_clock_enable(uint32_t port_idx); |
AnnaBridge | 189:f392fc9709a3 | 24 | |
AnnaBridge | 189:f392fc9709a3 | 25 | extern const int GD_GPIO_MODE[]; |
AnnaBridge | 189:f392fc9709a3 | 26 | extern const int GD_GPIO_PULL_UP_DOWN[]; |
AnnaBridge | 189:f392fc9709a3 | 27 | extern const int GD_GPIO_OUTPUT_MODE[]; |
AnnaBridge | 189:f392fc9709a3 | 28 | extern const int GD_GPIO_SPEED[]; |
AnnaBridge | 189:f392fc9709a3 | 29 | extern const int GD_GPIO_AF[]; |
AnnaBridge | 189:f392fc9709a3 | 30 | |
AnnaBridge | 189:f392fc9709a3 | 31 | /** Configure pin (mode, speed, reamp function ) |
AnnaBridge | 189:f392fc9709a3 | 32 | * |
AnnaBridge | 189:f392fc9709a3 | 33 | * @param pin gpio pin name |
AnnaBridge | 189:f392fc9709a3 | 34 | * @param function gpio pin mode, speed, remap function |
AnnaBridge | 189:f392fc9709a3 | 35 | */ |
AnnaBridge | 189:f392fc9709a3 | 36 | void pin_function(PinName pin, int function) |
AnnaBridge | 189:f392fc9709a3 | 37 | { |
AnnaBridge | 189:f392fc9709a3 | 38 | MBED_ASSERT(pin != (PinName)NC); |
AnnaBridge | 189:f392fc9709a3 | 39 | |
AnnaBridge | 189:f392fc9709a3 | 40 | uint32_t mode = GD_PIN_MODE_GET(function); |
AnnaBridge | 189:f392fc9709a3 | 41 | uint32_t output = GD_PIN_OUTPUT_MODE_GET(function) ; |
AnnaBridge | 189:f392fc9709a3 | 42 | uint32_t pull = GD_PIN_PULL_STATE_GET(function); |
AnnaBridge | 189:f392fc9709a3 | 43 | uint32_t speed = GD_PIN_SPEED_GET(function); |
AnnaBridge | 189:f392fc9709a3 | 44 | uint32_t af = GD_PIN_REMAP_GET(function); |
AnnaBridge | 189:f392fc9709a3 | 45 | |
AnnaBridge | 189:f392fc9709a3 | 46 | uint32_t port = GD_PORT_GET(pin); |
AnnaBridge | 189:f392fc9709a3 | 47 | uint32_t gd_pin = 1 << GD_PIN_GET(pin); |
AnnaBridge | 189:f392fc9709a3 | 48 | |
AnnaBridge | 189:f392fc9709a3 | 49 | uint32_t gpio = gpio_clock_enable(port); |
AnnaBridge | 189:f392fc9709a3 | 50 | gpio_af_set(gpio, GD_GPIO_AF[af], gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 51 | gpio_mode_set(gpio, GD_GPIO_MODE[mode], GD_GPIO_PULL_UP_DOWN[pull], gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 52 | gpio_output_options_set(gpio, GD_GPIO_OUTPUT_MODE[output], GD_GPIO_SPEED[speed], gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 53 | } |
AnnaBridge | 189:f392fc9709a3 | 54 | |
AnnaBridge | 189:f392fc9709a3 | 55 | /** Only configure pin mode |
AnnaBridge | 189:f392fc9709a3 | 56 | * |
AnnaBridge | 189:f392fc9709a3 | 57 | * @param pin gpio pin name |
AnnaBridge | 189:f392fc9709a3 | 58 | * @param function gpio pin mode |
AnnaBridge | 189:f392fc9709a3 | 59 | */ |
AnnaBridge | 189:f392fc9709a3 | 60 | void pin_mode(PinName pin, PinMode mode) |
AnnaBridge | 189:f392fc9709a3 | 61 | { |
AnnaBridge | 189:f392fc9709a3 | 62 | MBED_ASSERT(pin != (PinName)NC); |
AnnaBridge | 189:f392fc9709a3 | 63 | uint32_t port = GD_PORT_GET(pin); |
AnnaBridge | 189:f392fc9709a3 | 64 | uint32_t gd_pin = 1 << GD_PIN_GET(pin); |
AnnaBridge | 189:f392fc9709a3 | 65 | |
AnnaBridge | 189:f392fc9709a3 | 66 | uint32_t gpio = gpio_clock_enable(port); |
AnnaBridge | 189:f392fc9709a3 | 67 | /* get pin mode */ |
AnnaBridge | 189:f392fc9709a3 | 68 | uint32_t pin_mode = (GPIO_CTL(gpio) >> (gd_pin * 2)) & 0x03; |
AnnaBridge | 189:f392fc9709a3 | 69 | if ((pin_mode == PIN_MODE_OUTPUT) || (pin_mode == PIN_MODE_ANALOG)) { |
AnnaBridge | 189:f392fc9709a3 | 70 | if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) { |
AnnaBridge | 189:f392fc9709a3 | 71 | /* set pin open drain mode */ |
AnnaBridge | 189:f392fc9709a3 | 72 | GPIO_OMODE(gpio) |= (uint32_t)gd_pin; |
AnnaBridge | 189:f392fc9709a3 | 73 | } else { |
AnnaBridge | 189:f392fc9709a3 | 74 | /* set pin push pull mode */ |
AnnaBridge | 189:f392fc9709a3 | 75 | GPIO_OMODE(gpio) &= (uint32_t)(~gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 76 | } |
AnnaBridge | 189:f392fc9709a3 | 77 | } |
AnnaBridge | 189:f392fc9709a3 | 78 | |
AnnaBridge | 189:f392fc9709a3 | 79 | if ((mode == OpenDrainPullUp) || (mode == PullUp)) { |
AnnaBridge | 189:f392fc9709a3 | 80 | /* clear the specified pin pupd bits */ |
AnnaBridge | 189:f392fc9709a3 | 81 | GPIO_PUD(gpio) &= ~GPIO_PUPD_MASK(gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 82 | /* set the specified pin pull up */ |
AnnaBridge | 189:f392fc9709a3 | 83 | GPIO_PUD(gpio) |= GPIO_PUPD_SET(gd_pin, GPIO_PUPD_PULLUP); |
AnnaBridge | 189:f392fc9709a3 | 84 | } else if ((mode == OpenDrainPullDown) || (mode == PullDown)) { |
AnnaBridge | 189:f392fc9709a3 | 85 | /* clear the specified pin pupd bits */ |
AnnaBridge | 189:f392fc9709a3 | 86 | GPIO_PUD(gpio) &= ~GPIO_PUPD_MASK(gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 87 | /* set the specified pin pull down */ |
AnnaBridge | 189:f392fc9709a3 | 88 | GPIO_PUD(gpio) |= GPIO_PUPD_SET(gd_pin, GPIO_PUPD_PULLDOWN); |
AnnaBridge | 189:f392fc9709a3 | 89 | } else { |
AnnaBridge | 189:f392fc9709a3 | 90 | /* clear the specified pin pupd bits */ |
AnnaBridge | 189:f392fc9709a3 | 91 | GPIO_PUD(gpio) &= ~GPIO_PUPD_MASK(gd_pin); |
AnnaBridge | 189:f392fc9709a3 | 92 | /* set the specified pin pull none */ |
AnnaBridge | 189:f392fc9709a3 | 93 | GPIO_PUD(gpio) |= GPIO_PUPD_SET(gd_pin, GPIO_PUPD_NONE); |
AnnaBridge | 189:f392fc9709a3 | 94 | } |
AnnaBridge | 189:f392fc9709a3 | 95 | } |