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mbed library sources. Supersedes mbed-src.

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cmsis/BUILD/mbed/hal/spi_api.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1
AnnaBridge 189:f392fc9709a3 2 /** \addtogroup hal */
AnnaBridge 189:f392fc9709a3 3 /** @{*/
AnnaBridge 189:f392fc9709a3 4 /* mbed Microcontroller Library
AnnaBridge 189:f392fc9709a3 5 * Copyright (c) 2006-2013 ARM Limited
AnnaBridge 189:f392fc9709a3 6 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 189:f392fc9709a3 9 * you may not use this file except in compliance with the License.
AnnaBridge 189:f392fc9709a3 10 * You may obtain a copy of the License at
AnnaBridge 189:f392fc9709a3 11 *
AnnaBridge 189:f392fc9709a3 12 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 189:f392fc9709a3 13 *
AnnaBridge 189:f392fc9709a3 14 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 189:f392fc9709a3 15 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 189:f392fc9709a3 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 189:f392fc9709a3 17 * See the License for the specific language governing permissions and
AnnaBridge 189:f392fc9709a3 18 * limitations under the License.
AnnaBridge 189:f392fc9709a3 19 */
AnnaBridge 189:f392fc9709a3 20 #ifndef MBED_SPI_API_H
AnnaBridge 189:f392fc9709a3 21 #define MBED_SPI_API_H
AnnaBridge 189:f392fc9709a3 22
AnnaBridge 189:f392fc9709a3 23 #include "device.h"
AnnaBridge 189:f392fc9709a3 24 #include "hal/dma_api.h"
AnnaBridge 189:f392fc9709a3 25 #include "hal/buffer.h"
AnnaBridge 189:f392fc9709a3 26
AnnaBridge 189:f392fc9709a3 27 #if DEVICE_SPI
AnnaBridge 189:f392fc9709a3 28
AnnaBridge 189:f392fc9709a3 29 #define SPI_EVENT_ERROR (1 << 1)
AnnaBridge 189:f392fc9709a3 30 #define SPI_EVENT_COMPLETE (1 << 2)
AnnaBridge 189:f392fc9709a3 31 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
AnnaBridge 189:f392fc9709a3 32 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
AnnaBridge 189:f392fc9709a3 33
AnnaBridge 189:f392fc9709a3 34 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 #define SPI_FILL_WORD (0xFFFF)
AnnaBridge 189:f392fc9709a3 37 #define SPI_FILL_CHAR (0xFF)
AnnaBridge 189:f392fc9709a3 38
AnnaBridge 189:f392fc9709a3 39 #if DEVICE_SPI_ASYNCH
AnnaBridge 189:f392fc9709a3 40 /** Asynch SPI HAL structure
AnnaBridge 189:f392fc9709a3 41 */
AnnaBridge 189:f392fc9709a3 42 typedef struct {
AnnaBridge 189:f392fc9709a3 43 struct spi_s spi; /**< Target specific SPI structure */
AnnaBridge 189:f392fc9709a3 44 struct buffer_s tx_buff; /**< Tx buffer */
AnnaBridge 189:f392fc9709a3 45 struct buffer_s rx_buff; /**< Rx buffer */
AnnaBridge 189:f392fc9709a3 46 } spi_t;
AnnaBridge 189:f392fc9709a3 47
AnnaBridge 189:f392fc9709a3 48 #else
AnnaBridge 189:f392fc9709a3 49 /** Non-asynch SPI HAL structure
AnnaBridge 189:f392fc9709a3 50 */
AnnaBridge 189:f392fc9709a3 51 typedef struct spi_s spi_t;
AnnaBridge 189:f392fc9709a3 52
AnnaBridge 189:f392fc9709a3 53 #endif
AnnaBridge 189:f392fc9709a3 54
AnnaBridge 189:f392fc9709a3 55 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 56 extern "C" {
AnnaBridge 189:f392fc9709a3 57 #endif
AnnaBridge 189:f392fc9709a3 58
AnnaBridge 189:f392fc9709a3 59 /**
AnnaBridge 189:f392fc9709a3 60 * \defgroup hal_GeneralSPI SPI Configuration Functions
AnnaBridge 189:f392fc9709a3 61 * @{
AnnaBridge 189:f392fc9709a3 62 */
AnnaBridge 189:f392fc9709a3 63
AnnaBridge 189:f392fc9709a3 64 /** Initialize the SPI peripheral
AnnaBridge 189:f392fc9709a3 65 *
AnnaBridge 189:f392fc9709a3 66 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
AnnaBridge 189:f392fc9709a3 67 * @param[out] obj The SPI object to initialize
AnnaBridge 189:f392fc9709a3 68 * @param[in] mosi The pin to use for MOSI
AnnaBridge 189:f392fc9709a3 69 * @param[in] miso The pin to use for MISO
AnnaBridge 189:f392fc9709a3 70 * @param[in] sclk The pin to use for SCLK
AnnaBridge 189:f392fc9709a3 71 * @param[in] ssel The pin to use for SSEL
AnnaBridge 189:f392fc9709a3 72 */
AnnaBridge 189:f392fc9709a3 73 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
AnnaBridge 189:f392fc9709a3 74
AnnaBridge 189:f392fc9709a3 75 /** Release a SPI object
AnnaBridge 189:f392fc9709a3 76 *
AnnaBridge 189:f392fc9709a3 77 * TODO: spi_free is currently unimplemented
AnnaBridge 189:f392fc9709a3 78 * This will require reference counting at the C++ level to be safe
AnnaBridge 189:f392fc9709a3 79 *
AnnaBridge 189:f392fc9709a3 80 * Return the pins owned by the SPI object to their reset state
AnnaBridge 189:f392fc9709a3 81 * Disable the SPI peripheral
AnnaBridge 189:f392fc9709a3 82 * Disable the SPI clock
AnnaBridge 189:f392fc9709a3 83 * @param[in] obj The SPI object to deinitialize
AnnaBridge 189:f392fc9709a3 84 */
AnnaBridge 189:f392fc9709a3 85 void spi_free(spi_t *obj);
AnnaBridge 189:f392fc9709a3 86
AnnaBridge 189:f392fc9709a3 87 /** Configure the SPI format
AnnaBridge 189:f392fc9709a3 88 *
AnnaBridge 189:f392fc9709a3 89 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
AnnaBridge 189:f392fc9709a3 90 * The default bit order is MSB.
AnnaBridge 189:f392fc9709a3 91 * @param[in,out] obj The SPI object to configure
AnnaBridge 189:f392fc9709a3 92 * @param[in] bits The number of bits per frame
AnnaBridge 189:f392fc9709a3 93 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
AnnaBridge 189:f392fc9709a3 94 * @param[in] slave Zero for master mode or non-zero for slave mode
AnnaBridge 189:f392fc9709a3 95 */
AnnaBridge 189:f392fc9709a3 96 void spi_format(spi_t *obj, int bits, int mode, int slave);
AnnaBridge 189:f392fc9709a3 97
AnnaBridge 189:f392fc9709a3 98 /** Set the SPI baud rate
AnnaBridge 189:f392fc9709a3 99 *
AnnaBridge 189:f392fc9709a3 100 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
AnnaBridge 189:f392fc9709a3 101 * Configures the SPI peripheral's baud rate
AnnaBridge 189:f392fc9709a3 102 * @param[in,out] obj The SPI object to configure
AnnaBridge 189:f392fc9709a3 103 * @param[in] hz The baud rate in Hz
AnnaBridge 189:f392fc9709a3 104 */
AnnaBridge 189:f392fc9709a3 105 void spi_frequency(spi_t *obj, int hz);
AnnaBridge 189:f392fc9709a3 106
AnnaBridge 189:f392fc9709a3 107 /**@}*/
AnnaBridge 189:f392fc9709a3 108 /**
AnnaBridge 189:f392fc9709a3 109 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
AnnaBridge 189:f392fc9709a3 110 * @{
AnnaBridge 189:f392fc9709a3 111 */
AnnaBridge 189:f392fc9709a3 112
AnnaBridge 189:f392fc9709a3 113 /** Write a byte out in master mode and receive a value
AnnaBridge 189:f392fc9709a3 114 *
AnnaBridge 189:f392fc9709a3 115 * @param[in] obj The SPI peripheral to use for sending
AnnaBridge 189:f392fc9709a3 116 * @param[in] value The value to send
AnnaBridge 189:f392fc9709a3 117 * @return Returns the value received during send
AnnaBridge 189:f392fc9709a3 118 */
AnnaBridge 189:f392fc9709a3 119 int spi_master_write(spi_t *obj, int value);
AnnaBridge 189:f392fc9709a3 120
AnnaBridge 189:f392fc9709a3 121 /** Write a block out in master mode and receive a value
AnnaBridge 189:f392fc9709a3 122 *
AnnaBridge 189:f392fc9709a3 123 * The total number of bytes sent and received will be the maximum of
AnnaBridge 189:f392fc9709a3 124 * tx_length and rx_length. The bytes written will be padded with the
AnnaBridge 189:f392fc9709a3 125 * value 0xff.
AnnaBridge 189:f392fc9709a3 126 *
AnnaBridge 189:f392fc9709a3 127 * @param[in] obj The SPI peripheral to use for sending
AnnaBridge 189:f392fc9709a3 128 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
AnnaBridge 189:f392fc9709a3 129 * @param[in] tx_length Number of bytes to write, may be zero
AnnaBridge 189:f392fc9709a3 130 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
AnnaBridge 189:f392fc9709a3 131 * @param[in] rx_length Number of bytes to read, may be zero
AnnaBridge 189:f392fc9709a3 132 * @param[in] write_fill Default data transmitted while performing a read
AnnaBridge 189:f392fc9709a3 133 * @returns
AnnaBridge 189:f392fc9709a3 134 * The number of bytes written and read from the device. This is
AnnaBridge 189:f392fc9709a3 135 * maximum of tx_length and rx_length.
AnnaBridge 189:f392fc9709a3 136 */
AnnaBridge 189:f392fc9709a3 137 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
AnnaBridge 189:f392fc9709a3 138
AnnaBridge 189:f392fc9709a3 139 /** Check if a value is available to read
AnnaBridge 189:f392fc9709a3 140 *
AnnaBridge 189:f392fc9709a3 141 * @param[in] obj The SPI peripheral to check
AnnaBridge 189:f392fc9709a3 142 * @return non-zero if a value is available
AnnaBridge 189:f392fc9709a3 143 */
AnnaBridge 189:f392fc9709a3 144 int spi_slave_receive(spi_t *obj);
AnnaBridge 189:f392fc9709a3 145
AnnaBridge 189:f392fc9709a3 146 /** Get a received value out of the SPI receive buffer in slave mode
AnnaBridge 189:f392fc9709a3 147 *
AnnaBridge 189:f392fc9709a3 148 * Blocks until a value is available
AnnaBridge 189:f392fc9709a3 149 * @param[in] obj The SPI peripheral to read
AnnaBridge 189:f392fc9709a3 150 * @return The value received
AnnaBridge 189:f392fc9709a3 151 */
AnnaBridge 189:f392fc9709a3 152 int spi_slave_read(spi_t *obj);
AnnaBridge 189:f392fc9709a3 153
AnnaBridge 189:f392fc9709a3 154 /** Write a value to the SPI peripheral in slave mode
AnnaBridge 189:f392fc9709a3 155 *
AnnaBridge 189:f392fc9709a3 156 * Blocks until the SPI peripheral can be written to
AnnaBridge 189:f392fc9709a3 157 * @param[in] obj The SPI peripheral to write
AnnaBridge 189:f392fc9709a3 158 * @param[in] value The value to write
AnnaBridge 189:f392fc9709a3 159 */
AnnaBridge 189:f392fc9709a3 160 void spi_slave_write(spi_t *obj, int value);
AnnaBridge 189:f392fc9709a3 161
AnnaBridge 189:f392fc9709a3 162 /** Checks if the specified SPI peripheral is in use
AnnaBridge 189:f392fc9709a3 163 *
AnnaBridge 189:f392fc9709a3 164 * @param[in] obj The SPI peripheral to check
AnnaBridge 189:f392fc9709a3 165 * @return non-zero if the peripheral is currently transmitting
AnnaBridge 189:f392fc9709a3 166 */
AnnaBridge 189:f392fc9709a3 167 int spi_busy(spi_t *obj);
AnnaBridge 189:f392fc9709a3 168
AnnaBridge 189:f392fc9709a3 169 /** Get the module number
AnnaBridge 189:f392fc9709a3 170 *
AnnaBridge 189:f392fc9709a3 171 * @param[in] obj The SPI peripheral to check
AnnaBridge 189:f392fc9709a3 172 * @return The module number
AnnaBridge 189:f392fc9709a3 173 */
AnnaBridge 189:f392fc9709a3 174 uint8_t spi_get_module(spi_t *obj);
AnnaBridge 189:f392fc9709a3 175
AnnaBridge 189:f392fc9709a3 176 /**@}*/
AnnaBridge 189:f392fc9709a3 177
AnnaBridge 189:f392fc9709a3 178 #if DEVICE_SPI_ASYNCH
AnnaBridge 189:f392fc9709a3 179 /**
AnnaBridge 189:f392fc9709a3 180 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
AnnaBridge 189:f392fc9709a3 181 * @{
AnnaBridge 189:f392fc9709a3 182 */
AnnaBridge 189:f392fc9709a3 183
AnnaBridge 189:f392fc9709a3 184 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
AnnaBridge 189:f392fc9709a3 185 *
AnnaBridge 189:f392fc9709a3 186 * @param[in] obj The SPI object that holds the transfer information
AnnaBridge 189:f392fc9709a3 187 * @param[in] tx The transmit buffer
AnnaBridge 189:f392fc9709a3 188 * @param[in] tx_length The number of bytes to transmit
AnnaBridge 189:f392fc9709a3 189 * @param[in] rx The receive buffer
AnnaBridge 189:f392fc9709a3 190 * @param[in] rx_length The number of bytes to receive
AnnaBridge 189:f392fc9709a3 191 * @param[in] bit_width The bit width of buffer words
AnnaBridge 189:f392fc9709a3 192 * @param[in] event The logical OR of events to be registered
AnnaBridge 189:f392fc9709a3 193 * @param[in] handler SPI interrupt handler
AnnaBridge 189:f392fc9709a3 194 * @param[in] hint A suggestion for how to use DMA with this transfer
AnnaBridge 189:f392fc9709a3 195 */
AnnaBridge 189:f392fc9709a3 196 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
AnnaBridge 189:f392fc9709a3 197
AnnaBridge 189:f392fc9709a3 198 /** The asynchronous IRQ handler
AnnaBridge 189:f392fc9709a3 199 *
AnnaBridge 189:f392fc9709a3 200 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
AnnaBridge 189:f392fc9709a3 201 * conditions, such as buffer overflows or transfer complete.
AnnaBridge 189:f392fc9709a3 202 * @param[in] obj The SPI object that holds the transfer information
AnnaBridge 189:f392fc9709a3 203 * @return Event flags if a transfer termination condition was met; otherwise 0.
AnnaBridge 189:f392fc9709a3 204 */
AnnaBridge 189:f392fc9709a3 205 uint32_t spi_irq_handler_asynch(spi_t *obj);
AnnaBridge 189:f392fc9709a3 206
AnnaBridge 189:f392fc9709a3 207 /** Attempts to determine if the SPI peripheral is already in use
AnnaBridge 189:f392fc9709a3 208 *
AnnaBridge 189:f392fc9709a3 209 * If a temporary DMA channel has been allocated, peripheral is in use.
AnnaBridge 189:f392fc9709a3 210 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
AnnaBridge 189:f392fc9709a3 211 * channel were allocated.
AnnaBridge 189:f392fc9709a3 212 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
AnnaBridge 189:f392fc9709a3 213 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
AnnaBridge 189:f392fc9709a3 214 * there are any bytes in the FIFOs.
AnnaBridge 189:f392fc9709a3 215 * @param[in] obj The SPI object to check for activity
AnnaBridge 189:f392fc9709a3 216 * @return Non-zero if the SPI port is active or zero if it is not.
AnnaBridge 189:f392fc9709a3 217 */
AnnaBridge 189:f392fc9709a3 218 uint8_t spi_active(spi_t *obj);
AnnaBridge 189:f392fc9709a3 219
AnnaBridge 189:f392fc9709a3 220 /** Abort an SPI transfer
AnnaBridge 189:f392fc9709a3 221 *
AnnaBridge 189:f392fc9709a3 222 * @param obj The SPI peripheral to stop
AnnaBridge 189:f392fc9709a3 223 */
AnnaBridge 189:f392fc9709a3 224 void spi_abort_asynch(spi_t *obj);
AnnaBridge 189:f392fc9709a3 225
AnnaBridge 189:f392fc9709a3 226
AnnaBridge 189:f392fc9709a3 227 #endif
AnnaBridge 189:f392fc9709a3 228
AnnaBridge 189:f392fc9709a3 229 /**@}*/
AnnaBridge 189:f392fc9709a3 230
AnnaBridge 189:f392fc9709a3 231 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 232 }
AnnaBridge 189:f392fc9709a3 233 #endif // __cplusplus
AnnaBridge 189:f392fc9709a3 234
AnnaBridge 189:f392fc9709a3 235 #endif // SPI_DEVICE
AnnaBridge 189:f392fc9709a3 236
AnnaBridge 189:f392fc9709a3 237 #endif // MBED_SPI_API_H
AnnaBridge 189:f392fc9709a3 238
AnnaBridge 189:f392fc9709a3 239 /** @}*/