mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
cmsis/BUILD/mbed/drivers/SPISlave.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 189:f392fc9709a3 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 189:f392fc9709a3 | 2 | * Copyright (c) 2006-2013 ARM Limited |
AnnaBridge | 189:f392fc9709a3 | 3 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 189:f392fc9709a3 | 4 | * |
AnnaBridge | 189:f392fc9709a3 | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 189:f392fc9709a3 | 6 | * you may not use this file except in compliance with the License. |
AnnaBridge | 189:f392fc9709a3 | 7 | * You may obtain a copy of the License at |
AnnaBridge | 189:f392fc9709a3 | 8 | * |
AnnaBridge | 189:f392fc9709a3 | 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 189:f392fc9709a3 | 10 | * |
AnnaBridge | 189:f392fc9709a3 | 11 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 189:f392fc9709a3 | 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 189:f392fc9709a3 | 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 189:f392fc9709a3 | 14 | * See the License for the specific language governing permissions and |
AnnaBridge | 189:f392fc9709a3 | 15 | * limitations under the License. |
AnnaBridge | 189:f392fc9709a3 | 16 | */ |
AnnaBridge | 189:f392fc9709a3 | 17 | #ifndef MBED_SPISLAVE_H |
AnnaBridge | 189:f392fc9709a3 | 18 | #define MBED_SPISLAVE_H |
AnnaBridge | 189:f392fc9709a3 | 19 | |
AnnaBridge | 189:f392fc9709a3 | 20 | #include "platform/platform.h" |
AnnaBridge | 189:f392fc9709a3 | 21 | #include "platform/NonCopyable.h" |
AnnaBridge | 189:f392fc9709a3 | 22 | |
AnnaBridge | 189:f392fc9709a3 | 23 | #if DEVICE_SPISLAVE || defined(DOXYGEN_ONLY) |
AnnaBridge | 189:f392fc9709a3 | 24 | |
AnnaBridge | 189:f392fc9709a3 | 25 | #include "hal/spi_api.h" |
AnnaBridge | 189:f392fc9709a3 | 26 | |
AnnaBridge | 189:f392fc9709a3 | 27 | namespace mbed { |
AnnaBridge | 189:f392fc9709a3 | 28 | /** \addtogroup drivers */ |
AnnaBridge | 189:f392fc9709a3 | 29 | |
AnnaBridge | 189:f392fc9709a3 | 30 | /** A SPI slave, used for communicating with a SPI master device. |
AnnaBridge | 189:f392fc9709a3 | 31 | * |
AnnaBridge | 189:f392fc9709a3 | 32 | * The default format is set to 8 bits, mode 0 and a clock frequency of 1MHz. |
AnnaBridge | 189:f392fc9709a3 | 33 | * |
AnnaBridge | 189:f392fc9709a3 | 34 | * @note Synchronization level: Not protected |
AnnaBridge | 189:f392fc9709a3 | 35 | * |
AnnaBridge | 189:f392fc9709a3 | 36 | * Example of how to reply to a SPI master as slave: |
AnnaBridge | 189:f392fc9709a3 | 37 | * @code |
AnnaBridge | 189:f392fc9709a3 | 38 | * |
AnnaBridge | 189:f392fc9709a3 | 39 | * #include "mbed.h" |
AnnaBridge | 189:f392fc9709a3 | 40 | * |
AnnaBridge | 189:f392fc9709a3 | 41 | * SPISlave device(SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS); |
AnnaBridge | 189:f392fc9709a3 | 42 | * |
AnnaBridge | 189:f392fc9709a3 | 43 | * int main() { |
AnnaBridge | 189:f392fc9709a3 | 44 | * device.reply(0x00); // Prime SPI with first reply |
AnnaBridge | 189:f392fc9709a3 | 45 | * while(1) { |
AnnaBridge | 189:f392fc9709a3 | 46 | * if(device.receive()) { |
AnnaBridge | 189:f392fc9709a3 | 47 | * int v = device.read(); // Read byte from master |
AnnaBridge | 189:f392fc9709a3 | 48 | * v = (v + 1) % 0x100; // Add one to it, modulo 256 |
AnnaBridge | 189:f392fc9709a3 | 49 | * device.reply(v); // Make this the next reply |
AnnaBridge | 189:f392fc9709a3 | 50 | * } |
AnnaBridge | 189:f392fc9709a3 | 51 | * } |
AnnaBridge | 189:f392fc9709a3 | 52 | * } |
AnnaBridge | 189:f392fc9709a3 | 53 | * @endcode |
AnnaBridge | 189:f392fc9709a3 | 54 | * @ingroup drivers |
AnnaBridge | 189:f392fc9709a3 | 55 | */ |
AnnaBridge | 189:f392fc9709a3 | 56 | class SPISlave : private NonCopyable<SPISlave> { |
AnnaBridge | 189:f392fc9709a3 | 57 | |
AnnaBridge | 189:f392fc9709a3 | 58 | public: |
AnnaBridge | 189:f392fc9709a3 | 59 | |
AnnaBridge | 189:f392fc9709a3 | 60 | /** Create a SPI slave connected to the specified pins. |
AnnaBridge | 189:f392fc9709a3 | 61 | * |
AnnaBridge | 189:f392fc9709a3 | 62 | * @note Either mosi or miso can be specified as NC if not used. |
AnnaBridge | 189:f392fc9709a3 | 63 | * |
AnnaBridge | 189:f392fc9709a3 | 64 | * @param mosi SPI Master Out, Slave In pin. |
AnnaBridge | 189:f392fc9709a3 | 65 | * @param miso SPI Master In, Slave Out pin. |
AnnaBridge | 189:f392fc9709a3 | 66 | * @param sclk SPI Clock pin. |
AnnaBridge | 189:f392fc9709a3 | 67 | * @param ssel SPI Chip Select pin. |
AnnaBridge | 189:f392fc9709a3 | 68 | */ |
AnnaBridge | 189:f392fc9709a3 | 69 | SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel); |
AnnaBridge | 189:f392fc9709a3 | 70 | |
AnnaBridge | 189:f392fc9709a3 | 71 | /** Configure the data transmission format. |
AnnaBridge | 189:f392fc9709a3 | 72 | * |
AnnaBridge | 189:f392fc9709a3 | 73 | * @param bits Number of bits per SPI frame (4 - 16). |
AnnaBridge | 189:f392fc9709a3 | 74 | * @param mode Clock polarity and phase mode (0 - 3). |
AnnaBridge | 189:f392fc9709a3 | 75 | * |
AnnaBridge | 189:f392fc9709a3 | 76 | * @code |
AnnaBridge | 189:f392fc9709a3 | 77 | * mode | POL PHA |
AnnaBridge | 189:f392fc9709a3 | 78 | * -----+-------- |
AnnaBridge | 189:f392fc9709a3 | 79 | * 0 | 0 0 |
AnnaBridge | 189:f392fc9709a3 | 80 | * 1 | 0 1 |
AnnaBridge | 189:f392fc9709a3 | 81 | * 2 | 1 0 |
AnnaBridge | 189:f392fc9709a3 | 82 | * 3 | 1 1 |
AnnaBridge | 189:f392fc9709a3 | 83 | * @endcode |
AnnaBridge | 189:f392fc9709a3 | 84 | */ |
AnnaBridge | 189:f392fc9709a3 | 85 | void format(int bits, int mode = 0); |
AnnaBridge | 189:f392fc9709a3 | 86 | |
AnnaBridge | 189:f392fc9709a3 | 87 | /** Set the SPI bus clock frequency. |
AnnaBridge | 189:f392fc9709a3 | 88 | * |
AnnaBridge | 189:f392fc9709a3 | 89 | * @param hz Clock frequency in hz (default = 1MHz). |
AnnaBridge | 189:f392fc9709a3 | 90 | */ |
AnnaBridge | 189:f392fc9709a3 | 91 | void frequency(int hz = 1000000); |
AnnaBridge | 189:f392fc9709a3 | 92 | |
AnnaBridge | 189:f392fc9709a3 | 93 | /** Polls the SPI to see if data has been received. |
AnnaBridge | 189:f392fc9709a3 | 94 | * |
AnnaBridge | 189:f392fc9709a3 | 95 | * @return Presence of received data. |
AnnaBridge | 189:f392fc9709a3 | 96 | * @retval 0 No data waiting. |
AnnaBridge | 189:f392fc9709a3 | 97 | * @retval 1 Data waiting. |
AnnaBridge | 189:f392fc9709a3 | 98 | */ |
AnnaBridge | 189:f392fc9709a3 | 99 | int receive(void); |
AnnaBridge | 189:f392fc9709a3 | 100 | |
AnnaBridge | 189:f392fc9709a3 | 101 | /** Retrieve data from receive buffer as slave. |
AnnaBridge | 189:f392fc9709a3 | 102 | * |
AnnaBridge | 189:f392fc9709a3 | 103 | * @return The data in the receive buffer. |
AnnaBridge | 189:f392fc9709a3 | 104 | */ |
AnnaBridge | 189:f392fc9709a3 | 105 | int read(void); |
AnnaBridge | 189:f392fc9709a3 | 106 | |
AnnaBridge | 189:f392fc9709a3 | 107 | /** Fill the transmission buffer with the value to be written out |
AnnaBridge | 189:f392fc9709a3 | 108 | * as slave on the next received message from the master. |
AnnaBridge | 189:f392fc9709a3 | 109 | * |
AnnaBridge | 189:f392fc9709a3 | 110 | * @param value The data to be transmitted next. |
AnnaBridge | 189:f392fc9709a3 | 111 | */ |
AnnaBridge | 189:f392fc9709a3 | 112 | void reply(int value); |
AnnaBridge | 189:f392fc9709a3 | 113 | |
AnnaBridge | 189:f392fc9709a3 | 114 | #if !defined(DOXYGEN_ONLY) |
AnnaBridge | 189:f392fc9709a3 | 115 | |
AnnaBridge | 189:f392fc9709a3 | 116 | protected: |
AnnaBridge | 189:f392fc9709a3 | 117 | /* Internal SPI object identifying the resources */ |
AnnaBridge | 189:f392fc9709a3 | 118 | spi_t _spi; |
AnnaBridge | 189:f392fc9709a3 | 119 | |
AnnaBridge | 189:f392fc9709a3 | 120 | /* How many bits in an SPI frame */ |
AnnaBridge | 189:f392fc9709a3 | 121 | int _bits; |
AnnaBridge | 189:f392fc9709a3 | 122 | /* Clock phase and polarity */ |
AnnaBridge | 189:f392fc9709a3 | 123 | int _mode; |
AnnaBridge | 189:f392fc9709a3 | 124 | /* Clock frequency */ |
AnnaBridge | 189:f392fc9709a3 | 125 | int _hz; |
AnnaBridge | 189:f392fc9709a3 | 126 | |
AnnaBridge | 189:f392fc9709a3 | 127 | #endif //!defined(DOXYGEN_ONLY) |
AnnaBridge | 189:f392fc9709a3 | 128 | }; |
AnnaBridge | 189:f392fc9709a3 | 129 | |
AnnaBridge | 189:f392fc9709a3 | 130 | } // namespace mbed |
AnnaBridge | 189:f392fc9709a3 | 131 | |
AnnaBridge | 189:f392fc9709a3 | 132 | #endif |
AnnaBridge | 189:f392fc9709a3 | 133 | |
AnnaBridge | 189:f392fc9709a3 | 134 | #endif |