mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/hal/TARGET_NXP/TARGET_LPC43XX/analogin_api.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
- Child:
- 148:21d94c44109e
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | * |
<> | 144:ef7eb2e8f9f7 | 16 | * Ported to NXP LPC43XX by Micromint USA <support@micromint.com> |
<> | 144:ef7eb2e8f9f7 | 17 | */ |
<> | 144:ef7eb2e8f9f7 | 18 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 19 | #include "analogin_api.h" |
<> | 144:ef7eb2e8f9f7 | 20 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 21 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 22 | #include "mbed_error.h" |
<> | 144:ef7eb2e8f9f7 | 23 | #include "gpio_api.h" |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | #define ANALOGIN_MEDIAN_FILTER 1 |
<> | 144:ef7eb2e8f9f7 | 26 | |
<> | 144:ef7eb2e8f9f7 | 27 | static inline int div_round_up(int x, int y) { |
<> | 144:ef7eb2e8f9f7 | 28 | return (x + (y - 1)) / y; |
<> | 144:ef7eb2e8f9f7 | 29 | } |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | static const PinMap PinMap_ADC[] = { |
<> | 144:ef7eb2e8f9f7 | 32 | {P4_3, ADC0_0, 0}, |
<> | 144:ef7eb2e8f9f7 | 33 | {P4_1, ADC0_1, 0}, |
<> | 144:ef7eb2e8f9f7 | 34 | {PF_8, ADC0_2, 0}, |
<> | 144:ef7eb2e8f9f7 | 35 | {P7_5, ADC0_3, 0}, |
<> | 144:ef7eb2e8f9f7 | 36 | {P7_4, ADC0_4, 0}, |
<> | 144:ef7eb2e8f9f7 | 37 | {PF_10, ADC0_5, 0}, |
<> | 144:ef7eb2e8f9f7 | 38 | {PB_6, ADC0_6, 0}, |
<> | 144:ef7eb2e8f9f7 | 39 | {PC_3, ADC1_0, 0}, |
<> | 144:ef7eb2e8f9f7 | 40 | {PC_0, ADC1_1, 0}, |
<> | 144:ef7eb2e8f9f7 | 41 | {PF_9, ADC1_2, 0}, |
<> | 144:ef7eb2e8f9f7 | 42 | {PF_6, ADC1_3, 0}, |
<> | 144:ef7eb2e8f9f7 | 43 | {PF_5, ADC1_4, 0}, |
<> | 144:ef7eb2e8f9f7 | 44 | {PF_11, ADC1_5, 0}, |
<> | 144:ef7eb2e8f9f7 | 45 | {P7_7, ADC1_6, 0}, |
<> | 144:ef7eb2e8f9f7 | 46 | {PF_7, ADC1_7, 0}, |
<> | 144:ef7eb2e8f9f7 | 47 | {NC, NC, 0 } |
<> | 144:ef7eb2e8f9f7 | 48 | }; |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | void analogin_init(analogin_t *obj, PinName pin) { |
<> | 144:ef7eb2e8f9f7 | 51 | ADCName name; |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | name = (ADCName)pinmap_peripheral(pin, PinMap_ADC); |
<> | 144:ef7eb2e8f9f7 | 54 | MBED_ASSERT(obj->adc != (LPC_ADC_T *)NC); |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | // Set ADC register, number and channel |
<> | 144:ef7eb2e8f9f7 | 57 | obj->num = (name >> ADC0_7) ? 1 : 0; |
<> | 144:ef7eb2e8f9f7 | 58 | obj->ch = name % (ADC0_7 + 1); |
<> | 144:ef7eb2e8f9f7 | 59 | obj->adc = (LPC_ADC_T *) (obj->num > 0) ? LPC_ADC1 : LPC_ADC0; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | // Reset pin function to GPIO |
<> | 144:ef7eb2e8f9f7 | 62 | gpio_set(pin); |
<> | 144:ef7eb2e8f9f7 | 63 | // Select ADC on analog function select register in SCU |
<> | 144:ef7eb2e8f9f7 | 64 | LPC_SCU->ENAIO[obj->num] |= (1 << obj->ch); |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | // Calculate minimum clock divider |
<> | 144:ef7eb2e8f9f7 | 67 | // clkdiv = divider - 1 |
<> | 144:ef7eb2e8f9f7 | 68 | uint32_t PCLK = SystemCoreClock; |
<> | 144:ef7eb2e8f9f7 | 69 | uint32_t adcRate = 400000; |
<> | 144:ef7eb2e8f9f7 | 70 | uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1; |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | // Set the generic software-controlled ADC settings |
<> | 144:ef7eb2e8f9f7 | 73 | obj->adc->CR = (0 << 0) // SEL: 0 = no channels selected |
<> | 144:ef7eb2e8f9f7 | 74 | | (clkdiv << 8) // CLKDIV: |
<> | 144:ef7eb2e8f9f7 | 75 | | (0 << 16) // BURST: 0 = software control |
<> | 144:ef7eb2e8f9f7 | 76 | | (1 << 21) // PDN: 1 = operational |
<> | 144:ef7eb2e8f9f7 | 77 | | (0 << 24) // START: 0 = no start |
<> | 144:ef7eb2e8f9f7 | 78 | | (0 << 27); // EDGE: not applicable |
<> | 144:ef7eb2e8f9f7 | 79 | } |
<> | 144:ef7eb2e8f9f7 | 80 | |
<> | 144:ef7eb2e8f9f7 | 81 | static inline uint32_t adc_read(analogin_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 82 | uint32_t temp; |
<> | 144:ef7eb2e8f9f7 | 83 | uint8_t channel = obj->ch; |
<> | 144:ef7eb2e8f9f7 | 84 | LPC_ADC_T *pADC = obj->adc; |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | // Select the appropriate channel and start conversion |
<> | 144:ef7eb2e8f9f7 | 87 | pADC->CR |= ADC_CR_CH_SEL(channel); |
<> | 144:ef7eb2e8f9f7 | 88 | temp = pADC->CR & ~ADC_CR_START_MASK; |
<> | 144:ef7eb2e8f9f7 | 89 | pADC->CR = temp | (ADC_CR_START_MODE_SEL(ADC_START_NOW)); |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | // Wait for DONE bit and read data |
<> | 144:ef7eb2e8f9f7 | 92 | while (!(pADC->STAT & ADC_CR_CH_SEL(channel))); |
<> | 144:ef7eb2e8f9f7 | 93 | temp = pADC->DR[channel]; |
<> | 144:ef7eb2e8f9f7 | 94 | |
<> | 144:ef7eb2e8f9f7 | 95 | // Deselect channel and return result |
<> | 144:ef7eb2e8f9f7 | 96 | pADC->CR &= ~ADC_CR_START_MASK; |
<> | 144:ef7eb2e8f9f7 | 97 | pADC->CR &= ~ADC_CR_CH_SEL(channel); |
<> | 144:ef7eb2e8f9f7 | 98 | return ADC_DR_RESULT(temp); |
<> | 144:ef7eb2e8f9f7 | 99 | } |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | static inline void order(uint32_t *a, uint32_t *b) { |
<> | 144:ef7eb2e8f9f7 | 102 | if (*a > *b) { |
<> | 144:ef7eb2e8f9f7 | 103 | uint32_t t = *a; |
<> | 144:ef7eb2e8f9f7 | 104 | *a = *b; |
<> | 144:ef7eb2e8f9f7 | 105 | *b = t; |
<> | 144:ef7eb2e8f9f7 | 106 | } |
<> | 144:ef7eb2e8f9f7 | 107 | } |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | static inline uint32_t adc_read_u32(analogin_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 110 | uint32_t value; |
<> | 144:ef7eb2e8f9f7 | 111 | #if ANALOGIN_MEDIAN_FILTER |
<> | 144:ef7eb2e8f9f7 | 112 | uint32_t v1 = adc_read(obj); |
<> | 144:ef7eb2e8f9f7 | 113 | uint32_t v2 = adc_read(obj); |
<> | 144:ef7eb2e8f9f7 | 114 | uint32_t v3 = adc_read(obj); |
<> | 144:ef7eb2e8f9f7 | 115 | order(&v1, &v2); |
<> | 144:ef7eb2e8f9f7 | 116 | order(&v2, &v3); |
<> | 144:ef7eb2e8f9f7 | 117 | order(&v1, &v2); |
<> | 144:ef7eb2e8f9f7 | 118 | value = v2; |
<> | 144:ef7eb2e8f9f7 | 119 | #else |
<> | 144:ef7eb2e8f9f7 | 120 | value = adc_read(obj); |
<> | 144:ef7eb2e8f9f7 | 121 | #endif |
<> | 144:ef7eb2e8f9f7 | 122 | return value; |
<> | 144:ef7eb2e8f9f7 | 123 | } |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | uint16_t analogin_read_u16(analogin_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 126 | uint32_t value = adc_read_u32(obj); |
<> | 144:ef7eb2e8f9f7 | 127 | |
<> | 144:ef7eb2e8f9f7 | 128 | return (value << 6) | ((value >> 4) & 0x003F); // 10 bit |
<> | 144:ef7eb2e8f9f7 | 129 | } |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | float analogin_read(analogin_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 132 | uint32_t value = adc_read_u32(obj); |
<> | 144:ef7eb2e8f9f7 | 133 | return (float)value * (1.0f / (float)ADC_RANGE); |
<> | 144:ef7eb2e8f9f7 | 134 | } |