mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_NXP/TARGET_LPC43XX/analogin_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 0:9b334a45a8ff 17 */
bogdanm 0:9b334a45a8ff 18 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 19 #include "analogin_api.h"
bogdanm 0:9b334a45a8ff 20 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 21 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 22 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 23 #include "gpio_api.h"
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 static inline int div_round_up(int x, int y) {
bogdanm 0:9b334a45a8ff 28 return (x + (y - 1)) / y;
bogdanm 0:9b334a45a8ff 29 }
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 static const PinMap PinMap_ADC[] = {
bogdanm 0:9b334a45a8ff 32 {P4_3, ADC0_0, 0},
bogdanm 0:9b334a45a8ff 33 {P4_1, ADC0_1, 0},
bogdanm 0:9b334a45a8ff 34 {PF_8, ADC0_2, 0},
bogdanm 0:9b334a45a8ff 35 {P7_5, ADC0_3, 0},
bogdanm 0:9b334a45a8ff 36 {P7_4, ADC0_4, 0},
bogdanm 0:9b334a45a8ff 37 {PF_10, ADC0_5, 0},
bogdanm 0:9b334a45a8ff 38 {PB_6, ADC0_6, 0},
bogdanm 0:9b334a45a8ff 39 {PC_3, ADC1_0, 0},
bogdanm 0:9b334a45a8ff 40 {PC_0, ADC1_1, 0},
bogdanm 0:9b334a45a8ff 41 {PF_9, ADC1_2, 0},
bogdanm 0:9b334a45a8ff 42 {PF_6, ADC1_3, 0},
bogdanm 0:9b334a45a8ff 43 {PF_5, ADC1_4, 0},
bogdanm 0:9b334a45a8ff 44 {PF_11, ADC1_5, 0},
bogdanm 0:9b334a45a8ff 45 {P7_7, ADC1_6, 0},
bogdanm 0:9b334a45a8ff 46 {PF_7, ADC1_7, 0},
bogdanm 0:9b334a45a8ff 47 {NC, NC, 0 }
bogdanm 0:9b334a45a8ff 48 };
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 0:9b334a45a8ff 51 ADCName name;
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 name = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 54 MBED_ASSERT(obj->adc != (LPC_ADC_T *)NC);
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 // Set ADC register, number and channel
bogdanm 0:9b334a45a8ff 57 obj->num = (name >> ADC0_7) ? 1 : 0;
bogdanm 0:9b334a45a8ff 58 obj->ch = name % (ADC0_7 + 1);
bogdanm 0:9b334a45a8ff 59 obj->adc = (LPC_ADC_T *) (obj->num > 0) ? LPC_ADC1 : LPC_ADC0;
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 // Reset pin function to GPIO
bogdanm 0:9b334a45a8ff 62 gpio_set(pin);
bogdanm 0:9b334a45a8ff 63 // Select ADC on analog function select register in SCU
bogdanm 0:9b334a45a8ff 64 LPC_SCU->ENAIO[obj->num] |= (1 << obj->ch);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // Calculate minimum clock divider
bogdanm 0:9b334a45a8ff 67 // clkdiv = divider - 1
bogdanm 0:9b334a45a8ff 68 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 69 uint32_t adcRate = 400000;
bogdanm 0:9b334a45a8ff 70 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // Set the generic software-controlled ADC settings
bogdanm 0:9b334a45a8ff 73 obj->adc->CR = (0 << 0) // SEL: 0 = no channels selected
bogdanm 0:9b334a45a8ff 74 | (clkdiv << 8) // CLKDIV:
bogdanm 0:9b334a45a8ff 75 | (0 << 16) // BURST: 0 = software control
bogdanm 0:9b334a45a8ff 76 | (1 << 21) // PDN: 1 = operational
bogdanm 0:9b334a45a8ff 77 | (0 << 24) // START: 0 = no start
bogdanm 0:9b334a45a8ff 78 | (0 << 27); // EDGE: not applicable
bogdanm 0:9b334a45a8ff 79 }
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 static inline uint32_t adc_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 82 uint32_t temp;
bogdanm 0:9b334a45a8ff 83 uint8_t channel = obj->ch;
bogdanm 0:9b334a45a8ff 84 LPC_ADC_T *pADC = obj->adc;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // Select the appropriate channel and start conversion
bogdanm 0:9b334a45a8ff 87 pADC->CR |= ADC_CR_CH_SEL(channel);
bogdanm 0:9b334a45a8ff 88 temp = pADC->CR & ~ADC_CR_START_MASK;
bogdanm 0:9b334a45a8ff 89 pADC->CR = temp | (ADC_CR_START_MODE_SEL(ADC_START_NOW));
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 // Wait for DONE bit and read data
bogdanm 0:9b334a45a8ff 92 while (!(pADC->STAT & ADC_CR_CH_SEL(channel)));
bogdanm 0:9b334a45a8ff 93 temp = pADC->DR[channel];
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 // Deselect channel and return result
bogdanm 0:9b334a45a8ff 96 pADC->CR &= ~ADC_CR_START_MASK;
bogdanm 0:9b334a45a8ff 97 pADC->CR &= ~ADC_CR_CH_SEL(channel);
bogdanm 0:9b334a45a8ff 98 return ADC_DR_RESULT(temp);
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 0:9b334a45a8ff 102 if (*a > *b) {
bogdanm 0:9b334a45a8ff 103 uint32_t t = *a;
bogdanm 0:9b334a45a8ff 104 *a = *b;
bogdanm 0:9b334a45a8ff 105 *b = t;
bogdanm 0:9b334a45a8ff 106 }
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 110 uint32_t value;
bogdanm 0:9b334a45a8ff 111 #if ANALOGIN_MEDIAN_FILTER
bogdanm 0:9b334a45a8ff 112 uint32_t v1 = adc_read(obj);
bogdanm 0:9b334a45a8ff 113 uint32_t v2 = adc_read(obj);
bogdanm 0:9b334a45a8ff 114 uint32_t v3 = adc_read(obj);
bogdanm 0:9b334a45a8ff 115 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 116 order(&v2, &v3);
bogdanm 0:9b334a45a8ff 117 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 118 value = v2;
bogdanm 0:9b334a45a8ff 119 #else
bogdanm 0:9b334a45a8ff 120 value = adc_read(obj);
bogdanm 0:9b334a45a8ff 121 #endif
bogdanm 0:9b334a45a8ff 122 return value;
bogdanm 0:9b334a45a8ff 123 }
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 126 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 float analogin_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 132 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 133 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 0:9b334a45a8ff 134 }