mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_swpmi.c@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
149:156823d33999
Child:
181:57724642e740
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_ll_swpmi.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.7.1
AnnaBridge 167:e84263d55307 6 * @date 21-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief SWPMI LL module driver.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37 #if defined(USE_FULL_LL_DRIVER)
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 40 #include "stm32l4xx_ll_swpmi.h"
<> 144:ef7eb2e8f9f7 41 #include "stm32l4xx_ll_bus.h"
<> 144:ef7eb2e8f9f7 42 #ifdef USE_FULL_ASSERT
<> 144:ef7eb2e8f9f7 43 #include "stm32_assert.h"
<> 144:ef7eb2e8f9f7 44 #else
<> 144:ef7eb2e8f9f7 45 #define assert_param(expr) ((void)0U)
<> 144:ef7eb2e8f9f7 46 #endif
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /** @addtogroup STM32L4xx_LL_Driver
<> 144:ef7eb2e8f9f7 49 * @{
<> 144:ef7eb2e8f9f7 50 */
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 #if defined (SWPMI1)
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /** @addtogroup SWPMI_LL
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 62 /** @addtogroup SWPMI_LL_Private_Macros
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #define IS_LL_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63))
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 #define IS_LL_SWPMI_SW_BUFFER_RX(__VALUE__) (((__VALUE__) == LL_SWPMI_SW_BUFFER_RX_SINGLE) \
<> 144:ef7eb2e8f9f7 69 || ((__VALUE__) == LL_SWPMI_SW_BUFFER_RX_MULTI))
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 #define IS_LL_SWPMI_SW_BUFFER_TX(__VALUE__) (((__VALUE__) == LL_SWPMI_SW_BUFFER_TX_SINGLE) \
<> 144:ef7eb2e8f9f7 72 || ((__VALUE__) == LL_SWPMI_SW_BUFFER_TX_MULTI))
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 #define IS_LL_SWPMI_VOLTAGE_CLASS(__VALUE__) (((__VALUE__) == LL_SWPMI_VOLTAGE_CLASS_C) \
<> 144:ef7eb2e8f9f7 75 || ((__VALUE__) == LL_SWPMI_VOLTAGE_CLASS_B))
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /**
<> 144:ef7eb2e8f9f7 78 * @}
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 84 /** @addtogroup SWPMI_LL_Exported_Functions
<> 144:ef7eb2e8f9f7 85 * @{
<> 144:ef7eb2e8f9f7 86 */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /** @addtogroup SWPMI_LL_EF_Init
<> 144:ef7eb2e8f9f7 89 * @{
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /**
<> 144:ef7eb2e8f9f7 93 * @brief De-initialize the SWPMI peripheral registers to their default reset values.
<> 144:ef7eb2e8f9f7 94 * @param SWPMIx SWPMI Instance
<> 144:ef7eb2e8f9f7 95 * @retval An ErrorStatus enumeration value
<> 144:ef7eb2e8f9f7 96 * - SUCCESS: SWPMI registers are de-initialized
<> 144:ef7eb2e8f9f7 97 * - ERROR: Not applicable
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 ErrorStatus LL_SWPMI_DeInit(SWPMI_TypeDef *SWPMIx)
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 /* Check the parameter */
<> 144:ef7eb2e8f9f7 102 assert_param(IS_SWPMI_INSTANCE(SWPMIx));
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_SWPMI1);
<> 144:ef7eb2e8f9f7 105 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_SWPMI1);
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 return SUCCESS;
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @brief Initialize the SWPMI peripheral according to the specified parameters in the SWPMI_InitStruct.
<> 144:ef7eb2e8f9f7 112 * @note As some bits in SWPMI configuration registers can only be written when the SWPMI is deactivated (SWPMI_CR_SWPACT bit = 0),
<> 144:ef7eb2e8f9f7 113 * SWPMI IP should be in deactivated state prior calling this function. Otherwise, ERROR result will be returned.
<> 144:ef7eb2e8f9f7 114 * @param SWPMIx SWPMI Instance
<> 144:ef7eb2e8f9f7 115 * @param SWPMI_InitStruct pointer to a @ref LL_SWPMI_InitTypeDef structure that contains
<> 144:ef7eb2e8f9f7 116 * the configuration information for the SWPMI peripheral.
<> 144:ef7eb2e8f9f7 117 * @retval An ErrorStatus enumeration value
<> 144:ef7eb2e8f9f7 118 * - SUCCESS: SWPMI registers are initialized
<> 144:ef7eb2e8f9f7 119 * - ERROR: SWPMI registers are not initialized
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121 ErrorStatus LL_SWPMI_Init(SWPMI_TypeDef *SWPMIx, LL_SWPMI_InitTypeDef *SWPMI_InitStruct)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 ErrorStatus status = SUCCESS;
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /* Check the parameters */
<> 144:ef7eb2e8f9f7 126 assert_param(IS_SWPMI_INSTANCE(SWPMIx));
<> 144:ef7eb2e8f9f7 127 assert_param(IS_LL_SWPMI_BITRATE_VALUE(SWPMI_InitStruct->BitRatePrescaler));
<> 144:ef7eb2e8f9f7 128 assert_param(IS_LL_SWPMI_SW_BUFFER_TX(SWPMI_InitStruct->TxBufferingMode));
<> 144:ef7eb2e8f9f7 129 assert_param(IS_LL_SWPMI_SW_BUFFER_RX(SWPMI_InitStruct->RxBufferingMode));
<> 144:ef7eb2e8f9f7 130 assert_param(IS_LL_SWPMI_VOLTAGE_CLASS(SWPMI_InitStruct->VoltageClass));
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /* SWPMI needs to be in deactivated state, in order to be able to configure some bits */
<> 144:ef7eb2e8f9f7 133 if (LL_SWPMI_IsActivated(SWPMIx) == 0)
<> 144:ef7eb2e8f9f7 134 {
<> 144:ef7eb2e8f9f7 135 /* Configure the BRR register (Bitrate) */
<> 144:ef7eb2e8f9f7 136 LL_SWPMI_SetBitRatePrescaler(SWPMIx, SWPMI_InitStruct->BitRatePrescaler);
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /* Configure the voltage class */
<> 144:ef7eb2e8f9f7 139 LL_SWPMI_SetVoltageClass(SWPMIx, SWPMI_InitStruct->VoltageClass);
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /* Set the new configuration of the SWPMI peripheral */
<> 144:ef7eb2e8f9f7 142 MODIFY_REG(SWPMIx->CR,
<> 144:ef7eb2e8f9f7 143 (SWPMI_CR_RXMODE | SWPMI_CR_TXMODE),
<> 144:ef7eb2e8f9f7 144 (SWPMI_InitStruct->TxBufferingMode | SWPMI_InitStruct->RxBufferingMode));
<> 144:ef7eb2e8f9f7 145 }
<> 144:ef7eb2e8f9f7 146 /* Else (SWPMI not in deactivated state => return ERROR) */
<> 144:ef7eb2e8f9f7 147 else
<> 144:ef7eb2e8f9f7 148 {
<> 144:ef7eb2e8f9f7 149 status = ERROR;
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 return status;
<> 144:ef7eb2e8f9f7 153 }
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /**
<> 144:ef7eb2e8f9f7 156 * @brief Set each @ref LL_SWPMI_InitTypeDef field to default value.
<> 144:ef7eb2e8f9f7 157 * @param SWPMI_InitStruct pointer to a @ref LL_SWPMI_InitTypeDef structure that contains
<> 144:ef7eb2e8f9f7 158 * the configuration information for the SWPMI peripheral.
<> 144:ef7eb2e8f9f7 159 * @retval None
<> 144:ef7eb2e8f9f7 160 */
<> 144:ef7eb2e8f9f7 161 void LL_SWPMI_StructInit(LL_SWPMI_InitTypeDef *SWPMI_InitStruct)
<> 144:ef7eb2e8f9f7 162 {
<> 144:ef7eb2e8f9f7 163 /* Set SWPMI_InitStruct fields to default values */
<> 144:ef7eb2e8f9f7 164 SWPMI_InitStruct->VoltageClass = LL_SWPMI_VOLTAGE_CLASS_C;
<> 144:ef7eb2e8f9f7 165 SWPMI_InitStruct->BitRatePrescaler = (uint32_t)0x00000001;
<> 144:ef7eb2e8f9f7 166 SWPMI_InitStruct->TxBufferingMode = LL_SWPMI_SW_BUFFER_TX_SINGLE;
<> 144:ef7eb2e8f9f7 167 SWPMI_InitStruct->RxBufferingMode = LL_SWPMI_SW_BUFFER_RX_SINGLE;
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /**
<> 144:ef7eb2e8f9f7 171 * @}
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /**
<> 144:ef7eb2e8f9f7 175 * @}
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /**
<> 144:ef7eb2e8f9f7 179 * @}
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 #endif /* defined (SWPMI1) */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 #endif /* USE_FULL_LL_DRIVER */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/