mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_dac.h@167:e84263d55307, 2017-06-21 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Jun 21 17:46:44 2017 +0100
- Revision:
- 167:e84263d55307
This updates the lib to the mbed lib v 145
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 167:e84263d55307 | 1 | /** |
AnnaBridge | 167:e84263d55307 | 2 | ****************************************************************************** |
AnnaBridge | 167:e84263d55307 | 3 | * @file stm32f2xx_ll_dac.h |
AnnaBridge | 167:e84263d55307 | 4 | * @author MCD Application Team |
AnnaBridge | 167:e84263d55307 | 5 | * @version V1.2.1 |
AnnaBridge | 167:e84263d55307 | 6 | * @date 14-April-2017 |
AnnaBridge | 167:e84263d55307 | 7 | * @brief Header file of DAC LL module. |
AnnaBridge | 167:e84263d55307 | 8 | ****************************************************************************** |
AnnaBridge | 167:e84263d55307 | 9 | * @attention |
AnnaBridge | 167:e84263d55307 | 10 | * |
AnnaBridge | 167:e84263d55307 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 167:e84263d55307 | 12 | * |
AnnaBridge | 167:e84263d55307 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 167:e84263d55307 | 14 | * are permitted provided that the following conditions are met: |
AnnaBridge | 167:e84263d55307 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 167:e84263d55307 | 16 | * this list of conditions and the following disclaimer. |
AnnaBridge | 167:e84263d55307 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 167:e84263d55307 | 18 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 167:e84263d55307 | 19 | * and/or other materials provided with the distribution. |
AnnaBridge | 167:e84263d55307 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 167:e84263d55307 | 21 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 167:e84263d55307 | 22 | * without specific prior written permission. |
AnnaBridge | 167:e84263d55307 | 23 | * |
AnnaBridge | 167:e84263d55307 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 167:e84263d55307 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 167:e84263d55307 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 167:e84263d55307 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 167:e84263d55307 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 167:e84263d55307 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 167:e84263d55307 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 167:e84263d55307 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 167:e84263d55307 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 167:e84263d55307 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 167:e84263d55307 | 34 | * |
AnnaBridge | 167:e84263d55307 | 35 | ****************************************************************************** |
AnnaBridge | 167:e84263d55307 | 36 | */ |
AnnaBridge | 167:e84263d55307 | 37 | |
AnnaBridge | 167:e84263d55307 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 39 | #ifndef __STM32F2xx_LL_DAC_H |
AnnaBridge | 167:e84263d55307 | 40 | #define __STM32F2xx_LL_DAC_H |
AnnaBridge | 167:e84263d55307 | 41 | |
AnnaBridge | 167:e84263d55307 | 42 | #ifdef __cplusplus |
AnnaBridge | 167:e84263d55307 | 43 | extern "C" { |
AnnaBridge | 167:e84263d55307 | 44 | #endif |
AnnaBridge | 167:e84263d55307 | 45 | |
AnnaBridge | 167:e84263d55307 | 46 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 47 | #include "stm32f2xx.h" |
AnnaBridge | 167:e84263d55307 | 48 | |
AnnaBridge | 167:e84263d55307 | 49 | /** @addtogroup STM32F2xx_LL_Driver |
AnnaBridge | 167:e84263d55307 | 50 | * @{ |
AnnaBridge | 167:e84263d55307 | 51 | */ |
AnnaBridge | 167:e84263d55307 | 52 | |
AnnaBridge | 167:e84263d55307 | 53 | #if defined(DAC) |
AnnaBridge | 167:e84263d55307 | 54 | |
AnnaBridge | 167:e84263d55307 | 55 | /** @defgroup DAC_LL DAC |
AnnaBridge | 167:e84263d55307 | 56 | * @{ |
AnnaBridge | 167:e84263d55307 | 57 | */ |
AnnaBridge | 167:e84263d55307 | 58 | |
AnnaBridge | 167:e84263d55307 | 59 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 60 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 61 | |
AnnaBridge | 167:e84263d55307 | 62 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 63 | /** @defgroup DAC_LL_Private_Constants DAC Private Constants |
AnnaBridge | 167:e84263d55307 | 64 | * @{ |
AnnaBridge | 167:e84263d55307 | 65 | */ |
AnnaBridge | 167:e84263d55307 | 66 | |
AnnaBridge | 167:e84263d55307 | 67 | /* Internal masks for DAC channels definition */ |
AnnaBridge | 167:e84263d55307 | 68 | /* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */ |
AnnaBridge | 167:e84263d55307 | 69 | /* - channel bits position into register CR */ |
AnnaBridge | 167:e84263d55307 | 70 | /* - channel bits position into register SWTRIG */ |
AnnaBridge | 167:e84263d55307 | 71 | /* - channel register offset of data holding register DHRx */ |
AnnaBridge | 167:e84263d55307 | 72 | /* - channel register offset of data output register DORx */ |
AnnaBridge | 167:e84263d55307 | 73 | #define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */ |
AnnaBridge | 167:e84263d55307 | 74 | #define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */ |
AnnaBridge | 167:e84263d55307 | 75 | #define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET) |
AnnaBridge | 167:e84263d55307 | 76 | |
AnnaBridge | 167:e84263d55307 | 77 | #define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */ |
AnnaBridge | 167:e84263d55307 | 78 | #define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */ |
AnnaBridge | 167:e84263d55307 | 79 | #define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 | DAC_SWTR_CH2) |
AnnaBridge | 167:e84263d55307 | 80 | |
AnnaBridge | 167:e84263d55307 | 81 | #define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */ |
AnnaBridge | 167:e84263d55307 | 82 | #define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */ |
AnnaBridge | 167:e84263d55307 | 83 | #define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */ |
AnnaBridge | 167:e84263d55307 | 84 | #define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */ |
AnnaBridge | 167:e84263d55307 | 85 | #define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */ |
AnnaBridge | 167:e84263d55307 | 86 | #define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */ |
AnnaBridge | 167:e84263d55307 | 87 | #define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U |
AnnaBridge | 167:e84263d55307 | 88 | #define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U |
AnnaBridge | 167:e84263d55307 | 89 | #define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U |
AnnaBridge | 167:e84263d55307 | 90 | #define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 91 | |
AnnaBridge | 167:e84263d55307 | 92 | #define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */ |
AnnaBridge | 167:e84263d55307 | 93 | #define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */ |
AnnaBridge | 167:e84263d55307 | 94 | #define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET) |
AnnaBridge | 167:e84263d55307 | 95 | |
AnnaBridge | 167:e84263d55307 | 96 | /* DAC registers bits positions */ |
AnnaBridge | 167:e84263d55307 | 97 | #define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */ |
AnnaBridge | 167:e84263d55307 | 98 | #define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */ |
AnnaBridge | 167:e84263d55307 | 99 | #define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */ |
AnnaBridge | 167:e84263d55307 | 100 | |
AnnaBridge | 167:e84263d55307 | 101 | /* Miscellaneous data */ |
AnnaBridge | 167:e84263d55307 | 102 | #define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */ |
AnnaBridge | 167:e84263d55307 | 103 | |
AnnaBridge | 167:e84263d55307 | 104 | /** |
AnnaBridge | 167:e84263d55307 | 105 | * @} |
AnnaBridge | 167:e84263d55307 | 106 | */ |
AnnaBridge | 167:e84263d55307 | 107 | |
AnnaBridge | 167:e84263d55307 | 108 | |
AnnaBridge | 167:e84263d55307 | 109 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 110 | /** @defgroup DAC_LL_Private_Macros DAC Private Macros |
AnnaBridge | 167:e84263d55307 | 111 | * @{ |
AnnaBridge | 167:e84263d55307 | 112 | */ |
AnnaBridge | 167:e84263d55307 | 113 | |
AnnaBridge | 167:e84263d55307 | 114 | /** |
AnnaBridge | 167:e84263d55307 | 115 | * @brief Driver macro reserved for internal use: isolate bits with the |
AnnaBridge | 167:e84263d55307 | 116 | * selected mask and shift them to the register LSB |
AnnaBridge | 167:e84263d55307 | 117 | * (shift mask on register position bit 0). |
AnnaBridge | 167:e84263d55307 | 118 | * @param __BITS__ Bits in register 32 bits |
AnnaBridge | 167:e84263d55307 | 119 | * @param __MASK__ Mask in register 32 bits |
AnnaBridge | 167:e84263d55307 | 120 | * @retval Bits in register 32 bits |
AnnaBridge | 167:e84263d55307 | 121 | */ |
AnnaBridge | 167:e84263d55307 | 122 | #define __DAC_MASK_SHIFT(__BITS__, __MASK__) \ |
AnnaBridge | 167:e84263d55307 | 123 | (((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__))) |
AnnaBridge | 167:e84263d55307 | 124 | |
AnnaBridge | 167:e84263d55307 | 125 | /** |
AnnaBridge | 167:e84263d55307 | 126 | * @brief Driver macro reserved for internal use: set a pointer to |
AnnaBridge | 167:e84263d55307 | 127 | * a register from a register basis from which an offset |
AnnaBridge | 167:e84263d55307 | 128 | * is applied. |
AnnaBridge | 167:e84263d55307 | 129 | * @param __REG__ Register basis from which the offset is applied. |
AnnaBridge | 167:e84263d55307 | 130 | * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers). |
AnnaBridge | 167:e84263d55307 | 131 | * @retval Pointer to register address |
AnnaBridge | 167:e84263d55307 | 132 | */ |
AnnaBridge | 167:e84263d55307 | 133 | #define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ |
AnnaBridge | 167:e84263d55307 | 134 | ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U)))) |
AnnaBridge | 167:e84263d55307 | 135 | |
AnnaBridge | 167:e84263d55307 | 136 | /** |
AnnaBridge | 167:e84263d55307 | 137 | * @} |
AnnaBridge | 167:e84263d55307 | 138 | */ |
AnnaBridge | 167:e84263d55307 | 139 | |
AnnaBridge | 167:e84263d55307 | 140 | |
AnnaBridge | 167:e84263d55307 | 141 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 142 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 167:e84263d55307 | 143 | /** @defgroup DAC_LL_ES_INIT DAC Exported Init structure |
AnnaBridge | 167:e84263d55307 | 144 | * @{ |
AnnaBridge | 167:e84263d55307 | 145 | */ |
AnnaBridge | 167:e84263d55307 | 146 | |
AnnaBridge | 167:e84263d55307 | 147 | /** |
AnnaBridge | 167:e84263d55307 | 148 | * @brief Structure definition of some features of DAC instance. |
AnnaBridge | 167:e84263d55307 | 149 | */ |
AnnaBridge | 167:e84263d55307 | 150 | typedef struct |
AnnaBridge | 167:e84263d55307 | 151 | { |
AnnaBridge | 167:e84263d55307 | 152 | uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line). |
AnnaBridge | 167:e84263d55307 | 153 | This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE |
AnnaBridge | 167:e84263d55307 | 154 | |
AnnaBridge | 167:e84263d55307 | 155 | This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */ |
AnnaBridge | 167:e84263d55307 | 156 | |
AnnaBridge | 167:e84263d55307 | 157 | uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 158 | This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE |
AnnaBridge | 167:e84263d55307 | 159 | |
AnnaBridge | 167:e84263d55307 | 160 | This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */ |
AnnaBridge | 167:e84263d55307 | 161 | |
AnnaBridge | 167:e84263d55307 | 162 | uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 163 | If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS |
AnnaBridge | 167:e84263d55307 | 164 | If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE |
AnnaBridge | 167:e84263d55307 | 165 | @note If waveform automatic generation mode is disabled, this parameter is discarded. |
AnnaBridge | 167:e84263d55307 | 166 | |
AnnaBridge | 167:e84263d55307 | 167 | This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */ |
AnnaBridge | 167:e84263d55307 | 168 | |
AnnaBridge | 167:e84263d55307 | 169 | uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 170 | This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER |
AnnaBridge | 167:e84263d55307 | 171 | |
AnnaBridge | 167:e84263d55307 | 172 | This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */ |
AnnaBridge | 167:e84263d55307 | 173 | |
AnnaBridge | 167:e84263d55307 | 174 | } LL_DAC_InitTypeDef; |
AnnaBridge | 167:e84263d55307 | 175 | |
AnnaBridge | 167:e84263d55307 | 176 | /** |
AnnaBridge | 167:e84263d55307 | 177 | * @} |
AnnaBridge | 167:e84263d55307 | 178 | */ |
AnnaBridge | 167:e84263d55307 | 179 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 167:e84263d55307 | 180 | |
AnnaBridge | 167:e84263d55307 | 181 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 182 | /** @defgroup DAC_LL_Exported_Constants DAC Exported Constants |
AnnaBridge | 167:e84263d55307 | 183 | * @{ |
AnnaBridge | 167:e84263d55307 | 184 | */ |
AnnaBridge | 167:e84263d55307 | 185 | |
AnnaBridge | 167:e84263d55307 | 186 | /** @defgroup DAC_LL_EC_GET_FLAG DAC flags |
AnnaBridge | 167:e84263d55307 | 187 | * @brief Flags defines which can be used with LL_DAC_ReadReg function |
AnnaBridge | 167:e84263d55307 | 188 | * @{ |
AnnaBridge | 167:e84263d55307 | 189 | */ |
AnnaBridge | 167:e84263d55307 | 190 | /* DAC channel 1 flags */ |
AnnaBridge | 167:e84263d55307 | 191 | #define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /*!< DAC channel 1 flag DMA underrun */ |
AnnaBridge | 167:e84263d55307 | 192 | |
AnnaBridge | 167:e84263d55307 | 193 | /* DAC channel 2 flags */ |
AnnaBridge | 167:e84263d55307 | 194 | #define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /*!< DAC channel 2 flag DMA underrun */ |
AnnaBridge | 167:e84263d55307 | 195 | /** |
AnnaBridge | 167:e84263d55307 | 196 | * @} |
AnnaBridge | 167:e84263d55307 | 197 | */ |
AnnaBridge | 167:e84263d55307 | 198 | |
AnnaBridge | 167:e84263d55307 | 199 | /** @defgroup DAC_LL_EC_IT DAC interruptions |
AnnaBridge | 167:e84263d55307 | 200 | * @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions |
AnnaBridge | 167:e84263d55307 | 201 | * @{ |
AnnaBridge | 167:e84263d55307 | 202 | */ |
AnnaBridge | 167:e84263d55307 | 203 | #define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */ |
AnnaBridge | 167:e84263d55307 | 204 | #define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */ |
AnnaBridge | 167:e84263d55307 | 205 | /** |
AnnaBridge | 167:e84263d55307 | 206 | * @} |
AnnaBridge | 167:e84263d55307 | 207 | */ |
AnnaBridge | 167:e84263d55307 | 208 | |
AnnaBridge | 167:e84263d55307 | 209 | /** @defgroup DAC_LL_EC_CHANNEL DAC channels |
AnnaBridge | 167:e84263d55307 | 210 | * @{ |
AnnaBridge | 167:e84263d55307 | 211 | */ |
AnnaBridge | 167:e84263d55307 | 212 | #define LL_DAC_CHANNEL_1 (DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */ |
AnnaBridge | 167:e84263d55307 | 213 | #define LL_DAC_CHANNEL_2 (DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */ |
AnnaBridge | 167:e84263d55307 | 214 | /** |
AnnaBridge | 167:e84263d55307 | 215 | * @} |
AnnaBridge | 167:e84263d55307 | 216 | */ |
AnnaBridge | 167:e84263d55307 | 217 | |
AnnaBridge | 167:e84263d55307 | 218 | /** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source |
AnnaBridge | 167:e84263d55307 | 219 | * @{ |
AnnaBridge | 167:e84263d55307 | 220 | */ |
AnnaBridge | 167:e84263d55307 | 221 | #define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */ |
AnnaBridge | 167:e84263d55307 | 222 | #define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /*!< DAC channel conversion trigger from external IP: TIM2 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 223 | #define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM8 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 224 | #define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM4 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 225 | #define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /*!< DAC channel conversion trigger from external IP: TIM6 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 226 | #define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: TIM7 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 227 | #define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM5 TRGO. */ |
AnnaBridge | 167:e84263d55307 | 228 | #define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: external interrupt line 9. */ |
AnnaBridge | 167:e84263d55307 | 229 | /** |
AnnaBridge | 167:e84263d55307 | 230 | * @} |
AnnaBridge | 167:e84263d55307 | 231 | */ |
AnnaBridge | 167:e84263d55307 | 232 | |
AnnaBridge | 167:e84263d55307 | 233 | /** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode |
AnnaBridge | 167:e84263d55307 | 234 | * @{ |
AnnaBridge | 167:e84263d55307 | 235 | */ |
AnnaBridge | 167:e84263d55307 | 236 | #define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /*!< DAC channel wave auto generation mode disabled. */ |
AnnaBridge | 167:e84263d55307 | 237 | #define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */ |
AnnaBridge | 167:e84263d55307 | 238 | #define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */ |
AnnaBridge | 167:e84263d55307 | 239 | /** |
AnnaBridge | 167:e84263d55307 | 240 | * @} |
AnnaBridge | 167:e84263d55307 | 241 | */ |
AnnaBridge | 167:e84263d55307 | 242 | |
AnnaBridge | 167:e84263d55307 | 243 | /** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits |
AnnaBridge | 167:e84263d55307 | 244 | * @{ |
AnnaBridge | 167:e84263d55307 | 245 | */ |
AnnaBridge | 167:e84263d55307 | 246 | #define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 247 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 248 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 249 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 250 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 251 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 252 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 253 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 254 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 255 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 256 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 257 | #define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 258 | /** |
AnnaBridge | 167:e84263d55307 | 259 | * @} |
AnnaBridge | 167:e84263d55307 | 260 | */ |
AnnaBridge | 167:e84263d55307 | 261 | |
AnnaBridge | 167:e84263d55307 | 262 | /** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude |
AnnaBridge | 167:e84263d55307 | 263 | * @{ |
AnnaBridge | 167:e84263d55307 | 264 | */ |
AnnaBridge | 167:e84263d55307 | 265 | #define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 266 | #define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 267 | #define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 268 | #define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 269 | #define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 270 | #define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 271 | #define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 272 | #define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 273 | #define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 274 | #define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 275 | #define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 276 | #define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */ |
AnnaBridge | 167:e84263d55307 | 277 | /** |
AnnaBridge | 167:e84263d55307 | 278 | * @} |
AnnaBridge | 167:e84263d55307 | 279 | */ |
AnnaBridge | 167:e84263d55307 | 280 | |
AnnaBridge | 167:e84263d55307 | 281 | /** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer |
AnnaBridge | 167:e84263d55307 | 282 | * @{ |
AnnaBridge | 167:e84263d55307 | 283 | */ |
AnnaBridge | 167:e84263d55307 | 284 | #define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */ |
AnnaBridge | 167:e84263d55307 | 285 | #define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_CR_BOFF1) /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */ |
AnnaBridge | 167:e84263d55307 | 286 | /** |
AnnaBridge | 167:e84263d55307 | 287 | * @} |
AnnaBridge | 167:e84263d55307 | 288 | */ |
AnnaBridge | 167:e84263d55307 | 289 | |
AnnaBridge | 167:e84263d55307 | 290 | |
AnnaBridge | 167:e84263d55307 | 291 | /** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution |
AnnaBridge | 167:e84263d55307 | 292 | * @{ |
AnnaBridge | 167:e84263d55307 | 293 | */ |
AnnaBridge | 167:e84263d55307 | 294 | #define LL_DAC_RESOLUTION_12B 0x00000000U /*!< DAC channel resolution 12 bits */ |
AnnaBridge | 167:e84263d55307 | 295 | #define LL_DAC_RESOLUTION_8B 0x00000002U /*!< DAC channel resolution 8 bits */ |
AnnaBridge | 167:e84263d55307 | 296 | /** |
AnnaBridge | 167:e84263d55307 | 297 | * @} |
AnnaBridge | 167:e84263d55307 | 298 | */ |
AnnaBridge | 167:e84263d55307 | 299 | |
AnnaBridge | 167:e84263d55307 | 300 | /** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose |
AnnaBridge | 167:e84263d55307 | 301 | * @{ |
AnnaBridge | 167:e84263d55307 | 302 | */ |
AnnaBridge | 167:e84263d55307 | 303 | /* List of DAC registers intended to be used (most commonly) with */ |
AnnaBridge | 167:e84263d55307 | 304 | /* DMA transfer. */ |
AnnaBridge | 167:e84263d55307 | 305 | /* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */ |
AnnaBridge | 167:e84263d55307 | 306 | #define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits right aligned */ |
AnnaBridge | 167:e84263d55307 | 307 | #define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits left aligned */ |
AnnaBridge | 167:e84263d55307 | 308 | #define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /*!< DAC channel data holding register 8 bits right aligned */ |
AnnaBridge | 167:e84263d55307 | 309 | /** |
AnnaBridge | 167:e84263d55307 | 310 | * @} |
AnnaBridge | 167:e84263d55307 | 311 | */ |
AnnaBridge | 167:e84263d55307 | 312 | |
AnnaBridge | 167:e84263d55307 | 313 | /** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays |
AnnaBridge | 167:e84263d55307 | 314 | * @note Only DAC IP HW delays are defined in DAC LL driver driver, |
AnnaBridge | 167:e84263d55307 | 315 | * not timeout values. |
AnnaBridge | 167:e84263d55307 | 316 | * For details on delays values, refer to descriptions in source code |
AnnaBridge | 167:e84263d55307 | 317 | * above each literal definition. |
AnnaBridge | 167:e84263d55307 | 318 | * @{ |
AnnaBridge | 167:e84263d55307 | 319 | */ |
AnnaBridge | 167:e84263d55307 | 320 | |
AnnaBridge | 167:e84263d55307 | 321 | /* Delay for DAC channel voltage settling time from DAC channel startup */ |
AnnaBridge | 167:e84263d55307 | 322 | /* (transition from disable to enable). */ |
AnnaBridge | 167:e84263d55307 | 323 | /* Note: DAC channel startup time depends on board application environment: */ |
AnnaBridge | 167:e84263d55307 | 324 | /* impedance connected to DAC channel output. */ |
AnnaBridge | 167:e84263d55307 | 325 | /* The delay below is specified under conditions: */ |
AnnaBridge | 167:e84263d55307 | 326 | /* - voltage maximum transition (lowest to highest value) */ |
AnnaBridge | 167:e84263d55307 | 327 | /* - until voltage reaches final value +-1LSB */ |
AnnaBridge | 167:e84263d55307 | 328 | /* - DAC channel output buffer enabled */ |
AnnaBridge | 167:e84263d55307 | 329 | /* - load impedance of 5kOhm (min), 50pF (max) */ |
AnnaBridge | 167:e84263d55307 | 330 | /* Literal set to maximum value (refer to device datasheet, */ |
AnnaBridge | 167:e84263d55307 | 331 | /* parameter "tWAKEUP"). */ |
AnnaBridge | 167:e84263d55307 | 332 | /* Unit: us */ |
AnnaBridge | 167:e84263d55307 | 333 | #define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 15U /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */ |
AnnaBridge | 167:e84263d55307 | 334 | |
AnnaBridge | 167:e84263d55307 | 335 | /* Delay for DAC channel voltage settling time. */ |
AnnaBridge | 167:e84263d55307 | 336 | /* Note: DAC channel startup time depends on board application environment: */ |
AnnaBridge | 167:e84263d55307 | 337 | /* impedance connected to DAC channel output. */ |
AnnaBridge | 167:e84263d55307 | 338 | /* The delay below is specified under conditions: */ |
AnnaBridge | 167:e84263d55307 | 339 | /* - voltage maximum transition (lowest to highest value) */ |
AnnaBridge | 167:e84263d55307 | 340 | /* - until voltage reaches final value +-1LSB */ |
AnnaBridge | 167:e84263d55307 | 341 | /* - DAC channel output buffer enabled */ |
AnnaBridge | 167:e84263d55307 | 342 | /* - load impedance of 5kOhm min, 50pF max */ |
AnnaBridge | 167:e84263d55307 | 343 | /* Literal set to maximum value (refer to device datasheet, */ |
AnnaBridge | 167:e84263d55307 | 344 | /* parameter "tSETTLING"). */ |
AnnaBridge | 167:e84263d55307 | 345 | /* Unit: us */ |
AnnaBridge | 167:e84263d55307 | 346 | #define LL_DAC_DELAY_VOLTAGE_SETTLING_US 12U /*!< Delay for DAC channel voltage settling time */ |
AnnaBridge | 167:e84263d55307 | 347 | /** |
AnnaBridge | 167:e84263d55307 | 348 | * @} |
AnnaBridge | 167:e84263d55307 | 349 | */ |
AnnaBridge | 167:e84263d55307 | 350 | |
AnnaBridge | 167:e84263d55307 | 351 | /** |
AnnaBridge | 167:e84263d55307 | 352 | * @} |
AnnaBridge | 167:e84263d55307 | 353 | */ |
AnnaBridge | 167:e84263d55307 | 354 | |
AnnaBridge | 167:e84263d55307 | 355 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 356 | /** @defgroup DAC_LL_Exported_Macros DAC Exported Macros |
AnnaBridge | 167:e84263d55307 | 357 | * @{ |
AnnaBridge | 167:e84263d55307 | 358 | */ |
AnnaBridge | 167:e84263d55307 | 359 | |
AnnaBridge | 167:e84263d55307 | 360 | /** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros |
AnnaBridge | 167:e84263d55307 | 361 | * @{ |
AnnaBridge | 167:e84263d55307 | 362 | */ |
AnnaBridge | 167:e84263d55307 | 363 | |
AnnaBridge | 167:e84263d55307 | 364 | /** |
AnnaBridge | 167:e84263d55307 | 365 | * @brief Write a value in DAC register |
AnnaBridge | 167:e84263d55307 | 366 | * @param __INSTANCE__ DAC Instance |
AnnaBridge | 167:e84263d55307 | 367 | * @param __REG__ Register to be written |
AnnaBridge | 167:e84263d55307 | 368 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 167:e84263d55307 | 369 | * @retval None |
AnnaBridge | 167:e84263d55307 | 370 | */ |
AnnaBridge | 167:e84263d55307 | 371 | #define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
AnnaBridge | 167:e84263d55307 | 372 | |
AnnaBridge | 167:e84263d55307 | 373 | /** |
AnnaBridge | 167:e84263d55307 | 374 | * @brief Read a value in DAC register |
AnnaBridge | 167:e84263d55307 | 375 | * @param __INSTANCE__ DAC Instance |
AnnaBridge | 167:e84263d55307 | 376 | * @param __REG__ Register to be read |
AnnaBridge | 167:e84263d55307 | 377 | * @retval Register value |
AnnaBridge | 167:e84263d55307 | 378 | */ |
AnnaBridge | 167:e84263d55307 | 379 | #define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
AnnaBridge | 167:e84263d55307 | 380 | |
AnnaBridge | 167:e84263d55307 | 381 | /** |
AnnaBridge | 167:e84263d55307 | 382 | * @} |
AnnaBridge | 167:e84263d55307 | 383 | */ |
AnnaBridge | 167:e84263d55307 | 384 | |
AnnaBridge | 167:e84263d55307 | 385 | /** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro |
AnnaBridge | 167:e84263d55307 | 386 | * @{ |
AnnaBridge | 167:e84263d55307 | 387 | */ |
AnnaBridge | 167:e84263d55307 | 388 | |
AnnaBridge | 167:e84263d55307 | 389 | /** |
AnnaBridge | 167:e84263d55307 | 390 | * @brief Helper macro to get DAC channel number in decimal format |
AnnaBridge | 167:e84263d55307 | 391 | * from literals LL_DAC_CHANNEL_x. |
AnnaBridge | 167:e84263d55307 | 392 | * Example: |
AnnaBridge | 167:e84263d55307 | 393 | * __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1) |
AnnaBridge | 167:e84263d55307 | 394 | * will return decimal number "1". |
AnnaBridge | 167:e84263d55307 | 395 | * @note The input can be a value from functions where a channel |
AnnaBridge | 167:e84263d55307 | 396 | * number is returned. |
AnnaBridge | 167:e84263d55307 | 397 | * @param __CHANNEL__ This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 398 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 399 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 400 | * @retval 1...2 |
AnnaBridge | 167:e84263d55307 | 401 | */ |
AnnaBridge | 167:e84263d55307 | 402 | #define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ |
AnnaBridge | 167:e84263d55307 | 403 | ((__CHANNEL__) & DAC_SWTR_CHX_MASK) |
AnnaBridge | 167:e84263d55307 | 404 | |
AnnaBridge | 167:e84263d55307 | 405 | /** |
AnnaBridge | 167:e84263d55307 | 406 | * @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x |
AnnaBridge | 167:e84263d55307 | 407 | * from number in decimal format. |
AnnaBridge | 167:e84263d55307 | 408 | * Example: |
AnnaBridge | 167:e84263d55307 | 409 | * __LL_DAC_DECIMAL_NB_TO_CHANNEL(1) |
AnnaBridge | 167:e84263d55307 | 410 | * will return a data equivalent to "LL_DAC_CHANNEL_1". |
AnnaBridge | 167:e84263d55307 | 411 | * @note If the input parameter does not correspond to a DAC channel, |
AnnaBridge | 167:e84263d55307 | 412 | * this macro returns value '0'. |
AnnaBridge | 167:e84263d55307 | 413 | * @param __DECIMAL_NB__ 1...2 |
AnnaBridge | 167:e84263d55307 | 414 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 415 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 416 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 417 | */ |
AnnaBridge | 167:e84263d55307 | 418 | #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \ |
AnnaBridge | 167:e84263d55307 | 419 | (((__DECIMAL_NB__) == 1U) \ |
AnnaBridge | 167:e84263d55307 | 420 | ? ( \ |
AnnaBridge | 167:e84263d55307 | 421 | LL_DAC_CHANNEL_1 \ |
AnnaBridge | 167:e84263d55307 | 422 | ) \ |
AnnaBridge | 167:e84263d55307 | 423 | : \ |
AnnaBridge | 167:e84263d55307 | 424 | (((__DECIMAL_NB__) == 2U) \ |
AnnaBridge | 167:e84263d55307 | 425 | ? ( \ |
AnnaBridge | 167:e84263d55307 | 426 | LL_DAC_CHANNEL_2 \ |
AnnaBridge | 167:e84263d55307 | 427 | ) \ |
AnnaBridge | 167:e84263d55307 | 428 | : \ |
AnnaBridge | 167:e84263d55307 | 429 | ( \ |
AnnaBridge | 167:e84263d55307 | 430 | 0 \ |
AnnaBridge | 167:e84263d55307 | 431 | ) \ |
AnnaBridge | 167:e84263d55307 | 432 | ) \ |
AnnaBridge | 167:e84263d55307 | 433 | ) |
AnnaBridge | 167:e84263d55307 | 434 | |
AnnaBridge | 167:e84263d55307 | 435 | /** |
AnnaBridge | 167:e84263d55307 | 436 | * @brief Helper macro to define the DAC conversion data full-scale digital |
AnnaBridge | 167:e84263d55307 | 437 | * value corresponding to the selected DAC resolution. |
AnnaBridge | 167:e84263d55307 | 438 | * @note DAC conversion data full-scale corresponds to voltage range |
AnnaBridge | 167:e84263d55307 | 439 | * determined by analog voltage references Vref+ and Vref- |
AnnaBridge | 167:e84263d55307 | 440 | * (refer to reference manual). |
AnnaBridge | 167:e84263d55307 | 441 | * @param __DAC_RESOLUTION__ This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 442 | * @arg @ref LL_DAC_RESOLUTION_12B |
AnnaBridge | 167:e84263d55307 | 443 | * @arg @ref LL_DAC_RESOLUTION_8B |
AnnaBridge | 167:e84263d55307 | 444 | * @retval ADC conversion data equivalent voltage value (unit: mVolt) |
AnnaBridge | 167:e84263d55307 | 445 | */ |
AnnaBridge | 167:e84263d55307 | 446 | #define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \ |
AnnaBridge | 167:e84263d55307 | 447 | ((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U)) |
AnnaBridge | 167:e84263d55307 | 448 | |
AnnaBridge | 167:e84263d55307 | 449 | /** |
AnnaBridge | 167:e84263d55307 | 450 | * @brief Helper macro to calculate the DAC conversion data (unit: digital |
AnnaBridge | 167:e84263d55307 | 451 | * value) corresponding to a voltage (unit: mVolt). |
AnnaBridge | 167:e84263d55307 | 452 | * @note This helper macro is intended to provide input data in voltage |
AnnaBridge | 167:e84263d55307 | 453 | * rather than digital value, |
AnnaBridge | 167:e84263d55307 | 454 | * to be used with LL DAC functions such as |
AnnaBridge | 167:e84263d55307 | 455 | * @ref LL_DAC_ConvertData12RightAligned(). |
AnnaBridge | 167:e84263d55307 | 456 | * @note Analog reference voltage (Vref+) must be either known from |
AnnaBridge | 167:e84263d55307 | 457 | * user board environment. |
AnnaBridge | 167:e84263d55307 | 458 | * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) |
AnnaBridge | 167:e84263d55307 | 459 | * @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel |
AnnaBridge | 167:e84263d55307 | 460 | * (unit: mVolt). |
AnnaBridge | 167:e84263d55307 | 461 | * @param __DAC_RESOLUTION__ This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 462 | * @arg @ref LL_DAC_RESOLUTION_12B |
AnnaBridge | 167:e84263d55307 | 463 | * @arg @ref LL_DAC_RESOLUTION_8B |
AnnaBridge | 167:e84263d55307 | 464 | * @retval DAC conversion data (unit: digital value) |
AnnaBridge | 167:e84263d55307 | 465 | */ |
AnnaBridge | 167:e84263d55307 | 466 | #define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\ |
AnnaBridge | 167:e84263d55307 | 467 | __DAC_VOLTAGE__,\ |
AnnaBridge | 167:e84263d55307 | 468 | __DAC_RESOLUTION__) \ |
AnnaBridge | 167:e84263d55307 | 469 | ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \ |
AnnaBridge | 167:e84263d55307 | 470 | / (__VREFANALOG_VOLTAGE__) \ |
AnnaBridge | 167:e84263d55307 | 471 | ) |
AnnaBridge | 167:e84263d55307 | 472 | |
AnnaBridge | 167:e84263d55307 | 473 | /** |
AnnaBridge | 167:e84263d55307 | 474 | * @} |
AnnaBridge | 167:e84263d55307 | 475 | */ |
AnnaBridge | 167:e84263d55307 | 476 | |
AnnaBridge | 167:e84263d55307 | 477 | /** |
AnnaBridge | 167:e84263d55307 | 478 | * @} |
AnnaBridge | 167:e84263d55307 | 479 | */ |
AnnaBridge | 167:e84263d55307 | 480 | |
AnnaBridge | 167:e84263d55307 | 481 | |
AnnaBridge | 167:e84263d55307 | 482 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 167:e84263d55307 | 483 | /** @defgroup DAC_LL_Exported_Functions DAC Exported Functions |
AnnaBridge | 167:e84263d55307 | 484 | * @{ |
AnnaBridge | 167:e84263d55307 | 485 | */ |
AnnaBridge | 167:e84263d55307 | 486 | /** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels |
AnnaBridge | 167:e84263d55307 | 487 | * @{ |
AnnaBridge | 167:e84263d55307 | 488 | */ |
AnnaBridge | 167:e84263d55307 | 489 | |
AnnaBridge | 167:e84263d55307 | 490 | /** |
AnnaBridge | 167:e84263d55307 | 491 | * @brief Set the conversion trigger source for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 492 | * @note For conversion trigger source to be effective, DAC trigger |
AnnaBridge | 167:e84263d55307 | 493 | * must be enabled using function @ref LL_DAC_EnableTrigger(). |
AnnaBridge | 167:e84263d55307 | 494 | * @note To set conversion trigger source, DAC channel must be disabled. |
AnnaBridge | 167:e84263d55307 | 495 | * Otherwise, the setting is discarded. |
AnnaBridge | 167:e84263d55307 | 496 | * @note Availability of parameters of trigger sources from timer |
AnnaBridge | 167:e84263d55307 | 497 | * depends on timers availability on the selected device. |
AnnaBridge | 167:e84263d55307 | 498 | * @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n |
AnnaBridge | 167:e84263d55307 | 499 | * CR TSEL2 LL_DAC_SetTriggerSource |
AnnaBridge | 167:e84263d55307 | 500 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 501 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 502 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 503 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 504 | * @param TriggerSource This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 505 | * @arg @ref LL_DAC_TRIG_SOFTWARE |
AnnaBridge | 167:e84263d55307 | 506 | * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO |
AnnaBridge | 167:e84263d55307 | 507 | * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO |
AnnaBridge | 167:e84263d55307 | 508 | * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO |
AnnaBridge | 167:e84263d55307 | 509 | * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO |
AnnaBridge | 167:e84263d55307 | 510 | * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO |
AnnaBridge | 167:e84263d55307 | 511 | * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO |
AnnaBridge | 167:e84263d55307 | 512 | * @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9 |
AnnaBridge | 167:e84263d55307 | 513 | * @retval None |
AnnaBridge | 167:e84263d55307 | 514 | */ |
AnnaBridge | 167:e84263d55307 | 515 | __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource) |
AnnaBridge | 167:e84263d55307 | 516 | { |
AnnaBridge | 167:e84263d55307 | 517 | MODIFY_REG(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 518 | DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
AnnaBridge | 167:e84263d55307 | 519 | TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 520 | } |
AnnaBridge | 167:e84263d55307 | 521 | |
AnnaBridge | 167:e84263d55307 | 522 | /** |
AnnaBridge | 167:e84263d55307 | 523 | * @brief Get the conversion trigger source for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 524 | * @note For conversion trigger source to be effective, DAC trigger |
AnnaBridge | 167:e84263d55307 | 525 | * must be enabled using function @ref LL_DAC_EnableTrigger(). |
AnnaBridge | 167:e84263d55307 | 526 | * @note Availability of parameters of trigger sources from timer |
AnnaBridge | 167:e84263d55307 | 527 | * depends on timers availability on the selected device. |
AnnaBridge | 167:e84263d55307 | 528 | * @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n |
AnnaBridge | 167:e84263d55307 | 529 | * CR TSEL2 LL_DAC_GetTriggerSource |
AnnaBridge | 167:e84263d55307 | 530 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 531 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 532 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 533 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 534 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 535 | * @arg @ref LL_DAC_TRIG_SOFTWARE |
AnnaBridge | 167:e84263d55307 | 536 | * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO |
AnnaBridge | 167:e84263d55307 | 537 | * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO |
AnnaBridge | 167:e84263d55307 | 538 | * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO |
AnnaBridge | 167:e84263d55307 | 539 | * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO |
AnnaBridge | 167:e84263d55307 | 540 | * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO |
AnnaBridge | 167:e84263d55307 | 541 | * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO |
AnnaBridge | 167:e84263d55307 | 542 | * @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9 |
AnnaBridge | 167:e84263d55307 | 543 | */ |
AnnaBridge | 167:e84263d55307 | 544 | __STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 545 | { |
AnnaBridge | 167:e84263d55307 | 546 | return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 547 | >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 548 | ); |
AnnaBridge | 167:e84263d55307 | 549 | } |
AnnaBridge | 167:e84263d55307 | 550 | |
AnnaBridge | 167:e84263d55307 | 551 | /** |
AnnaBridge | 167:e84263d55307 | 552 | * @brief Set the waveform automatic generation mode |
AnnaBridge | 167:e84263d55307 | 553 | * for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 554 | * @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n |
AnnaBridge | 167:e84263d55307 | 555 | * CR WAVE2 LL_DAC_SetWaveAutoGeneration |
AnnaBridge | 167:e84263d55307 | 556 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 557 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 558 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 559 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 560 | * @param WaveAutoGeneration This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 561 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE |
AnnaBridge | 167:e84263d55307 | 562 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE |
AnnaBridge | 167:e84263d55307 | 563 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE |
AnnaBridge | 167:e84263d55307 | 564 | * @retval None |
AnnaBridge | 167:e84263d55307 | 565 | */ |
AnnaBridge | 167:e84263d55307 | 566 | __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration) |
AnnaBridge | 167:e84263d55307 | 567 | { |
AnnaBridge | 167:e84263d55307 | 568 | MODIFY_REG(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 569 | DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
AnnaBridge | 167:e84263d55307 | 570 | WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 571 | } |
AnnaBridge | 167:e84263d55307 | 572 | |
AnnaBridge | 167:e84263d55307 | 573 | /** |
AnnaBridge | 167:e84263d55307 | 574 | * @brief Get the waveform automatic generation mode |
AnnaBridge | 167:e84263d55307 | 575 | * for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 576 | * @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n |
AnnaBridge | 167:e84263d55307 | 577 | * CR WAVE2 LL_DAC_GetWaveAutoGeneration |
AnnaBridge | 167:e84263d55307 | 578 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 579 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 580 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 581 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 582 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 583 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE |
AnnaBridge | 167:e84263d55307 | 584 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE |
AnnaBridge | 167:e84263d55307 | 585 | * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE |
AnnaBridge | 167:e84263d55307 | 586 | */ |
AnnaBridge | 167:e84263d55307 | 587 | __STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 588 | { |
AnnaBridge | 167:e84263d55307 | 589 | return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 590 | >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 591 | ); |
AnnaBridge | 167:e84263d55307 | 592 | } |
AnnaBridge | 167:e84263d55307 | 593 | |
AnnaBridge | 167:e84263d55307 | 594 | /** |
AnnaBridge | 167:e84263d55307 | 595 | * @brief Set the noise waveform generation for the selected DAC channel: |
AnnaBridge | 167:e84263d55307 | 596 | * Noise mode and parameters LFSR (linear feedback shift register). |
AnnaBridge | 167:e84263d55307 | 597 | * @note For wave generation to be effective, DAC channel |
AnnaBridge | 167:e84263d55307 | 598 | * wave generation mode must be enabled using |
AnnaBridge | 167:e84263d55307 | 599 | * function @ref LL_DAC_SetWaveAutoGeneration(). |
AnnaBridge | 167:e84263d55307 | 600 | * @note This setting can be set when the selected DAC channel is disabled |
AnnaBridge | 167:e84263d55307 | 601 | * (otherwise, the setting operation is ignored). |
AnnaBridge | 167:e84263d55307 | 602 | * @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n |
AnnaBridge | 167:e84263d55307 | 603 | * CR MAMP2 LL_DAC_SetWaveNoiseLFSR |
AnnaBridge | 167:e84263d55307 | 604 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 605 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 606 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 607 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 608 | * @param NoiseLFSRMask This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 609 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0 |
AnnaBridge | 167:e84263d55307 | 610 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 |
AnnaBridge | 167:e84263d55307 | 611 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 |
AnnaBridge | 167:e84263d55307 | 612 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 |
AnnaBridge | 167:e84263d55307 | 613 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 |
AnnaBridge | 167:e84263d55307 | 614 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 |
AnnaBridge | 167:e84263d55307 | 615 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 |
AnnaBridge | 167:e84263d55307 | 616 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 |
AnnaBridge | 167:e84263d55307 | 617 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 |
AnnaBridge | 167:e84263d55307 | 618 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 |
AnnaBridge | 167:e84263d55307 | 619 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 |
AnnaBridge | 167:e84263d55307 | 620 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 |
AnnaBridge | 167:e84263d55307 | 621 | * @retval None |
AnnaBridge | 167:e84263d55307 | 622 | */ |
AnnaBridge | 167:e84263d55307 | 623 | __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask) |
AnnaBridge | 167:e84263d55307 | 624 | { |
AnnaBridge | 167:e84263d55307 | 625 | MODIFY_REG(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 626 | DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
AnnaBridge | 167:e84263d55307 | 627 | NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 628 | } |
AnnaBridge | 167:e84263d55307 | 629 | |
AnnaBridge | 167:e84263d55307 | 630 | /** |
AnnaBridge | 167:e84263d55307 | 631 | * @brief Set the noise waveform generation for the selected DAC channel: |
AnnaBridge | 167:e84263d55307 | 632 | * Noise mode and parameters LFSR (linear feedback shift register). |
AnnaBridge | 167:e84263d55307 | 633 | * @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n |
AnnaBridge | 167:e84263d55307 | 634 | * CR MAMP2 LL_DAC_GetWaveNoiseLFSR |
AnnaBridge | 167:e84263d55307 | 635 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 636 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 637 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 638 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 639 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 640 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0 |
AnnaBridge | 167:e84263d55307 | 641 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 |
AnnaBridge | 167:e84263d55307 | 642 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 |
AnnaBridge | 167:e84263d55307 | 643 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 |
AnnaBridge | 167:e84263d55307 | 644 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 |
AnnaBridge | 167:e84263d55307 | 645 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 |
AnnaBridge | 167:e84263d55307 | 646 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 |
AnnaBridge | 167:e84263d55307 | 647 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 |
AnnaBridge | 167:e84263d55307 | 648 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 |
AnnaBridge | 167:e84263d55307 | 649 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 |
AnnaBridge | 167:e84263d55307 | 650 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 |
AnnaBridge | 167:e84263d55307 | 651 | * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 |
AnnaBridge | 167:e84263d55307 | 652 | */ |
AnnaBridge | 167:e84263d55307 | 653 | __STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 654 | { |
AnnaBridge | 167:e84263d55307 | 655 | return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 656 | >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 657 | ); |
AnnaBridge | 167:e84263d55307 | 658 | } |
AnnaBridge | 167:e84263d55307 | 659 | |
AnnaBridge | 167:e84263d55307 | 660 | /** |
AnnaBridge | 167:e84263d55307 | 661 | * @brief Set the triangle waveform generation for the selected DAC channel: |
AnnaBridge | 167:e84263d55307 | 662 | * triangle mode and amplitude. |
AnnaBridge | 167:e84263d55307 | 663 | * @note For wave generation to be effective, DAC channel |
AnnaBridge | 167:e84263d55307 | 664 | * wave generation mode must be enabled using |
AnnaBridge | 167:e84263d55307 | 665 | * function @ref LL_DAC_SetWaveAutoGeneration(). |
AnnaBridge | 167:e84263d55307 | 666 | * @note This setting can be set when the selected DAC channel is disabled |
AnnaBridge | 167:e84263d55307 | 667 | * (otherwise, the setting operation is ignored). |
AnnaBridge | 167:e84263d55307 | 668 | * @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n |
AnnaBridge | 167:e84263d55307 | 669 | * CR MAMP2 LL_DAC_SetWaveTriangleAmplitude |
AnnaBridge | 167:e84263d55307 | 670 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 671 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 672 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 673 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 674 | * @param TriangleAmplitude This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 675 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1 |
AnnaBridge | 167:e84263d55307 | 676 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3 |
AnnaBridge | 167:e84263d55307 | 677 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7 |
AnnaBridge | 167:e84263d55307 | 678 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15 |
AnnaBridge | 167:e84263d55307 | 679 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31 |
AnnaBridge | 167:e84263d55307 | 680 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63 |
AnnaBridge | 167:e84263d55307 | 681 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127 |
AnnaBridge | 167:e84263d55307 | 682 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255 |
AnnaBridge | 167:e84263d55307 | 683 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511 |
AnnaBridge | 167:e84263d55307 | 684 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023 |
AnnaBridge | 167:e84263d55307 | 685 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047 |
AnnaBridge | 167:e84263d55307 | 686 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095 |
AnnaBridge | 167:e84263d55307 | 687 | * @retval None |
AnnaBridge | 167:e84263d55307 | 688 | */ |
AnnaBridge | 167:e84263d55307 | 689 | __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude) |
AnnaBridge | 167:e84263d55307 | 690 | { |
AnnaBridge | 167:e84263d55307 | 691 | MODIFY_REG(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 692 | DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
AnnaBridge | 167:e84263d55307 | 693 | TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 694 | } |
AnnaBridge | 167:e84263d55307 | 695 | |
AnnaBridge | 167:e84263d55307 | 696 | /** |
AnnaBridge | 167:e84263d55307 | 697 | * @brief Set the triangle waveform generation for the selected DAC channel: |
AnnaBridge | 167:e84263d55307 | 698 | * triangle mode and amplitude. |
AnnaBridge | 167:e84263d55307 | 699 | * @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n |
AnnaBridge | 167:e84263d55307 | 700 | * CR MAMP2 LL_DAC_GetWaveTriangleAmplitude |
AnnaBridge | 167:e84263d55307 | 701 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 702 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 703 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 704 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 705 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 706 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1 |
AnnaBridge | 167:e84263d55307 | 707 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3 |
AnnaBridge | 167:e84263d55307 | 708 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7 |
AnnaBridge | 167:e84263d55307 | 709 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15 |
AnnaBridge | 167:e84263d55307 | 710 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31 |
AnnaBridge | 167:e84263d55307 | 711 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63 |
AnnaBridge | 167:e84263d55307 | 712 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127 |
AnnaBridge | 167:e84263d55307 | 713 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255 |
AnnaBridge | 167:e84263d55307 | 714 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511 |
AnnaBridge | 167:e84263d55307 | 715 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023 |
AnnaBridge | 167:e84263d55307 | 716 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047 |
AnnaBridge | 167:e84263d55307 | 717 | * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095 |
AnnaBridge | 167:e84263d55307 | 718 | */ |
AnnaBridge | 167:e84263d55307 | 719 | __STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 720 | { |
AnnaBridge | 167:e84263d55307 | 721 | return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 722 | >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 723 | ); |
AnnaBridge | 167:e84263d55307 | 724 | } |
AnnaBridge | 167:e84263d55307 | 725 | |
AnnaBridge | 167:e84263d55307 | 726 | /** |
AnnaBridge | 167:e84263d55307 | 727 | * @brief Set the output buffer for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 728 | * @rmtoll CR BOFF1 LL_DAC_SetOutputBuffer\n |
AnnaBridge | 167:e84263d55307 | 729 | * CR BOFF2 LL_DAC_SetOutputBuffer |
AnnaBridge | 167:e84263d55307 | 730 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 731 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 732 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 733 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 734 | * @param OutputBuffer This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 735 | * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE |
AnnaBridge | 167:e84263d55307 | 736 | * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE |
AnnaBridge | 167:e84263d55307 | 737 | * @retval None |
AnnaBridge | 167:e84263d55307 | 738 | */ |
AnnaBridge | 167:e84263d55307 | 739 | __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer) |
AnnaBridge | 167:e84263d55307 | 740 | { |
AnnaBridge | 167:e84263d55307 | 741 | MODIFY_REG(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 742 | DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
AnnaBridge | 167:e84263d55307 | 743 | OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 744 | } |
AnnaBridge | 167:e84263d55307 | 745 | |
AnnaBridge | 167:e84263d55307 | 746 | /** |
AnnaBridge | 167:e84263d55307 | 747 | * @brief Get the output buffer state for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 748 | * @rmtoll CR BOFF1 LL_DAC_GetOutputBuffer\n |
AnnaBridge | 167:e84263d55307 | 749 | * CR BOFF2 LL_DAC_GetOutputBuffer |
AnnaBridge | 167:e84263d55307 | 750 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 751 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 752 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 753 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 754 | * @retval Returned value can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 755 | * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE |
AnnaBridge | 167:e84263d55307 | 756 | * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE |
AnnaBridge | 167:e84263d55307 | 757 | */ |
AnnaBridge | 167:e84263d55307 | 758 | __STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 759 | { |
AnnaBridge | 167:e84263d55307 | 760 | return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 761 | >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
AnnaBridge | 167:e84263d55307 | 762 | ); |
AnnaBridge | 167:e84263d55307 | 763 | } |
AnnaBridge | 167:e84263d55307 | 764 | |
AnnaBridge | 167:e84263d55307 | 765 | /** |
AnnaBridge | 167:e84263d55307 | 766 | * @} |
AnnaBridge | 167:e84263d55307 | 767 | */ |
AnnaBridge | 167:e84263d55307 | 768 | |
AnnaBridge | 167:e84263d55307 | 769 | /** @defgroup DAC_LL_EF_DMA_Management DMA Management |
AnnaBridge | 167:e84263d55307 | 770 | * @{ |
AnnaBridge | 167:e84263d55307 | 771 | */ |
AnnaBridge | 167:e84263d55307 | 772 | |
AnnaBridge | 167:e84263d55307 | 773 | /** |
AnnaBridge | 167:e84263d55307 | 774 | * @brief Enable DAC DMA transfer request of the selected channel. |
AnnaBridge | 167:e84263d55307 | 775 | * @note To configure DMA source address (peripheral address), |
AnnaBridge | 167:e84263d55307 | 776 | * use function @ref LL_DAC_DMA_GetRegAddr(). |
AnnaBridge | 167:e84263d55307 | 777 | * @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n |
AnnaBridge | 167:e84263d55307 | 778 | * CR DMAEN2 LL_DAC_EnableDMAReq |
AnnaBridge | 167:e84263d55307 | 779 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 780 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 781 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 782 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 783 | * @retval None |
AnnaBridge | 167:e84263d55307 | 784 | */ |
AnnaBridge | 167:e84263d55307 | 785 | __STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 786 | { |
AnnaBridge | 167:e84263d55307 | 787 | SET_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 788 | DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 789 | } |
AnnaBridge | 167:e84263d55307 | 790 | |
AnnaBridge | 167:e84263d55307 | 791 | /** |
AnnaBridge | 167:e84263d55307 | 792 | * @brief Disable DAC DMA transfer request of the selected channel. |
AnnaBridge | 167:e84263d55307 | 793 | * @note To configure DMA source address (peripheral address), |
AnnaBridge | 167:e84263d55307 | 794 | * use function @ref LL_DAC_DMA_GetRegAddr(). |
AnnaBridge | 167:e84263d55307 | 795 | * @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n |
AnnaBridge | 167:e84263d55307 | 796 | * CR DMAEN2 LL_DAC_DisableDMAReq |
AnnaBridge | 167:e84263d55307 | 797 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 798 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 799 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 800 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 801 | * @retval None |
AnnaBridge | 167:e84263d55307 | 802 | */ |
AnnaBridge | 167:e84263d55307 | 803 | __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 804 | { |
AnnaBridge | 167:e84263d55307 | 805 | CLEAR_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 806 | DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 807 | } |
AnnaBridge | 167:e84263d55307 | 808 | |
AnnaBridge | 167:e84263d55307 | 809 | /** |
AnnaBridge | 167:e84263d55307 | 810 | * @brief Get DAC DMA transfer request state of the selected channel. |
AnnaBridge | 167:e84263d55307 | 811 | * (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled) |
AnnaBridge | 167:e84263d55307 | 812 | * @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n |
AnnaBridge | 167:e84263d55307 | 813 | * CR DMAEN2 LL_DAC_IsDMAReqEnabled |
AnnaBridge | 167:e84263d55307 | 814 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 815 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 816 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 817 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 818 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 819 | */ |
AnnaBridge | 167:e84263d55307 | 820 | __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 821 | { |
AnnaBridge | 167:e84263d55307 | 822 | return (READ_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 823 | DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 824 | == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
AnnaBridge | 167:e84263d55307 | 825 | } |
AnnaBridge | 167:e84263d55307 | 826 | |
AnnaBridge | 167:e84263d55307 | 827 | /** |
AnnaBridge | 167:e84263d55307 | 828 | * @brief Function to help to configure DMA transfer to DAC: retrieve the |
AnnaBridge | 167:e84263d55307 | 829 | * DAC register address from DAC instance and a list of DAC registers |
AnnaBridge | 167:e84263d55307 | 830 | * intended to be used (most commonly) with DMA transfer. |
AnnaBridge | 167:e84263d55307 | 831 | * @note These DAC registers are data holding registers: |
AnnaBridge | 167:e84263d55307 | 832 | * when DAC conversion is requested, DAC generates a DMA transfer |
AnnaBridge | 167:e84263d55307 | 833 | * request to have data available in DAC data holding registers. |
AnnaBridge | 167:e84263d55307 | 834 | * @note This macro is intended to be used with LL DMA driver, refer to |
AnnaBridge | 167:e84263d55307 | 835 | * function "LL_DMA_ConfigAddresses()". |
AnnaBridge | 167:e84263d55307 | 836 | * Example: |
AnnaBridge | 167:e84263d55307 | 837 | * LL_DMA_ConfigAddresses(DMA1, |
AnnaBridge | 167:e84263d55307 | 838 | * LL_DMA_CHANNEL_1, |
AnnaBridge | 167:e84263d55307 | 839 | * (uint32_t)&< array or variable >, |
AnnaBridge | 167:e84263d55307 | 840 | * LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED), |
AnnaBridge | 167:e84263d55307 | 841 | * LL_DMA_DIRECTION_MEMORY_TO_PERIPH); |
AnnaBridge | 167:e84263d55307 | 842 | * @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
AnnaBridge | 167:e84263d55307 | 843 | * DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
AnnaBridge | 167:e84263d55307 | 844 | * DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
AnnaBridge | 167:e84263d55307 | 845 | * DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n |
AnnaBridge | 167:e84263d55307 | 846 | * DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n |
AnnaBridge | 167:e84263d55307 | 847 | * DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr |
AnnaBridge | 167:e84263d55307 | 848 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 849 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 850 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 851 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 852 | * @param Register This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 853 | * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED |
AnnaBridge | 167:e84263d55307 | 854 | * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED |
AnnaBridge | 167:e84263d55307 | 855 | * @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED |
AnnaBridge | 167:e84263d55307 | 856 | * @retval DAC register address |
AnnaBridge | 167:e84263d55307 | 857 | */ |
AnnaBridge | 167:e84263d55307 | 858 | __STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register) |
AnnaBridge | 167:e84263d55307 | 859 | { |
AnnaBridge | 167:e84263d55307 | 860 | /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */ |
AnnaBridge | 167:e84263d55307 | 861 | /* DAC channel selected. */ |
AnnaBridge | 167:e84263d55307 | 862 | return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register)))); |
AnnaBridge | 167:e84263d55307 | 863 | } |
AnnaBridge | 167:e84263d55307 | 864 | /** |
AnnaBridge | 167:e84263d55307 | 865 | * @} |
AnnaBridge | 167:e84263d55307 | 866 | */ |
AnnaBridge | 167:e84263d55307 | 867 | |
AnnaBridge | 167:e84263d55307 | 868 | /** @defgroup DAC_LL_EF_Operation Operation on DAC channels |
AnnaBridge | 167:e84263d55307 | 869 | * @{ |
AnnaBridge | 167:e84263d55307 | 870 | */ |
AnnaBridge | 167:e84263d55307 | 871 | |
AnnaBridge | 167:e84263d55307 | 872 | /** |
AnnaBridge | 167:e84263d55307 | 873 | * @brief Enable DAC selected channel. |
AnnaBridge | 167:e84263d55307 | 874 | * @rmtoll CR EN1 LL_DAC_Enable\n |
AnnaBridge | 167:e84263d55307 | 875 | * CR EN2 LL_DAC_Enable |
AnnaBridge | 167:e84263d55307 | 876 | * @note After enable from off state, DAC channel requires a delay |
AnnaBridge | 167:e84263d55307 | 877 | * for output voltage to reach accuracy +/- 1 LSB. |
AnnaBridge | 167:e84263d55307 | 878 | * Refer to device datasheet, parameter "tWAKEUP". |
AnnaBridge | 167:e84263d55307 | 879 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 880 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 881 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 882 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 883 | * @retval None |
AnnaBridge | 167:e84263d55307 | 884 | */ |
AnnaBridge | 167:e84263d55307 | 885 | __STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 886 | { |
AnnaBridge | 167:e84263d55307 | 887 | SET_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 888 | DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 889 | } |
AnnaBridge | 167:e84263d55307 | 890 | |
AnnaBridge | 167:e84263d55307 | 891 | /** |
AnnaBridge | 167:e84263d55307 | 892 | * @brief Disable DAC selected channel. |
AnnaBridge | 167:e84263d55307 | 893 | * @rmtoll CR EN1 LL_DAC_Disable\n |
AnnaBridge | 167:e84263d55307 | 894 | * CR EN2 LL_DAC_Disable |
AnnaBridge | 167:e84263d55307 | 895 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 896 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 897 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 898 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 899 | * @retval None |
AnnaBridge | 167:e84263d55307 | 900 | */ |
AnnaBridge | 167:e84263d55307 | 901 | __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 902 | { |
AnnaBridge | 167:e84263d55307 | 903 | CLEAR_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 904 | DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 905 | } |
AnnaBridge | 167:e84263d55307 | 906 | |
AnnaBridge | 167:e84263d55307 | 907 | /** |
AnnaBridge | 167:e84263d55307 | 908 | * @brief Get DAC enable state of the selected channel. |
AnnaBridge | 167:e84263d55307 | 909 | * (0: DAC channel is disabled, 1: DAC channel is enabled) |
AnnaBridge | 167:e84263d55307 | 910 | * @rmtoll CR EN1 LL_DAC_IsEnabled\n |
AnnaBridge | 167:e84263d55307 | 911 | * CR EN2 LL_DAC_IsEnabled |
AnnaBridge | 167:e84263d55307 | 912 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 913 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 914 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 915 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 916 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 917 | */ |
AnnaBridge | 167:e84263d55307 | 918 | __STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 919 | { |
AnnaBridge | 167:e84263d55307 | 920 | return (READ_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 921 | DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 922 | == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
AnnaBridge | 167:e84263d55307 | 923 | } |
AnnaBridge | 167:e84263d55307 | 924 | |
AnnaBridge | 167:e84263d55307 | 925 | /** |
AnnaBridge | 167:e84263d55307 | 926 | * @brief Enable DAC trigger of the selected channel. |
AnnaBridge | 167:e84263d55307 | 927 | * @note - If DAC trigger is disabled, DAC conversion is performed |
AnnaBridge | 167:e84263d55307 | 928 | * automatically once the data holding register is updated, |
AnnaBridge | 167:e84263d55307 | 929 | * using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": |
AnnaBridge | 167:e84263d55307 | 930 | * @ref LL_DAC_ConvertData12RightAligned(), ... |
AnnaBridge | 167:e84263d55307 | 931 | * - If DAC trigger is enabled, DAC conversion is performed |
AnnaBridge | 167:e84263d55307 | 932 | * only when a hardware of software trigger event is occurring. |
AnnaBridge | 167:e84263d55307 | 933 | * Select trigger source using |
AnnaBridge | 167:e84263d55307 | 934 | * function @ref LL_DAC_SetTriggerSource(). |
AnnaBridge | 167:e84263d55307 | 935 | * @rmtoll CR TEN1 LL_DAC_EnableTrigger\n |
AnnaBridge | 167:e84263d55307 | 936 | * CR TEN2 LL_DAC_EnableTrigger |
AnnaBridge | 167:e84263d55307 | 937 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 938 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 939 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 940 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 941 | * @retval None |
AnnaBridge | 167:e84263d55307 | 942 | */ |
AnnaBridge | 167:e84263d55307 | 943 | __STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 944 | { |
AnnaBridge | 167:e84263d55307 | 945 | SET_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 946 | DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 947 | } |
AnnaBridge | 167:e84263d55307 | 948 | |
AnnaBridge | 167:e84263d55307 | 949 | /** |
AnnaBridge | 167:e84263d55307 | 950 | * @brief Disable DAC trigger of the selected channel. |
AnnaBridge | 167:e84263d55307 | 951 | * @rmtoll CR TEN1 LL_DAC_DisableTrigger\n |
AnnaBridge | 167:e84263d55307 | 952 | * CR TEN2 LL_DAC_DisableTrigger |
AnnaBridge | 167:e84263d55307 | 953 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 954 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 955 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 956 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 957 | * @retval None |
AnnaBridge | 167:e84263d55307 | 958 | */ |
AnnaBridge | 167:e84263d55307 | 959 | __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 960 | { |
AnnaBridge | 167:e84263d55307 | 961 | CLEAR_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 962 | DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 963 | } |
AnnaBridge | 167:e84263d55307 | 964 | |
AnnaBridge | 167:e84263d55307 | 965 | /** |
AnnaBridge | 167:e84263d55307 | 966 | * @brief Get DAC trigger state of the selected channel. |
AnnaBridge | 167:e84263d55307 | 967 | * (0: DAC trigger is disabled, 1: DAC trigger is enabled) |
AnnaBridge | 167:e84263d55307 | 968 | * @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n |
AnnaBridge | 167:e84263d55307 | 969 | * CR TEN2 LL_DAC_IsTriggerEnabled |
AnnaBridge | 167:e84263d55307 | 970 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 971 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 972 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 973 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 974 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 975 | */ |
AnnaBridge | 167:e84263d55307 | 976 | __STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 977 | { |
AnnaBridge | 167:e84263d55307 | 978 | return (READ_BIT(DACx->CR, |
AnnaBridge | 167:e84263d55307 | 979 | DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
AnnaBridge | 167:e84263d55307 | 980 | == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
AnnaBridge | 167:e84263d55307 | 981 | } |
AnnaBridge | 167:e84263d55307 | 982 | |
AnnaBridge | 167:e84263d55307 | 983 | /** |
AnnaBridge | 167:e84263d55307 | 984 | * @brief Trig DAC conversion by software for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 985 | * @note Preliminarily, DAC trigger must be set to software trigger |
AnnaBridge | 167:e84263d55307 | 986 | * using function @ref LL_DAC_SetTriggerSource() |
AnnaBridge | 167:e84263d55307 | 987 | * with parameter "LL_DAC_TRIGGER_SOFTWARE". |
AnnaBridge | 167:e84263d55307 | 988 | * and DAC trigger must be enabled using |
AnnaBridge | 167:e84263d55307 | 989 | * function @ref LL_DAC_EnableTrigger(). |
AnnaBridge | 167:e84263d55307 | 990 | * @note For devices featuring DAC with 2 channels: this function |
AnnaBridge | 167:e84263d55307 | 991 | * can perform a SW start of both DAC channels simultaneously. |
AnnaBridge | 167:e84263d55307 | 992 | * Two channels can be selected as parameter. |
AnnaBridge | 167:e84263d55307 | 993 | * Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2) |
AnnaBridge | 167:e84263d55307 | 994 | * @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n |
AnnaBridge | 167:e84263d55307 | 995 | * SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion |
AnnaBridge | 167:e84263d55307 | 996 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 997 | * @param DAC_Channel This parameter can a combination of the following values: |
AnnaBridge | 167:e84263d55307 | 998 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 999 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 1000 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1001 | */ |
AnnaBridge | 167:e84263d55307 | 1002 | __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 1003 | { |
AnnaBridge | 167:e84263d55307 | 1004 | SET_BIT(DACx->SWTRIGR, |
AnnaBridge | 167:e84263d55307 | 1005 | (DAC_Channel & DAC_SWTR_CHX_MASK)); |
AnnaBridge | 167:e84263d55307 | 1006 | } |
AnnaBridge | 167:e84263d55307 | 1007 | |
AnnaBridge | 167:e84263d55307 | 1008 | /** |
AnnaBridge | 167:e84263d55307 | 1009 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1010 | * in format 12 bits left alignment (LSB aligned on bit 0), |
AnnaBridge | 167:e84263d55307 | 1011 | * for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 1012 | * @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n |
AnnaBridge | 167:e84263d55307 | 1013 | * DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned |
AnnaBridge | 167:e84263d55307 | 1014 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1015 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 1016 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 1017 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 1018 | * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1019 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1020 | */ |
AnnaBridge | 167:e84263d55307 | 1021 | __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
AnnaBridge | 167:e84263d55307 | 1022 | { |
AnnaBridge | 167:e84263d55307 | 1023 | register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 1024 | |
AnnaBridge | 167:e84263d55307 | 1025 | MODIFY_REG(*preg, |
AnnaBridge | 167:e84263d55307 | 1026 | DAC_DHR12R1_DACC1DHR, |
AnnaBridge | 167:e84263d55307 | 1027 | Data); |
AnnaBridge | 167:e84263d55307 | 1028 | } |
AnnaBridge | 167:e84263d55307 | 1029 | |
AnnaBridge | 167:e84263d55307 | 1030 | /** |
AnnaBridge | 167:e84263d55307 | 1031 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1032 | * in format 12 bits left alignment (MSB aligned on bit 15), |
AnnaBridge | 167:e84263d55307 | 1033 | * for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 1034 | * @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n |
AnnaBridge | 167:e84263d55307 | 1035 | * DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned |
AnnaBridge | 167:e84263d55307 | 1036 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1037 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 1038 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 1039 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 1040 | * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1041 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1042 | */ |
AnnaBridge | 167:e84263d55307 | 1043 | __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
AnnaBridge | 167:e84263d55307 | 1044 | { |
AnnaBridge | 167:e84263d55307 | 1045 | register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 1046 | |
AnnaBridge | 167:e84263d55307 | 1047 | MODIFY_REG(*preg, |
AnnaBridge | 167:e84263d55307 | 1048 | DAC_DHR12L1_DACC1DHR, |
AnnaBridge | 167:e84263d55307 | 1049 | Data); |
AnnaBridge | 167:e84263d55307 | 1050 | } |
AnnaBridge | 167:e84263d55307 | 1051 | |
AnnaBridge | 167:e84263d55307 | 1052 | /** |
AnnaBridge | 167:e84263d55307 | 1053 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1054 | * in format 8 bits left alignment (LSB aligned on bit 0), |
AnnaBridge | 167:e84263d55307 | 1055 | * for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 1056 | * @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n |
AnnaBridge | 167:e84263d55307 | 1057 | * DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned |
AnnaBridge | 167:e84263d55307 | 1058 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1059 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 1060 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 1061 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 1062 | * @param Data Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 167:e84263d55307 | 1063 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1064 | */ |
AnnaBridge | 167:e84263d55307 | 1065 | __STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
AnnaBridge | 167:e84263d55307 | 1066 | { |
AnnaBridge | 167:e84263d55307 | 1067 | register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 1068 | |
AnnaBridge | 167:e84263d55307 | 1069 | MODIFY_REG(*preg, |
AnnaBridge | 167:e84263d55307 | 1070 | DAC_DHR8R1_DACC1DHR, |
AnnaBridge | 167:e84263d55307 | 1071 | Data); |
AnnaBridge | 167:e84263d55307 | 1072 | } |
AnnaBridge | 167:e84263d55307 | 1073 | |
AnnaBridge | 167:e84263d55307 | 1074 | /** |
AnnaBridge | 167:e84263d55307 | 1075 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1076 | * in format 12 bits left alignment (LSB aligned on bit 0), |
AnnaBridge | 167:e84263d55307 | 1077 | * for both DAC channels. |
AnnaBridge | 167:e84263d55307 | 1078 | * @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n |
AnnaBridge | 167:e84263d55307 | 1079 | * DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned |
AnnaBridge | 167:e84263d55307 | 1080 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1081 | * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1082 | * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1083 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1084 | */ |
AnnaBridge | 167:e84263d55307 | 1085 | __STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
AnnaBridge | 167:e84263d55307 | 1086 | { |
AnnaBridge | 167:e84263d55307 | 1087 | MODIFY_REG(DACx->DHR12RD, |
AnnaBridge | 167:e84263d55307 | 1088 | (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR), |
AnnaBridge | 167:e84263d55307 | 1089 | ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1)); |
AnnaBridge | 167:e84263d55307 | 1090 | } |
AnnaBridge | 167:e84263d55307 | 1091 | |
AnnaBridge | 167:e84263d55307 | 1092 | /** |
AnnaBridge | 167:e84263d55307 | 1093 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1094 | * in format 12 bits left alignment (MSB aligned on bit 15), |
AnnaBridge | 167:e84263d55307 | 1095 | * for both DAC channels. |
AnnaBridge | 167:e84263d55307 | 1096 | * @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n |
AnnaBridge | 167:e84263d55307 | 1097 | * DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned |
AnnaBridge | 167:e84263d55307 | 1098 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1099 | * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1100 | * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1101 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1102 | */ |
AnnaBridge | 167:e84263d55307 | 1103 | __STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
AnnaBridge | 167:e84263d55307 | 1104 | { |
AnnaBridge | 167:e84263d55307 | 1105 | /* Note: Data of DAC channel 2 shift value subtracted of 4 because */ |
AnnaBridge | 167:e84263d55307 | 1106 | /* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */ |
AnnaBridge | 167:e84263d55307 | 1107 | /* the 4 LSB must be taken into account for the shift value. */ |
AnnaBridge | 167:e84263d55307 | 1108 | MODIFY_REG(DACx->DHR12LD, |
AnnaBridge | 167:e84263d55307 | 1109 | (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR), |
AnnaBridge | 167:e84263d55307 | 1110 | ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1)); |
AnnaBridge | 167:e84263d55307 | 1111 | } |
AnnaBridge | 167:e84263d55307 | 1112 | |
AnnaBridge | 167:e84263d55307 | 1113 | /** |
AnnaBridge | 167:e84263d55307 | 1114 | * @brief Set the data to be loaded in the data holding register |
AnnaBridge | 167:e84263d55307 | 1115 | * in format 8 bits left alignment (LSB aligned on bit 0), |
AnnaBridge | 167:e84263d55307 | 1116 | * for both DAC channels. |
AnnaBridge | 167:e84263d55307 | 1117 | * @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n |
AnnaBridge | 167:e84263d55307 | 1118 | * DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned |
AnnaBridge | 167:e84263d55307 | 1119 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1120 | * @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 167:e84263d55307 | 1121 | * @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 167:e84263d55307 | 1122 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1123 | */ |
AnnaBridge | 167:e84263d55307 | 1124 | __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
AnnaBridge | 167:e84263d55307 | 1125 | { |
AnnaBridge | 167:e84263d55307 | 1126 | MODIFY_REG(DACx->DHR8RD, |
AnnaBridge | 167:e84263d55307 | 1127 | (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR), |
AnnaBridge | 167:e84263d55307 | 1128 | ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1)); |
AnnaBridge | 167:e84263d55307 | 1129 | } |
AnnaBridge | 167:e84263d55307 | 1130 | |
AnnaBridge | 167:e84263d55307 | 1131 | /** |
AnnaBridge | 167:e84263d55307 | 1132 | * @brief Retrieve output data currently generated for the selected DAC channel. |
AnnaBridge | 167:e84263d55307 | 1133 | * @note Whatever alignment and resolution settings |
AnnaBridge | 167:e84263d55307 | 1134 | * (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": |
AnnaBridge | 167:e84263d55307 | 1135 | * @ref LL_DAC_ConvertData12RightAligned(), ...), |
AnnaBridge | 167:e84263d55307 | 1136 | * output data format is 12 bits right aligned (LSB aligned on bit 0). |
AnnaBridge | 167:e84263d55307 | 1137 | * @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n |
AnnaBridge | 167:e84263d55307 | 1138 | * DOR2 DACC2DOR LL_DAC_RetrieveOutputData |
AnnaBridge | 167:e84263d55307 | 1139 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1140 | * @param DAC_Channel This parameter can be one of the following values: |
AnnaBridge | 167:e84263d55307 | 1141 | * @arg @ref LL_DAC_CHANNEL_1 |
AnnaBridge | 167:e84263d55307 | 1142 | * @arg @ref LL_DAC_CHANNEL_2 |
AnnaBridge | 167:e84263d55307 | 1143 | * @retval Value between Min_Data=0x000 and Max_Data=0xFFF |
AnnaBridge | 167:e84263d55307 | 1144 | */ |
AnnaBridge | 167:e84263d55307 | 1145 | __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
AnnaBridge | 167:e84263d55307 | 1146 | { |
AnnaBridge | 167:e84263d55307 | 1147 | register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK)); |
AnnaBridge | 167:e84263d55307 | 1148 | |
AnnaBridge | 167:e84263d55307 | 1149 | return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR); |
AnnaBridge | 167:e84263d55307 | 1150 | } |
AnnaBridge | 167:e84263d55307 | 1151 | |
AnnaBridge | 167:e84263d55307 | 1152 | /** |
AnnaBridge | 167:e84263d55307 | 1153 | * @} |
AnnaBridge | 167:e84263d55307 | 1154 | */ |
AnnaBridge | 167:e84263d55307 | 1155 | |
AnnaBridge | 167:e84263d55307 | 1156 | /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management |
AnnaBridge | 167:e84263d55307 | 1157 | * @{ |
AnnaBridge | 167:e84263d55307 | 1158 | */ |
AnnaBridge | 167:e84263d55307 | 1159 | /** |
AnnaBridge | 167:e84263d55307 | 1160 | * @brief Get DAC underrun flag for DAC channel 1 |
AnnaBridge | 167:e84263d55307 | 1161 | * @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1 |
AnnaBridge | 167:e84263d55307 | 1162 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1163 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 1164 | */ |
AnnaBridge | 167:e84263d55307 | 1165 | __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1166 | { |
AnnaBridge | 167:e84263d55307 | 1167 | return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)); |
AnnaBridge | 167:e84263d55307 | 1168 | } |
AnnaBridge | 167:e84263d55307 | 1169 | |
AnnaBridge | 167:e84263d55307 | 1170 | /** |
AnnaBridge | 167:e84263d55307 | 1171 | * @brief Get DAC underrun flag for DAC channel 2 |
AnnaBridge | 167:e84263d55307 | 1172 | * @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2 |
AnnaBridge | 167:e84263d55307 | 1173 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1174 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 1175 | */ |
AnnaBridge | 167:e84263d55307 | 1176 | __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1177 | { |
AnnaBridge | 167:e84263d55307 | 1178 | return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)); |
AnnaBridge | 167:e84263d55307 | 1179 | } |
AnnaBridge | 167:e84263d55307 | 1180 | |
AnnaBridge | 167:e84263d55307 | 1181 | /** |
AnnaBridge | 167:e84263d55307 | 1182 | * @brief Clear DAC underrun flag for DAC channel 1 |
AnnaBridge | 167:e84263d55307 | 1183 | * @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1 |
AnnaBridge | 167:e84263d55307 | 1184 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1185 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1186 | */ |
AnnaBridge | 167:e84263d55307 | 1187 | __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1188 | { |
AnnaBridge | 167:e84263d55307 | 1189 | WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1); |
AnnaBridge | 167:e84263d55307 | 1190 | } |
AnnaBridge | 167:e84263d55307 | 1191 | |
AnnaBridge | 167:e84263d55307 | 1192 | /** |
AnnaBridge | 167:e84263d55307 | 1193 | * @brief Clear DAC underrun flag for DAC channel 2 |
AnnaBridge | 167:e84263d55307 | 1194 | * @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2 |
AnnaBridge | 167:e84263d55307 | 1195 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1196 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1197 | */ |
AnnaBridge | 167:e84263d55307 | 1198 | __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1199 | { |
AnnaBridge | 167:e84263d55307 | 1200 | WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2); |
AnnaBridge | 167:e84263d55307 | 1201 | } |
AnnaBridge | 167:e84263d55307 | 1202 | |
AnnaBridge | 167:e84263d55307 | 1203 | /** |
AnnaBridge | 167:e84263d55307 | 1204 | * @} |
AnnaBridge | 167:e84263d55307 | 1205 | */ |
AnnaBridge | 167:e84263d55307 | 1206 | |
AnnaBridge | 167:e84263d55307 | 1207 | /** @defgroup DAC_LL_EF_IT_Management IT management |
AnnaBridge | 167:e84263d55307 | 1208 | * @{ |
AnnaBridge | 167:e84263d55307 | 1209 | */ |
AnnaBridge | 167:e84263d55307 | 1210 | |
AnnaBridge | 167:e84263d55307 | 1211 | /** |
AnnaBridge | 167:e84263d55307 | 1212 | * @brief Enable DMA underrun interrupt for DAC channel 1 |
AnnaBridge | 167:e84263d55307 | 1213 | * @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1 |
AnnaBridge | 167:e84263d55307 | 1214 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1215 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1216 | */ |
AnnaBridge | 167:e84263d55307 | 1217 | __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1218 | { |
AnnaBridge | 167:e84263d55307 | 1219 | SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1); |
AnnaBridge | 167:e84263d55307 | 1220 | } |
AnnaBridge | 167:e84263d55307 | 1221 | |
AnnaBridge | 167:e84263d55307 | 1222 | /** |
AnnaBridge | 167:e84263d55307 | 1223 | * @brief Enable DMA underrun interrupt for DAC channel 2 |
AnnaBridge | 167:e84263d55307 | 1224 | * @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2 |
AnnaBridge | 167:e84263d55307 | 1225 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1226 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1227 | */ |
AnnaBridge | 167:e84263d55307 | 1228 | __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1229 | { |
AnnaBridge | 167:e84263d55307 | 1230 | SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2); |
AnnaBridge | 167:e84263d55307 | 1231 | } |
AnnaBridge | 167:e84263d55307 | 1232 | |
AnnaBridge | 167:e84263d55307 | 1233 | /** |
AnnaBridge | 167:e84263d55307 | 1234 | * @brief Disable DMA underrun interrupt for DAC channel 1 |
AnnaBridge | 167:e84263d55307 | 1235 | * @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1 |
AnnaBridge | 167:e84263d55307 | 1236 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1237 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1238 | */ |
AnnaBridge | 167:e84263d55307 | 1239 | __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1240 | { |
AnnaBridge | 167:e84263d55307 | 1241 | CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1); |
AnnaBridge | 167:e84263d55307 | 1242 | } |
AnnaBridge | 167:e84263d55307 | 1243 | |
AnnaBridge | 167:e84263d55307 | 1244 | /** |
AnnaBridge | 167:e84263d55307 | 1245 | * @brief Disable DMA underrun interrupt for DAC channel 2 |
AnnaBridge | 167:e84263d55307 | 1246 | * @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2 |
AnnaBridge | 167:e84263d55307 | 1247 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1248 | * @retval None |
AnnaBridge | 167:e84263d55307 | 1249 | */ |
AnnaBridge | 167:e84263d55307 | 1250 | __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1251 | { |
AnnaBridge | 167:e84263d55307 | 1252 | CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2); |
AnnaBridge | 167:e84263d55307 | 1253 | } |
AnnaBridge | 167:e84263d55307 | 1254 | |
AnnaBridge | 167:e84263d55307 | 1255 | /** |
AnnaBridge | 167:e84263d55307 | 1256 | * @brief Get DMA underrun interrupt for DAC channel 1 |
AnnaBridge | 167:e84263d55307 | 1257 | * @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1 |
AnnaBridge | 167:e84263d55307 | 1258 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1259 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 1260 | */ |
AnnaBridge | 167:e84263d55307 | 1261 | __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1262 | { |
AnnaBridge | 167:e84263d55307 | 1263 | return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)); |
AnnaBridge | 167:e84263d55307 | 1264 | } |
AnnaBridge | 167:e84263d55307 | 1265 | |
AnnaBridge | 167:e84263d55307 | 1266 | /** |
AnnaBridge | 167:e84263d55307 | 1267 | * @brief Get DMA underrun interrupt for DAC channel 2 |
AnnaBridge | 167:e84263d55307 | 1268 | * @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2 |
AnnaBridge | 167:e84263d55307 | 1269 | * @param DACx DAC instance |
AnnaBridge | 167:e84263d55307 | 1270 | * @retval State of bit (1 or 0). |
AnnaBridge | 167:e84263d55307 | 1271 | */ |
AnnaBridge | 167:e84263d55307 | 1272 | __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx) |
AnnaBridge | 167:e84263d55307 | 1273 | { |
AnnaBridge | 167:e84263d55307 | 1274 | return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)); |
AnnaBridge | 167:e84263d55307 | 1275 | } |
AnnaBridge | 167:e84263d55307 | 1276 | |
AnnaBridge | 167:e84263d55307 | 1277 | /** |
AnnaBridge | 167:e84263d55307 | 1278 | * @} |
AnnaBridge | 167:e84263d55307 | 1279 | */ |
AnnaBridge | 167:e84263d55307 | 1280 | |
AnnaBridge | 167:e84263d55307 | 1281 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 167:e84263d55307 | 1282 | /** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions |
AnnaBridge | 167:e84263d55307 | 1283 | * @{ |
AnnaBridge | 167:e84263d55307 | 1284 | */ |
AnnaBridge | 167:e84263d55307 | 1285 | |
AnnaBridge | 167:e84263d55307 | 1286 | ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx); |
AnnaBridge | 167:e84263d55307 | 1287 | ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct); |
AnnaBridge | 167:e84263d55307 | 1288 | void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct); |
AnnaBridge | 167:e84263d55307 | 1289 | |
AnnaBridge | 167:e84263d55307 | 1290 | /** |
AnnaBridge | 167:e84263d55307 | 1291 | * @} |
AnnaBridge | 167:e84263d55307 | 1292 | */ |
AnnaBridge | 167:e84263d55307 | 1293 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 167:e84263d55307 | 1294 | |
AnnaBridge | 167:e84263d55307 | 1295 | /** |
AnnaBridge | 167:e84263d55307 | 1296 | * @} |
AnnaBridge | 167:e84263d55307 | 1297 | */ |
AnnaBridge | 167:e84263d55307 | 1298 | |
AnnaBridge | 167:e84263d55307 | 1299 | /** |
AnnaBridge | 167:e84263d55307 | 1300 | * @} |
AnnaBridge | 167:e84263d55307 | 1301 | */ |
AnnaBridge | 167:e84263d55307 | 1302 | |
AnnaBridge | 167:e84263d55307 | 1303 | #endif /* DAC */ |
AnnaBridge | 167:e84263d55307 | 1304 | |
AnnaBridge | 167:e84263d55307 | 1305 | /** |
AnnaBridge | 167:e84263d55307 | 1306 | * @} |
AnnaBridge | 167:e84263d55307 | 1307 | */ |
AnnaBridge | 167:e84263d55307 | 1308 | |
AnnaBridge | 167:e84263d55307 | 1309 | #ifdef __cplusplus |
AnnaBridge | 167:e84263d55307 | 1310 | } |
AnnaBridge | 167:e84263d55307 | 1311 | #endif |
AnnaBridge | 167:e84263d55307 | 1312 | |
AnnaBridge | 167:e84263d55307 | 1313 | #endif /* __STM32F2xx_LL_DAC_H */ |
AnnaBridge | 167:e84263d55307 | 1314 | |
AnnaBridge | 167:e84263d55307 | 1315 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |