mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc_ex.h@167:e84263d55307, 2017-06-21 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Jun 21 17:46:44 2017 +0100
- Revision:
- 167:e84263d55307
- Parent:
- 149:156823d33999
This updates the lib to the mbed lib v 145
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f2xx_hal_adc_ex.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
AnnaBridge | 167:e84263d55307 | 5 | * @version V1.2.1 |
AnnaBridge | 167:e84263d55307 | 6 | * @date 14-April-2017 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of ADC HAL extension module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
AnnaBridge | 167:e84263d55307 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F2xx_ADC_EX_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F2xx_ADC_EX_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 47 | #include "stm32f2xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** @addtogroup STM32F2xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 50 | * @{ |
<> | 144:ef7eb2e8f9f7 | 51 | */ |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /** @addtogroup ADCEx |
<> | 144:ef7eb2e8f9f7 | 54 | * @{ |
<> | 144:ef7eb2e8f9f7 | 55 | */ |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 58 | /** @defgroup ADCEx_Exported_Types ADC Exported Types |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /** |
<> | 144:ef7eb2e8f9f7 | 63 | * @brief ADC Configuration injected Channel structure definition |
<> | 144:ef7eb2e8f9f7 | 64 | * @note Parameters of this structure are shared within 2 scopes: |
<> | 144:ef7eb2e8f9f7 | 65 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
<> | 144:ef7eb2e8f9f7 | 66 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
<> | 144:ef7eb2e8f9f7 | 67 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
<> | 144:ef7eb2e8f9f7 | 68 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
<> | 144:ef7eb2e8f9f7 | 69 | * ADC state can be either: |
<> | 144:ef7eb2e8f9f7 | 70 | * - For all parameters: ADC disabled |
<> | 144:ef7eb2e8f9f7 | 71 | * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group. |
<> | 144:ef7eb2e8f9f7 | 72 | * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group. |
<> | 144:ef7eb2e8f9f7 | 73 | */ |
<> | 144:ef7eb2e8f9f7 | 74 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 75 | { |
<> | 144:ef7eb2e8f9f7 | 76 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
<> | 144:ef7eb2e8f9f7 | 77 | This parameter can be a value of @ref ADC_channels |
<> | 144:ef7eb2e8f9f7 | 78 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ |
<> | 144:ef7eb2e8f9f7 | 79 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
<> | 144:ef7eb2e8f9f7 | 80 | This parameter must be a value of @ref ADCEx_injected_rank |
<> | 144:ef7eb2e8f9f7 | 81 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
<> | 144:ef7eb2e8f9f7 | 82 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
<> | 144:ef7eb2e8f9f7 | 83 | Unit: ADC clock cycles |
<> | 144:ef7eb2e8f9f7 | 84 | Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits). |
<> | 144:ef7eb2e8f9f7 | 85 | This parameter can be a value of @ref ADC_sampling_times |
<> | 144:ef7eb2e8f9f7 | 86 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
<> | 144:ef7eb2e8f9f7 | 87 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
<> | 144:ef7eb2e8f9f7 | 88 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
<> | 144:ef7eb2e8f9f7 | 89 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
<> | 144:ef7eb2e8f9f7 | 90 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */ |
<> | 144:ef7eb2e8f9f7 | 91 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
<> | 144:ef7eb2e8f9f7 | 92 | Offset value must be a positive number. |
<> | 144:ef7eb2e8f9f7 | 93 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
<> | 144:ef7eb2e8f9f7 | 94 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
<> | 144:ef7eb2e8f9f7 | 95 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
<> | 144:ef7eb2e8f9f7 | 96 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
<> | 144:ef7eb2e8f9f7 | 97 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
<> | 144:ef7eb2e8f9f7 | 98 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
<> | 144:ef7eb2e8f9f7 | 99 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
<> | 144:ef7eb2e8f9f7 | 100 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
<> | 144:ef7eb2e8f9f7 | 101 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
<> | 144:ef7eb2e8f9f7 | 102 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
<> | 144:ef7eb2e8f9f7 | 103 | This parameter can be set to ENABLE or DISABLE. |
<> | 144:ef7eb2e8f9f7 | 104 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
<> | 144:ef7eb2e8f9f7 | 105 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
<> | 144:ef7eb2e8f9f7 | 106 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
<> | 144:ef7eb2e8f9f7 | 107 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
<> | 144:ef7eb2e8f9f7 | 108 | This parameter can be set to ENABLE or DISABLE. |
<> | 144:ef7eb2e8f9f7 | 109 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
<> | 144:ef7eb2e8f9f7 | 110 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
<> | 144:ef7eb2e8f9f7 | 111 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
<> | 144:ef7eb2e8f9f7 | 112 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
<> | 144:ef7eb2e8f9f7 | 113 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
<> | 144:ef7eb2e8f9f7 | 114 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
<> | 144:ef7eb2e8f9f7 | 115 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
<> | 144:ef7eb2e8f9f7 | 116 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
<> | 144:ef7eb2e8f9f7 | 117 | If set to external trigger source, triggering is on event rising edge. |
<> | 144:ef7eb2e8f9f7 | 118 | This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected |
<> | 144:ef7eb2e8f9f7 | 119 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
<> | 144:ef7eb2e8f9f7 | 120 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
<> | 144:ef7eb2e8f9f7 | 121 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
<> | 144:ef7eb2e8f9f7 | 122 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
<> | 144:ef7eb2e8f9f7 | 123 | uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. |
<> | 144:ef7eb2e8f9f7 | 124 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected. |
<> | 144:ef7eb2e8f9f7 | 125 | If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. |
<> | 144:ef7eb2e8f9f7 | 126 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
<> | 144:ef7eb2e8f9f7 | 127 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
<> | 144:ef7eb2e8f9f7 | 128 | }ADC_InjectionConfTypeDef; |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | /** |
<> | 144:ef7eb2e8f9f7 | 131 | * @brief ADC Configuration multi-mode structure definition |
<> | 144:ef7eb2e8f9f7 | 132 | */ |
<> | 144:ef7eb2e8f9f7 | 133 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 134 | { |
<> | 144:ef7eb2e8f9f7 | 135 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
<> | 144:ef7eb2e8f9f7 | 136 | This parameter can be a value of @ref ADCEx_Common_mode */ |
<> | 144:ef7eb2e8f9f7 | 137 | uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode. |
<> | 144:ef7eb2e8f9f7 | 138 | This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */ |
<> | 144:ef7eb2e8f9f7 | 139 | uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. |
<> | 144:ef7eb2e8f9f7 | 140 | This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */ |
<> | 144:ef7eb2e8f9f7 | 141 | }ADC_MultiModeTypeDef; |
<> | 144:ef7eb2e8f9f7 | 142 | |
<> | 144:ef7eb2e8f9f7 | 143 | /** |
<> | 144:ef7eb2e8f9f7 | 144 | * @} |
<> | 144:ef7eb2e8f9f7 | 145 | */ |
<> | 144:ef7eb2e8f9f7 | 146 | |
<> | 144:ef7eb2e8f9f7 | 147 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 148 | /** @defgroup ADCEx_Exported_Constants ADC Exported Constants |
<> | 144:ef7eb2e8f9f7 | 149 | * @{ |
<> | 144:ef7eb2e8f9f7 | 150 | */ |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | /** @defgroup ADCEx_Common_mode ADC Common Mode |
<> | 144:ef7eb2e8f9f7 | 153 | * @{ |
<> | 144:ef7eb2e8f9f7 | 154 | */ |
AnnaBridge | 167:e84263d55307 | 155 | #define ADC_MODE_INDEPENDENT 0x00000000U |
<> | 144:ef7eb2e8f9f7 | 156 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0) |
<> | 144:ef7eb2e8f9f7 | 157 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1) |
<> | 144:ef7eb2e8f9f7 | 158 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 159 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
<> | 144:ef7eb2e8f9f7 | 160 | #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 161 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 162 | #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 163 | #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1)) |
<> | 144:ef7eb2e8f9f7 | 164 | #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 165 | #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
<> | 144:ef7eb2e8f9f7 | 166 | #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 167 | #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
<> | 144:ef7eb2e8f9f7 | 168 | /** |
<> | 144:ef7eb2e8f9f7 | 169 | * @} |
<> | 144:ef7eb2e8f9f7 | 170 | */ |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode |
<> | 144:ef7eb2e8f9f7 | 173 | * @{ |
<> | 144:ef7eb2e8f9f7 | 174 | */ |
AnnaBridge | 167:e84263d55307 | 175 | #define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */ |
<> | 144:ef7eb2e8f9f7 | 176 | #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/ |
<> | 144:ef7eb2e8f9f7 | 177 | #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/ |
<> | 144:ef7eb2e8f9f7 | 178 | #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */ |
<> | 144:ef7eb2e8f9f7 | 179 | /** |
<> | 144:ef7eb2e8f9f7 | 180 | * @} |
<> | 144:ef7eb2e8f9f7 | 181 | */ |
<> | 144:ef7eb2e8f9f7 | 182 | |
<> | 144:ef7eb2e8f9f7 | 183 | /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected |
<> | 144:ef7eb2e8f9f7 | 184 | * @{ |
<> | 144:ef7eb2e8f9f7 | 185 | */ |
AnnaBridge | 167:e84263d55307 | 186 | #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U |
<> | 144:ef7eb2e8f9f7 | 187 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) |
<> | 144:ef7eb2e8f9f7 | 188 | #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) |
<> | 144:ef7eb2e8f9f7 | 189 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) |
<> | 144:ef7eb2e8f9f7 | 190 | /** |
<> | 144:ef7eb2e8f9f7 | 191 | * @} |
<> | 144:ef7eb2e8f9f7 | 192 | */ |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected |
<> | 144:ef7eb2e8f9f7 | 195 | * @{ |
<> | 144:ef7eb2e8f9f7 | 196 | */ |
AnnaBridge | 167:e84263d55307 | 197 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U |
<> | 144:ef7eb2e8f9f7 | 198 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0) |
<> | 144:ef7eb2e8f9f7 | 199 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1) |
<> | 144:ef7eb2e8f9f7 | 200 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 201 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2) |
<> | 144:ef7eb2e8f9f7 | 202 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 203 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
<> | 144:ef7eb2e8f9f7 | 204 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 205 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3) |
<> | 144:ef7eb2e8f9f7 | 206 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 207 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1)) |
<> | 144:ef7eb2e8f9f7 | 208 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 209 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2)) |
<> | 144:ef7eb2e8f9f7 | 210 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
<> | 144:ef7eb2e8f9f7 | 211 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
<> | 144:ef7eb2e8f9f7 | 212 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL) |
<> | 144:ef7eb2e8f9f7 | 213 | #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U) |
<> | 144:ef7eb2e8f9f7 | 214 | /** |
<> | 144:ef7eb2e8f9f7 | 215 | * @} |
<> | 144:ef7eb2e8f9f7 | 216 | */ |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | /** @defgroup ADCEx_injected_rank ADC Injected Rank |
<> | 144:ef7eb2e8f9f7 | 219 | * @{ |
<> | 144:ef7eb2e8f9f7 | 220 | */ |
AnnaBridge | 167:e84263d55307 | 221 | #define ADC_INJECTED_RANK_1 0x00000001U |
AnnaBridge | 167:e84263d55307 | 222 | #define ADC_INJECTED_RANK_2 0x00000002U |
AnnaBridge | 167:e84263d55307 | 223 | #define ADC_INJECTED_RANK_3 0x00000003U |
AnnaBridge | 167:e84263d55307 | 224 | #define ADC_INJECTED_RANK_4 0x00000004U |
<> | 144:ef7eb2e8f9f7 | 225 | /** |
<> | 144:ef7eb2e8f9f7 | 226 | * @} |
<> | 144:ef7eb2e8f9f7 | 227 | */ |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /** @defgroup ADCEx_channels ADC Specific Channels |
<> | 144:ef7eb2e8f9f7 | 230 | * @{ |
<> | 144:ef7eb2e8f9f7 | 231 | */ |
<> | 144:ef7eb2e8f9f7 | 232 | #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16) |
<> | 144:ef7eb2e8f9f7 | 233 | /** |
<> | 144:ef7eb2e8f9f7 | 234 | * @} |
<> | 144:ef7eb2e8f9f7 | 235 | */ |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | /** |
<> | 144:ef7eb2e8f9f7 | 239 | * @} |
<> | 144:ef7eb2e8f9f7 | 240 | */ |
<> | 144:ef7eb2e8f9f7 | 241 | |
<> | 144:ef7eb2e8f9f7 | 242 | /* Exported macro ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 243 | /** @defgroup ADC_Exported_Macros ADC Exported Macros |
<> | 144:ef7eb2e8f9f7 | 244 | * @{ |
<> | 144:ef7eb2e8f9f7 | 245 | */ |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /** |
<> | 144:ef7eb2e8f9f7 | 248 | * @} |
<> | 144:ef7eb2e8f9f7 | 249 | */ |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 252 | /** @addtogroup ADCEx_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 253 | * @{ |
<> | 144:ef7eb2e8f9f7 | 254 | */ |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 257 | * @{ |
<> | 144:ef7eb2e8f9f7 | 258 | */ |
<> | 144:ef7eb2e8f9f7 | 259 | |
<> | 144:ef7eb2e8f9f7 | 260 | /* I/O operation functions ******************************************************/ |
<> | 144:ef7eb2e8f9f7 | 261 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 262 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 263 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 264 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 265 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 266 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
<> | 144:ef7eb2e8f9f7 | 267 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); |
<> | 144:ef7eb2e8f9f7 | 268 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 269 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 270 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
<> | 144:ef7eb2e8f9f7 | 271 | |
<> | 144:ef7eb2e8f9f7 | 272 | /* Peripheral Control functions *************************************************/ |
<> | 144:ef7eb2e8f9f7 | 273 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
<> | 144:ef7eb2e8f9f7 | 274 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode); |
<> | 144:ef7eb2e8f9f7 | 275 | |
<> | 144:ef7eb2e8f9f7 | 276 | /** |
<> | 144:ef7eb2e8f9f7 | 277 | * @} |
<> | 144:ef7eb2e8f9f7 | 278 | */ |
<> | 144:ef7eb2e8f9f7 | 279 | |
<> | 144:ef7eb2e8f9f7 | 280 | /** |
<> | 144:ef7eb2e8f9f7 | 281 | * @} |
<> | 144:ef7eb2e8f9f7 | 282 | */ |
<> | 144:ef7eb2e8f9f7 | 283 | /* Private types -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 284 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 285 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 286 | /** @defgroup ADCEx_Private_Constants ADC Private Constants |
<> | 144:ef7eb2e8f9f7 | 287 | * @{ |
<> | 144:ef7eb2e8f9f7 | 288 | */ |
<> | 144:ef7eb2e8f9f7 | 289 | |
<> | 144:ef7eb2e8f9f7 | 290 | /** |
<> | 144:ef7eb2e8f9f7 | 291 | * @} |
<> | 144:ef7eb2e8f9f7 | 292 | */ |
<> | 144:ef7eb2e8f9f7 | 293 | |
<> | 144:ef7eb2e8f9f7 | 294 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 295 | /** @defgroup ADCEx_Private_Macros ADC Private Macros |
<> | 144:ef7eb2e8f9f7 | 296 | * @{ |
<> | 144:ef7eb2e8f9f7 | 297 | */ |
<> | 144:ef7eb2e8f9f7 | 298 | #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18) |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
<> | 144:ef7eb2e8f9f7 | 301 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 302 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
<> | 144:ef7eb2e8f9f7 | 303 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 304 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 305 | ((MODE) == ADC_DUALMODE_INTERL) || \ |
<> | 144:ef7eb2e8f9f7 | 306 | ((MODE) == ADC_DUALMODE_ALTERTRIG) || \ |
<> | 144:ef7eb2e8f9f7 | 307 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 308 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \ |
<> | 144:ef7eb2e8f9f7 | 309 | ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 310 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \ |
<> | 144:ef7eb2e8f9f7 | 311 | ((MODE) == ADC_TRIPLEMODE_INTERL) || \ |
<> | 144:ef7eb2e8f9f7 | 312 | ((MODE) == ADC_TRIPLEMODE_ALTERTRIG)) |
<> | 144:ef7eb2e8f9f7 | 313 | #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \ |
<> | 144:ef7eb2e8f9f7 | 314 | ((MODE) == ADC_DMAACCESSMODE_1) || \ |
<> | 144:ef7eb2e8f9f7 | 315 | ((MODE) == ADC_DMAACCESSMODE_2) || \ |
<> | 144:ef7eb2e8f9f7 | 316 | ((MODE) == ADC_DMAACCESSMODE_3)) |
<> | 144:ef7eb2e8f9f7 | 317 | #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \ |
<> | 144:ef7eb2e8f9f7 | 318 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \ |
<> | 144:ef7eb2e8f9f7 | 319 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \ |
<> | 144:ef7eb2e8f9f7 | 320 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING)) |
<> | 144:ef7eb2e8f9f7 | 321 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
<> | 144:ef7eb2e8f9f7 | 322 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
<> | 144:ef7eb2e8f9f7 | 323 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
<> | 144:ef7eb2e8f9f7 | 324 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
<> | 144:ef7eb2e8f9f7 | 325 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \ |
<> | 144:ef7eb2e8f9f7 | 326 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
<> | 144:ef7eb2e8f9f7 | 327 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ |
<> | 144:ef7eb2e8f9f7 | 328 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ |
<> | 144:ef7eb2e8f9f7 | 329 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
<> | 144:ef7eb2e8f9f7 | 330 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
<> | 144:ef7eb2e8f9f7 | 331 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
<> | 144:ef7eb2e8f9f7 | 332 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
<> | 144:ef7eb2e8f9f7 | 333 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
<> | 144:ef7eb2e8f9f7 | 334 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \ |
<> | 144:ef7eb2e8f9f7 | 335 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
<> | 144:ef7eb2e8f9f7 | 336 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \ |
<> | 144:ef7eb2e8f9f7 | 337 | ((INJTRIG) == ADC_INJECTED_SOFTWARE_START)) |
<> | 144:ef7eb2e8f9f7 | 338 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)4U))) |
<> | 144:ef7eb2e8f9f7 | 339 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1U)) && ((RANK) <= ((uint32_t)4U))) |
<> | 144:ef7eb2e8f9f7 | 340 | |
<> | 144:ef7eb2e8f9f7 | 341 | /** |
<> | 144:ef7eb2e8f9f7 | 342 | * @brief Set the selected injected Channel rank. |
<> | 144:ef7eb2e8f9f7 | 343 | * @param _CHANNELNB_: Channel number. |
<> | 144:ef7eb2e8f9f7 | 344 | * @param _RANKNB_: Rank number. |
AnnaBridge | 167:e84263d55307 | 345 | * @param _JSQR_JL_: Sequence length. |
<> | 144:ef7eb2e8f9f7 | 346 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 347 | */ |
<> | 144:ef7eb2e8f9f7 | 348 | #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_)))) |
<> | 144:ef7eb2e8f9f7 | 349 | |
<> | 144:ef7eb2e8f9f7 | 350 | /** |
<> | 144:ef7eb2e8f9f7 | 351 | * @} |
<> | 144:ef7eb2e8f9f7 | 352 | */ |
<> | 144:ef7eb2e8f9f7 | 353 | |
<> | 144:ef7eb2e8f9f7 | 354 | /* Private functions ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 355 | /** @defgroup ADCEx_Private_Functions ADC Private Functions |
<> | 144:ef7eb2e8f9f7 | 356 | * @{ |
<> | 144:ef7eb2e8f9f7 | 357 | */ |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | /** |
<> | 144:ef7eb2e8f9f7 | 360 | * @} |
<> | 144:ef7eb2e8f9f7 | 361 | */ |
<> | 144:ef7eb2e8f9f7 | 362 | |
<> | 144:ef7eb2e8f9f7 | 363 | /** |
<> | 144:ef7eb2e8f9f7 | 364 | * @} |
<> | 144:ef7eb2e8f9f7 | 365 | */ |
<> | 144:ef7eb2e8f9f7 | 366 | |
<> | 144:ef7eb2e8f9f7 | 367 | /** |
<> | 144:ef7eb2e8f9f7 | 368 | * @} |
<> | 144:ef7eb2e8f9f7 | 369 | */ |
<> | 144:ef7eb2e8f9f7 | 370 | |
<> | 144:ef7eb2e8f9f7 | 371 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 372 | } |
<> | 144:ef7eb2e8f9f7 | 373 | #endif |
<> | 144:ef7eb2e8f9f7 | 374 | |
<> | 144:ef7eb2e8f9f7 | 375 | #endif /*__STM32F2xx_ADC_EX_H */ |
<> | 144:ef7eb2e8f9f7 | 376 | |
<> | 144:ef7eb2e8f9f7 | 377 | |
<> | 144:ef7eb2e8f9f7 | 378 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |