mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
154:37f96f9d4de2
Child:
187:0387e8f68319
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_usart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @version V1.1.0
AnnaBridge 165:e614a9f1c9e2 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 165:e614a9f1c9e2 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F1xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F1xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USART
<> 144:ef7eb2e8f9f7 54 * @{
AnnaBridge 165:e614a9f1c9e2 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup USART_Exported_Types USART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
AnnaBridge 165:e614a9f1c9e2 60 */
<> 144:ef7eb2e8f9f7 61
AnnaBridge 165:e614a9f1c9e2 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief USART Init Structure definition
AnnaBridge 165:e614a9f1c9e2 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (16 * (husart->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref USART_Word_Length */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 76 This parameter can be a value of @ref USART_Stop_Bits */
<> 144:ef7eb2e8f9f7 77
AnnaBridge 165:e614a9f1c9e2 78 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 79 This parameter can be a value of @ref USART_Parity
<> 144:ef7eb2e8f9f7 80 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 81 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 82 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 83 word length is set to 8 data bits). */
AnnaBridge 165:e614a9f1c9e2 84
AnnaBridge 165:e614a9f1c9e2 85 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 86 This parameter can be a value of @ref USART_Mode */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref USART_Clock_Polarity */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 144:ef7eb2e8f9f7 92 This parameter can be a value of @ref USART_Clock_Phase */
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 144:ef7eb2e8f9f7 95 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 144:ef7eb2e8f9f7 96 This parameter can be a value of @ref USART_Last_Bit */
<> 144:ef7eb2e8f9f7 97 }USART_InitTypeDef;
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /**
<> 144:ef7eb2e8f9f7 100 * @brief HAL State structures definition
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 typedef enum
<> 144:ef7eb2e8f9f7 103 {
AnnaBridge 165:e614a9f1c9e2 104 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not yet initialized */
AnnaBridge 165:e614a9f1c9e2 105 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 165:e614a9f1c9e2 106 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
AnnaBridge 165:e614a9f1c9e2 107 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
AnnaBridge 165:e614a9f1c9e2 108 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
AnnaBridge 165:e614a9f1c9e2 109 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
AnnaBridge 165:e614a9f1c9e2 110 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 165:e614a9f1c9e2 111 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 112 }HAL_USART_StateTypeDef;
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /**
<> 144:ef7eb2e8f9f7 115 * @brief USART handle Structure definition
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 typedef struct
<> 144:ef7eb2e8f9f7 118 {
<> 144:ef7eb2e8f9f7 119 USART_TypeDef *Instance; /*!< USART registers base address */
AnnaBridge 165:e614a9f1c9e2 120
AnnaBridge 165:e614a9f1c9e2 121 USART_InitTypeDef Init; /*!< Usart communication parameters */
AnnaBridge 165:e614a9f1c9e2 122
<> 144:ef7eb2e8f9f7 123 uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 124
AnnaBridge 165:e614a9f1c9e2 125 uint16_t TxXferSize; /*!< Usart Tx Transfer size */
AnnaBridge 165:e614a9f1c9e2 126
AnnaBridge 165:e614a9f1c9e2 127 __IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */
AnnaBridge 165:e614a9f1c9e2 128
<> 144:ef7eb2e8f9f7 129 uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 130
AnnaBridge 165:e614a9f1c9e2 131 uint16_t RxXferSize; /*!< Usart Rx Transfer size */
AnnaBridge 165:e614a9f1c9e2 132
AnnaBridge 165:e614a9f1c9e2 133 __IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */
AnnaBridge 165:e614a9f1c9e2 134
AnnaBridge 165:e614a9f1c9e2 135 DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */
AnnaBridge 165:e614a9f1c9e2 136
AnnaBridge 165:e614a9f1c9e2 137 DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */
AnnaBridge 165:e614a9f1c9e2 138
AnnaBridge 165:e614a9f1c9e2 139 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 140
AnnaBridge 165:e614a9f1c9e2 141 __IO HAL_USART_StateTypeDef State; /*!< Usart communication state */
<> 144:ef7eb2e8f9f7 142
AnnaBridge 165:e614a9f1c9e2 143 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 144:ef7eb2e8f9f7 144 }USART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 145 /**
<> 144:ef7eb2e8f9f7 146 * @}
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /* Exported constants --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 150 /** @defgroup USART_Exported_Constants USART Exported Constants
<> 144:ef7eb2e8f9f7 151 * @{
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153
AnnaBridge 165:e614a9f1c9e2 154 /** @defgroup USART_Error_Code USART Error Code
AnnaBridge 165:e614a9f1c9e2 155 * @brief USART Error Code
<> 144:ef7eb2e8f9f7 156 * @{
<> 144:ef7eb2e8f9f7 157 */
AnnaBridge 165:e614a9f1c9e2 158 #define HAL_USART_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 165:e614a9f1c9e2 159 #define HAL_USART_ERROR_PE 0x00000001U /*!< Parity error */
AnnaBridge 165:e614a9f1c9e2 160 #define HAL_USART_ERROR_NE 0x00000002U /*!< Noise error */
AnnaBridge 165:e614a9f1c9e2 161 #define HAL_USART_ERROR_FE 0x00000004U /*!< Frame error */
AnnaBridge 165:e614a9f1c9e2 162 #define HAL_USART_ERROR_ORE 0x00000008U /*!< Overrun error */
AnnaBridge 165:e614a9f1c9e2 163 #define HAL_USART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 164 /**
<> 144:ef7eb2e8f9f7 165 * @}
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** @defgroup USART_Word_Length USART Word Length
<> 144:ef7eb2e8f9f7 169 * @{
<> 144:ef7eb2e8f9f7 170 */
AnnaBridge 165:e614a9f1c9e2 171 #define USART_WORDLENGTH_8B 0x00000000U
AnnaBridge 165:e614a9f1c9e2 172 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 173 /**
<> 144:ef7eb2e8f9f7 174 * @}
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 144:ef7eb2e8f9f7 178 * @{
<> 144:ef7eb2e8f9f7 179 */
AnnaBridge 165:e614a9f1c9e2 180 #define USART_STOPBITS_1 0x00000000U
AnnaBridge 165:e614a9f1c9e2 181 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
AnnaBridge 165:e614a9f1c9e2 182 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
AnnaBridge 165:e614a9f1c9e2 183 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /** @defgroup USART_Parity USART Parity
<> 144:ef7eb2e8f9f7 189 * @{
<> 144:ef7eb2e8f9f7 190 */
AnnaBridge 165:e614a9f1c9e2 191 #define USART_PARITY_NONE 0x00000000U
AnnaBridge 165:e614a9f1c9e2 192 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
AnnaBridge 165:e614a9f1c9e2 193 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @}
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /** @defgroup USART_Mode USART Mode
<> 144:ef7eb2e8f9f7 199 * @{
<> 144:ef7eb2e8f9f7 200 */
AnnaBridge 165:e614a9f1c9e2 201 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
AnnaBridge 165:e614a9f1c9e2 202 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
AnnaBridge 165:e614a9f1c9e2 203 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @}
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 /** @defgroup USART_Clock USART Clock
<> 144:ef7eb2e8f9f7 209 * @{
<> 144:ef7eb2e8f9f7 210 */
AnnaBridge 165:e614a9f1c9e2 211 #define USART_CLOCK_DISABLE 0x00000000U
AnnaBridge 165:e614a9f1c9e2 212 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
<> 144:ef7eb2e8f9f7 213 /**
<> 144:ef7eb2e8f9f7 214 * @}
<> 144:ef7eb2e8f9f7 215 */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 144:ef7eb2e8f9f7 218 * @{
<> 144:ef7eb2e8f9f7 219 */
AnnaBridge 165:e614a9f1c9e2 220 #define USART_POLARITY_LOW 0x00000000U
AnnaBridge 165:e614a9f1c9e2 221 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
<> 144:ef7eb2e8f9f7 222 /**
<> 144:ef7eb2e8f9f7 223 * @}
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 144:ef7eb2e8f9f7 227 * @{
<> 144:ef7eb2e8f9f7 228 */
AnnaBridge 165:e614a9f1c9e2 229 #define USART_PHASE_1EDGE 0x00000000U
AnnaBridge 165:e614a9f1c9e2 230 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
<> 144:ef7eb2e8f9f7 231 /**
<> 144:ef7eb2e8f9f7 232 * @}
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /** @defgroup USART_Last_Bit USART Last Bit
<> 144:ef7eb2e8f9f7 236 * @{
<> 144:ef7eb2e8f9f7 237 */
AnnaBridge 165:e614a9f1c9e2 238 #define USART_LASTBIT_DISABLE 0x00000000U
AnnaBridge 165:e614a9f1c9e2 239 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
<> 144:ef7eb2e8f9f7 240 /**
<> 144:ef7eb2e8f9f7 241 * @}
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /** @defgroup USART_NACK_State USART NACK State
<> 144:ef7eb2e8f9f7 245 * @{
<> 144:ef7eb2e8f9f7 246 */
AnnaBridge 165:e614a9f1c9e2 247 #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK)
AnnaBridge 165:e614a9f1c9e2 248 #define USART_NACK_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 249 /**
<> 144:ef7eb2e8f9f7 250 * @}
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /** @defgroup USART_Flags USART Flags
<> 144:ef7eb2e8f9f7 254 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 255 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 256 * @{
<> 144:ef7eb2e8f9f7 257 */
<> 144:ef7eb2e8f9f7 258 #define USART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 259 #define USART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 260 #define USART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 261 #define USART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 262 #define USART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 263 #define USART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 264 #define USART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 265 #define USART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 266 /**
<> 144:ef7eb2e8f9f7 267 * @}
<> 144:ef7eb2e8f9f7 268 */
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 144:ef7eb2e8f9f7 271 * Elements values convention: 0xY000XXXX
AnnaBridge 165:e614a9f1c9e2 272 * - XXXX : Interrupt mask in the XX register
AnnaBridge 165:e614a9f1c9e2 273 * - Y : Interrupt source register (2bits)
AnnaBridge 165:e614a9f1c9e2 274 * - 01: CR1 register
AnnaBridge 165:e614a9f1c9e2 275 * - 10: CR2 register
AnnaBridge 165:e614a9f1c9e2 276 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 277 *
<> 144:ef7eb2e8f9f7 278 * @{
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280
AnnaBridge 165:e614a9f1c9e2 281 #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
AnnaBridge 165:e614a9f1c9e2 282 #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
AnnaBridge 165:e614a9f1c9e2 283 #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
AnnaBridge 165:e614a9f1c9e2 284 #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
AnnaBridge 165:e614a9f1c9e2 285 #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 286
AnnaBridge 165:e614a9f1c9e2 287 #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 288
AnnaBridge 165:e614a9f1c9e2 289 #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
AnnaBridge 165:e614a9f1c9e2 290 #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @}
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 300 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 144:ef7eb2e8f9f7 301 * @{
<> 144:ef7eb2e8f9f7 302 */
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 /** @brief Reset USART handle state
<> 144:ef7eb2e8f9f7 305 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 306 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 307 */
<> 144:ef7eb2e8f9f7 308 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 309
AnnaBridge 165:e614a9f1c9e2 310 /** @brief Checks whether the specified USART flag is set or not.
<> 144:ef7eb2e8f9f7 311 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 312 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 313 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 314 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 315 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 316 * @arg USART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 317 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 318 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 319 * @arg USART_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 320 * @arg USART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 321 * @arg USART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 322 * @arg USART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 323 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 326
AnnaBridge 165:e614a9f1c9e2 327 /** @brief Clears the specified USART pending flags.
<> 144:ef7eb2e8f9f7 328 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 329 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 330 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 331 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 332 * @arg USART_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 333 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 334 *
AnnaBridge 165:e614a9f1c9e2 335 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
AnnaBridge 165:e614a9f1c9e2 336 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 337 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 338 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 339 * @note RXNE flag can be also cleared by a read to the USART_DR register.
AnnaBridge 165:e614a9f1c9e2 340 * @note TC flag can be also cleared by software sequence: a read operation to
AnnaBridge 165:e614a9f1c9e2 341 * USART_SR register followed by a write operation to USART_DR register
AnnaBridge 165:e614a9f1c9e2 342 * @note TXE flag is cleared only by a write to the USART_DR register
<> 144:ef7eb2e8f9f7 343 *
<> 144:ef7eb2e8f9f7 344 */
AnnaBridge 165:e614a9f1c9e2 345 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /** @brief Clear the USART PE pending flag.
<> 144:ef7eb2e8f9f7 348 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 349 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 350 */
AnnaBridge 165:e614a9f1c9e2 351 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \
AnnaBridge 165:e614a9f1c9e2 352 do{ \
AnnaBridge 165:e614a9f1c9e2 353 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 165:e614a9f1c9e2 354 tmpreg = (__HANDLE__)->Instance->SR; \
AnnaBridge 165:e614a9f1c9e2 355 tmpreg = (__HANDLE__)->Instance->DR; \
AnnaBridge 165:e614a9f1c9e2 356 UNUSED(tmpreg); \
AnnaBridge 165:e614a9f1c9e2 357 } while(0U)
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 /** @brief Clear the USART FE pending flag.
<> 144:ef7eb2e8f9f7 360 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 361 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 362 */
<> 144:ef7eb2e8f9f7 363 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /** @brief Clear the USART NE pending flag.
<> 144:ef7eb2e8f9f7 366 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 367 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 368 */
<> 144:ef7eb2e8f9f7 369 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /** @brief Clear the USART ORE pending flag.
<> 144:ef7eb2e8f9f7 372 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 373 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
AnnaBridge 165:e614a9f1c9e2 374
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /** @brief Clear the USART IDLE pending flag.
<> 144:ef7eb2e8f9f7 379 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 380 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 381 */
<> 144:ef7eb2e8f9f7 382 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 383
AnnaBridge 165:e614a9f1c9e2 384 /** @brief Enable the specified USART interrupts.
<> 144:ef7eb2e8f9f7 385 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 386 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 387 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 144:ef7eb2e8f9f7 388 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 389 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 390 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 391 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 392 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 393 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 394 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 165:e614a9f1c9e2 395 * This parameter can be: ENABLE or DISABLE.
<> 144:ef7eb2e8f9f7 396 */
AnnaBridge 165:e614a9f1c9e2 397 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 398 (((__INTERRUPT__) >> 28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 399 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 400
AnnaBridge 165:e614a9f1c9e2 401 /** @brief Disable the specified USART interrupts.
<> 144:ef7eb2e8f9f7 402 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 403 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 404 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 144:ef7eb2e8f9f7 405 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 406 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 407 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 408 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 409 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 410 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 411 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 165:e614a9f1c9e2 412 * This parameter can be: ENABLE or DISABLE.
<> 144:ef7eb2e8f9f7 413 */
AnnaBridge 165:e614a9f1c9e2 414 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 415 (((__INTERRUPT__) >> 28U) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 416 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 417
AnnaBridge 165:e614a9f1c9e2 418 /** @brief Checks whether the specified USART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 419 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 420 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 421 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 422 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 423 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 424 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 425 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 426 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 427 * @arg USART_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 428 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 429 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 430 */
AnnaBridge 165:e614a9f1c9e2 431 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == USART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == USART_CR2_REG_INDEX)? \
<> 144:ef7eb2e8f9f7 432 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 /** @brief Enable USART
<> 144:ef7eb2e8f9f7 435 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 436 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
AnnaBridge 165:e614a9f1c9e2 437 */
<> 144:ef7eb2e8f9f7 438 #define __HAL_USART_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
<> 144:ef7eb2e8f9f7 439
<> 144:ef7eb2e8f9f7 440 /** @brief Disable USART
<> 144:ef7eb2e8f9f7 441 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 442 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 443 */
<> 144:ef7eb2e8f9f7 444 #define __HAL_USART_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
AnnaBridge 165:e614a9f1c9e2 445 /**
AnnaBridge 165:e614a9f1c9e2 446 * @}
AnnaBridge 165:e614a9f1c9e2 447 */
AnnaBridge 165:e614a9f1c9e2 448 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 449 /** @addtogroup USART_Exported_Functions
AnnaBridge 165:e614a9f1c9e2 450 * @{
AnnaBridge 165:e614a9f1c9e2 451 */
<> 144:ef7eb2e8f9f7 452
AnnaBridge 165:e614a9f1c9e2 453 /** @addtogroup USART_Exported_Functions_Group1
AnnaBridge 165:e614a9f1c9e2 454 * @{
AnnaBridge 165:e614a9f1c9e2 455 */
AnnaBridge 165:e614a9f1c9e2 456 /* Initialization/de-initialization functions **********************************/
AnnaBridge 165:e614a9f1c9e2 457 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 458 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 459 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 460 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 461 /**
<> 144:ef7eb2e8f9f7 462 * @}
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464
AnnaBridge 165:e614a9f1c9e2 465 /** @addtogroup USART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 466 * @{
<> 144:ef7eb2e8f9f7 467 */
<> 144:ef7eb2e8f9f7 468 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 469 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 470 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 471 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 472 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 473 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 474 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 475 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 476 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 477 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 478 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 479 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 480 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 481 /* Transfer Abort functions */
AnnaBridge 165:e614a9f1c9e2 482 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 483 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 484
<> 144:ef7eb2e8f9f7 485 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 486 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 487 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 488 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 489 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 490 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 491 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 492 void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 493 /**
AnnaBridge 165:e614a9f1c9e2 494 * @}
AnnaBridge 165:e614a9f1c9e2 495 */
<> 144:ef7eb2e8f9f7 496
AnnaBridge 165:e614a9f1c9e2 497 /** @addtogroup USART_Exported_Functions_Group3
AnnaBridge 165:e614a9f1c9e2 498 * @{
AnnaBridge 165:e614a9f1c9e2 499 */
AnnaBridge 165:e614a9f1c9e2 500 /* Peripheral State functions ************************************************/
AnnaBridge 165:e614a9f1c9e2 501 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 502 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
AnnaBridge 165:e614a9f1c9e2 503 /**
AnnaBridge 165:e614a9f1c9e2 504 * @}
AnnaBridge 165:e614a9f1c9e2 505 */
AnnaBridge 165:e614a9f1c9e2 506
AnnaBridge 165:e614a9f1c9e2 507 /**
AnnaBridge 165:e614a9f1c9e2 508 * @}
AnnaBridge 165:e614a9f1c9e2 509 */
AnnaBridge 165:e614a9f1c9e2 510 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 511 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 512 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 513 /** @defgroup USART_Private_Constants USART Private Constants
AnnaBridge 165:e614a9f1c9e2 514 * @{
AnnaBridge 165:e614a9f1c9e2 515 */
AnnaBridge 165:e614a9f1c9e2 516 /** @brief USART interruptions flag mask
AnnaBridge 165:e614a9f1c9e2 517 *
AnnaBridge 165:e614a9f1c9e2 518 */
AnnaBridge 165:e614a9f1c9e2 519 #define USART_IT_MASK 0x0000FFFFU
AnnaBridge 165:e614a9f1c9e2 520
AnnaBridge 165:e614a9f1c9e2 521 #define USART_CR1_REG_INDEX 1U
AnnaBridge 165:e614a9f1c9e2 522 #define USART_CR2_REG_INDEX 2U
AnnaBridge 165:e614a9f1c9e2 523 #define USART_CR3_REG_INDEX 3U
<> 144:ef7eb2e8f9f7 524 /**
<> 144:ef7eb2e8f9f7 525 * @}
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527
AnnaBridge 165:e614a9f1c9e2 528 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 529 /** @defgroup USART_Private_Macros USART Private Macros
AnnaBridge 165:e614a9f1c9e2 530 * @{
AnnaBridge 165:e614a9f1c9e2 531 */
AnnaBridge 165:e614a9f1c9e2 532 #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \
AnnaBridge 165:e614a9f1c9e2 533 ((NACK) == USART_NACK_DISABLE))
AnnaBridge 165:e614a9f1c9e2 534
AnnaBridge 165:e614a9f1c9e2 535 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
AnnaBridge 165:e614a9f1c9e2 536 ((LASTBIT) == USART_LASTBIT_ENABLE))
AnnaBridge 165:e614a9f1c9e2 537
AnnaBridge 165:e614a9f1c9e2 538 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
AnnaBridge 165:e614a9f1c9e2 539
AnnaBridge 165:e614a9f1c9e2 540 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
AnnaBridge 165:e614a9f1c9e2 541
AnnaBridge 165:e614a9f1c9e2 542 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \
AnnaBridge 165:e614a9f1c9e2 543 ((CLOCK) == USART_CLOCK_ENABLE))
AnnaBridge 165:e614a9f1c9e2 544
AnnaBridge 165:e614a9f1c9e2 545 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
AnnaBridge 165:e614a9f1c9e2 546 ((LENGTH) == USART_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 547
AnnaBridge 165:e614a9f1c9e2 548 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
AnnaBridge 165:e614a9f1c9e2 549 ((STOPBITS) == USART_STOPBITS_0_5) || \
AnnaBridge 165:e614a9f1c9e2 550 ((STOPBITS) == USART_STOPBITS_1_5) || \
AnnaBridge 165:e614a9f1c9e2 551 ((STOPBITS) == USART_STOPBITS_2))
AnnaBridge 165:e614a9f1c9e2 552
AnnaBridge 165:e614a9f1c9e2 553 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
AnnaBridge 165:e614a9f1c9e2 554 ((PARITY) == USART_PARITY_EVEN) || \
AnnaBridge 165:e614a9f1c9e2 555 ((PARITY) == USART_PARITY_ODD))
AnnaBridge 165:e614a9f1c9e2 556
AnnaBridge 165:e614a9f1c9e2 557 #define IS_USART_MODE(MODE) ((((MODE) & 0xFFF3U) == 0x00U) && ((MODE) != 0x00U))
AnnaBridge 165:e614a9f1c9e2 558
AnnaBridge 165:e614a9f1c9e2 559 #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4500001U)
AnnaBridge 165:e614a9f1c9e2 560
AnnaBridge 165:e614a9f1c9e2 561 #define USART_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 562
AnnaBridge 165:e614a9f1c9e2 563 #define USART_DIVMANT(_PCLK_, _BAUD_) (USART_DIV((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 564
AnnaBridge 165:e614a9f1c9e2 565 #define USART_DIVFRAQ(_PCLK_, _BAUD_) (((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 566
AnnaBridge 165:e614a9f1c9e2 567 #define USART_BRR(_PCLK_, _BAUD_) ((USART_DIVMANT((_PCLK_), (_BAUD_)) << 4U)|(USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
AnnaBridge 165:e614a9f1c9e2 568 /**
AnnaBridge 165:e614a9f1c9e2 569 * @}
<> 144:ef7eb2e8f9f7 570 */
<> 144:ef7eb2e8f9f7 571
AnnaBridge 165:e614a9f1c9e2 572 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 573 /** @defgroup USART_Private_Functions USART Private Functions
AnnaBridge 165:e614a9f1c9e2 574 * @{
<> 144:ef7eb2e8f9f7 575 */
<> 144:ef7eb2e8f9f7 576
<> 144:ef7eb2e8f9f7 577 /**
<> 144:ef7eb2e8f9f7 578 * @}
<> 144:ef7eb2e8f9f7 579 */
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 /**
<> 144:ef7eb2e8f9f7 582 * @}
<> 144:ef7eb2e8f9f7 583 */
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 /**
<> 144:ef7eb2e8f9f7 586 * @}
<> 144:ef7eb2e8f9f7 587 */
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 590 }
<> 144:ef7eb2e8f9f7 591 #endif
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 #endif /* __STM32F1xx_HAL_USART_H */
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/