mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_irda.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
154:37f96f9d4de2
Child:
187:0387e8f68319
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_irda.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @version V1.1.0
AnnaBridge 165:e614a9f1c9e2 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of IRDA HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 165:e614a9f1c9e2 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F1xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F1xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup IRDA
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup IRDA_Exported_Types IRDA Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
AnnaBridge 165:e614a9f1c9e2 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief IRDA Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (16 * (hirda->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref IRDA_Word_Length */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref IRDA_Parity
<> 144:ef7eb2e8f9f7 78 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 79 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 80 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 81 word length is set to 8 data bits). */
AnnaBridge 165:e614a9f1c9e2 82
AnnaBridge 165:e614a9f1c9e2 83 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 84 This parameter can be a value of @ref IRDA_Transfer_Mode */
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 uint8_t Prescaler; /*!< Specifies the Prescaler value prescaler value to be programmed
<> 144:ef7eb2e8f9f7 87 in the IrDA low-power Baud Register, for defining pulse width on which
<> 144:ef7eb2e8f9f7 88 burst acceptance/rejection will be decided. This value is used as divisor
<> 144:ef7eb2e8f9f7 89 of system clock to achieve required pulse width. */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 uint32_t IrDAMode; /*!< Specifies the IrDA mode
<> 144:ef7eb2e8f9f7 92 This parameter can be a value of @ref IRDA_Low_Power */
<> 144:ef7eb2e8f9f7 93 }IRDA_InitTypeDef;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /**
AnnaBridge 165:e614a9f1c9e2 96 * @brief HAL IRDA State structures definition
AnnaBridge 165:e614a9f1c9e2 97 * @note HAL IRDA State value is a combination of 2 different substates: gState and RxState.
AnnaBridge 165:e614a9f1c9e2 98 * - gState contains IRDA state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 99 * and also information related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 100 * gState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 101 * b7-b6 Error information
AnnaBridge 165:e614a9f1c9e2 102 * 00 : No Error
AnnaBridge 165:e614a9f1c9e2 103 * 01 : (Not Used)
AnnaBridge 165:e614a9f1c9e2 104 * 10 : Timeout
AnnaBridge 165:e614a9f1c9e2 105 * 11 : Error
AnnaBridge 165:e614a9f1c9e2 106 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 107 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 108 * 1 : Init done (IP not initialized. HAL IRDA Init function already called)
AnnaBridge 165:e614a9f1c9e2 109 * b4-b3 (not used)
AnnaBridge 165:e614a9f1c9e2 110 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 111 * b2 Intrinsic process state
AnnaBridge 165:e614a9f1c9e2 112 * 0 : Ready
AnnaBridge 165:e614a9f1c9e2 113 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 165:e614a9f1c9e2 114 * b1 (not used)
AnnaBridge 165:e614a9f1c9e2 115 * x : Should be set to 0
AnnaBridge 165:e614a9f1c9e2 116 * b0 Tx state
AnnaBridge 165:e614a9f1c9e2 117 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 118 * 1 : Busy (Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 119 * - RxState contains information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 120 * RxState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 121 * b7-b6 (not used)
AnnaBridge 165:e614a9f1c9e2 122 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 123 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 124 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 125 * 1 : Init done (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 126 * b4-b2 (not used)
AnnaBridge 165:e614a9f1c9e2 127 * xxx : Should be set to 000
AnnaBridge 165:e614a9f1c9e2 128 * b1 Rx state
AnnaBridge 165:e614a9f1c9e2 129 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 130 * 1 : Busy (Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 131 * b0 (not used)
AnnaBridge 165:e614a9f1c9e2 132 * x : Should be set to 0.
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134 typedef enum
<> 144:ef7eb2e8f9f7 135 {
AnnaBridge 165:e614a9f1c9e2 136 HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
AnnaBridge 165:e614a9f1c9e2 137 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 138 HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge 165:e614a9f1c9e2 139 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 140 HAL_IRDA_STATE_BUSY = 0x24U, /*!< An internal process is ongoing
AnnaBridge 165:e614a9f1c9e2 141 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 142 HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge 165:e614a9f1c9e2 143 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 144 HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 145 Value is allowed for RxState only */
AnnaBridge 165:e614a9f1c9e2 146 HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 147 Not to be used for neither gState nor RxState.
AnnaBridge 165:e614a9f1c9e2 148 Value is result of combination (Or) between gState and RxState values */
AnnaBridge 165:e614a9f1c9e2 149 HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge 165:e614a9f1c9e2 150 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 151 HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge 165:e614a9f1c9e2 152 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 153 }HAL_IRDA_StateTypeDef;
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /**
AnnaBridge 165:e614a9f1c9e2 156 * @brief IRDA handle Structure definition
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 typedef struct
<> 144:ef7eb2e8f9f7 159 {
<> 144:ef7eb2e8f9f7 160 USART_TypeDef *Instance; /*!< USART registers base address */
AnnaBridge 165:e614a9f1c9e2 161
<> 144:ef7eb2e8f9f7 162 IRDA_InitTypeDef Init; /*!< IRDA communication parameters */
AnnaBridge 165:e614a9f1c9e2 163
<> 144:ef7eb2e8f9f7 164 uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 165
<> 144:ef7eb2e8f9f7 166 uint16_t TxXferSize; /*!< IRDA Tx Transfer size */
AnnaBridge 165:e614a9f1c9e2 167
AnnaBridge 165:e614a9f1c9e2 168 __IO uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */
AnnaBridge 165:e614a9f1c9e2 169
<> 144:ef7eb2e8f9f7 170 uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 171
<> 144:ef7eb2e8f9f7 172 uint16_t RxXferSize; /*!< IRDA Rx Transfer size */
AnnaBridge 165:e614a9f1c9e2 173
AnnaBridge 165:e614a9f1c9e2 174 __IO uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */
AnnaBridge 165:e614a9f1c9e2 175
<> 144:ef7eb2e8f9f7 176 DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */
AnnaBridge 165:e614a9f1c9e2 177
<> 144:ef7eb2e8f9f7 178 DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */
AnnaBridge 165:e614a9f1c9e2 179
<> 144:ef7eb2e8f9f7 180 HAL_LockTypeDef Lock; /*!< Locking object */
AnnaBridge 165:e614a9f1c9e2 181
AnnaBridge 165:e614a9f1c9e2 182 __IO HAL_IRDA_StateTypeDef gState; /*!< IRDA state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 183 and also related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 184 This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
AnnaBridge 165:e614a9f1c9e2 185
AnnaBridge 165:e614a9f1c9e2 186 __IO HAL_IRDA_StateTypeDef RxState; /*!< IRDA state information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 187 This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
AnnaBridge 165:e614a9f1c9e2 188
AnnaBridge 165:e614a9f1c9e2 189 __IO uint32_t ErrorCode; /*!< IRDA Error code */
<> 144:ef7eb2e8f9f7 190 }IRDA_HandleTypeDef;
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /**
<> 144:ef7eb2e8f9f7 193 * @}
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 197 /** @defgroup IRDA_Exported_Constants IRDA Exported constants
<> 144:ef7eb2e8f9f7 198 * @{
<> 144:ef7eb2e8f9f7 199 */
AnnaBridge 165:e614a9f1c9e2 200 /** @defgroup IRDA_Error_Code IRDA Error Code
<> 144:ef7eb2e8f9f7 201 * @{
AnnaBridge 165:e614a9f1c9e2 202 */
AnnaBridge 165:e614a9f1c9e2 203 #define HAL_IRDA_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 165:e614a9f1c9e2 204 #define HAL_IRDA_ERROR_PE 0x00000001U /*!< Parity error */
AnnaBridge 165:e614a9f1c9e2 205 #define HAL_IRDA_ERROR_NE 0x00000002U /*!< Noise error */
AnnaBridge 165:e614a9f1c9e2 206 #define HAL_IRDA_ERROR_FE 0x00000004U /*!< Frame error */
AnnaBridge 165:e614a9f1c9e2 207 #define HAL_IRDA_ERROR_ORE 0x00000008U /*!< Overrun error */
AnnaBridge 165:e614a9f1c9e2 208 #define HAL_IRDA_ERROR_DMA 0x00000010U /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 209 /**
<> 144:ef7eb2e8f9f7 210 * @}
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /** @defgroup IRDA_Word_Length IRDA Word Length
<> 144:ef7eb2e8f9f7 214 * @{
<> 144:ef7eb2e8f9f7 215 */
AnnaBridge 165:e614a9f1c9e2 216 #define IRDA_WORDLENGTH_8B 0x00000000U
<> 144:ef7eb2e8f9f7 217 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 218 /**
<> 144:ef7eb2e8f9f7 219 * @}
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221
AnnaBridge 165:e614a9f1c9e2 222 /** @defgroup IRDA_Parity IRDA Parity
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
AnnaBridge 165:e614a9f1c9e2 225 #define IRDA_PARITY_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 226 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 227 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 228 /**
<> 144:ef7eb2e8f9f7 229 * @}
<> 144:ef7eb2e8f9f7 230 */
<> 144:ef7eb2e8f9f7 231
AnnaBridge 165:e614a9f1c9e2 232 /** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
<> 144:ef7eb2e8f9f7 233 * @{
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 236 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 237 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 238 /**
<> 144:ef7eb2e8f9f7 239 * @}
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241
AnnaBridge 165:e614a9f1c9e2 242 /** @defgroup IRDA_Low_Power IRDA Low Power
<> 144:ef7eb2e8f9f7 243 * @{
<> 144:ef7eb2e8f9f7 244 */
AnnaBridge 165:e614a9f1c9e2 245 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
AnnaBridge 165:e614a9f1c9e2 246 #define IRDA_POWERMODE_NORMAL 0x00000000U
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /** @defgroup IRDA_Flags IRDA Flags
<> 144:ef7eb2e8f9f7 252 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 253 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256 #define IRDA_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 257 #define IRDA_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 258 #define IRDA_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 259 #define IRDA_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 260 #define IRDA_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 261 #define IRDA_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 262 #define IRDA_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 263 #define IRDA_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @}
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions
<> 144:ef7eb2e8f9f7 269 * Elements values convention: 0xY000XXXX
AnnaBridge 165:e614a9f1c9e2 270 * - XXXX : Interrupt mask in the XX register
AnnaBridge 165:e614a9f1c9e2 271 * - Y : Interrupt source register (2bits)
AnnaBridge 165:e614a9f1c9e2 272 * - 01: CR1 register
AnnaBridge 165:e614a9f1c9e2 273 * - 10: CR2 register
AnnaBridge 165:e614a9f1c9e2 274 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 275 * @{
<> 144:ef7eb2e8f9f7 276 */
AnnaBridge 165:e614a9f1c9e2 277 #define IRDA_IT_PE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
AnnaBridge 165:e614a9f1c9e2 278 #define IRDA_IT_TXE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
AnnaBridge 165:e614a9f1c9e2 279 #define IRDA_IT_TC ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
AnnaBridge 165:e614a9f1c9e2 280 #define IRDA_IT_RXNE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
AnnaBridge 165:e614a9f1c9e2 281 #define IRDA_IT_IDLE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 282
AnnaBridge 165:e614a9f1c9e2 283 #define IRDA_IT_LBD ((uint32_t)(IRDA_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 284
AnnaBridge 165:e614a9f1c9e2 285 #define IRDA_IT_CTS ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
AnnaBridge 165:e614a9f1c9e2 286 #define IRDA_IT_ERR ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 287 /**
<> 144:ef7eb2e8f9f7 288 * @}
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 296 /** @defgroup IRDA_Exported_Macros IRDA Exported Macros
<> 144:ef7eb2e8f9f7 297 * @{
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299
AnnaBridge 165:e614a9f1c9e2 300 /** @brief Reset IRDA handle gstate & RxState
<> 144:ef7eb2e8f9f7 301 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 302 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 303 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 304 */
AnnaBridge 165:e614a9f1c9e2 305 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 165:e614a9f1c9e2 306 (__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 307 (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 308 } while(0U)
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 /** @brief Flush the IRDA DR register
<> 144:ef7eb2e8f9f7 311 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 312 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 313 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 /** @brief Check whether the specified IRDA flag is set or not.
<> 144:ef7eb2e8f9f7 318 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 319 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 320 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 321 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 322 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 323 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 324 * @arg IRDA_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 325 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 326 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 327 * @arg IRDA_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 328 * @arg IRDA_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 329 * @arg IRDA_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 330 * @arg IRDA_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 331 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** @brief Clear the specified IRDA pending flag.
<> 144:ef7eb2e8f9f7 336 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 337 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 338 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 339 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 340 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 341 * @arg IRDA_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 342 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 343 *
<> 144:ef7eb2e8f9f7 344 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 144:ef7eb2e8f9f7 345 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 346 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 347 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 348 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 349 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 350 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 351 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 352 *
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /** @brief Clear the IRDA PE pending flag.
<> 144:ef7eb2e8f9f7 357 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 358 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 359 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 360 */
AnnaBridge 165:e614a9f1c9e2 361 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) \
AnnaBridge 165:e614a9f1c9e2 362 do{ \
AnnaBridge 165:e614a9f1c9e2 363 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 165:e614a9f1c9e2 364 tmpreg = (__HANDLE__)->Instance->SR; \
AnnaBridge 165:e614a9f1c9e2 365 tmpreg = (__HANDLE__)->Instance->DR; \
AnnaBridge 165:e614a9f1c9e2 366 UNUSED(tmpreg); \
AnnaBridge 165:e614a9f1c9e2 367 } while(0U)
AnnaBridge 165:e614a9f1c9e2 368
<> 144:ef7eb2e8f9f7 369 /** @brief Clear the IRDA FE pending flag.
<> 144:ef7eb2e8f9f7 370 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 371 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 372 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 /** @brief Clear the IRDA NE pending flag.
<> 144:ef7eb2e8f9f7 377 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 378 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 379 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 380 */
<> 144:ef7eb2e8f9f7 381 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 /** @brief Clear the IRDA ORE pending flag.
<> 144:ef7eb2e8f9f7 384 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 385 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 386 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /** @brief Clear the IRDA IDLE pending flag.
<> 144:ef7eb2e8f9f7 391 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 392 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 393 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 394 */
<> 144:ef7eb2e8f9f7 395 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /** @brief Enable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 398 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 399 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 400 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 401 * @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
<> 144:ef7eb2e8f9f7 402 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 403 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 404 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 405 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 406 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 407 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 408 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 409 */
AnnaBridge 165:e614a9f1c9e2 410 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 411 (((__INTERRUPT__) >> 28U) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 412 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 144:ef7eb2e8f9f7 413 /** @brief Disable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 414 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 415 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 416 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 417 * @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
<> 144:ef7eb2e8f9f7 418 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 419 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 420 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 421 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 422 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 423 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 424 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 425 */
AnnaBridge 165:e614a9f1c9e2 426 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 427 (((__INTERRUPT__) >> 28U) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 428 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 /** @brief Check whether the specified IRDA interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 431 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 432 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 433 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 434 * @param __IT__: specifies the IRDA interrupt source to check.
<> 144:ef7eb2e8f9f7 435 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 436 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 437 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 438 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 439 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 440 * @arg IRDA_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 441 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 442 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 443 */
AnnaBridge 165:e614a9f1c9e2 444 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == IRDA_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == IRDA_CR2_REG_INDEX)? \
<> 144:ef7eb2e8f9f7 445 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /** @brief Enable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 448 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 449 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 450 * (USART,UART availability and x,y values depending on device).
AnnaBridge 165:e614a9f1c9e2 451 */
<> 144:ef7eb2e8f9f7 452 #define __HAL_IRDA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 /** @brief Disable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 455 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 456 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 457 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 458 */
<> 144:ef7eb2e8f9f7 459 #define __HAL_IRDA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /**
<> 144:ef7eb2e8f9f7 462 * @}
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464
AnnaBridge 165:e614a9f1c9e2 465 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 466 /** @addtogroup IRDA_Exported_Functions
<> 144:ef7eb2e8f9f7 467 * @{
<> 144:ef7eb2e8f9f7 468 */
AnnaBridge 165:e614a9f1c9e2 469
AnnaBridge 165:e614a9f1c9e2 470 /** @addtogroup IRDA_Exported_Functions_Group1
AnnaBridge 165:e614a9f1c9e2 471 * @{
AnnaBridge 165:e614a9f1c9e2 472 */
AnnaBridge 165:e614a9f1c9e2 473 /* Initialization/de-initialization functions **********************************/
AnnaBridge 165:e614a9f1c9e2 474 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 475 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 476 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 477 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 478 /**
<> 144:ef7eb2e8f9f7 479 * @}
<> 144:ef7eb2e8f9f7 480 */
<> 144:ef7eb2e8f9f7 481
AnnaBridge 165:e614a9f1c9e2 482 /** @addtogroup IRDA_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 483 * @{
<> 144:ef7eb2e8f9f7 484 */
AnnaBridge 165:e614a9f1c9e2 485 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 486 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 487 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 488 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 489 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 490 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 491 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 492 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 493 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 494 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 495 /* Transfer Abort functions */
AnnaBridge 165:e614a9f1c9e2 496 HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 497 HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 498 HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 499 HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 500 HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 501 HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 502
<> 144:ef7eb2e8f9f7 503 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 504 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 505 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 506 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 507 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 508 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 509 void HAL_IRDA_AbortCpltCallback(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 510 void HAL_IRDA_AbortTransmitCpltCallback(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 511 void HAL_IRDA_AbortReceiveCpltCallback(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 512 /**
AnnaBridge 165:e614a9f1c9e2 513 * @}
AnnaBridge 165:e614a9f1c9e2 514 */
AnnaBridge 165:e614a9f1c9e2 515
AnnaBridge 165:e614a9f1c9e2 516 /** @addtogroup IRDA_Exported_Functions_Group3
AnnaBridge 165:e614a9f1c9e2 517 * @{
AnnaBridge 165:e614a9f1c9e2 518 */
AnnaBridge 165:e614a9f1c9e2 519 /* Peripheral State functions **************************************************/
AnnaBridge 165:e614a9f1c9e2 520 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 521 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
AnnaBridge 165:e614a9f1c9e2 522 /**
AnnaBridge 165:e614a9f1c9e2 523 * @}
AnnaBridge 165:e614a9f1c9e2 524 */
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /**
<> 144:ef7eb2e8f9f7 527 * @}
<> 144:ef7eb2e8f9f7 528 */
<> 144:ef7eb2e8f9f7 529
AnnaBridge 165:e614a9f1c9e2 530 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 531 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 532 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 533 /** @defgroup IRDA_Private_Constants IRDA Private Constants
<> 144:ef7eb2e8f9f7 534 * @{
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536
AnnaBridge 165:e614a9f1c9e2 537 /** @brief IRDA interruptions flag mask
AnnaBridge 165:e614a9f1c9e2 538 *
AnnaBridge 165:e614a9f1c9e2 539 */
AnnaBridge 165:e614a9f1c9e2 540 #define IRDA_IT_MASK 0x0000FFFFU
AnnaBridge 165:e614a9f1c9e2 541
AnnaBridge 165:e614a9f1c9e2 542 #define IRDA_CR1_REG_INDEX 1U
AnnaBridge 165:e614a9f1c9e2 543 #define IRDA_CR2_REG_INDEX 2U
AnnaBridge 165:e614a9f1c9e2 544 #define IRDA_CR3_REG_INDEX 3U
AnnaBridge 165:e614a9f1c9e2 545 /**
AnnaBridge 165:e614a9f1c9e2 546 * @}
AnnaBridge 165:e614a9f1c9e2 547 */
AnnaBridge 165:e614a9f1c9e2 548
AnnaBridge 165:e614a9f1c9e2 549 /* Private macros --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 550 /** @defgroup IRDA_Private_Macros IRDA Private Macros
AnnaBridge 165:e614a9f1c9e2 551 * @{
AnnaBridge 165:e614a9f1c9e2 552 */
AnnaBridge 165:e614a9f1c9e2 553 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
AnnaBridge 165:e614a9f1c9e2 554 ((LENGTH) == IRDA_WORDLENGTH_9B))
AnnaBridge 165:e614a9f1c9e2 555 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
AnnaBridge 165:e614a9f1c9e2 556 ((PARITY) == IRDA_PARITY_EVEN) || \
AnnaBridge 165:e614a9f1c9e2 557 ((PARITY) == IRDA_PARITY_ODD))
AnnaBridge 165:e614a9f1c9e2 558 #define IS_IRDA_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00000000U))
AnnaBridge 165:e614a9f1c9e2 559 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
AnnaBridge 165:e614a9f1c9e2 560 ((MODE) == IRDA_POWERMODE_NORMAL))
AnnaBridge 165:e614a9f1c9e2 561 #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201U)
AnnaBridge 165:e614a9f1c9e2 562
AnnaBridge 165:e614a9f1c9e2 563 #define IRDA_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 564 #define IRDA_DIVMANT(_PCLK_, _BAUD_) (IRDA_DIV((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 565 #define IRDA_DIVFRAQ(_PCLK_, _BAUD_) (((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 566 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 567 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
AnnaBridge 165:e614a9f1c9e2 568 #define IRDA_BRR(_PCLK_, _BAUD_) (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4U) + \
AnnaBridge 165:e614a9f1c9e2 569 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0U)) + \
AnnaBridge 165:e614a9f1c9e2 570 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
<> 144:ef7eb2e8f9f7 571
<> 144:ef7eb2e8f9f7 572 /**
<> 144:ef7eb2e8f9f7 573 * @}
<> 144:ef7eb2e8f9f7 574 */
<> 144:ef7eb2e8f9f7 575
AnnaBridge 165:e614a9f1c9e2 576 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 577 /** @defgroup IRDA_Private_Functions IRDA Private Functions
AnnaBridge 165:e614a9f1c9e2 578 * @{
AnnaBridge 165:e614a9f1c9e2 579 */
AnnaBridge 165:e614a9f1c9e2 580
<> 144:ef7eb2e8f9f7 581 /**
<> 144:ef7eb2e8f9f7 582 * @}
<> 144:ef7eb2e8f9f7 583 */
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 /**
<> 144:ef7eb2e8f9f7 586 * @}
<> 144:ef7eb2e8f9f7 587 */
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /**
<> 144:ef7eb2e8f9f7 590 * @}
<> 144:ef7eb2e8f9f7 591 */
AnnaBridge 165:e614a9f1c9e2 592
<> 144:ef7eb2e8f9f7 593 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 594 }
<> 144:ef7eb2e8f9f7 595 #endif
<> 144:ef7eb2e8f9f7 596
<> 144:ef7eb2e8f9f7 597 #endif /* __STM32F1xx_HAL_IRDA_H */
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/