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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_irda.h@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
Parent:
149:156823d33999
Child:
165:e614a9f1c9e2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_irda.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 154:37f96f9d4de2 5 * @version V1.0.5
<> 154:37f96f9d4de2 6 * @date 06-December-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of IRDA HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F1xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F1xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup IRDA
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup IRDA_Exported_Types IRDA Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief IRDA Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (16 * (hirda->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref IRDA_Word_Length */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref IRDA_Parity
<> 144:ef7eb2e8f9f7 78 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 79 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 80 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 81 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 84 This parameter can be a value of @ref IRDA_Transfer_Mode */
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 uint8_t Prescaler; /*!< Specifies the Prescaler value prescaler value to be programmed
<> 144:ef7eb2e8f9f7 87 in the IrDA low-power Baud Register, for defining pulse width on which
<> 144:ef7eb2e8f9f7 88 burst acceptance/rejection will be decided. This value is used as divisor
<> 144:ef7eb2e8f9f7 89 of system clock to achieve required pulse width. */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 uint32_t IrDAMode; /*!< Specifies the IrDA mode
<> 144:ef7eb2e8f9f7 92 This parameter can be a value of @ref IRDA_Low_Power */
<> 144:ef7eb2e8f9f7 93 }IRDA_InitTypeDef;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /**
<> 144:ef7eb2e8f9f7 96 * @brief HAL IRDA State structures definition
<> 144:ef7eb2e8f9f7 97 */
<> 144:ef7eb2e8f9f7 98 typedef enum
<> 144:ef7eb2e8f9f7 99 {
<> 144:ef7eb2e8f9f7 100 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 144:ef7eb2e8f9f7 101 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 102 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 103 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 144:ef7eb2e8f9f7 104 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 144:ef7eb2e8f9f7 105 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
<> 144:ef7eb2e8f9f7 106 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 107 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
<> 144:ef7eb2e8f9f7 108 }HAL_IRDA_StateTypeDef;
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /**
<> 144:ef7eb2e8f9f7 112 * @brief IRDA handle Structure definition
<> 144:ef7eb2e8f9f7 113 */
<> 144:ef7eb2e8f9f7 114 typedef struct
<> 144:ef7eb2e8f9f7 115 {
<> 144:ef7eb2e8f9f7 116 USART_TypeDef *Instance; /*!< USART registers base address */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 IRDA_InitTypeDef Init; /*!< IRDA communication parameters */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 uint16_t TxXferSize; /*!< IRDA Tx Transfer size */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 uint16_t RxXferSize; /*!< IRDA Rx Transfer size */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 __IO HAL_IRDA_StateTypeDef State; /*!< IRDA communication state */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 __IO uint32_t ErrorCode; /*!< IRDA Error code */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 }IRDA_HandleTypeDef;
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /**
<> 144:ef7eb2e8f9f7 145 * @}
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 149 /** @defgroup IRDA_Exported_Constants IRDA Exported constants
<> 144:ef7eb2e8f9f7 150 * @{
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 /** @defgroup IRDA_Error_Codes IRDA Error Codes
<> 144:ef7eb2e8f9f7 154 * @{
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156 #define HAL_IRDA_ERROR_NONE ((uint32_t)0x00) /*!< No error */
<> 144:ef7eb2e8f9f7 157 #define HAL_IRDA_ERROR_PE ((uint32_t)0x01) /*!< Parity error */
<> 144:ef7eb2e8f9f7 158 #define HAL_IRDA_ERROR_NE ((uint32_t)0x02) /*!< Noise error */
<> 144:ef7eb2e8f9f7 159 #define HAL_IRDA_ERROR_FE ((uint32_t)0x04) /*!< frame error */
<> 144:ef7eb2e8f9f7 160 #define HAL_IRDA_ERROR_ORE ((uint32_t)0x08) /*!< Overrun error */
<> 144:ef7eb2e8f9f7 161 #define HAL_IRDA_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /**
<> 144:ef7eb2e8f9f7 164 * @}
<> 144:ef7eb2e8f9f7 165 */
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** @defgroup IRDA_Word_Length IRDA Word Length
<> 144:ef7eb2e8f9f7 169 * @{
<> 144:ef7eb2e8f9f7 170 */
<> 144:ef7eb2e8f9f7 171 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
<> 144:ef7eb2e8f9f7 172 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 173 /**
<> 144:ef7eb2e8f9f7 174 * @}
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /** @defgroup IRDA_Parity IRDA Parity
<> 144:ef7eb2e8f9f7 179 * @{
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181 #define IRDA_PARITY_NONE ((uint32_t)0x00000000)
<> 144:ef7eb2e8f9f7 182 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 183 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @}
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
<> 144:ef7eb2e8f9f7 190 * @{
<> 144:ef7eb2e8f9f7 191 */
<> 144:ef7eb2e8f9f7 192 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 193 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 194 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @}
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /** @defgroup IRDA_Low_Power IRDA Low Power
<> 144:ef7eb2e8f9f7 200 * @{
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
<> 144:ef7eb2e8f9f7 203 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000)
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @}
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 /** @defgroup IRDA_Flags IRDA Flags
<> 144:ef7eb2e8f9f7 209 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 210 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 211 * @{
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213 #define IRDA_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 214 #define IRDA_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 215 #define IRDA_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 216 #define IRDA_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 217 #define IRDA_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 218 #define IRDA_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 219 #define IRDA_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 220 #define IRDA_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 221 /**
<> 144:ef7eb2e8f9f7 222 * @}
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions
<> 144:ef7eb2e8f9f7 226 * Elements values convention: 0xY000XXXX
<> 144:ef7eb2e8f9f7 227 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 144:ef7eb2e8f9f7 228 * - Y : Interrupt source register (4 bits)
<> 144:ef7eb2e8f9f7 229 * - 0001: CR1 register
<> 144:ef7eb2e8f9f7 230 * - 0010: CR2 register
<> 144:ef7eb2e8f9f7 231 * - 0011: CR3 register
<> 144:ef7eb2e8f9f7 232 *
<> 144:ef7eb2e8f9f7 233 * @{
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 #define IRDA_IT_PE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
<> 144:ef7eb2e8f9f7 237 #define IRDA_IT_TXE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
<> 144:ef7eb2e8f9f7 238 #define IRDA_IT_TC ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
<> 144:ef7eb2e8f9f7 239 #define IRDA_IT_RXNE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
<> 144:ef7eb2e8f9f7 240 #define IRDA_IT_IDLE ((uint32_t)(IRDA_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 #define IRDA_IT_LBD ((uint32_t)(IRDA_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #define IRDA_IT_CTS ((uint32_t)(IRDA_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
<> 144:ef7eb2e8f9f7 245 #define IRDA_IT_ERR ((uint32_t)(IRDA_CR3_REG_INDEX << 28 | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @}
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 257 /** @defgroup IRDA_Exported_Macros IRDA Exported Macros
<> 144:ef7eb2e8f9f7 258 * @{
<> 144:ef7eb2e8f9f7 259 */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /** @brief Reset IRDA handle state
<> 144:ef7eb2e8f9f7 262 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 263 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 264 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 265 * @retval None
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /** @brief Flush the IRDA DR register
<> 144:ef7eb2e8f9f7 270 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 271 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 272 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /** @brief Check whether the specified IRDA flag is set or not.
<> 144:ef7eb2e8f9f7 277 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 278 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 279 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 280 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 281 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 282 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 283 * @arg IRDA_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 284 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 285 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 286 * @arg IRDA_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 287 * @arg IRDA_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 288 * @arg IRDA_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 289 * @arg IRDA_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 290 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /** @brief Clear the specified IRDA pending flag.
<> 144:ef7eb2e8f9f7 295 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 296 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 297 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 298 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 299 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 300 * @arg IRDA_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 301 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 302 *
<> 144:ef7eb2e8f9f7 303 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 144:ef7eb2e8f9f7 304 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 305 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 306 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 307 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 308 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 309 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 310 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 311 *
<> 144:ef7eb2e8f9f7 312 * @retval None
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /** @brief Clear the IRDA PE pending flag.
<> 144:ef7eb2e8f9f7 317 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 318 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 319 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 320 * @retval None
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) \
<> 144:ef7eb2e8f9f7 323 do{ \
<> 144:ef7eb2e8f9f7 324 __IO uint32_t tmpreg; \
<> 144:ef7eb2e8f9f7 325 tmpreg = (__HANDLE__)->Instance->SR; \
<> 144:ef7eb2e8f9f7 326 tmpreg = (__HANDLE__)->Instance->DR; \
<> 144:ef7eb2e8f9f7 327 UNUSED(tmpreg); \
<> 144:ef7eb2e8f9f7 328 }while(0) \
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /** @brief Clear the IRDA FE pending flag.
<> 144:ef7eb2e8f9f7 331 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 332 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 333 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 334 * @retval None
<> 144:ef7eb2e8f9f7 335 */
<> 144:ef7eb2e8f9f7 336 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 /** @brief Clear the IRDA NE pending flag.
<> 144:ef7eb2e8f9f7 339 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 340 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 341 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 342 * @retval None
<> 144:ef7eb2e8f9f7 343 */
<> 144:ef7eb2e8f9f7 344 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 /** @brief Clear the IRDA ORE pending flag.
<> 144:ef7eb2e8f9f7 347 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 348 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 349 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 350 * @retval None
<> 144:ef7eb2e8f9f7 351 */
<> 144:ef7eb2e8f9f7 352 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 353
<> 144:ef7eb2e8f9f7 354 /** @brief Clear the IRDA IDLE pending flag.
<> 144:ef7eb2e8f9f7 355 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 356 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 357 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 358 * @retval None
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /** @brief Enable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 363 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 364 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 365 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 366 * @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
<> 144:ef7eb2e8f9f7 367 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 368 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 369 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 370 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 371 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 372 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 373 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 374 * @retval None
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 377 (((__INTERRUPT__) >> 28) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 378 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /** @brief Disable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 381 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 382 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 383 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 384 * @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
<> 144:ef7eb2e8f9f7 385 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 386 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 387 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 388 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 389 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 390 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 391 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 392 * @retval None
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 395 (((__INTERRUPT__) >> 28) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
<> 144:ef7eb2e8f9f7 396 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /** @brief Check whether the specified IRDA interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 399 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 400 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 401 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 402 * @param __IT__: specifies the IRDA interrupt source to check.
<> 144:ef7eb2e8f9f7 403 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 404 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 405 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 406 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 407 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 408 * @arg IRDA_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 409 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 410 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 411 */
<> 144:ef7eb2e8f9f7 412 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == IRDA_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:((((__IT__) >> 28) == IRDA_CR2_REG_INDEX)? \
<> 144:ef7eb2e8f9f7 413 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 /** @brief Enable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 416 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 417 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 418 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 419 * @retval None
<> 144:ef7eb2e8f9f7 420 */
<> 144:ef7eb2e8f9f7 421 #define __HAL_IRDA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /** @brief Disable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 424 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 425 * IRDA Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 426 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 427 * @retval None
<> 144:ef7eb2e8f9f7 428 */
<> 144:ef7eb2e8f9f7 429 #define __HAL_IRDA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /**
<> 144:ef7eb2e8f9f7 432 * @}
<> 144:ef7eb2e8f9f7 433 */
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /* Private macros --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 436 /** @defgroup IRDA_Private_Macros IRDA Private Macros
<> 144:ef7eb2e8f9f7 437 * @{
<> 144:ef7eb2e8f9f7 438 */
<> 144:ef7eb2e8f9f7 439
<> 144:ef7eb2e8f9f7 440 #define IRDA_CR1_REG_INDEX 1
<> 144:ef7eb2e8f9f7 441 #define IRDA_CR2_REG_INDEX 2
<> 144:ef7eb2e8f9f7 442 #define IRDA_CR3_REG_INDEX 3
<> 144:ef7eb2e8f9f7 443
<> 144:ef7eb2e8f9f7 444 #define IRDA_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(4*(__BAUD__)))
<> 144:ef7eb2e8f9f7 445 #define IRDA_DIVMANT(__PCLK__, __BAUD__) (IRDA_DIV((__PCLK__), (__BAUD__))/100)
<> 144:ef7eb2e8f9f7 446 #define IRDA_DIVFRAQ(__PCLK__, __BAUD__) (((IRDA_DIV((__PCLK__), (__BAUD__)) - (IRDA_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
<> 144:ef7eb2e8f9f7 447 /* UART BRR = mantissa + overflow + fraction
<> 144:ef7eb2e8f9f7 448 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0F) */
<> 144:ef7eb2e8f9f7 449 #define IRDA_BRR(_PCLK_, _BAUD_) (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4) + \
<> 144:ef7eb2e8f9f7 450 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0)) + \
<> 144:ef7eb2e8f9f7 451 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /** Ensure that IRDA Baud rate is less or equal to maximum value
<> 144:ef7eb2e8f9f7 454 * __BAUDRATE__: specifies the IRDA Baudrate set by the user.
<> 144:ef7eb2e8f9f7 455 * The maximum Baud Rate is 115200bps
<> 144:ef7eb2e8f9f7 456 * Returns : True or False
<> 144:ef7eb2e8f9f7 457 */
<> 144:ef7eb2e8f9f7 458 #define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201)
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 461 ((LENGTH) == IRDA_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 464 ((PARITY) == IRDA_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 465 ((PARITY) == IRDA_PARITY_ODD))
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 #define IS_IRDA_MODE(MODE) ((((MODE) & (~((uint32_t)IRDA_MODE_TX_RX))) == 0x00) && \
<> 144:ef7eb2e8f9f7 468 ((MODE) != (uint32_t)0x00000000))
<> 144:ef7eb2e8f9f7 469
<> 144:ef7eb2e8f9f7 470 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
<> 144:ef7eb2e8f9f7 471 ((MODE) == IRDA_POWERMODE_NORMAL))
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /** IRDA interruptions flag mask
<> 144:ef7eb2e8f9f7 474 *
<> 144:ef7eb2e8f9f7 475 */
<> 144:ef7eb2e8f9f7 476 #define IRDA_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 144:ef7eb2e8f9f7 477 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /**
<> 144:ef7eb2e8f9f7 480 * @}
<> 144:ef7eb2e8f9f7 481 */
<> 144:ef7eb2e8f9f7 482
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 /** @addtogroup IRDA_Exported_Functions IRDA Exported Functions
<> 144:ef7eb2e8f9f7 487 * @{
<> 144:ef7eb2e8f9f7 488 */
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 /** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 491 * @{
<> 144:ef7eb2e8f9f7 492 */
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 495 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 496 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 497 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 498 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 499
<> 144:ef7eb2e8f9f7 500 /**
<> 144:ef7eb2e8f9f7 501 * @}
<> 144:ef7eb2e8f9f7 502 */
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 505 * @{
<> 144:ef7eb2e8f9f7 506 */
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 509 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 510 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 511 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 512 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 513 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 514 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 515 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 516 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 517 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 518 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 519 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 520 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 521 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 522 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 523 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 524
<> 144:ef7eb2e8f9f7 525 /**
<> 144:ef7eb2e8f9f7 526 * @}
<> 144:ef7eb2e8f9f7 527 */
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /** @addtogroup IRDA_Exported_Functions_Group3 Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 530 * @{
<> 144:ef7eb2e8f9f7 531 */
<> 144:ef7eb2e8f9f7 532
<> 144:ef7eb2e8f9f7 533 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 534 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 535 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /**
<> 144:ef7eb2e8f9f7 538 * @}
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /**
<> 144:ef7eb2e8f9f7 542 * @}
<> 144:ef7eb2e8f9f7 543 */
<> 144:ef7eb2e8f9f7 544
<> 144:ef7eb2e8f9f7 545 /**
<> 144:ef7eb2e8f9f7 546 * @}
<> 144:ef7eb2e8f9f7 547 */
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /**
<> 144:ef7eb2e8f9f7 550 * @}
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 554 }
<> 144:ef7eb2e8f9f7 555 #endif
<> 144:ef7eb2e8f9f7 556
<> 144:ef7eb2e8f9f7 557 #endif /* __STM32F1xx_HAL_IRDA_H */
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/