mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_wdog.c@179:b0033dcd6934, 2017-12-07 (annotated)

Committer:
AnnaBridge
Date:
Thu Dec 07 14:01:42 2017 +0000
Revision:
179:b0033dcd6934
Parent:
161:2cc1468da177 
mbed-dev library. Release version 157

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_wdog.c
<> 144:ef7eb2e8f9f7 3 * @brief Watchdog (WDOG) peripheral API
<> 144:ef7eb2e8f9f7 4 * devices.
AnnaBridge 179:b0033dcd6934 5 * @version 5.3.3
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
AnnaBridge 179:b0033dcd6934 7 * # License
<> 150:02e0a0aed4ec 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 9 *******************************************************************************
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 12 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 13 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 16 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 17 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 18 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 19 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 22 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 23 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 24 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 25 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 26 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 29 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 30 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 ******************************************************************************/
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "em_wdog.h"
<> 144:ef7eb2e8f9f7 35 #if defined(WDOG_COUNT) && (WDOG_COUNT > 0)
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #include "em_bus.h"
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /***************************************************************************//**
<> 150:02e0a0aed4ec 40 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 41 * @{
<> 144:ef7eb2e8f9f7 42 ******************************************************************************/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 45 * @addtogroup WDOG
<> 144:ef7eb2e8f9f7 46 * @brief Watchdog (WDOG) Peripheral API
<> 150:02e0a0aed4ec 47 * @details
<> 150:02e0a0aed4ec 48 * This module contains functions to control the WDOG peripheral of Silicon
<> 150:02e0a0aed4ec 49 * Labs 32-bit MCUs and SoCs. The WDOG resets the system in case of a fault
<> 150:02e0a0aed4ec 50 * condition.
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 ******************************************************************************/
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /*******************************************************************************
<> 144:ef7eb2e8f9f7 55 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 56 ******************************************************************************/
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 59 * @brief
<> 144:ef7eb2e8f9f7 60 * Enable/disable the watchdog timer.
<> 144:ef7eb2e8f9f7 61 *
<> 144:ef7eb2e8f9f7 62 * @note
<> 144:ef7eb2e8f9f7 63 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 64 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 65 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 66 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 67 *
<> 150:02e0a0aed4ec 68 * @param[in] wdog
<> 150:02e0a0aed4ec 69 * Pointer to WDOG peripheral register block.
<> 150:02e0a0aed4ec 70 *
<> 144:ef7eb2e8f9f7 71 * @param[in] enable
<> 144:ef7eb2e8f9f7 72 * true to enable watchdog, false to disable. Watchdog cannot be disabled if
<> 144:ef7eb2e8f9f7 73 * watchdog has been locked.
<> 144:ef7eb2e8f9f7 74 ******************************************************************************/
<> 150:02e0a0aed4ec 75 void WDOGn_Enable(WDOG_TypeDef *wdog, bool enable)
<> 144:ef7eb2e8f9f7 76 {
<> 150:02e0a0aed4ec 77 /* SYNCBUSY may stall when locked. */
AnnaBridge 179:b0033dcd6934 78 if (wdog->CTRL & WDOG_CTRL_LOCK) {
<> 150:02e0a0aed4ec 79 return;
<> 150:02e0a0aed4ec 80 }
<> 150:02e0a0aed4ec 81
AnnaBridge 179:b0033dcd6934 82 if (!enable) {
<> 150:02e0a0aed4ec 83 /* If the user intends to disable and the WDOG is enabled */
AnnaBridge 179:b0033dcd6934 84 if (BUS_RegBitRead(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT)) {
<> 150:02e0a0aed4ec 85 /* Wait for any pending previous write operation to have been completed in */
<> 150:02e0a0aed4ec 86 /* low frequency domain */
<> 150:02e0a0aed4ec 87 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 150:02e0a0aed4ec 88 ;
<> 150:02e0a0aed4ec 89
<> 150:02e0a0aed4ec 90 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT, 0);
<> 150:02e0a0aed4ec 91 }
AnnaBridge 179:b0033dcd6934 92 } else {
<> 150:02e0a0aed4ec 93 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT, 1);
<> 150:02e0a0aed4ec 94 }
<> 144:ef7eb2e8f9f7 95 }
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 98 * @brief
<> 144:ef7eb2e8f9f7 99 * Feed the watchdog.
<> 144:ef7eb2e8f9f7 100 *
<> 144:ef7eb2e8f9f7 101 * @details
<> 144:ef7eb2e8f9f7 102 * When the watchdog is activated, it must be fed (ie clearing the counter)
<> 144:ef7eb2e8f9f7 103 * before it reaches the defined timeout period. Otherwise, the watchdog
<> 144:ef7eb2e8f9f7 104 * will generate a reset.
AnnaBridge 179:b0033dcd6934 105 *
<> 150:02e0a0aed4ec 106 * @param[in] wdog
<> 150:02e0a0aed4ec 107 * Pointer to WDOG peripheral register block.
<> 144:ef7eb2e8f9f7 108 ******************************************************************************/
<> 150:02e0a0aed4ec 109 void WDOGn_Feed(WDOG_TypeDef *wdog)
<> 144:ef7eb2e8f9f7 110 {
<> 144:ef7eb2e8f9f7 111 /* The watchdog should not be fed while it is disabled */
AnnaBridge 179:b0033dcd6934 112 if (!(wdog->CTRL & WDOG_CTRL_EN)) {
<> 144:ef7eb2e8f9f7 113 return;
<> 144:ef7eb2e8f9f7 114 }
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 /* If a previous clearing is being synchronized to LF domain, then there */
<> 144:ef7eb2e8f9f7 117 /* is no point in waiting for it to complete before clearing over again. */
<> 144:ef7eb2e8f9f7 118 /* This avoids stalling the core in the typical use case where some idle loop */
<> 144:ef7eb2e8f9f7 119 /* keeps clearing the watchdog. */
AnnaBridge 179:b0033dcd6934 120 if (wdog->SYNCBUSY & WDOG_SYNCBUSY_CMD) {
<> 144:ef7eb2e8f9f7 121 return;
<> 144:ef7eb2e8f9f7 122 }
<> 144:ef7eb2e8f9f7 123 /* Before writing to the WDOG_CMD register we also need to make sure that
<> 144:ef7eb2e8f9f7 124 * any previous write to WDOG_CTRL is complete. */
<> 150:02e0a0aed4ec 125 while ( wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL )
<> 144:ef7eb2e8f9f7 126 ;
<> 144:ef7eb2e8f9f7 127
<> 150:02e0a0aed4ec 128 wdog->CMD = WDOG_CMD_CLEAR;
<> 144:ef7eb2e8f9f7 129 }
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 132 * @brief
<> 144:ef7eb2e8f9f7 133 * Initialize watchdog (assuming the watchdog configuration has not been
<> 144:ef7eb2e8f9f7 134 * locked).
<> 144:ef7eb2e8f9f7 135 *
<> 144:ef7eb2e8f9f7 136 * @note
<> 144:ef7eb2e8f9f7 137 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 138 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 139 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 140 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 141 *
<> 150:02e0a0aed4ec 142 * @param[in] wdog
<> 150:02e0a0aed4ec 143 * Pointer to WDOG peripheral register block.
<> 150:02e0a0aed4ec 144 *
<> 144:ef7eb2e8f9f7 145 * @param[in] init
<> 144:ef7eb2e8f9f7 146 * Structure holding watchdog configuration. A default setting
<> 144:ef7eb2e8f9f7 147 * #WDOG_INIT_DEFAULT is available for init.
<> 144:ef7eb2e8f9f7 148 ******************************************************************************/
<> 150:02e0a0aed4ec 149 void WDOGn_Init(WDOG_TypeDef *wdog, const WDOG_Init_TypeDef *init)
<> 144:ef7eb2e8f9f7 150 {
<> 144:ef7eb2e8f9f7 151 uint32_t setting;
<> 144:ef7eb2e8f9f7 152
AnnaBridge 179:b0033dcd6934 153 if (init->enable) {
<> 144:ef7eb2e8f9f7 154 setting = WDOG_CTRL_EN;
AnnaBridge 179:b0033dcd6934 155 } else {
<> 144:ef7eb2e8f9f7 156 setting = 0;
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158
AnnaBridge 179:b0033dcd6934 159 if (init->debugRun) {
<> 144:ef7eb2e8f9f7 160 setting |= WDOG_CTRL_DEBUGRUN;
<> 144:ef7eb2e8f9f7 161 }
<> 144:ef7eb2e8f9f7 162
AnnaBridge 179:b0033dcd6934 163 if (init->em2Run) {
<> 144:ef7eb2e8f9f7 164 setting |= WDOG_CTRL_EM2RUN;
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166
AnnaBridge 179:b0033dcd6934 167 if (init->em3Run) {
<> 144:ef7eb2e8f9f7 168 setting |= WDOG_CTRL_EM3RUN;
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
AnnaBridge 179:b0033dcd6934 171 if (init->em4Block) {
<> 144:ef7eb2e8f9f7 172 setting |= WDOG_CTRL_EM4BLOCK;
<> 144:ef7eb2e8f9f7 173 }
AnnaBridge 179:b0033dcd6934 174 if (init->swoscBlock) {
<> 144:ef7eb2e8f9f7 175 setting |= WDOG_CTRL_SWOSCBLOCK;
<> 144:ef7eb2e8f9f7 176 }
AnnaBridge 179:b0033dcd6934 177 if (init->lock) {
<> 150:02e0a0aed4ec 178 setting |= WDOG_CTRL_LOCK;
<> 150:02e0a0aed4ec 179 }
AnnaBridge 179:b0033dcd6934 180 #if defined(_WDOG_CTRL_WDOGRSTDIS_MASK)
AnnaBridge 179:b0033dcd6934 181 if (init->resetDisable) {
<> 150:02e0a0aed4ec 182 setting |= WDOG_CTRL_WDOGRSTDIS;
<> 150:02e0a0aed4ec 183 }
<> 150:02e0a0aed4ec 184 #endif
<> 144:ef7eb2e8f9f7 185 setting |= ((uint32_t)(init->clkSel) << _WDOG_CTRL_CLKSEL_SHIFT)
AnnaBridge 179:b0033dcd6934 186 #if defined(_WDOG_CTRL_WARNSEL_MASK)
<> 150:02e0a0aed4ec 187 | ((uint32_t)(init->warnSel) << _WDOG_CTRL_WARNSEL_SHIFT)
<> 150:02e0a0aed4ec 188 #endif
AnnaBridge 179:b0033dcd6934 189 #if defined(_WDOG_CTRL_WINSEL_MASK)
<> 150:02e0a0aed4ec 190 | ((uint32_t)(init->winSel) << _WDOG_CTRL_WINSEL_SHIFT)
<> 150:02e0a0aed4ec 191 #endif
<> 144:ef7eb2e8f9f7 192 | ((uint32_t)(init->perSel) << _WDOG_CTRL_PERSEL_SHIFT);
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 195 /* low frequency domain */
<> 150:02e0a0aed4ec 196 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 197 ;
<> 144:ef7eb2e8f9f7 198
<> 150:02e0a0aed4ec 199 wdog->CTRL = setting;
<> 144:ef7eb2e8f9f7 200 }
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 203 * @brief
<> 144:ef7eb2e8f9f7 204 * Lock the watchdog configuration.
<> 144:ef7eb2e8f9f7 205 *
<> 144:ef7eb2e8f9f7 206 * @details
<> 144:ef7eb2e8f9f7 207 * This prevents errors from overwriting the watchdog configuration, possibly
<> 144:ef7eb2e8f9f7 208 * disabling it. Only a reset can unlock the watchdog config, once locked.
<> 144:ef7eb2e8f9f7 209 *
<> 144:ef7eb2e8f9f7 210 * If the LFRCO or LFXO clocks are used to clock the watchdog, one should
<> 144:ef7eb2e8f9f7 211 * consider using the option of inhibiting those clocks to be disabled,
<> 144:ef7eb2e8f9f7 212 * please see the WDOG_Enable() init structure.
<> 144:ef7eb2e8f9f7 213 *
<> 144:ef7eb2e8f9f7 214 * @note
<> 144:ef7eb2e8f9f7 215 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 216 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 217 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 218 * will stall until the previous synchronization has completed.
<> 150:02e0a0aed4ec 219 *
<> 150:02e0a0aed4ec 220 * @param[in] wdog
<> 150:02e0a0aed4ec 221 * Pointer to WDOG peripheral register block.
<> 144:ef7eb2e8f9f7 222 ******************************************************************************/
<> 150:02e0a0aed4ec 223 void WDOGn_Lock(WDOG_TypeDef *wdog)
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 226 /* low frequency domain */
<> 150:02e0a0aed4ec 227 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 228 ;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* Disable writing to the control register */
<> 150:02e0a0aed4ec 231 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_LOCK_SHIFT, 1);
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /** @} (end addtogroup WDOG) */
<> 150:02e0a0aed4ec 235 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 236 #endif /* defined(WDOG_COUNT) && (WDOG_COUNT > 0) */