mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_wdog.c@150:02e0a0aed4ec, 2016-11-08 (annotated)

Committer:
<>
Date:
Tue Nov 08 17:45:16 2016 +0000
Revision:
150:02e0a0aed4ec
Parent:
149:156823d33999
Child:
161:2cc1468da177
This updates the lib to the mbed lib v129

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_wdog.c
<> 144:ef7eb2e8f9f7 3 * @brief Watchdog (WDOG) peripheral API
<> 144:ef7eb2e8f9f7 4 * devices.
<> 150:02e0a0aed4ec 5 * @version 5.0.0
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @section License
<> 150:02e0a0aed4ec 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 9 *******************************************************************************
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 12 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 13 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 16 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 17 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 18 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 19 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 22 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 23 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 24 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 25 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 26 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 29 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 30 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 ******************************************************************************/
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "em_wdog.h"
<> 144:ef7eb2e8f9f7 35 #if defined(WDOG_COUNT) && (WDOG_COUNT > 0)
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #include "em_bus.h"
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /***************************************************************************//**
<> 150:02e0a0aed4ec 40 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 41 * @{
<> 144:ef7eb2e8f9f7 42 ******************************************************************************/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 45 * @addtogroup WDOG
<> 144:ef7eb2e8f9f7 46 * @brief Watchdog (WDOG) Peripheral API
<> 150:02e0a0aed4ec 47 * @details
<> 150:02e0a0aed4ec 48 * This module contains functions to control the WDOG peripheral of Silicon
<> 150:02e0a0aed4ec 49 * Labs 32-bit MCUs and SoCs. The WDOG resets the system in case of a fault
<> 150:02e0a0aed4ec 50 * condition.
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 ******************************************************************************/
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /*******************************************************************************
<> 144:ef7eb2e8f9f7 55 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 56 ******************************************************************************/
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 59 * @brief
<> 144:ef7eb2e8f9f7 60 * Enable/disable the watchdog timer.
<> 144:ef7eb2e8f9f7 61 *
<> 144:ef7eb2e8f9f7 62 * @note
<> 144:ef7eb2e8f9f7 63 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 64 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 65 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 66 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 67 *
<> 150:02e0a0aed4ec 68 * @param[in] wdog
<> 150:02e0a0aed4ec 69 * Pointer to WDOG peripheral register block.
<> 150:02e0a0aed4ec 70 *
<> 144:ef7eb2e8f9f7 71 * @param[in] enable
<> 144:ef7eb2e8f9f7 72 * true to enable watchdog, false to disable. Watchdog cannot be disabled if
<> 144:ef7eb2e8f9f7 73 * watchdog has been locked.
<> 144:ef7eb2e8f9f7 74 ******************************************************************************/
<> 150:02e0a0aed4ec 75 void WDOGn_Enable(WDOG_TypeDef *wdog, bool enable)
<> 144:ef7eb2e8f9f7 76 {
<> 150:02e0a0aed4ec 77 /* SYNCBUSY may stall when locked. */
<> 150:02e0a0aed4ec 78 if (wdog->CTRL & WDOG_CTRL_LOCK)
<> 150:02e0a0aed4ec 79 {
<> 150:02e0a0aed4ec 80 return;
<> 150:02e0a0aed4ec 81 }
<> 150:02e0a0aed4ec 82
<> 144:ef7eb2e8f9f7 83 if (!enable)
<> 144:ef7eb2e8f9f7 84 {
<> 150:02e0a0aed4ec 85 /* If the user intends to disable and the WDOG is enabled */
<> 150:02e0a0aed4ec 86 if (BUS_RegBitRead(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT))
<> 150:02e0a0aed4ec 87 {
<> 150:02e0a0aed4ec 88 /* Wait for any pending previous write operation to have been completed in */
<> 150:02e0a0aed4ec 89 /* low frequency domain */
<> 150:02e0a0aed4ec 90 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 150:02e0a0aed4ec 91 ;
<> 150:02e0a0aed4ec 92
<> 150:02e0a0aed4ec 93 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT, 0);
<> 150:02e0a0aed4ec 94 }
<> 144:ef7eb2e8f9f7 95 }
<> 150:02e0a0aed4ec 96 else
<> 150:02e0a0aed4ec 97 {
<> 150:02e0a0aed4ec 98 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_EN_SHIFT, 1);
<> 150:02e0a0aed4ec 99 }
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 104 * @brief
<> 144:ef7eb2e8f9f7 105 * Feed the watchdog.
<> 144:ef7eb2e8f9f7 106 *
<> 144:ef7eb2e8f9f7 107 * @details
<> 144:ef7eb2e8f9f7 108 * When the watchdog is activated, it must be fed (ie clearing the counter)
<> 144:ef7eb2e8f9f7 109 * before it reaches the defined timeout period. Otherwise, the watchdog
<> 144:ef7eb2e8f9f7 110 * will generate a reset.
<> 150:02e0a0aed4ec 111 *
<> 150:02e0a0aed4ec 112 * @param[in] wdog
<> 150:02e0a0aed4ec 113 * Pointer to WDOG peripheral register block.
<> 144:ef7eb2e8f9f7 114 ******************************************************************************/
<> 150:02e0a0aed4ec 115 void WDOGn_Feed(WDOG_TypeDef *wdog)
<> 144:ef7eb2e8f9f7 116 {
<> 144:ef7eb2e8f9f7 117 /* The watchdog should not be fed while it is disabled */
<> 150:02e0a0aed4ec 118 if (!(wdog->CTRL & WDOG_CTRL_EN))
<> 144:ef7eb2e8f9f7 119 {
<> 144:ef7eb2e8f9f7 120 return;
<> 144:ef7eb2e8f9f7 121 }
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /* If a previous clearing is being synchronized to LF domain, then there */
<> 144:ef7eb2e8f9f7 124 /* is no point in waiting for it to complete before clearing over again. */
<> 144:ef7eb2e8f9f7 125 /* This avoids stalling the core in the typical use case where some idle loop */
<> 144:ef7eb2e8f9f7 126 /* keeps clearing the watchdog. */
<> 150:02e0a0aed4ec 127 if (wdog->SYNCBUSY & WDOG_SYNCBUSY_CMD)
<> 144:ef7eb2e8f9f7 128 {
<> 144:ef7eb2e8f9f7 129 return;
<> 144:ef7eb2e8f9f7 130 }
<> 144:ef7eb2e8f9f7 131 /* Before writing to the WDOG_CMD register we also need to make sure that
<> 144:ef7eb2e8f9f7 132 * any previous write to WDOG_CTRL is complete. */
<> 150:02e0a0aed4ec 133 while ( wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL )
<> 144:ef7eb2e8f9f7 134 ;
<> 144:ef7eb2e8f9f7 135
<> 150:02e0a0aed4ec 136 wdog->CMD = WDOG_CMD_CLEAR;
<> 144:ef7eb2e8f9f7 137 }
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 141 * @brief
<> 144:ef7eb2e8f9f7 142 * Initialize watchdog (assuming the watchdog configuration has not been
<> 144:ef7eb2e8f9f7 143 * locked).
<> 144:ef7eb2e8f9f7 144 *
<> 144:ef7eb2e8f9f7 145 * @note
<> 144:ef7eb2e8f9f7 146 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 147 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 148 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 149 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 150 *
<> 150:02e0a0aed4ec 151 * @param[in] wdog
<> 150:02e0a0aed4ec 152 * Pointer to WDOG peripheral register block.
<> 150:02e0a0aed4ec 153 *
<> 144:ef7eb2e8f9f7 154 * @param[in] init
<> 144:ef7eb2e8f9f7 155 * Structure holding watchdog configuration. A default setting
<> 144:ef7eb2e8f9f7 156 * #WDOG_INIT_DEFAULT is available for init.
<> 144:ef7eb2e8f9f7 157 ******************************************************************************/
<> 150:02e0a0aed4ec 158 void WDOGn_Init(WDOG_TypeDef *wdog, const WDOG_Init_TypeDef *init)
<> 144:ef7eb2e8f9f7 159 {
<> 144:ef7eb2e8f9f7 160 uint32_t setting;
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 if (init->enable)
<> 144:ef7eb2e8f9f7 163 {
<> 144:ef7eb2e8f9f7 164 setting = WDOG_CTRL_EN;
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166 else
<> 144:ef7eb2e8f9f7 167 {
<> 144:ef7eb2e8f9f7 168 setting = 0;
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 if (init->debugRun)
<> 144:ef7eb2e8f9f7 172 {
<> 144:ef7eb2e8f9f7 173 setting |= WDOG_CTRL_DEBUGRUN;
<> 144:ef7eb2e8f9f7 174 }
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 if (init->em2Run)
<> 144:ef7eb2e8f9f7 177 {
<> 144:ef7eb2e8f9f7 178 setting |= WDOG_CTRL_EM2RUN;
<> 144:ef7eb2e8f9f7 179 }
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 if (init->em3Run)
<> 144:ef7eb2e8f9f7 182 {
<> 144:ef7eb2e8f9f7 183 setting |= WDOG_CTRL_EM3RUN;
<> 144:ef7eb2e8f9f7 184 }
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 if (init->em4Block)
<> 144:ef7eb2e8f9f7 187 {
<> 144:ef7eb2e8f9f7 188 setting |= WDOG_CTRL_EM4BLOCK;
<> 144:ef7eb2e8f9f7 189 }
<> 144:ef7eb2e8f9f7 190 if (init->swoscBlock)
<> 144:ef7eb2e8f9f7 191 {
<> 144:ef7eb2e8f9f7 192 setting |= WDOG_CTRL_SWOSCBLOCK;
<> 144:ef7eb2e8f9f7 193 }
<> 150:02e0a0aed4ec 194 if (init->lock)
<> 150:02e0a0aed4ec 195 {
<> 150:02e0a0aed4ec 196 setting |= WDOG_CTRL_LOCK;
<> 150:02e0a0aed4ec 197 }
<> 150:02e0a0aed4ec 198 #if defined( _WDOG_CTRL_WDOGRSTDIS_MASK )
<> 150:02e0a0aed4ec 199 if (init->resetDisable)
<> 150:02e0a0aed4ec 200 {
<> 150:02e0a0aed4ec 201 setting |= WDOG_CTRL_WDOGRSTDIS;
<> 150:02e0a0aed4ec 202 }
<> 150:02e0a0aed4ec 203 #endif
<> 144:ef7eb2e8f9f7 204 setting |= ((uint32_t)(init->clkSel) << _WDOG_CTRL_CLKSEL_SHIFT)
<> 150:02e0a0aed4ec 205 #if defined( _WDOG_CTRL_WARNSEL_MASK )
<> 150:02e0a0aed4ec 206 | ((uint32_t)(init->warnSel) << _WDOG_CTRL_WARNSEL_SHIFT)
<> 150:02e0a0aed4ec 207 #endif
<> 150:02e0a0aed4ec 208 #if defined( _WDOG_CTRL_WINSEL_MASK )
<> 150:02e0a0aed4ec 209 | ((uint32_t)(init->winSel) << _WDOG_CTRL_WINSEL_SHIFT)
<> 150:02e0a0aed4ec 210 #endif
<> 144:ef7eb2e8f9f7 211 | ((uint32_t)(init->perSel) << _WDOG_CTRL_PERSEL_SHIFT);
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 214 /* low frequency domain */
<> 150:02e0a0aed4ec 215 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 216 ;
<> 144:ef7eb2e8f9f7 217
<> 150:02e0a0aed4ec 218 wdog->CTRL = setting;
<> 144:ef7eb2e8f9f7 219 }
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 223 * @brief
<> 144:ef7eb2e8f9f7 224 * Lock the watchdog configuration.
<> 144:ef7eb2e8f9f7 225 *
<> 144:ef7eb2e8f9f7 226 * @details
<> 144:ef7eb2e8f9f7 227 * This prevents errors from overwriting the watchdog configuration, possibly
<> 144:ef7eb2e8f9f7 228 * disabling it. Only a reset can unlock the watchdog config, once locked.
<> 144:ef7eb2e8f9f7 229 *
<> 144:ef7eb2e8f9f7 230 * If the LFRCO or LFXO clocks are used to clock the watchdog, one should
<> 144:ef7eb2e8f9f7 231 * consider using the option of inhibiting those clocks to be disabled,
<> 144:ef7eb2e8f9f7 232 * please see the WDOG_Enable() init structure.
<> 144:ef7eb2e8f9f7 233 *
<> 144:ef7eb2e8f9f7 234 * @note
<> 144:ef7eb2e8f9f7 235 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 236 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 237 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 238 * will stall until the previous synchronization has completed.
<> 150:02e0a0aed4ec 239 *
<> 150:02e0a0aed4ec 240 * @param[in] wdog
<> 150:02e0a0aed4ec 241 * Pointer to WDOG peripheral register block.
<> 144:ef7eb2e8f9f7 242 ******************************************************************************/
<> 150:02e0a0aed4ec 243 void WDOGn_Lock(WDOG_TypeDef *wdog)
<> 144:ef7eb2e8f9f7 244 {
<> 144:ef7eb2e8f9f7 245 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 246 /* low frequency domain */
<> 150:02e0a0aed4ec 247 while (wdog->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 248 ;
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* Disable writing to the control register */
<> 150:02e0a0aed4ec 251 BUS_RegBitWrite(&wdog->CTRL, _WDOG_CTRL_LOCK_SHIFT, 1);
<> 144:ef7eb2e8f9f7 252 }
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @} (end addtogroup WDOG) */
<> 150:02e0a0aed4ec 256 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 257 #endif /* defined(WDOG_COUNT) && (WDOG_COUNT > 0) */