mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_mpu.c@179:b0033dcd6934, 2017-12-07 (annotated)

Committer:
AnnaBridge
Date:
Thu Dec 07 14:01:42 2017 +0000
Revision:
179:b0033dcd6934
Parent:
161:2cc1468da177 
mbed-dev library. Release version 157

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_mpu.c
<> 144:ef7eb2e8f9f7 3 * @brief Memory Protection Unit (MPU) Peripheral API
AnnaBridge 179:b0033dcd6934 4 * @version 5.3.3
<> 144:ef7eb2e8f9f7 5 *******************************************************************************
AnnaBridge 179:b0033dcd6934 6 * # License
<> 150:02e0a0aed4ec 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 8 *******************************************************************************
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 11 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 12 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 15 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 17 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 18 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 21 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 22 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 23 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 24 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 25 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 28 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 29 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 30 *
<> 144:ef7eb2e8f9f7 31 ******************************************************************************/
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "em_mpu.h"
<> 144:ef7eb2e8f9f7 34 #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
<> 144:ef7eb2e8f9f7 35 #include "em_assert.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /***************************************************************************//**
<> 150:02e0a0aed4ec 38 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 39 * @{
<> 144:ef7eb2e8f9f7 40 ******************************************************************************/
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 43 * @addtogroup MPU
<> 144:ef7eb2e8f9f7 44 * @brief Memory Protection Unit (MPU) Peripheral API
<> 144:ef7eb2e8f9f7 45 * @details
<> 144:ef7eb2e8f9f7 46 * This module contains functions to enable, disable and setup the MPU.
<> 144:ef7eb2e8f9f7 47 * The MPU is used to control access attributes and permissions in the
<> 144:ef7eb2e8f9f7 48 * memory map. The settings that can be controlled are:
<> 144:ef7eb2e8f9f7 49 *
<> 144:ef7eb2e8f9f7 50 * @li Executable attribute.
<> 144:ef7eb2e8f9f7 51 * @li Cachable, bufferable and shareable attributes.
<> 144:ef7eb2e8f9f7 52 * @li Cache policy.
<> 144:ef7eb2e8f9f7 53 * @li Access permissions: Priviliged or User state, read or write access,
<> 144:ef7eb2e8f9f7 54 * and combinations of all these.
<> 144:ef7eb2e8f9f7 55 *
<> 144:ef7eb2e8f9f7 56 * The MPU can be activated and deactivated with functions:
<> 144:ef7eb2e8f9f7 57 * @verbatim
<> 144:ef7eb2e8f9f7 58 * MPU_Enable(..);
<> 144:ef7eb2e8f9f7 59 * MPU_Disable();@endverbatim
<> 144:ef7eb2e8f9f7 60 * The MPU can control 8 memory regions with individual access control
<> 144:ef7eb2e8f9f7 61 * settings. Section attributes and permissions are set with:
<> 144:ef7eb2e8f9f7 62 * @verbatim
<> 144:ef7eb2e8f9f7 63 * MPU_ConfigureRegion(..);@endverbatim
<> 144:ef7eb2e8f9f7 64 * It is advisable to disable the MPU when altering region settings.
<> 144:ef7eb2e8f9f7 65 *
<> 144:ef7eb2e8f9f7 66 *
<> 144:ef7eb2e8f9f7 67 * @{
<> 144:ef7eb2e8f9f7 68 ******************************************************************************/
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /*******************************************************************************
<> 144:ef7eb2e8f9f7 71 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 72 ******************************************************************************/
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 75 * @brief
<> 144:ef7eb2e8f9f7 76 * Configure an MPU region.
<> 144:ef7eb2e8f9f7 77 *
<> 144:ef7eb2e8f9f7 78 * @details
<> 144:ef7eb2e8f9f7 79 * Writes to MPU RBAR and RASR registers.
<> 144:ef7eb2e8f9f7 80 * Refer to Cortex-M3 Reference Manual, MPU chapter for further details.
<> 144:ef7eb2e8f9f7 81 * To disable a region it is only required to set init->regionNo to the
<> 144:ef7eb2e8f9f7 82 * desired value and init->regionEnable = false.
<> 144:ef7eb2e8f9f7 83 *
<> 144:ef7eb2e8f9f7 84 * @param[in] init
<> 144:ef7eb2e8f9f7 85 * Pointer to a structure containing MPU region init information.
<> 144:ef7eb2e8f9f7 86 ******************************************************************************/
<> 144:ef7eb2e8f9f7 87 void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init)
<> 144:ef7eb2e8f9f7 88 {
AnnaBridge 179:b0033dcd6934 89 EFM_ASSERT(init->regionNo < ((MPU->TYPE & MPU_TYPE_DREGION_Msk)
AnnaBridge 179:b0033dcd6934 90 >> MPU_TYPE_DREGION_Pos));
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 MPU->RNR = init->regionNo;
<> 144:ef7eb2e8f9f7 93
AnnaBridge 179:b0033dcd6934 94 if (init->regionEnable) {
<> 144:ef7eb2e8f9f7 95 EFM_ASSERT(!(init->baseAddress & ~MPU_RBAR_ADDR_Msk));
<> 144:ef7eb2e8f9f7 96 EFM_ASSERT(init->tex <= 0x7);
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 MPU->RBAR = init->baseAddress;
<> 144:ef7eb2e8f9f7 99 MPU->RASR = ((init->disableExec ? 1 : 0) << MPU_RASR_XN_Pos)
<> 144:ef7eb2e8f9f7 100 | (init->accessPermission << MPU_RASR_AP_Pos)
<> 144:ef7eb2e8f9f7 101 | (init->tex << MPU_RASR_TEX_Pos)
<> 144:ef7eb2e8f9f7 102 | ((init->shareable ? 1 : 0) << MPU_RASR_S_Pos)
<> 144:ef7eb2e8f9f7 103 | ((init->cacheable ? 1 : 0) << MPU_RASR_C_Pos)
<> 144:ef7eb2e8f9f7 104 | ((init->bufferable ? 1 : 0) << MPU_RASR_B_Pos)
<> 144:ef7eb2e8f9f7 105 | (init->srd << MPU_RASR_SRD_Pos)
<> 144:ef7eb2e8f9f7 106 | (init->size << MPU_RASR_SIZE_Pos)
<> 144:ef7eb2e8f9f7 107 | (1 << MPU_RASR_ENABLE_Pos);
AnnaBridge 179:b0033dcd6934 108 } else {
<> 144:ef7eb2e8f9f7 109 MPU->RBAR = 0;
<> 144:ef7eb2e8f9f7 110 MPU->RASR = 0;
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /** @} (end addtogroup CMU) */
<> 150:02e0a0aed4ec 115 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 116 #endif /* defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) */