mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_mpu.c@150:02e0a0aed4ec, 2016-11-08 (annotated)

Committer:
<>
Date:
Tue Nov 08 17:45:16 2016 +0000
Revision:
150:02e0a0aed4ec
Parent:
149:156823d33999
Child:
161:2cc1468da177
This updates the lib to the mbed lib v129

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_mpu.c
<> 144:ef7eb2e8f9f7 3 * @brief Memory Protection Unit (MPU) Peripheral API
<> 150:02e0a0aed4ec 4 * @version 5.0.0
<> 144:ef7eb2e8f9f7 5 *******************************************************************************
<> 144:ef7eb2e8f9f7 6 * @section License
<> 150:02e0a0aed4ec 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 8 *******************************************************************************
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 11 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 12 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 15 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 17 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 18 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 21 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 22 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 23 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 24 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 25 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 28 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 29 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 30 *
<> 144:ef7eb2e8f9f7 31 ******************************************************************************/
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "em_mpu.h"
<> 144:ef7eb2e8f9f7 34 #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
<> 144:ef7eb2e8f9f7 35 #include "em_assert.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /***************************************************************************//**
<> 150:02e0a0aed4ec 39 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 40 * @{
<> 144:ef7eb2e8f9f7 41 ******************************************************************************/
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 45 * @addtogroup MPU
<> 144:ef7eb2e8f9f7 46 * @brief Memory Protection Unit (MPU) Peripheral API
<> 144:ef7eb2e8f9f7 47 * @details
<> 144:ef7eb2e8f9f7 48 * This module contains functions to enable, disable and setup the MPU.
<> 144:ef7eb2e8f9f7 49 * The MPU is used to control access attributes and permissions in the
<> 144:ef7eb2e8f9f7 50 * memory map. The settings that can be controlled are:
<> 144:ef7eb2e8f9f7 51 *
<> 144:ef7eb2e8f9f7 52 * @li Executable attribute.
<> 144:ef7eb2e8f9f7 53 * @li Cachable, bufferable and shareable attributes.
<> 144:ef7eb2e8f9f7 54 * @li Cache policy.
<> 144:ef7eb2e8f9f7 55 * @li Access permissions: Priviliged or User state, read or write access,
<> 144:ef7eb2e8f9f7 56 * and combinations of all these.
<> 144:ef7eb2e8f9f7 57 *
<> 144:ef7eb2e8f9f7 58 * The MPU can be activated and deactivated with functions:
<> 144:ef7eb2e8f9f7 59 * @verbatim
<> 144:ef7eb2e8f9f7 60 * MPU_Enable(..);
<> 144:ef7eb2e8f9f7 61 * MPU_Disable();@endverbatim
<> 144:ef7eb2e8f9f7 62 * The MPU can control 8 memory regions with individual access control
<> 144:ef7eb2e8f9f7 63 * settings. Section attributes and permissions are set with:
<> 144:ef7eb2e8f9f7 64 * @verbatim
<> 144:ef7eb2e8f9f7 65 * MPU_ConfigureRegion(..);@endverbatim
<> 144:ef7eb2e8f9f7 66 * It is advisable to disable the MPU when altering region settings.
<> 144:ef7eb2e8f9f7 67 *
<> 144:ef7eb2e8f9f7 68 *
<> 144:ef7eb2e8f9f7 69 * @{
<> 144:ef7eb2e8f9f7 70 ******************************************************************************/
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 /*******************************************************************************
<> 144:ef7eb2e8f9f7 74 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 75 ******************************************************************************/
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 79 * @brief
<> 144:ef7eb2e8f9f7 80 * Configure an MPU region.
<> 144:ef7eb2e8f9f7 81 *
<> 144:ef7eb2e8f9f7 82 * @details
<> 144:ef7eb2e8f9f7 83 * Writes to MPU RBAR and RASR registers.
<> 144:ef7eb2e8f9f7 84 * Refer to Cortex-M3 Reference Manual, MPU chapter for further details.
<> 144:ef7eb2e8f9f7 85 * To disable a region it is only required to set init->regionNo to the
<> 144:ef7eb2e8f9f7 86 * desired value and init->regionEnable = false.
<> 144:ef7eb2e8f9f7 87 *
<> 144:ef7eb2e8f9f7 88 * @param[in] init
<> 144:ef7eb2e8f9f7 89 * Pointer to a structure containing MPU region init information.
<> 144:ef7eb2e8f9f7 90 ******************************************************************************/
<> 144:ef7eb2e8f9f7 91 void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init)
<> 144:ef7eb2e8f9f7 92 {
<> 144:ef7eb2e8f9f7 93 EFM_ASSERT(init->regionNo < ((MPU->TYPE & MPU_TYPE_DREGION_Msk) >>
<> 144:ef7eb2e8f9f7 94 MPU_TYPE_DREGION_Pos));
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 MPU->RNR = init->regionNo;
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 if (init->regionEnable)
<> 144:ef7eb2e8f9f7 99 {
<> 144:ef7eb2e8f9f7 100 EFM_ASSERT(!(init->baseAddress & ~MPU_RBAR_ADDR_Msk));
<> 144:ef7eb2e8f9f7 101 EFM_ASSERT(init->tex <= 0x7);
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 MPU->RBAR = init->baseAddress;
<> 144:ef7eb2e8f9f7 104 MPU->RASR = ((init->disableExec ? 1 : 0) << MPU_RASR_XN_Pos)
<> 144:ef7eb2e8f9f7 105 | (init->accessPermission << MPU_RASR_AP_Pos)
<> 144:ef7eb2e8f9f7 106 | (init->tex << MPU_RASR_TEX_Pos)
<> 144:ef7eb2e8f9f7 107 | ((init->shareable ? 1 : 0) << MPU_RASR_S_Pos)
<> 144:ef7eb2e8f9f7 108 | ((init->cacheable ? 1 : 0) << MPU_RASR_C_Pos)
<> 144:ef7eb2e8f9f7 109 | ((init->bufferable ? 1 : 0) << MPU_RASR_B_Pos)
<> 144:ef7eb2e8f9f7 110 | (init->srd << MPU_RASR_SRD_Pos)
<> 144:ef7eb2e8f9f7 111 | (init->size << MPU_RASR_SIZE_Pos)
<> 144:ef7eb2e8f9f7 112 | (1 << MPU_RASR_ENABLE_Pos);
<> 144:ef7eb2e8f9f7 113 }
<> 144:ef7eb2e8f9f7 114 else
<> 144:ef7eb2e8f9f7 115 {
<> 144:ef7eb2e8f9f7 116 MPU->RBAR = 0;
<> 144:ef7eb2e8f9f7 117 MPU->RASR = 0;
<> 144:ef7eb2e8f9f7 118 }
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /** @} (end addtogroup CMU) */
<> 150:02e0a0aed4ec 123 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 124 #endif /* defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) */