mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_NXP/TARGET_LPC81X/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include <math.h>
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 20 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 21 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 22 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 static const SWM_Map SWM_SPI_SSEL[] = {
bogdanm 0:9b334a45a8ff 25 {4, 16},
bogdanm 0:9b334a45a8ff 26 {5, 16},
bogdanm 0:9b334a45a8ff 27 };
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 static const SWM_Map SWM_SPI_SCLK[] = {
bogdanm 0:9b334a45a8ff 30 {3, 24},
bogdanm 0:9b334a45a8ff 31 {4, 24},
bogdanm 0:9b334a45a8ff 32 };
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 static const SWM_Map SWM_SPI_MOSI[] = {
bogdanm 0:9b334a45a8ff 35 {4, 0},
bogdanm 0:9b334a45a8ff 36 {5, 0},
bogdanm 0:9b334a45a8ff 37 };
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 static const SWM_Map SWM_SPI_MISO[] = {
bogdanm 0:9b334a45a8ff 40 {4, 8},
bogdanm 0:9b334a45a8ff 41 {5, 16},
bogdanm 0:9b334a45a8ff 42 };
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 // bit flags for used SPIs
bogdanm 0:9b334a45a8ff 45 static unsigned char spi_used = 0;
bogdanm 0:9b334a45a8ff 46 static int get_available_spi(void) {
bogdanm 0:9b334a45a8ff 47 int i;
bogdanm 0:9b334a45a8ff 48 for (i=0; i<2; i++) {
bogdanm 0:9b334a45a8ff 49 if ((spi_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 50 return i;
bogdanm 0:9b334a45a8ff 51 }
bogdanm 0:9b334a45a8ff 52 return -1;
bogdanm 0:9b334a45a8ff 53 }
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 static inline int ssp_disable(spi_t *obj);
bogdanm 0:9b334a45a8ff 56 static inline int ssp_enable(spi_t *obj);
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 59 int spi_n = get_available_spi();
bogdanm 0:9b334a45a8ff 60 if (spi_n == -1) {
bogdanm 0:9b334a45a8ff 61 error("No available SPI");
bogdanm 0:9b334a45a8ff 62 }
bogdanm 0:9b334a45a8ff 63 obj->spi_n = spi_n;
bogdanm 0:9b334a45a8ff 64 spi_used |= (1 << spi_n);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 obj->spi = (spi_n) ? (LPC_SPI_TypeDef *)(LPC_SPI1_BASE) : (LPC_SPI_TypeDef *)(LPC_SPI0_BASE);
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 const SWM_Map *swm;
bogdanm 0:9b334a45a8ff 69 uint32_t regVal;
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 swm = &SWM_SPI_SCLK[obj->spi_n];
bogdanm 0:9b334a45a8ff 72 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 73 LPC_SWM->PINASSIGN[swm->n] = regVal | (sclk << swm->offset);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 swm = &SWM_SPI_MOSI[obj->spi_n];
bogdanm 0:9b334a45a8ff 76 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 77 LPC_SWM->PINASSIGN[swm->n] = regVal | (mosi << swm->offset);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 swm = &SWM_SPI_MISO[obj->spi_n];
bogdanm 0:9b334a45a8ff 80 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 81 LPC_SWM->PINASSIGN[swm->n] = regVal | (miso << swm->offset);
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 swm = &SWM_SPI_SSEL[obj->spi_n];
bogdanm 0:9b334a45a8ff 84 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 85 LPC_SWM->PINASSIGN[swm->n] = regVal | (ssel << swm->offset);
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 // clear interrupts
bogdanm 0:9b334a45a8ff 88 obj->spi->INTENCLR = 0x3f;
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // enable power and clocking
bogdanm 0:9b334a45a8ff 91 switch (obj->spi_n) {
bogdanm 0:9b334a45a8ff 92 case 0:
bogdanm 0:9b334a45a8ff 93 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<11);
bogdanm 0:9b334a45a8ff 94 LPC_SYSCON->PRESETCTRL &= ~(0x1<<0);
bogdanm 0:9b334a45a8ff 95 LPC_SYSCON->PRESETCTRL |= (0x1<<0);
bogdanm 0:9b334a45a8ff 96 break;
bogdanm 0:9b334a45a8ff 97 case 1:
bogdanm 0:9b334a45a8ff 98 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
bogdanm 0:9b334a45a8ff 99 LPC_SYSCON->PRESETCTRL &= ~(0x1<<1);
bogdanm 0:9b334a45a8ff 100 LPC_SYSCON->PRESETCTRL |= (0x1<<1);
bogdanm 0:9b334a45a8ff 101 break;
bogdanm 0:9b334a45a8ff 102 }
bogdanm 0:9b334a45a8ff 103 }
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 void spi_free(spi_t *obj) {}
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 108 MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
bogdanm 0:9b334a45a8ff 109 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 112 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 // set it up
bogdanm 0:9b334a45a8ff 115 int DSS = bits - 1; // DSS (data select size)
bogdanm 0:9b334a45a8ff 116 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
bogdanm 0:9b334a45a8ff 117 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 uint32_t tmp = obj->spi->CFG;
bogdanm 0:9b334a45a8ff 120 tmp &= ~((1 << 2) | (1 << 4) | (1 << 5));
bogdanm 0:9b334a45a8ff 121 tmp |= (SPH << 4) | (SPO << 5) | ((slave ? 0 : 1) << 2);
bogdanm 0:9b334a45a8ff 122 obj->spi->CFG = tmp;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 // select frame length
bogdanm 0:9b334a45a8ff 125 tmp = obj->spi->TXDATCTL;
bogdanm 0:9b334a45a8ff 126 tmp &= ~(0xf << 24);
bogdanm 0:9b334a45a8ff 127 tmp |= (DSS << 24);
bogdanm 0:9b334a45a8ff 128 obj->spi->TXDATCTL = tmp;
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 131 }
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 134 ssp_disable(obj);
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 obj->spi->DIV = PCLK/hz - 1;
bogdanm 0:9b334a45a8ff 139 obj->spi->DLY = 0;
bogdanm 0:9b334a45a8ff 140 ssp_enable(obj);
bogdanm 0:9b334a45a8ff 141 }
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 static inline int ssp_disable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 144 return obj->spi->CFG &= ~(1 << 0);
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 static inline int ssp_enable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 148 return obj->spi->CFG |= (1 << 0);
bogdanm 0:9b334a45a8ff 149 }
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 static inline int ssp_readable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 152 return obj->spi->STAT & (1 << 0);
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 static inline int ssp_writeable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 156 return obj->spi->STAT & (1 << 1);
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 static inline void ssp_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 160 while (!ssp_writeable(obj));
bogdanm 0:9b334a45a8ff 161 // end of transfer
bogdanm 0:9b334a45a8ff 162 obj->spi->TXDATCTL |= (1 << 20);
bogdanm 0:9b334a45a8ff 163 obj->spi->TXDAT = value;
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 static inline int ssp_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 167 while (!ssp_readable(obj));
bogdanm 0:9b334a45a8ff 168 return obj->spi->RXDAT;
bogdanm 0:9b334a45a8ff 169 }
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 static inline int ssp_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 172 // checking RXOV(Receiver Overrun interrupt flag)
bogdanm 0:9b334a45a8ff 173 return obj->spi->STAT & (1 << 2);
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 177 ssp_write(obj, value);
bogdanm 0:9b334a45a8ff 178 return ssp_read(obj);
bogdanm 0:9b334a45a8ff 179 }
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 182 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 186 return obj->spi->RXDAT;
bogdanm 0:9b334a45a8ff 187 }
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 190 while (ssp_writeable(obj) == 0) ;
bogdanm 0:9b334a45a8ff 191 obj->spi->TXDAT = value;
bogdanm 0:9b334a45a8ff 192 }
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 int spi_busy(spi_t *obj) {
bogdanm 0:9b334a45a8ff 195 return ssp_busy(obj);
bogdanm 0:9b334a45a8ff 196 }