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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_usart.c@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_usart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief USART HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Universal Synchronous Asynchronous Receiver Transmitter
<> 144:ef7eb2e8f9f7 10 * Peripheral (USART).
<> 144:ef7eb2e8f9f7 11 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 12 * + IO operation functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 14 * + Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 @verbatim
<> 144:ef7eb2e8f9f7 17 ===============================================================================
<> 144:ef7eb2e8f9f7 18 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 19 ===============================================================================
<> 144:ef7eb2e8f9f7 20 [..]
<> 144:ef7eb2e8f9f7 21 The USART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 (#) Declare a USART_HandleTypeDef handle structure (eg. USART_HandleTypeDef husart).
<> 144:ef7eb2e8f9f7 24 (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit() API:
<> 144:ef7eb2e8f9f7 25 (++) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 26 (++) USART pins configuration:
<> 144:ef7eb2e8f9f7 27 (+++) Enable the clock for the USART GPIOs.
<> 144:ef7eb2e8f9f7 28 (+++) Configure these USART pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 29 (++) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
<> 144:ef7eb2e8f9f7 30 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<> 144:ef7eb2e8f9f7 31 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 32 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 33 (++) USART interrupts handling:
<> 144:ef7eb2e8f9f7 34 -@@- The specific USART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 35 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 144:ef7eb2e8f9f7 36 __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
<> 144:ef7eb2e8f9f7 37 (++) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 38 HAL_USART_Receive_DMA() and HAL_USART_TransmitReceive_DMA() APIs):
<> 144:ef7eb2e8f9f7 39 (+++) Declare a DMA handle structure for the Tx/Rx channel.
<> 144:ef7eb2e8f9f7 40 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 41 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 42 (+++) Configure the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 43 (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 44 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 47 flow control and Mode (Receiver/Transmitter) in the husart handle Init structure.
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 (#) Initialize the USART registers by calling the HAL_USART_Init() API:
<> 144:ef7eb2e8f9f7 50 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<> 144:ef7eb2e8f9f7 51 by calling the customized HAL_USART_MspInit(&husart) API.
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 (#) Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 56 =================================
<> 144:ef7eb2e8f9f7 57 [..]
<> 144:ef7eb2e8f9f7 58 (+) Send an amount of data in blocking mode using HAL_USART_Transmit()
<> 144:ef7eb2e8f9f7 59 (+) Receive an amount of data in blocking mode using HAL_USART_Receive()
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 62 ===================================
<> 144:ef7eb2e8f9f7 63 [..]
<> 144:ef7eb2e8f9f7 64 (+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
<> 144:ef7eb2e8f9f7 65 (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 66 add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 67 (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 68 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 69 (+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
<> 144:ef7eb2e8f9f7 70 (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 71 add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 72 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 73 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 74 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 75 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 78 ==============================
<> 144:ef7eb2e8f9f7 79 [..]
<> 144:ef7eb2e8f9f7 80 (+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 81 (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 82 add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 83 (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 84 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 85 (+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
<> 144:ef7eb2e8f9f7 86 (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 87 add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 88 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 89 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 90 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 91 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 92 (+) Pause the DMA Transfer using HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 93 (+) Resume the DMA Transfer using HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 94 (+) Stop the DMA Transfer using HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 *** USART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 97 =============================================
<> 144:ef7eb2e8f9f7 98 [..]
<> 144:ef7eb2e8f9f7 99 Below the list of most used macros in USART HAL driver.
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 (+) __HAL_USART_ENABLE: Enable the USART peripheral
<> 144:ef7eb2e8f9f7 102 (+) __HAL_USART_DISABLE: Disable the USART peripheral
<> 144:ef7eb2e8f9f7 103 (+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
<> 144:ef7eb2e8f9f7 104 (+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
<> 144:ef7eb2e8f9f7 105 (+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
<> 144:ef7eb2e8f9f7 106 (+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 [..]
<> 144:ef7eb2e8f9f7 109 (@) You can refer to the USART HAL driver header file for more useful macros
<> 156:95d6b41a828b 110 [..]
<> 156:95d6b41a828b 111 (@) To configure and enable/disable the USART to wake up the MCU from stop mode, resort to UART API's
<> 156:95d6b41a828b 112 HAL_UARTEx_StopModeWakeUpSourceConfig(), HAL_UARTEx_EnableStopMode() and
<> 156:95d6b41a828b 113 HAL_UARTEx_DisableStopMode() in casting the USART handle to UART type UART_HandleTypeDef.
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 @endverbatim
<> 144:ef7eb2e8f9f7 116 ******************************************************************************
<> 144:ef7eb2e8f9f7 117 * @attention
<> 144:ef7eb2e8f9f7 118 *
<> 144:ef7eb2e8f9f7 119 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 120 *
<> 144:ef7eb2e8f9f7 121 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 122 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 123 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 124 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 125 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 126 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 127 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 128 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 129 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 130 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 133 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 134 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 135 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 136 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 137 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 138 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 139 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 140 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 141 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 142 *
<> 144:ef7eb2e8f9f7 143 ******************************************************************************
<> 144:ef7eb2e8f9f7 144 */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 147 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 150 * @{
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 /** @defgroup USART USART
<> 144:ef7eb2e8f9f7 154 * @brief HAL USART Synchronous module driver
<> 144:ef7eb2e8f9f7 155 * @{
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 #ifdef HAL_USART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 161 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 162 /** @defgroup USART_Private_Constants USART Private Constants
<> 144:ef7eb2e8f9f7 163 * @{
<> 144:ef7eb2e8f9f7 164 */
<> 156:95d6b41a828b 165 #define USART_DUMMY_DATA ((uint16_t) 0xFFFFU) /*!< USART transmitted dummy data */
<> 156:95d6b41a828b 166 #define USART_TEACK_REACK_TIMEOUT ( 1000U) /*!< USART TX or RX enable acknowledge time-out value */
<> 144:ef7eb2e8f9f7 167 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
<> 144:ef7eb2e8f9f7 168 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< USART CR1 fields of parameters set by USART_SetConfig API */
<> 144:ef7eb2e8f9f7 169 #define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \
<> 144:ef7eb2e8f9f7 170 USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by USART_SetConfig API */
<> 144:ef7eb2e8f9f7 171 /**
<> 144:ef7eb2e8f9f7 172 * @}
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 176 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 177 /* Private function prototypes -----------------------------------------------*/
<> 156:95d6b41a828b 178 /** @addtogroup USART_Private_Functions
<> 144:ef7eb2e8f9f7 179 * @{
<> 144:ef7eb2e8f9f7 180 */
<> 156:95d6b41a828b 181 static void USART_EndTransfer(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 182 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 183 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 184 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 185 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 186 static void USART_DMAError(DMA_HandleTypeDef *hdma);
<> 156:95d6b41a828b 187 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
<> 156:95d6b41a828b 188 static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
<> 156:95d6b41a828b 189 static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
<> 156:95d6b41a828b 190 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 191 static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 192 static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 193 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 194 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 195 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 196 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 197 /**
<> 144:ef7eb2e8f9f7 198 * @}
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /** @defgroup USART_Exported_Functions USART Exported Functions
<> 144:ef7eb2e8f9f7 204 * @{
<> 144:ef7eb2e8f9f7 205 */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /** @defgroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 208 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 209 *
<> 144:ef7eb2e8f9f7 210 @verbatim
<> 144:ef7eb2e8f9f7 211 ===============================================================================
<> 144:ef7eb2e8f9f7 212 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 213 ===============================================================================
<> 144:ef7eb2e8f9f7 214 [..]
<> 144:ef7eb2e8f9f7 215 This subsection provides a set of functions allowing to initialize the USART
<> 144:ef7eb2e8f9f7 216 in asynchronous and in synchronous modes.
<> 144:ef7eb2e8f9f7 217 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 218 (++) Baud Rate
<> 144:ef7eb2e8f9f7 219 (++) Word Length
<> 144:ef7eb2e8f9f7 220 (++) Stop Bit
<> 144:ef7eb2e8f9f7 221 (++) Parity
<> 144:ef7eb2e8f9f7 222 (++) USART polarity
<> 144:ef7eb2e8f9f7 223 (++) USART phase
<> 144:ef7eb2e8f9f7 224 (++) USART LastBit
<> 144:ef7eb2e8f9f7 225 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 [..]
<> 144:ef7eb2e8f9f7 228 The HAL_USART_Init() function follows the USART synchronous configuration
<> 144:ef7eb2e8f9f7 229 procedure (details for the procedure are available in reference manual).
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 @endverbatim
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /*
<> 144:ef7eb2e8f9f7 236 Additional Table: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 237 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 238 According to device capability (support or not of 7-bit word length),
<> 144:ef7eb2e8f9f7 239 frame length is either defined by the M bit (8-bits or 9-bits)
<> 144:ef7eb2e8f9f7 240 or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
<> 144:ef7eb2e8f9f7 241 Possible USART frame formats are as listed in the following table:
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 Table 1. USART frame format.
<> 144:ef7eb2e8f9f7 244 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 245 | M bit | PCE bit | USART frame |
<> 144:ef7eb2e8f9f7 246 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 247 | 0 | 0 | | SB | 8-bit data | STB | |
<> 144:ef7eb2e8f9f7 248 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 249 | 0 | 1 | | SB | 7-bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 250 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 251 | 1 | 0 | | SB | 9-bit data | STB | |
<> 144:ef7eb2e8f9f7 252 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 253 | 1 | 1 | | SB | 8-bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 254 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 255 | M1 bit | M0 bit | PCE bit | USART frame |
<> 144:ef7eb2e8f9f7 256 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 257 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
<> 144:ef7eb2e8f9f7 258 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 259 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 260 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 261 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
<> 144:ef7eb2e8f9f7 262 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 263 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 264 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 265 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
<> 144:ef7eb2e8f9f7 266 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 267 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 268 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /**
<> 156:95d6b41a828b 273 * @brief Initialize the USART mode according to the specified
<> 144:ef7eb2e8f9f7 274 * parameters in the USART_InitTypeDef and initialize the associated handle.
<> 156:95d6b41a828b 275 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 276 * @retval HAL status
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 279 {
<> 144:ef7eb2e8f9f7 280 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 281 if(husart == NULL)
<> 144:ef7eb2e8f9f7 282 {
<> 144:ef7eb2e8f9f7 283 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 284 }
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* Check the parameters */
<> 144:ef7eb2e8f9f7 287 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 if(husart->State == HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 290 {
<> 144:ef7eb2e8f9f7 291 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 292 husart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 295 HAL_USART_MspInit(husart);
<> 144:ef7eb2e8f9f7 296 }
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 301 __HAL_USART_DISABLE(husart);
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /* Set the Usart Communication parameters */
<> 144:ef7eb2e8f9f7 304 if (USART_SetConfig(husart) == HAL_ERROR)
<> 144:ef7eb2e8f9f7 305 {
<> 144:ef7eb2e8f9f7 306 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 307 }
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 /* In Synchronous mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 310 - LINEN bit (if LIN is supported) in the USART_CR2 register
<> 144:ef7eb2e8f9f7 311 - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
<> 144:ef7eb2e8f9f7 312 #if defined (USART_CR2_LINEN)
<> 144:ef7eb2e8f9f7 313 husart->Instance->CR2 &= ~USART_CR2_LINEN;
<> 144:ef7eb2e8f9f7 314 #endif
<> 144:ef7eb2e8f9f7 315 #if defined (USART_CR3_SCEN)
<> 144:ef7eb2e8f9f7 316 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 317 husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 318 #else
<> 144:ef7eb2e8f9f7 319 husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 320 #endif
<> 144:ef7eb2e8f9f7 321 #else
<> 144:ef7eb2e8f9f7 322 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 323 husart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 324 #else
<> 144:ef7eb2e8f9f7 325 husart->Instance->CR3 &= ~(USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 326 #endif
<> 144:ef7eb2e8f9f7 327 #endif
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 330 __HAL_USART_ENABLE(husart);
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 /* TEACK and/or REACK to check before moving husart->State to Ready */
<> 144:ef7eb2e8f9f7 333 return (USART_CheckIdleState(husart));
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 /**
<> 156:95d6b41a828b 337 * @brief DeInitialize the USART peripheral.
<> 156:95d6b41a828b 338 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 339 * @retval HAL status
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 342 {
<> 156:95d6b41a828b 343 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 344 if(husart == NULL)
<> 144:ef7eb2e8f9f7 345 {
<> 144:ef7eb2e8f9f7 346 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 347 }
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /* Check the parameters */
<> 144:ef7eb2e8f9f7 350 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 353
<> 156:95d6b41a828b 354 husart->Instance->CR1 = 0x0U;
<> 156:95d6b41a828b 355 husart->Instance->CR2 = 0x0U;
<> 156:95d6b41a828b 356 husart->Instance->CR3 = 0x0U;
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 359 HAL_USART_MspDeInit(husart);
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 362 husart->State = HAL_USART_STATE_RESET;
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /* Process Unlock */
<> 144:ef7eb2e8f9f7 365 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 return HAL_OK;
<> 144:ef7eb2e8f9f7 368 }
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /**
<> 144:ef7eb2e8f9f7 371 * @brief Initialize the USART MSP.
<> 144:ef7eb2e8f9f7 372 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 373 * @retval None
<> 144:ef7eb2e8f9f7 374 */
<> 156:95d6b41a828b 375 __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 376 {
<> 144:ef7eb2e8f9f7 377 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 378 UNUSED(husart);
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 381 the HAL_USART_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383 }
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @brief DeInitialize the USART MSP.
<> 144:ef7eb2e8f9f7 387 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 388 * @retval None
<> 144:ef7eb2e8f9f7 389 */
<> 156:95d6b41a828b 390 __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 391 {
<> 144:ef7eb2e8f9f7 392 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 393 UNUSED(husart);
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 396 the HAL_USART_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 397 */
<> 144:ef7eb2e8f9f7 398 }
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 /**
<> 144:ef7eb2e8f9f7 401 * @}
<> 144:ef7eb2e8f9f7 402 */
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 /** @defgroup USART_Exported_Functions_Group2 IO operation functions
<> 156:95d6b41a828b 405 * @brief USART Transmit and Receive functions
<> 144:ef7eb2e8f9f7 406 *
<> 144:ef7eb2e8f9f7 407 @verbatim
<> 144:ef7eb2e8f9f7 408 ===============================================================================
<> 144:ef7eb2e8f9f7 409 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 410 ===============================================================================
<> 144:ef7eb2e8f9f7 411 [..] This subsection provides a set of functions allowing to manage the USART synchronous
<> 144:ef7eb2e8f9f7 412 data transfers.
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 [..] The USART supports master mode only: it cannot receive or send data related to an input
<> 144:ef7eb2e8f9f7 415 clock (SCLK is always an output).
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 (#) There are two modes of transfer:
<> 144:ef7eb2e8f9f7 418 (++) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 419 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 420 after finishing transfer.
<> 144:ef7eb2e8f9f7 421 (++) No-Blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 422 or DMA, These APIs return the HAL status.
<> 144:ef7eb2e8f9f7 423 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 424 dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 425 using DMA mode.
<> 144:ef7eb2e8f9f7 426 The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 427 will be executed respectively at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 428 The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 (#) Blocking mode APIs are :
<> 144:ef7eb2e8f9f7 431 (++) HAL_USART_Transmit()in simplex mode
<> 144:ef7eb2e8f9f7 432 (++) HAL_USART_Receive() in full duplex receive only
<> 144:ef7eb2e8f9f7 433 (++) HAL_USART_TransmitReceive() in full duplex mode
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 (#) No-Blocking mode APIs with Interrupt are :
<> 144:ef7eb2e8f9f7 436 (++) HAL_USART_Transmit_IT()in simplex mode
<> 144:ef7eb2e8f9f7 437 (++) HAL_USART_Receive_IT() in full duplex receive only
<> 144:ef7eb2e8f9f7 438 (++) HAL_USART_TransmitReceive_IT()in full duplex mode
<> 144:ef7eb2e8f9f7 439 (++) HAL_USART_IRQHandler()
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441 (#) No-Blocking mode APIs with DMA are :
<> 144:ef7eb2e8f9f7 442 (++) HAL_USART_Transmit_DMA()in simplex mode
<> 144:ef7eb2e8f9f7 443 (++) HAL_USART_Receive_DMA() in full duplex receive only
<> 144:ef7eb2e8f9f7 444 (++) HAL_USART_TransmitReceive_DMA() in full duplex mode
<> 144:ef7eb2e8f9f7 445 (++) HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 446 (++) HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 447 (++) HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 448
<> 156:95d6b41a828b 449 (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
<> 144:ef7eb2e8f9f7 450 (++) HAL_USART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 451 (++) HAL_USART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 452 (++) HAL_USART_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 453 (++) HAL_USART_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 454 (++) HAL_USART_ErrorCallback()
<> 144:ef7eb2e8f9f7 455 (++) HAL_USART_TxRxCpltCallback()
<> 144:ef7eb2e8f9f7 456
<> 156:95d6b41a828b 457 (#) Non-Blocking mode transfers could be aborted using Abort API's :
<> 156:95d6b41a828b 458 (++) HAL_USART_Abort()
<> 156:95d6b41a828b 459 (++) HAL_USART_Abort_IT()
<> 156:95d6b41a828b 460
<> 156:95d6b41a828b 461 (#) For Abort services based on interrupts (HAL_USART_Abort_IT), a Abort Complete Callbacks is provided:
<> 156:95d6b41a828b 462 (++) HAL_USART_AbortCpltCallback()
<> 156:95d6b41a828b 463
<> 156:95d6b41a828b 464 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
<> 156:95d6b41a828b 465 Errors are handled as follows :
<> 156:95d6b41a828b 466 (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
<> 156:95d6b41a828b 467 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
<> 156:95d6b41a828b 468 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
<> 156:95d6b41a828b 469 and HAL_USART_ErrorCallback() user callback is executed. Transfer is kept ongoing on USART side.
<> 156:95d6b41a828b 470 If user wants to abort it, Abort services should be called by user.
<> 156:95d6b41a828b 471 (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
<> 156:95d6b41a828b 472 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
<> 156:95d6b41a828b 473 Error code is set to allow user to identify error type, and HAL_USART_ErrorCallback() user callback is executed.
<> 156:95d6b41a828b 474
<> 144:ef7eb2e8f9f7 475 @endverbatim
<> 144:ef7eb2e8f9f7 476 * @{
<> 144:ef7eb2e8f9f7 477 */
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /**
<> 144:ef7eb2e8f9f7 480 * @brief Simplex send an amount of data in blocking mode.
<> 156:95d6b41a828b 481 * @param husart USART handle.
<> 156:95d6b41a828b 482 * @param pTxData Pointer to data buffer.
<> 156:95d6b41a828b 483 * @param Size Amount of data to be sent.
<> 156:95d6b41a828b 484 * @param Timeout Timeout duration.
<> 144:ef7eb2e8f9f7 485 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 486 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 487 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 488 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<> 144:ef7eb2e8f9f7 489 * @retval HAL status
<> 144:ef7eb2e8f9f7 490 */
<> 144:ef7eb2e8f9f7 491 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 492 {
<> 156:95d6b41a828b 493 uint16_t* tmp=0U;
<> 156:95d6b41a828b 494 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 497 {
<> 156:95d6b41a828b 498 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 499 {
<> 144:ef7eb2e8f9f7 500 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 501 }
<> 144:ef7eb2e8f9f7 502
<> 144:ef7eb2e8f9f7 503 /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 504 should be aligned on a u16 frontier, as data to be filled into TDR will be
<> 144:ef7eb2e8f9f7 505 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 506 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 507 {
<> 156:95d6b41a828b 508 if((((uint32_t)pTxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 509 {
<> 144:ef7eb2e8f9f7 510 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 511 }
<> 144:ef7eb2e8f9f7 512 }
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /* Process Locked */
<> 144:ef7eb2e8f9f7 515 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 518 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 519
<> 156:95d6b41a828b 520 /* Init tickstart for timeout managment*/
<> 156:95d6b41a828b 521 tickstart = HAL_GetTick();
<> 156:95d6b41a828b 522
<> 144:ef7eb2e8f9f7 523 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 524 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* Check the remaining data to be sent */
<> 144:ef7eb2e8f9f7 527 while(husart->TxXferCount > 0)
<> 144:ef7eb2e8f9f7 528 {
<> 144:ef7eb2e8f9f7 529 husart->TxXferCount--;
<> 156:95d6b41a828b 530 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 531 {
<> 144:ef7eb2e8f9f7 532 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 533 }
<> 144:ef7eb2e8f9f7 534 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 535 {
<> 144:ef7eb2e8f9f7 536 tmp = (uint16_t*) pTxData;
<> 156:95d6b41a828b 537 husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
<> 156:95d6b41a828b 538 pTxData += 2U;
<> 144:ef7eb2e8f9f7 539 }
<> 144:ef7eb2e8f9f7 540 else
<> 144:ef7eb2e8f9f7 541 {
<> 156:95d6b41a828b 542 husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFFU);
<> 144:ef7eb2e8f9f7 543 }
<> 144:ef7eb2e8f9f7 544 }
<> 144:ef7eb2e8f9f7 545
<> 156:95d6b41a828b 546 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 547 {
<> 144:ef7eb2e8f9f7 548 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 549 }
<> 144:ef7eb2e8f9f7 550
<> 156:95d6b41a828b 551 /* At end of Tx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 552 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 555 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 556
<> 144:ef7eb2e8f9f7 557 return HAL_OK;
<> 144:ef7eb2e8f9f7 558 }
<> 144:ef7eb2e8f9f7 559 else
<> 144:ef7eb2e8f9f7 560 {
<> 144:ef7eb2e8f9f7 561 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 562 }
<> 144:ef7eb2e8f9f7 563 }
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /**
<> 144:ef7eb2e8f9f7 566 * @brief Receive an amount of data in blocking mode.
<> 156:95d6b41a828b 567 * @note To receive synchronous data, dummy data are simultaneously transmitted.
<> 156:95d6b41a828b 568 * @param husart USART handle.
<> 156:95d6b41a828b 569 * @param pRxData Pointer to data buffer.
<> 156:95d6b41a828b 570 * @param Size Amount of data to be received.
<> 156:95d6b41a828b 571 * @param Timeout Timeout duration.
<> 144:ef7eb2e8f9f7 572 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 573 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 574 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 575 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<> 144:ef7eb2e8f9f7 576 * @retval HAL status
<> 144:ef7eb2e8f9f7 577 */
<> 144:ef7eb2e8f9f7 578 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 579 {
<> 156:95d6b41a828b 580 uint16_t* tmp=0U;
<> 144:ef7eb2e8f9f7 581 uint16_t uhMask;
<> 156:95d6b41a828b 582 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 583
<> 144:ef7eb2e8f9f7 584 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 585 {
<> 156:95d6b41a828b 586 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 587 {
<> 144:ef7eb2e8f9f7 588 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 589 }
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 592 should be aligned on a u16 frontier, as data to be received from RDR will be
<> 144:ef7eb2e8f9f7 593 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 594 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 595 {
<> 156:95d6b41a828b 596 if((((uint32_t)pRxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 597 {
<> 144:ef7eb2e8f9f7 598 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 599 }
<> 144:ef7eb2e8f9f7 600 }
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /* Process Locked */
<> 144:ef7eb2e8f9f7 603 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 606 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 607
<> 156:95d6b41a828b 608 /* Init tickstart for timeout managment*/
<> 156:95d6b41a828b 609 tickstart = HAL_GetTick();
<> 156:95d6b41a828b 610
<> 144:ef7eb2e8f9f7 611 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 612 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /* Computation of USART mask to apply to RDR register */
<> 144:ef7eb2e8f9f7 615 USART_MASK_COMPUTATION(husart);
<> 144:ef7eb2e8f9f7 616 uhMask = husart->Mask;
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /* as long as data have to be received */
<> 156:95d6b41a828b 619 while(husart->RxXferCount > 0U)
<> 144:ef7eb2e8f9f7 620 {
<> 144:ef7eb2e8f9f7 621 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 622
<> 144:ef7eb2e8f9f7 623 /* Wait until TC flag is set to send dummy byte in order to generate the
<> 144:ef7eb2e8f9f7 624 * clock for the slave to send data.
<> 144:ef7eb2e8f9f7 625 * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
<> 144:ef7eb2e8f9f7 626 * can be written for all the cases. */
<> 156:95d6b41a828b 627 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 628 {
<> 144:ef7eb2e8f9f7 629 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 630 }
<> 156:95d6b41a828b 631 husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FFU);
<> 144:ef7eb2e8f9f7 632
<> 144:ef7eb2e8f9f7 633 /* Wait for RXNE Flag */
<> 156:95d6b41a828b 634 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 635 {
<> 144:ef7eb2e8f9f7 636 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 637 }
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 640 {
<> 144:ef7eb2e8f9f7 641 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 642 *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<> 144:ef7eb2e8f9f7 643 pRxData +=2;
<> 144:ef7eb2e8f9f7 644 }
<> 144:ef7eb2e8f9f7 645 else
<> 144:ef7eb2e8f9f7 646 {
<> 144:ef7eb2e8f9f7 647 *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 648 }
<> 144:ef7eb2e8f9f7 649 }
<> 144:ef7eb2e8f9f7 650
<> 156:95d6b41a828b 651 /* At end of Rx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 652 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 653
<> 144:ef7eb2e8f9f7 654 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 655 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 656
<> 144:ef7eb2e8f9f7 657 return HAL_OK;
<> 144:ef7eb2e8f9f7 658 }
<> 144:ef7eb2e8f9f7 659 else
<> 144:ef7eb2e8f9f7 660 {
<> 144:ef7eb2e8f9f7 661 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 662 }
<> 144:ef7eb2e8f9f7 663 }
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /**
<> 156:95d6b41a828b 666 * @brief Full-Duplex Send and Receive an amount of data in blocking mode.
<> 156:95d6b41a828b 667 * @param husart USART handle.
<> 156:95d6b41a828b 668 * @param pTxData pointer to TX data buffer.
<> 156:95d6b41a828b 669 * @param pRxData pointer to RX data buffer.
<> 156:95d6b41a828b 670 * @param Size amount of data to be sent (same amount to be received).
<> 156:95d6b41a828b 671 * @param Timeout Timeout duration.
<> 144:ef7eb2e8f9f7 672 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 673 * address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 674 * (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 675 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<> 144:ef7eb2e8f9f7 676 * @retval HAL status
<> 144:ef7eb2e8f9f7 677 */
<> 144:ef7eb2e8f9f7 678 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 679 {
<> 156:95d6b41a828b 680 uint16_t* tmp=0U;
<> 144:ef7eb2e8f9f7 681 uint16_t uhMask;
<> 156:95d6b41a828b 682 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 683
<> 144:ef7eb2e8f9f7 684 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 685 {
<> 156:95d6b41a828b 686 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 687 {
<> 144:ef7eb2e8f9f7 688 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 689 }
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<> 144:ef7eb2e8f9f7 692 should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be
<> 144:ef7eb2e8f9f7 693 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 694 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 695 {
<> 156:95d6b41a828b 696 if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
<> 144:ef7eb2e8f9f7 697 {
<> 144:ef7eb2e8f9f7 698 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 699 }
<> 144:ef7eb2e8f9f7 700 }
<> 144:ef7eb2e8f9f7 701
<> 144:ef7eb2e8f9f7 702 /* Process Locked */
<> 144:ef7eb2e8f9f7 703 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 706 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 707
<> 156:95d6b41a828b 708 /* Init tickstart for timeout managment*/
<> 156:95d6b41a828b 709 tickstart = HAL_GetTick();
<> 156:95d6b41a828b 710
<> 144:ef7eb2e8f9f7 711 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 712 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 713 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 714 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 715
<> 144:ef7eb2e8f9f7 716 /* Computation of USART mask to apply to RDR register */
<> 144:ef7eb2e8f9f7 717 USART_MASK_COMPUTATION(husart);
<> 144:ef7eb2e8f9f7 718 uhMask = husart->Mask;
<> 144:ef7eb2e8f9f7 719
<> 144:ef7eb2e8f9f7 720 /* Check the remain data to be sent */
<> 156:95d6b41a828b 721 while(husart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 722 {
<> 144:ef7eb2e8f9f7 723 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 724 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 725
<> 144:ef7eb2e8f9f7 726 /* Wait until TC flag is set to send data */
<> 156:95d6b41a828b 727 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 728 {
<> 144:ef7eb2e8f9f7 729 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 730 }
<> 144:ef7eb2e8f9f7 731 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 732 {
<> 144:ef7eb2e8f9f7 733 tmp = (uint16_t*) pTxData;
<> 144:ef7eb2e8f9f7 734 husart->Instance->TDR = (*tmp & uhMask);
<> 156:95d6b41a828b 735 pTxData += 2U;
<> 144:ef7eb2e8f9f7 736 }
<> 144:ef7eb2e8f9f7 737 else
<> 144:ef7eb2e8f9f7 738 {
<> 144:ef7eb2e8f9f7 739 husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 740 }
<> 144:ef7eb2e8f9f7 741
<> 144:ef7eb2e8f9f7 742 /* Wait for RXNE Flag */
<> 156:95d6b41a828b 743 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 744 {
<> 144:ef7eb2e8f9f7 745 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 746 }
<> 144:ef7eb2e8f9f7 747
<> 144:ef7eb2e8f9f7 748 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 749 {
<> 144:ef7eb2e8f9f7 750 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 751 *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<> 156:95d6b41a828b 752 pRxData +=2U;
<> 144:ef7eb2e8f9f7 753 }
<> 144:ef7eb2e8f9f7 754 else
<> 144:ef7eb2e8f9f7 755 {
<> 144:ef7eb2e8f9f7 756 *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 757 }
<> 144:ef7eb2e8f9f7 758 }
<> 144:ef7eb2e8f9f7 759
<> 156:95d6b41a828b 760 /* At end of TxRx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 761 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 764 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 765
<> 144:ef7eb2e8f9f7 766 return HAL_OK;
<> 144:ef7eb2e8f9f7 767 }
<> 144:ef7eb2e8f9f7 768 else
<> 144:ef7eb2e8f9f7 769 {
<> 144:ef7eb2e8f9f7 770 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 771 }
<> 144:ef7eb2e8f9f7 772 }
<> 144:ef7eb2e8f9f7 773
<> 144:ef7eb2e8f9f7 774 /**
<> 144:ef7eb2e8f9f7 775 * @brief Send an amount of data in interrupt mode.
<> 156:95d6b41a828b 776 * @param husart USART handle.
<> 156:95d6b41a828b 777 * @param pTxData pointer to data buffer.
<> 156:95d6b41a828b 778 * @param Size amount of data to be sent.
<> 144:ef7eb2e8f9f7 779 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 780 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 781 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 782 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<> 144:ef7eb2e8f9f7 783 * @retval HAL status
<> 144:ef7eb2e8f9f7 784 */
<> 144:ef7eb2e8f9f7 785 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 786 {
<> 144:ef7eb2e8f9f7 787 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 788 {
<> 156:95d6b41a828b 789 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 790 {
<> 144:ef7eb2e8f9f7 791 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 792 }
<> 144:ef7eb2e8f9f7 793
<> 144:ef7eb2e8f9f7 794 /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 795 should be aligned on a u16 frontier, as data to be filled into TDR will be
<> 144:ef7eb2e8f9f7 796 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 797 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 798 {
<> 156:95d6b41a828b 799 if((((uint32_t)pTxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 800 {
<> 144:ef7eb2e8f9f7 801 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 802 }
<> 144:ef7eb2e8f9f7 803 }
<> 144:ef7eb2e8f9f7 804
<> 144:ef7eb2e8f9f7 805 /* Process Locked */
<> 144:ef7eb2e8f9f7 806 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 807
<> 144:ef7eb2e8f9f7 808 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 809 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 810 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 811
<> 144:ef7eb2e8f9f7 812 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 813 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 814
<> 144:ef7eb2e8f9f7 815 /* The USART Error Interrupts: (Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 816 are not managed by the USART Transmit Process to avoid the overrun interrupt
<> 144:ef7eb2e8f9f7 817 when the usart mode is configured for transmit and receive "USART_MODE_TX_RX"
<> 144:ef7eb2e8f9f7 818 to benefit for the frame error and noise interrupts the usart mode should be
<> 144:ef7eb2e8f9f7 819 configured only for transmit "USART_MODE_TX" */
<> 144:ef7eb2e8f9f7 820
<> 144:ef7eb2e8f9f7 821 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 822 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 823
<> 144:ef7eb2e8f9f7 824 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 825 __HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
<> 144:ef7eb2e8f9f7 826
<> 144:ef7eb2e8f9f7 827 return HAL_OK;
<> 144:ef7eb2e8f9f7 828 }
<> 144:ef7eb2e8f9f7 829 else
<> 144:ef7eb2e8f9f7 830 {
<> 144:ef7eb2e8f9f7 831 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 832 }
<> 144:ef7eb2e8f9f7 833 }
<> 144:ef7eb2e8f9f7 834
<> 144:ef7eb2e8f9f7 835 /**
<> 156:95d6b41a828b 836 * @brief Receive an amount of data in interrupt mode.
<> 156:95d6b41a828b 837 * @note To receive synchronous data, dummy data are simultaneously transmitted.
<> 156:95d6b41a828b 838 * @param husart USART handle.
<> 156:95d6b41a828b 839 * @param pRxData pointer to data buffer.
<> 156:95d6b41a828b 840 * @param Size amount of data to be received.
<> 144:ef7eb2e8f9f7 841 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 842 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 843 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 844 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<> 144:ef7eb2e8f9f7 845 * @retval HAL status
<> 144:ef7eb2e8f9f7 846 */
<> 144:ef7eb2e8f9f7 847 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 848 {
<> 144:ef7eb2e8f9f7 849 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 850 {
<> 156:95d6b41a828b 851 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 852 {
<> 144:ef7eb2e8f9f7 853 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 854 }
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 857 should be aligned on a u16 frontier, as data to be received from RDR will be
<> 144:ef7eb2e8f9f7 858 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 859 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 860 {
<> 156:95d6b41a828b 861 if((((uint32_t)pRxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 862 {
<> 144:ef7eb2e8f9f7 863 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 864 }
<> 144:ef7eb2e8f9f7 865 }
<> 144:ef7eb2e8f9f7 866
<> 144:ef7eb2e8f9f7 867 /* Process Locked */
<> 144:ef7eb2e8f9f7 868 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 871 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 872 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 873
<> 144:ef7eb2e8f9f7 874 USART_MASK_COMPUTATION(husart);
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 877 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 880 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 881
<> 156:95d6b41a828b 882 /* Enable the USART Parity Error and Data Register not empty Interrupts */
<> 156:95d6b41a828b 883 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
<> 156:95d6b41a828b 884
<> 156:95d6b41a828b 885 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 886 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 887
<> 144:ef7eb2e8f9f7 888 /* Send dummy byte in order to generate the clock for the Slave to send the next data */
<> 144:ef7eb2e8f9f7 889 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 890 {
<> 156:95d6b41a828b 891 husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 892 }
<> 144:ef7eb2e8f9f7 893 else
<> 144:ef7eb2e8f9f7 894 {
<> 156:95d6b41a828b 895 husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 896 }
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 return HAL_OK;
<> 144:ef7eb2e8f9f7 899 }
<> 144:ef7eb2e8f9f7 900 else
<> 144:ef7eb2e8f9f7 901 {
<> 144:ef7eb2e8f9f7 902 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 903 }
<> 144:ef7eb2e8f9f7 904 }
<> 144:ef7eb2e8f9f7 905
<> 144:ef7eb2e8f9f7 906 /**
<> 156:95d6b41a828b 907 * @brief Full-Duplex Send and Receive an amount of data in interrupt mode.
<> 156:95d6b41a828b 908 * @param husart USART handle.
<> 156:95d6b41a828b 909 * @param pTxData pointer to TX data buffer.
<> 156:95d6b41a828b 910 * @param pRxData pointer to RX data buffer.
<> 156:95d6b41a828b 911 * @param Size amount of data to be sent (same amount to be received).
<> 144:ef7eb2e8f9f7 912 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 913 * address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 914 * (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 915 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<> 144:ef7eb2e8f9f7 916 * @retval HAL status
<> 144:ef7eb2e8f9f7 917 */
<> 144:ef7eb2e8f9f7 918 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 919 {
<> 144:ef7eb2e8f9f7 920
<> 144:ef7eb2e8f9f7 921 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 922 {
<> 156:95d6b41a828b 923 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 924 {
<> 144:ef7eb2e8f9f7 925 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 926 }
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<> 144:ef7eb2e8f9f7 929 should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be
<> 144:ef7eb2e8f9f7 930 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 931 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 932 {
<> 156:95d6b41a828b 933 if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
<> 144:ef7eb2e8f9f7 934 {
<> 144:ef7eb2e8f9f7 935 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 936 }
<> 144:ef7eb2e8f9f7 937 }
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 /* Process Locked */
<> 144:ef7eb2e8f9f7 940 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 941
<> 144:ef7eb2e8f9f7 942 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 943 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 944 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 945 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 946 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 947 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 948
<> 144:ef7eb2e8f9f7 949 /* Computation of USART mask to apply to RDR register */
<> 144:ef7eb2e8f9f7 950 USART_MASK_COMPUTATION(husart);
<> 144:ef7eb2e8f9f7 951
<> 144:ef7eb2e8f9f7 952 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 953 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 954
<> 144:ef7eb2e8f9f7 955 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 956 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 957
<> 156:95d6b41a828b 958 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 959 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 960
<> 156:95d6b41a828b 961 /* Enable the USART Parity Error and USART Data Register not empty Interrupts */
<> 156:95d6b41a828b 962 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
<> 156:95d6b41a828b 963
<> 144:ef7eb2e8f9f7 964 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 156:95d6b41a828b 965 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 966
<> 144:ef7eb2e8f9f7 967 return HAL_OK;
<> 144:ef7eb2e8f9f7 968 }
<> 144:ef7eb2e8f9f7 969 else
<> 144:ef7eb2e8f9f7 970 {
<> 144:ef7eb2e8f9f7 971 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 972 }
<> 144:ef7eb2e8f9f7 973 }
<> 144:ef7eb2e8f9f7 974
<> 144:ef7eb2e8f9f7 975 /**
<> 156:95d6b41a828b 976 * @brief Send an amount of data in DMA mode.
<> 156:95d6b41a828b 977 * @param husart USART handle.
<> 156:95d6b41a828b 978 * @param pTxData pointer to data buffer.
<> 156:95d6b41a828b 979 * @param Size amount of data to be sent.
<> 144:ef7eb2e8f9f7 980 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 981 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 982 * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 983 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<> 144:ef7eb2e8f9f7 984 * @retval HAL status
<> 144:ef7eb2e8f9f7 985 */
<> 144:ef7eb2e8f9f7 986 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 987 {
<> 156:95d6b41a828b 988 uint32_t *tmp=0U;
<> 144:ef7eb2e8f9f7 989
<> 144:ef7eb2e8f9f7 990 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 991 {
<> 156:95d6b41a828b 992 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 993 {
<> 144:ef7eb2e8f9f7 994 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 995 }
<> 144:ef7eb2e8f9f7 996
<> 144:ef7eb2e8f9f7 997 /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 998 should be aligned on a u16 frontier, as data copy into TDR will be
<> 144:ef7eb2e8f9f7 999 handled by DMA from a u16 frontier. */
<> 144:ef7eb2e8f9f7 1000 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1001 {
<> 156:95d6b41a828b 1002 if((((uint32_t)pTxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 1003 {
<> 144:ef7eb2e8f9f7 1004 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1005 }
<> 144:ef7eb2e8f9f7 1006 }
<> 144:ef7eb2e8f9f7 1007
<> 144:ef7eb2e8f9f7 1008 /* Process Locked */
<> 144:ef7eb2e8f9f7 1009 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1010
<> 144:ef7eb2e8f9f7 1011 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 1012 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1013 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 1014
<> 144:ef7eb2e8f9f7 1015 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1016 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 1017
<> 144:ef7eb2e8f9f7 1018 /* Set the USART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 1019 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 1020
<> 144:ef7eb2e8f9f7 1021 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1022 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 1023
<> 144:ef7eb2e8f9f7 1024 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 1025 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1026
<> 144:ef7eb2e8f9f7 1027 /* Enable the USART transmit DMA channel */
<> 144:ef7eb2e8f9f7 1028 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 1029 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
<> 144:ef7eb2e8f9f7 1030
<> 144:ef7eb2e8f9f7 1031 /* Clear the TC flag in the ICR register */
<> 144:ef7eb2e8f9f7 1032 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
<> 144:ef7eb2e8f9f7 1033
<> 156:95d6b41a828b 1034 /* Process Unlocked */
<> 156:95d6b41a828b 1035 __HAL_UNLOCK(husart);
<> 156:95d6b41a828b 1036
<> 144:ef7eb2e8f9f7 1037 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1038 in the USART CR3 register */
<> 156:95d6b41a828b 1039 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1040
<> 144:ef7eb2e8f9f7 1041 return HAL_OK;
<> 144:ef7eb2e8f9f7 1042 }
<> 144:ef7eb2e8f9f7 1043 else
<> 144:ef7eb2e8f9f7 1044 {
<> 144:ef7eb2e8f9f7 1045 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1046 }
<> 144:ef7eb2e8f9f7 1047 }
<> 144:ef7eb2e8f9f7 1048
<> 144:ef7eb2e8f9f7 1049 /**
<> 156:95d6b41a828b 1050 * @brief Receive an amount of data in DMA mode.
<> 156:95d6b41a828b 1051 * @param husart USART handle.
<> 156:95d6b41a828b 1052 * @param pRxData pointer to data buffer.
<> 156:95d6b41a828b 1053 * @param Size amount of data to be received.
<> 144:ef7eb2e8f9f7 1054 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 1055 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 1056 * (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 1057 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<> 156:95d6b41a828b 1058 * @note The USART DMA transmit channel must be configured in order to generate the clock for the slave.
<> 144:ef7eb2e8f9f7 1059 * @retval HAL status
<> 144:ef7eb2e8f9f7 1060 */
<> 144:ef7eb2e8f9f7 1061 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1062 {
<> 144:ef7eb2e8f9f7 1063 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1064
<> 156:95d6b41a828b 1065 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 1066 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 1067 {
<> 156:95d6b41a828b 1068 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 1069 {
<> 144:ef7eb2e8f9f7 1070 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1071 }
<> 144:ef7eb2e8f9f7 1072
<> 144:ef7eb2e8f9f7 1073 /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 1074 should be aligned on a u16 frontier, as data copy from RDR will be
<> 144:ef7eb2e8f9f7 1075 handled by DMA from a u16 frontier. */
<> 144:ef7eb2e8f9f7 1076 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1077 {
<> 156:95d6b41a828b 1078 if((((uint32_t)pRxData)&1U) != 0U)
<> 144:ef7eb2e8f9f7 1079 {
<> 144:ef7eb2e8f9f7 1080 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1081 }
<> 144:ef7eb2e8f9f7 1082 }
<> 144:ef7eb2e8f9f7 1083
<> 144:ef7eb2e8f9f7 1084 /* Process Locked */
<> 144:ef7eb2e8f9f7 1085 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1086
<> 144:ef7eb2e8f9f7 1087 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 1088 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1089 husart->pTxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 1090 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1091
<> 144:ef7eb2e8f9f7 1092 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1093 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 1094
<> 144:ef7eb2e8f9f7 1095 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 1096 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1097
<> 144:ef7eb2e8f9f7 1098 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1099 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1100
<> 144:ef7eb2e8f9f7 1101 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 1102 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1103
<> 144:ef7eb2e8f9f7 1104 /* Enable the USART receive DMA channel */
<> 144:ef7eb2e8f9f7 1105 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 1106 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1107
<> 144:ef7eb2e8f9f7 1108 /* Enable the USART transmit DMA channel: the transmit channel is used in order
<> 144:ef7eb2e8f9f7 1109 to generate in the non-blocking mode the clock to the slave device,
<> 144:ef7eb2e8f9f7 1110 this mode isn't a simplex receive mode but a full-duplex receive mode */
<> 144:ef7eb2e8f9f7 1111 tmp = (uint32_t*)&pRxData;
<> 156:95d6b41a828b 1112 /* Set the USART DMA Tx Complete and Error callback to Null */
<> 156:95d6b41a828b 1113 husart->hdmatx->XferErrorCallback = NULL;
<> 156:95d6b41a828b 1114 husart->hdmatx->XferHalfCpltCallback = NULL;
<> 156:95d6b41a828b 1115 husart->hdmatx->XferCpltCallback = NULL;
<> 144:ef7eb2e8f9f7 1116 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
<> 144:ef7eb2e8f9f7 1117
<> 156:95d6b41a828b 1118 /* Process Unlocked */
<> 156:95d6b41a828b 1119 __HAL_UNLOCK(husart);
<> 156:95d6b41a828b 1120
<> 156:95d6b41a828b 1121 /* Enable the USART Parity Error Interrupt */
<> 156:95d6b41a828b 1122 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 156:95d6b41a828b 1123
<> 156:95d6b41a828b 1124 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 1125 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1126
<> 144:ef7eb2e8f9f7 1127 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1128 in the USART CR3 register */
<> 156:95d6b41a828b 1129 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1130
<> 144:ef7eb2e8f9f7 1131 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1132 in the USART CR3 register */
<> 156:95d6b41a828b 1133 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1134
<> 144:ef7eb2e8f9f7 1135 return HAL_OK;
<> 144:ef7eb2e8f9f7 1136 }
<> 144:ef7eb2e8f9f7 1137 else
<> 144:ef7eb2e8f9f7 1138 {
<> 144:ef7eb2e8f9f7 1139 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1140 }
<> 144:ef7eb2e8f9f7 1141 }
<> 144:ef7eb2e8f9f7 1142
<> 144:ef7eb2e8f9f7 1143 /**
<> 156:95d6b41a828b 1144 * @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode.
<> 156:95d6b41a828b 1145 * @param husart USART handle.
<> 156:95d6b41a828b 1146 * @param pTxData pointer to TX data buffer.
<> 156:95d6b41a828b 1147 * @param pRxData pointer to RX data buffer.
<> 156:95d6b41a828b 1148 * @param Size amount of data to be received/sent.
<> 144:ef7eb2e8f9f7 1149 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 1150 * address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 1151 * (as sent/received data will be handled by DMA from halfword frontier). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 1152 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<> 144:ef7eb2e8f9f7 1153 * @retval HAL status
<> 144:ef7eb2e8f9f7 1154 */
<> 144:ef7eb2e8f9f7 1155 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1156 {
<> 144:ef7eb2e8f9f7 1157 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1158
<> 144:ef7eb2e8f9f7 1159 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 1160 {
<> 156:95d6b41a828b 1161 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 1162 {
<> 144:ef7eb2e8f9f7 1163 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1164 }
<> 144:ef7eb2e8f9f7 1165
<> 144:ef7eb2e8f9f7 1166 /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<> 144:ef7eb2e8f9f7 1167 should be aligned on a u16 frontier, as data copy to/from TDR/RDR will be
<> 144:ef7eb2e8f9f7 1168 handled by DMA from a u16 frontier. */
<> 144:ef7eb2e8f9f7 1169 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1170 {
<> 156:95d6b41a828b 1171 if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
<> 144:ef7eb2e8f9f7 1172 {
<> 144:ef7eb2e8f9f7 1173 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1174 }
<> 144:ef7eb2e8f9f7 1175 }
<> 144:ef7eb2e8f9f7 1176
<> 144:ef7eb2e8f9f7 1177 /* Process Locked */
<> 144:ef7eb2e8f9f7 1178 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1179
<> 144:ef7eb2e8f9f7 1180 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 1181 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1182 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 1183 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1184
<> 144:ef7eb2e8f9f7 1185 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1186 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 1187
<> 144:ef7eb2e8f9f7 1188 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 1189 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1190
<> 144:ef7eb2e8f9f7 1191 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1192 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1193
<> 144:ef7eb2e8f9f7 1194 /* Set the USART DMA Tx transfer complete callback */
<> 144:ef7eb2e8f9f7 1195 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 1196
<> 144:ef7eb2e8f9f7 1197 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1198 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 1199
<> 144:ef7eb2e8f9f7 1200 /* Set the USART DMA Tx transfer error callback */
<> 144:ef7eb2e8f9f7 1201 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1202
<> 144:ef7eb2e8f9f7 1203 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 1204 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1205
<> 144:ef7eb2e8f9f7 1206 /* Enable the USART receive DMA channel */
<> 144:ef7eb2e8f9f7 1207 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 1208 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1209
<> 144:ef7eb2e8f9f7 1210 /* Enable the USART transmit DMA channel */
<> 144:ef7eb2e8f9f7 1211 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 1212 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
<> 144:ef7eb2e8f9f7 1213
<> 156:95d6b41a828b 1214 /* Process Unlocked */
<> 156:95d6b41a828b 1215 __HAL_UNLOCK(husart);
<> 156:95d6b41a828b 1216
<> 156:95d6b41a828b 1217 /* Enable the USART Parity Error Interrupt */
<> 156:95d6b41a828b 1218 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 156:95d6b41a828b 1219
<> 156:95d6b41a828b 1220 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 1221 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1222
<> 144:ef7eb2e8f9f7 1223 /* Clear the TC flag in the ICR register */
<> 144:ef7eb2e8f9f7 1224 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
<> 144:ef7eb2e8f9f7 1225
<> 144:ef7eb2e8f9f7 1226 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1227 in the USART CR3 register */
<> 156:95d6b41a828b 1228 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1229
<> 144:ef7eb2e8f9f7 1230 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1231 in the USART CR3 register */
<> 156:95d6b41a828b 1232 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1233
<> 144:ef7eb2e8f9f7 1234 return HAL_OK;
<> 144:ef7eb2e8f9f7 1235 }
<> 144:ef7eb2e8f9f7 1236 else
<> 144:ef7eb2e8f9f7 1237 {
<> 144:ef7eb2e8f9f7 1238 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1239 }
<> 144:ef7eb2e8f9f7 1240 }
<> 144:ef7eb2e8f9f7 1241
<> 144:ef7eb2e8f9f7 1242 /**
<> 156:95d6b41a828b 1243 * @brief Pause the DMA Transfer.
<> 156:95d6b41a828b 1244 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1245 * @retval HAL status
<> 144:ef7eb2e8f9f7 1246 */
<> 144:ef7eb2e8f9f7 1247 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1248 {
<> 144:ef7eb2e8f9f7 1249 /* Process Locked */
<> 144:ef7eb2e8f9f7 1250 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1251
<> 156:95d6b41a828b 1252 if( (husart->State == HAL_USART_STATE_BUSY_TX) &&
<> 156:95d6b41a828b 1253 (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)))
<> 144:ef7eb2e8f9f7 1254 {
<> 144:ef7eb2e8f9f7 1255 /* Disable the USART DMA Tx request */
<> 156:95d6b41a828b 1256 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1257 }
<> 156:95d6b41a828b 1258 else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
<> 156:95d6b41a828b 1259 (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
<> 144:ef7eb2e8f9f7 1260 {
<> 156:95d6b41a828b 1261 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
<> 156:95d6b41a828b 1262 {
<> 156:95d6b41a828b 1263 /* Disable the USART DMA Tx request */
<> 156:95d6b41a828b 1264 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1265 }
<> 156:95d6b41a828b 1266 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 156:95d6b41a828b 1267 {
<> 156:95d6b41a828b 1268 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1269 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 156:95d6b41a828b 1270 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1271
<> 156:95d6b41a828b 1272 /* Disable the USART DMA Rx request */
<> 156:95d6b41a828b 1273 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 156:95d6b41a828b 1274 }
<> 144:ef7eb2e8f9f7 1275 }
<> 144:ef7eb2e8f9f7 1276
<> 144:ef7eb2e8f9f7 1277 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1278 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1279
<> 144:ef7eb2e8f9f7 1280 return HAL_OK;
<> 144:ef7eb2e8f9f7 1281 }
<> 144:ef7eb2e8f9f7 1282
<> 144:ef7eb2e8f9f7 1283 /**
<> 156:95d6b41a828b 1284 * @brief Resume the DMA Transfer.
<> 156:95d6b41a828b 1285 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1286 * @retval HAL status
<> 144:ef7eb2e8f9f7 1287 */
<> 144:ef7eb2e8f9f7 1288 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1289 {
<> 144:ef7eb2e8f9f7 1290 /* Process Locked */
<> 144:ef7eb2e8f9f7 1291 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1292
<> 144:ef7eb2e8f9f7 1293 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1294 {
<> 144:ef7eb2e8f9f7 1295 /* Enable the USART DMA Tx request */
<> 156:95d6b41a828b 1296 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1297 }
<> 156:95d6b41a828b 1298 else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
<> 156:95d6b41a828b 1299 (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
<> 144:ef7eb2e8f9f7 1300 {
<> 156:95d6b41a828b 1301 /* Clear the Overrun flag before resuming the Rx transfer*/
<> 144:ef7eb2e8f9f7 1302 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
<> 144:ef7eb2e8f9f7 1303
<> 156:95d6b41a828b 1304 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1305 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 156:95d6b41a828b 1306 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1307
<> 144:ef7eb2e8f9f7 1308 /* Enable the USART DMA Rx request before the DMA Tx request */
<> 156:95d6b41a828b 1309 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1310
<> 144:ef7eb2e8f9f7 1311 /* Enable the USART DMA Tx request */
<> 156:95d6b41a828b 1312 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1313 }
<> 144:ef7eb2e8f9f7 1314
<> 144:ef7eb2e8f9f7 1315 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1316 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1317
<> 144:ef7eb2e8f9f7 1318 return HAL_OK;
<> 144:ef7eb2e8f9f7 1319 }
<> 144:ef7eb2e8f9f7 1320
<> 144:ef7eb2e8f9f7 1321 /**
<> 156:95d6b41a828b 1322 * @brief Stop the DMA Transfer.
<> 156:95d6b41a828b 1323 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1324 * @retval HAL status
<> 144:ef7eb2e8f9f7 1325 */
<> 144:ef7eb2e8f9f7 1326 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1327 {
<> 144:ef7eb2e8f9f7 1328 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1329 to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
<> 144:ef7eb2e8f9f7 1330 HAL_USART_TxHalfCpltCallback() / HAL_USART_RxHalfCpltCallback ():
<> 144:ef7eb2e8f9f7 1331 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete interrupt is
<> 144:ef7eb2e8f9f7 1332 generated if the DMA transfer interruption occurs at the middle or at the end of the stream
<> 144:ef7eb2e8f9f7 1333 and the corresponding call back is executed.
<> 144:ef7eb2e8f9f7 1334 */
<> 144:ef7eb2e8f9f7 1335
<> 144:ef7eb2e8f9f7 1336 /* Disable the USART Tx/Rx DMA requests */
<> 156:95d6b41a828b 1337 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1338 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1339
<> 144:ef7eb2e8f9f7 1340 /* Abort the USART DMA tx channel */
<> 144:ef7eb2e8f9f7 1341 if(husart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1342 {
<> 144:ef7eb2e8f9f7 1343 HAL_DMA_Abort(husart->hdmatx);
<> 144:ef7eb2e8f9f7 1344 }
<> 144:ef7eb2e8f9f7 1345 /* Abort the USART DMA rx channel */
<> 144:ef7eb2e8f9f7 1346 if(husart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1347 {
<> 144:ef7eb2e8f9f7 1348 HAL_DMA_Abort(husart->hdmarx);
<> 144:ef7eb2e8f9f7 1349 }
<> 144:ef7eb2e8f9f7 1350
<> 156:95d6b41a828b 1351 USART_EndTransfer(husart);
<> 144:ef7eb2e8f9f7 1352 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1353
<> 144:ef7eb2e8f9f7 1354 return HAL_OK;
<> 144:ef7eb2e8f9f7 1355 }
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 /**
<> 156:95d6b41a828b 1358 * @brief Abort ongoing transfers (blocking mode).
<> 156:95d6b41a828b 1359 * @param husart USART handle.
<> 156:95d6b41a828b 1360 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
<> 156:95d6b41a828b 1361 * This procedure performs following operations :
<> 156:95d6b41a828b 1362 * - Disable USART Interrupts (Tx and Rx)
<> 156:95d6b41a828b 1363 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 156:95d6b41a828b 1364 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
<> 156:95d6b41a828b 1365 * - Set handle State to READY
<> 156:95d6b41a828b 1366 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
<> 156:95d6b41a828b 1367 * @retval HAL status
<> 156:95d6b41a828b 1368 */
<> 156:95d6b41a828b 1369 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
<> 156:95d6b41a828b 1370 {
<> 156:95d6b41a828b 1371 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1372 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
<> 156:95d6b41a828b 1373 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1374
<> 156:95d6b41a828b 1375 /* Disable the USART DMA Tx request if enabled */
<> 156:95d6b41a828b 1376 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
<> 156:95d6b41a828b 1377 {
<> 156:95d6b41a828b 1378 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1379
<> 156:95d6b41a828b 1380 /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
<> 156:95d6b41a828b 1381 if(husart->hdmatx != NULL)
<> 156:95d6b41a828b 1382 {
<> 156:95d6b41a828b 1383 /* Set the USART DMA Abort callback to Null.
<> 156:95d6b41a828b 1384 No call back execution at end of DMA abort procedure */
<> 156:95d6b41a828b 1385 husart->hdmatx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1386
<> 156:95d6b41a828b 1387 HAL_DMA_Abort(husart->hdmatx);
<> 156:95d6b41a828b 1388 }
<> 156:95d6b41a828b 1389 }
<> 156:95d6b41a828b 1390
<> 156:95d6b41a828b 1391 /* Disable the USART DMA Rx request if enabled */
<> 156:95d6b41a828b 1392 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 156:95d6b41a828b 1393 {
<> 156:95d6b41a828b 1394 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 156:95d6b41a828b 1395
<> 156:95d6b41a828b 1396 /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
<> 156:95d6b41a828b 1397 if(husart->hdmarx != NULL)
<> 156:95d6b41a828b 1398 {
<> 156:95d6b41a828b 1399 /* Set the USART DMA Abort callback to Null.
<> 156:95d6b41a828b 1400 No call back execution at end of DMA abort procedure */
<> 156:95d6b41a828b 1401 husart->hdmarx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1402
<> 156:95d6b41a828b 1403 HAL_DMA_Abort(husart->hdmarx);
<> 156:95d6b41a828b 1404 }
<> 156:95d6b41a828b 1405 }
<> 156:95d6b41a828b 1406
<> 156:95d6b41a828b 1407 /* Reset Tx and Rx transfer counters */
<> 156:95d6b41a828b 1408 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 1409 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 1410
<> 156:95d6b41a828b 1411 /* Clear the Error flags in the ICR register */
<> 156:95d6b41a828b 1412 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
<> 156:95d6b41a828b 1413
<> 156:95d6b41a828b 1414 /* Restore husart->State to Ready */
<> 156:95d6b41a828b 1415 husart->State = HAL_USART_STATE_READY;
<> 156:95d6b41a828b 1416
<> 156:95d6b41a828b 1417 /* Reset Handle ErrorCode to No Error */
<> 156:95d6b41a828b 1418 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 156:95d6b41a828b 1419
<> 156:95d6b41a828b 1420 return HAL_OK;
<> 156:95d6b41a828b 1421 }
<> 156:95d6b41a828b 1422
<> 156:95d6b41a828b 1423 /**
<> 156:95d6b41a828b 1424 * @brief Abort ongoing transfers (Interrupt mode).
<> 156:95d6b41a828b 1425 * @param husart USART handle.
<> 156:95d6b41a828b 1426 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
<> 156:95d6b41a828b 1427 * This procedure performs following operations :
<> 156:95d6b41a828b 1428 * - Disable USART Interrupts (Tx and Rx)
<> 156:95d6b41a828b 1429 * - Disable the DMA transfer in the peripheral register (if enabled)
<> 156:95d6b41a828b 1430 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
<> 156:95d6b41a828b 1431 * - Set handle State to READY
<> 156:95d6b41a828b 1432 * - At abort completion, call user abort complete callback
<> 156:95d6b41a828b 1433 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
<> 156:95d6b41a828b 1434 * considered as completed only when user abort complete callback is executed (not when exiting function).
<> 156:95d6b41a828b 1435 * @retval HAL status
<> 156:95d6b41a828b 1436 */
<> 156:95d6b41a828b 1437 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
<> 156:95d6b41a828b 1438 {
<> 156:95d6b41a828b 1439 uint32_t abortcplt = 1U;
<> 156:95d6b41a828b 1440
<> 156:95d6b41a828b 1441 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1442 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
<> 156:95d6b41a828b 1443 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1444
<> 156:95d6b41a828b 1445 /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
<> 156:95d6b41a828b 1446 before any call to DMA Abort functions */
<> 156:95d6b41a828b 1447 /* DMA Tx Handle is valid */
<> 156:95d6b41a828b 1448 if(husart->hdmatx != NULL)
<> 156:95d6b41a828b 1449 {
<> 156:95d6b41a828b 1450 /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
<> 156:95d6b41a828b 1451 Otherwise, set it to NULL */
<> 156:95d6b41a828b 1452 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
<> 156:95d6b41a828b 1453 {
<> 156:95d6b41a828b 1454 husart->hdmatx->XferAbortCallback = USART_DMATxAbortCallback;
<> 156:95d6b41a828b 1455 }
<> 156:95d6b41a828b 1456 else
<> 156:95d6b41a828b 1457 {
<> 156:95d6b41a828b 1458 husart->hdmatx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1459 }
<> 156:95d6b41a828b 1460 }
<> 156:95d6b41a828b 1461 /* DMA Rx Handle is valid */
<> 156:95d6b41a828b 1462 if(husart->hdmarx != NULL)
<> 156:95d6b41a828b 1463 {
<> 156:95d6b41a828b 1464 /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
<> 156:95d6b41a828b 1465 Otherwise, set it to NULL */
<> 156:95d6b41a828b 1466 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 156:95d6b41a828b 1467 {
<> 156:95d6b41a828b 1468 husart->hdmarx->XferAbortCallback = USART_DMARxAbortCallback;
<> 156:95d6b41a828b 1469 }
<> 156:95d6b41a828b 1470 else
<> 156:95d6b41a828b 1471 {
<> 156:95d6b41a828b 1472 husart->hdmarx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1473 }
<> 156:95d6b41a828b 1474 }
<> 156:95d6b41a828b 1475
<> 156:95d6b41a828b 1476 /* Disable the USART DMA Tx request if enabled */
<> 156:95d6b41a828b 1477 if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
<> 156:95d6b41a828b 1478 {
<> 156:95d6b41a828b 1479 /* Disable DMA Tx at USART level */
<> 156:95d6b41a828b 1480 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1481
<> 156:95d6b41a828b 1482 /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
<> 156:95d6b41a828b 1483 if(husart->hdmatx != NULL)
<> 156:95d6b41a828b 1484 {
<> 156:95d6b41a828b 1485 /* USART Tx DMA Abort callback has already been initialised :
<> 156:95d6b41a828b 1486 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
<> 156:95d6b41a828b 1487
<> 156:95d6b41a828b 1488 /* Abort DMA TX */
<> 156:95d6b41a828b 1489 if(HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
<> 156:95d6b41a828b 1490 {
<> 156:95d6b41a828b 1491 husart->hdmatx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1492 }
<> 156:95d6b41a828b 1493 else
<> 156:95d6b41a828b 1494 {
<> 156:95d6b41a828b 1495 abortcplt = 0U;
<> 156:95d6b41a828b 1496 }
<> 156:95d6b41a828b 1497 }
<> 156:95d6b41a828b 1498 }
<> 156:95d6b41a828b 1499
<> 156:95d6b41a828b 1500 /* Disable the USART DMA Rx request if enabled */
<> 156:95d6b41a828b 1501 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 156:95d6b41a828b 1502 {
<> 156:95d6b41a828b 1503 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 156:95d6b41a828b 1504
<> 156:95d6b41a828b 1505 /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
<> 156:95d6b41a828b 1506 if(husart->hdmarx != NULL)
<> 156:95d6b41a828b 1507 {
<> 156:95d6b41a828b 1508 /* USART Rx DMA Abort callback has already been initialised :
<> 156:95d6b41a828b 1509 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
<> 156:95d6b41a828b 1510
<> 156:95d6b41a828b 1511 /* Abort DMA RX */
<> 156:95d6b41a828b 1512 if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
<> 156:95d6b41a828b 1513 {
<> 156:95d6b41a828b 1514 husart->hdmarx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1515 abortcplt = 1U;
<> 156:95d6b41a828b 1516 }
<> 156:95d6b41a828b 1517 else
<> 156:95d6b41a828b 1518 {
<> 156:95d6b41a828b 1519 abortcplt = 0U;
<> 156:95d6b41a828b 1520 }
<> 156:95d6b41a828b 1521 }
<> 156:95d6b41a828b 1522 }
<> 156:95d6b41a828b 1523
<> 156:95d6b41a828b 1524 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
<> 156:95d6b41a828b 1525 if (abortcplt == 1U)
<> 156:95d6b41a828b 1526 {
<> 156:95d6b41a828b 1527 /* Reset Tx and Rx transfer counters */
<> 156:95d6b41a828b 1528 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 1529 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 1530
<> 156:95d6b41a828b 1531 /* Reset errorCode */
<> 156:95d6b41a828b 1532 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 156:95d6b41a828b 1533
<> 156:95d6b41a828b 1534 /* Clear the Error flags in the ICR register */
<> 156:95d6b41a828b 1535 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
<> 156:95d6b41a828b 1536
<> 156:95d6b41a828b 1537 /* Restore husart->State to Ready */
<> 156:95d6b41a828b 1538 husart->State = HAL_USART_STATE_READY;
<> 156:95d6b41a828b 1539
<> 156:95d6b41a828b 1540 /* As no DMA to be aborted, call directly user Abort complete callback */
<> 156:95d6b41a828b 1541 HAL_USART_AbortCpltCallback(husart);
<> 156:95d6b41a828b 1542 }
<> 156:95d6b41a828b 1543
<> 156:95d6b41a828b 1544 return HAL_OK;
<> 156:95d6b41a828b 1545 }
<> 156:95d6b41a828b 1546
<> 156:95d6b41a828b 1547 /**
<> 144:ef7eb2e8f9f7 1548 * @brief Handle USART interrupt request.
<> 156:95d6b41a828b 1549 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 1550 * @retval None
<> 144:ef7eb2e8f9f7 1551 */
<> 144:ef7eb2e8f9f7 1552 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1553 {
<> 156:95d6b41a828b 1554 uint32_t isrflags = READ_REG(husart->Instance->ISR);
<> 156:95d6b41a828b 1555 uint32_t cr1its = READ_REG(husart->Instance->CR1);
<> 156:95d6b41a828b 1556 uint32_t cr3its;
<> 156:95d6b41a828b 1557 uint32_t errorflags;
<> 144:ef7eb2e8f9f7 1558
<> 156:95d6b41a828b 1559 /* If no error occurs */
<> 156:95d6b41a828b 1560 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
<> 156:95d6b41a828b 1561 if (errorflags == RESET)
<> 144:ef7eb2e8f9f7 1562 {
<> 156:95d6b41a828b 1563 /* USART in mode Receiver ---------------------------------------------------*/
<> 156:95d6b41a828b 1564 if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1565 {
<> 156:95d6b41a828b 1566 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 156:95d6b41a828b 1567 {
<> 156:95d6b41a828b 1568 USART_Receive_IT(husart);
<> 156:95d6b41a828b 1569 }
<> 156:95d6b41a828b 1570 else
<> 156:95d6b41a828b 1571 {
<> 156:95d6b41a828b 1572 USART_TransmitReceive_IT(husart);
<> 156:95d6b41a828b 1573 }
<> 156:95d6b41a828b 1574 return;
<> 144:ef7eb2e8f9f7 1575 }
<> 144:ef7eb2e8f9f7 1576 }
<> 144:ef7eb2e8f9f7 1577
<> 156:95d6b41a828b 1578 /* If some errors occur */
<> 156:95d6b41a828b 1579 cr3its = READ_REG(husart->Instance->CR3);
<> 156:95d6b41a828b 1580 if( (errorflags != RESET)
<> 156:95d6b41a828b 1581 && ( ((cr3its & USART_CR3_EIE) != RESET)
<> 156:95d6b41a828b 1582 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
<> 156:95d6b41a828b 1583 {
<> 156:95d6b41a828b 1584 /* USART parity error interrupt occurred -------------------------------------*/
<> 156:95d6b41a828b 1585 if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
<> 156:95d6b41a828b 1586 {
<> 156:95d6b41a828b 1587 __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
<> 156:95d6b41a828b 1588
<> 156:95d6b41a828b 1589 husart->ErrorCode |= HAL_USART_ERROR_PE;
<> 156:95d6b41a828b 1590 }
<> 156:95d6b41a828b 1591
<> 156:95d6b41a828b 1592 /* USART frame error interrupt occurred --------------------------------------*/
<> 156:95d6b41a828b 1593 if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 156:95d6b41a828b 1594 {
<> 156:95d6b41a828b 1595 __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
<> 156:95d6b41a828b 1596
<> 156:95d6b41a828b 1597 husart->ErrorCode |= HAL_USART_ERROR_FE;
<> 156:95d6b41a828b 1598 }
<> 156:95d6b41a828b 1599
<> 156:95d6b41a828b 1600 /* USART noise error interrupt occurred --------------------------------------*/
<> 156:95d6b41a828b 1601 if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 156:95d6b41a828b 1602 {
<> 156:95d6b41a828b 1603 __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
<> 156:95d6b41a828b 1604
<> 156:95d6b41a828b 1605 husart->ErrorCode |= HAL_USART_ERROR_NE;
<> 156:95d6b41a828b 1606 }
<> 156:95d6b41a828b 1607
<> 156:95d6b41a828b 1608 /* USART Over-Run interrupt occurred -----------------------------------------*/
<> 156:95d6b41a828b 1609 if(((isrflags & USART_ISR_ORE) != RESET) &&
<> 156:95d6b41a828b 1610 (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
<> 156:95d6b41a828b 1611 {
<> 156:95d6b41a828b 1612 __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
<> 156:95d6b41a828b 1613
<> 156:95d6b41a828b 1614 husart->ErrorCode |= HAL_USART_ERROR_ORE;
<> 156:95d6b41a828b 1615 }
<> 156:95d6b41a828b 1616
<> 156:95d6b41a828b 1617 /* Call USART Error Call back function if need be --------------------------*/
<> 156:95d6b41a828b 1618 if(husart->ErrorCode != HAL_USART_ERROR_NONE)
<> 156:95d6b41a828b 1619 {
<> 156:95d6b41a828b 1620 /* USART in mode Receiver ---------------------------------------------------*/
<> 156:95d6b41a828b 1621 if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 156:95d6b41a828b 1622 {
<> 156:95d6b41a828b 1623 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 156:95d6b41a828b 1624 {
<> 156:95d6b41a828b 1625 USART_Receive_IT(husart);
<> 156:95d6b41a828b 1626 }
<> 156:95d6b41a828b 1627 else
<> 156:95d6b41a828b 1628 {
<> 156:95d6b41a828b 1629 USART_TransmitReceive_IT(husart);
<> 156:95d6b41a828b 1630 }
<> 156:95d6b41a828b 1631 }
<> 156:95d6b41a828b 1632
<> 156:95d6b41a828b 1633 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
<> 156:95d6b41a828b 1634 consider error as blocking */
<> 156:95d6b41a828b 1635 if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) ||
<> 156:95d6b41a828b 1636 (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
<> 156:95d6b41a828b 1637 {
<> 156:95d6b41a828b 1638 /* Blocking error : transfer is aborted
<> 156:95d6b41a828b 1639 Set the USART state ready to be able to start again the process,
<> 156:95d6b41a828b 1640 Disable Interrupts, and disable DMA requests, if ongoing */
<> 156:95d6b41a828b 1641 USART_EndTransfer(husart);
<> 156:95d6b41a828b 1642
<> 156:95d6b41a828b 1643 /* Disable the USART DMA Rx request if enabled */
<> 156:95d6b41a828b 1644 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 156:95d6b41a828b 1645 {
<> 156:95d6b41a828b 1646 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR);
<> 156:95d6b41a828b 1647
<> 156:95d6b41a828b 1648 /* Abort the USART DMA Tx channel */
<> 156:95d6b41a828b 1649 if(husart->hdmatx != NULL)
<> 156:95d6b41a828b 1650 {
<> 156:95d6b41a828b 1651 /* Set the USART Tx DMA Abort callback to NULL : no callback
<> 156:95d6b41a828b 1652 executed at end of DMA abort procedure */
<> 156:95d6b41a828b 1653 husart->hdmatx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 1654
<> 156:95d6b41a828b 1655 /* Abort DMA TX */
<> 156:95d6b41a828b 1656 HAL_DMA_Abort_IT(husart->hdmatx);
<> 156:95d6b41a828b 1657 }
<> 156:95d6b41a828b 1658
<> 156:95d6b41a828b 1659 /* Abort the USART DMA Rx channel */
<> 156:95d6b41a828b 1660 if(husart->hdmarx != NULL)
<> 156:95d6b41a828b 1661 {
<> 156:95d6b41a828b 1662 /* Set the USART Rx DMA Abort callback :
<> 156:95d6b41a828b 1663 will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
<> 156:95d6b41a828b 1664 husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
<> 156:95d6b41a828b 1665
<> 156:95d6b41a828b 1666 /* Abort DMA RX */
<> 156:95d6b41a828b 1667 if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
<> 156:95d6b41a828b 1668 {
<> 156:95d6b41a828b 1669 /* Call Directly husart->hdmarx->XferAbortCallback function in case of error */
<> 156:95d6b41a828b 1670 husart->hdmarx->XferAbortCallback(husart->hdmarx);
<> 156:95d6b41a828b 1671 }
<> 156:95d6b41a828b 1672 }
<> 156:95d6b41a828b 1673 else
<> 156:95d6b41a828b 1674 {
<> 156:95d6b41a828b 1675 /* Call user error callback */
<> 156:95d6b41a828b 1676 HAL_USART_ErrorCallback(husart);
<> 156:95d6b41a828b 1677 }
<> 156:95d6b41a828b 1678 }
<> 156:95d6b41a828b 1679 else
<> 156:95d6b41a828b 1680 {
<> 156:95d6b41a828b 1681 /* Call user error callback */
<> 156:95d6b41a828b 1682 HAL_USART_ErrorCallback(husart);
<> 156:95d6b41a828b 1683 }
<> 156:95d6b41a828b 1684 }
<> 156:95d6b41a828b 1685 else
<> 156:95d6b41a828b 1686 {
<> 156:95d6b41a828b 1687 /* Non Blocking error : transfer could go on.
<> 156:95d6b41a828b 1688 Error is notified to user through user error callback */
<> 156:95d6b41a828b 1689 HAL_USART_ErrorCallback(husart);
<> 156:95d6b41a828b 1690 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 156:95d6b41a828b 1691 }
<> 156:95d6b41a828b 1692 }
<> 156:95d6b41a828b 1693 return;
<> 156:95d6b41a828b 1694
<> 156:95d6b41a828b 1695 } /* End if some error occurs */
<> 156:95d6b41a828b 1696
<> 156:95d6b41a828b 1697
<> 156:95d6b41a828b 1698 /* USART in mode Transmitter ------------------------------------------------*/
<> 156:95d6b41a828b 1699 if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
<> 144:ef7eb2e8f9f7 1700 {
<> 144:ef7eb2e8f9f7 1701 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1702 {
<> 144:ef7eb2e8f9f7 1703 USART_Transmit_IT(husart);
<> 144:ef7eb2e8f9f7 1704 }
<> 144:ef7eb2e8f9f7 1705 else
<> 144:ef7eb2e8f9f7 1706 {
<> 144:ef7eb2e8f9f7 1707 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1708 }
<> 156:95d6b41a828b 1709 return;
<> 144:ef7eb2e8f9f7 1710 }
<> 144:ef7eb2e8f9f7 1711
<> 144:ef7eb2e8f9f7 1712 /* USART in mode Transmitter (transmission end) -----------------------------*/
<> 156:95d6b41a828b 1713 if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
<> 144:ef7eb2e8f9f7 1714 {
<> 144:ef7eb2e8f9f7 1715 USART_EndTransmit_IT(husart);
<> 156:95d6b41a828b 1716 return;
<> 144:ef7eb2e8f9f7 1717 }
<> 144:ef7eb2e8f9f7 1718
<> 144:ef7eb2e8f9f7 1719 }
<> 144:ef7eb2e8f9f7 1720
<> 144:ef7eb2e8f9f7 1721 /**
<> 144:ef7eb2e8f9f7 1722 * @brief Tx Transfer completed callback.
<> 144:ef7eb2e8f9f7 1723 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1724 * @retval None
<> 144:ef7eb2e8f9f7 1725 */
<> 144:ef7eb2e8f9f7 1726 __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1727 {
<> 144:ef7eb2e8f9f7 1728 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1729 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1730
<> 144:ef7eb2e8f9f7 1731 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1732 the HAL_USART_TxCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1733 */
<> 144:ef7eb2e8f9f7 1734 }
<> 144:ef7eb2e8f9f7 1735
<> 144:ef7eb2e8f9f7 1736 /**
<> 144:ef7eb2e8f9f7 1737 * @brief Tx Half Transfer completed callback.
<> 156:95d6b41a828b 1738 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1739 * @retval None
<> 144:ef7eb2e8f9f7 1740 */
<> 156:95d6b41a828b 1741 __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1742 {
<> 144:ef7eb2e8f9f7 1743 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1744 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1745
<> 144:ef7eb2e8f9f7 1746 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1747 the HAL_USART_TxHalfCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1748 */
<> 144:ef7eb2e8f9f7 1749 }
<> 144:ef7eb2e8f9f7 1750
<> 144:ef7eb2e8f9f7 1751 /**
<> 144:ef7eb2e8f9f7 1752 * @brief Rx Transfer completed callback.
<> 144:ef7eb2e8f9f7 1753 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1754 * @retval None
<> 144:ef7eb2e8f9f7 1755 */
<> 144:ef7eb2e8f9f7 1756 __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1757 {
<> 144:ef7eb2e8f9f7 1758 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1759 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1760
<> 144:ef7eb2e8f9f7 1761 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1762 the HAL_USART_RxCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1763 */
<> 144:ef7eb2e8f9f7 1764 }
<> 144:ef7eb2e8f9f7 1765
<> 144:ef7eb2e8f9f7 1766 /**
<> 144:ef7eb2e8f9f7 1767 * @brief Rx Half Transfer completed callback.
<> 144:ef7eb2e8f9f7 1768 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1769 * @retval None
<> 144:ef7eb2e8f9f7 1770 */
<> 144:ef7eb2e8f9f7 1771 __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1772 {
<> 144:ef7eb2e8f9f7 1773 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1774 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1775
<> 144:ef7eb2e8f9f7 1776 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1777 the HAL_USART_RxHalfCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1778 */
<> 144:ef7eb2e8f9f7 1779 }
<> 144:ef7eb2e8f9f7 1780
<> 144:ef7eb2e8f9f7 1781 /**
<> 144:ef7eb2e8f9f7 1782 * @brief Tx/Rx Transfers completed callback for the non-blocking process.
<> 156:95d6b41a828b 1783 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1784 * @retval None
<> 144:ef7eb2e8f9f7 1785 */
<> 144:ef7eb2e8f9f7 1786 __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1787 {
<> 144:ef7eb2e8f9f7 1788 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1789 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1790
<> 144:ef7eb2e8f9f7 1791 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1792 the HAL_USART_TxRxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 1793 */
<> 144:ef7eb2e8f9f7 1794 }
<> 144:ef7eb2e8f9f7 1795
<> 144:ef7eb2e8f9f7 1796 /**
<> 144:ef7eb2e8f9f7 1797 * @brief USART error callback.
<> 144:ef7eb2e8f9f7 1798 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1799 * @retval None
<> 144:ef7eb2e8f9f7 1800 */
<> 144:ef7eb2e8f9f7 1801 __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1802 {
<> 144:ef7eb2e8f9f7 1803 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1804 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1805
<> 144:ef7eb2e8f9f7 1806 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1807 the HAL_USART_ErrorCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1808 */
<> 144:ef7eb2e8f9f7 1809 }
<> 144:ef7eb2e8f9f7 1810
<> 144:ef7eb2e8f9f7 1811 /**
<> 156:95d6b41a828b 1812 * @brief USART Abort Complete callback.
<> 156:95d6b41a828b 1813 * @param husart USART handle.
<> 156:95d6b41a828b 1814 * @retval None
<> 156:95d6b41a828b 1815 */
<> 156:95d6b41a828b 1816 __weak void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart)
<> 156:95d6b41a828b 1817 {
<> 156:95d6b41a828b 1818 /* Prevent unused argument(s) compilation warning */
<> 156:95d6b41a828b 1819 UNUSED(husart);
<> 156:95d6b41a828b 1820
<> 156:95d6b41a828b 1821 /* NOTE : This function should not be modified, when the callback is needed,
<> 156:95d6b41a828b 1822 the HAL_USART_AbortCpltCallback can be implemented in the user file.
<> 156:95d6b41a828b 1823 */
<> 156:95d6b41a828b 1824 }
<> 156:95d6b41a828b 1825
<> 156:95d6b41a828b 1826 /**
<> 144:ef7eb2e8f9f7 1827 * @}
<> 144:ef7eb2e8f9f7 1828 */
<> 144:ef7eb2e8f9f7 1829
<> 144:ef7eb2e8f9f7 1830 /** @defgroup USART_Exported_Functions_Group3 Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 1831 * @brief USART Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 1832 *
<> 144:ef7eb2e8f9f7 1833 @verbatim
<> 144:ef7eb2e8f9f7 1834 ==============================================================================
<> 144:ef7eb2e8f9f7 1835 ##### Peripheral State and Error functions #####
<> 144:ef7eb2e8f9f7 1836 ==============================================================================
<> 144:ef7eb2e8f9f7 1837 [..]
<> 144:ef7eb2e8f9f7 1838 This subsection provides functions allowing to :
<> 144:ef7eb2e8f9f7 1839 (+) Return the USART handle state
<> 144:ef7eb2e8f9f7 1840 (+) Return the USART handle error code
<> 144:ef7eb2e8f9f7 1841
<> 144:ef7eb2e8f9f7 1842 @endverbatim
<> 144:ef7eb2e8f9f7 1843 * @{
<> 144:ef7eb2e8f9f7 1844 */
<> 144:ef7eb2e8f9f7 1845
<> 144:ef7eb2e8f9f7 1846
<> 144:ef7eb2e8f9f7 1847 /**
<> 144:ef7eb2e8f9f7 1848 * @brief Return the USART handle state.
<> 144:ef7eb2e8f9f7 1849 * @param husart : pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1850 * the configuration information for the specified USART.
<> 144:ef7eb2e8f9f7 1851 * @retval USART handle state
<> 144:ef7eb2e8f9f7 1852 */
<> 144:ef7eb2e8f9f7 1853 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1854 {
<> 144:ef7eb2e8f9f7 1855 return husart->State;
<> 144:ef7eb2e8f9f7 1856 }
<> 144:ef7eb2e8f9f7 1857
<> 144:ef7eb2e8f9f7 1858 /**
<> 144:ef7eb2e8f9f7 1859 * @brief Return the USART error code.
<> 144:ef7eb2e8f9f7 1860 * @param husart : pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1861 * the configuration information for the specified USART.
<> 144:ef7eb2e8f9f7 1862 * @retval USART handle Error Code
<> 144:ef7eb2e8f9f7 1863 */
<> 144:ef7eb2e8f9f7 1864 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1865 {
<> 144:ef7eb2e8f9f7 1866 return husart->ErrorCode;
<> 144:ef7eb2e8f9f7 1867 }
<> 144:ef7eb2e8f9f7 1868
<> 144:ef7eb2e8f9f7 1869 /**
<> 144:ef7eb2e8f9f7 1870 * @}
<> 144:ef7eb2e8f9f7 1871 */
<> 144:ef7eb2e8f9f7 1872
<> 144:ef7eb2e8f9f7 1873 /**
<> 144:ef7eb2e8f9f7 1874 * @}
<> 144:ef7eb2e8f9f7 1875 */
<> 144:ef7eb2e8f9f7 1876
<> 144:ef7eb2e8f9f7 1877 /** @defgroup USART_Private_Functions USART Private Functions
<> 144:ef7eb2e8f9f7 1878 * @brief USART Private functions
<> 144:ef7eb2e8f9f7 1879 *
<> 144:ef7eb2e8f9f7 1880 @verbatim
<> 144:ef7eb2e8f9f7 1881 [..]
<> 144:ef7eb2e8f9f7 1882 This subsection provides a set of functions allowing to control the USART.
<> 144:ef7eb2e8f9f7 1883 (+) USART_SetConfig() API is used to set the USART communication parameters.
<> 144:ef7eb2e8f9f7 1884 (+) USART_CheckIdleState() APi ensures that TEACK and/or REACK bits are set after initialization
<> 144:ef7eb2e8f9f7 1885
<> 144:ef7eb2e8f9f7 1886 @endverbatim
<> 144:ef7eb2e8f9f7 1887 * @{
<> 144:ef7eb2e8f9f7 1888 */
<> 156:95d6b41a828b 1889 /**
<> 156:95d6b41a828b 1890 * @brief End ongoing transfer on USART peripheral (following error detection or Transfer completion).
<> 156:95d6b41a828b 1891 * @param husart USART handle.
<> 156:95d6b41a828b 1892 * @retval None
<> 156:95d6b41a828b 1893 */
<> 156:95d6b41a828b 1894 static void USART_EndTransfer(USART_HandleTypeDef *husart)
<> 156:95d6b41a828b 1895 {
<> 156:95d6b41a828b 1896 /* Disable TXEIE and TCIE interrupts */
<> 156:95d6b41a828b 1897 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1898 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 156:95d6b41a828b 1899 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1900
<> 156:95d6b41a828b 1901 /* At end of process, restore husart->State to Ready */
<> 156:95d6b41a828b 1902 husart->State = HAL_USART_STATE_READY;
<> 156:95d6b41a828b 1903 }
<> 156:95d6b41a828b 1904
<> 156:95d6b41a828b 1905 /**
<> 156:95d6b41a828b 1906 * @brief DMA USART transmit process complete callback.
<> 156:95d6b41a828b 1907 * @param hdma DMA handle.
<> 156:95d6b41a828b 1908 * @retval None
<> 156:95d6b41a828b 1909 */
<> 156:95d6b41a828b 1910 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 1911 {
<> 156:95d6b41a828b 1912 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 1913
<> 156:95d6b41a828b 1914 /* DMA Normal mode */
<> 156:95d6b41a828b 1915 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 156:95d6b41a828b 1916 {
<> 156:95d6b41a828b 1917 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 1918
<> 156:95d6b41a828b 1919 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 156:95d6b41a828b 1920 {
<> 156:95d6b41a828b 1921 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
<> 156:95d6b41a828b 1922 in the USART CR3 register */
<> 156:95d6b41a828b 1923 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1924
<> 156:95d6b41a828b 1925 /* Enable the USART Transmit Complete Interrupt */
<> 156:95d6b41a828b 1926 __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
<> 156:95d6b41a828b 1927 }
<> 156:95d6b41a828b 1928 }
<> 156:95d6b41a828b 1929 /* DMA Circular mode */
<> 156:95d6b41a828b 1930 else
<> 156:95d6b41a828b 1931 {
<> 156:95d6b41a828b 1932 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 156:95d6b41a828b 1933 {
<> 156:95d6b41a828b 1934 HAL_USART_TxCpltCallback(husart);
<> 156:95d6b41a828b 1935 }
<> 156:95d6b41a828b 1936 }
<> 156:95d6b41a828b 1937 }
<> 156:95d6b41a828b 1938
<> 156:95d6b41a828b 1939 /**
<> 156:95d6b41a828b 1940 * @brief DMA USART transmit process half complete callback.
<> 156:95d6b41a828b 1941 * @param hdma DMA handle.
<> 156:95d6b41a828b 1942 * @retval None
<> 156:95d6b41a828b 1943 */
<> 156:95d6b41a828b 1944 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 1945 {
<> 156:95d6b41a828b 1946 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 1947
<> 156:95d6b41a828b 1948 HAL_USART_TxHalfCpltCallback(husart);
<> 156:95d6b41a828b 1949 }
<> 156:95d6b41a828b 1950
<> 156:95d6b41a828b 1951 /**
<> 156:95d6b41a828b 1952 * @brief DMA USART receive process complete callback.
<> 156:95d6b41a828b 1953 * @param hdma DMA handle.
<> 156:95d6b41a828b 1954 * @retval None
<> 156:95d6b41a828b 1955 */
<> 156:95d6b41a828b 1956 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 1957 {
<> 156:95d6b41a828b 1958 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 1959
<> 156:95d6b41a828b 1960 /* DMA Normal mode */
<> 156:95d6b41a828b 1961 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 156:95d6b41a828b 1962 {
<> 156:95d6b41a828b 1963 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 1964
<> 156:95d6b41a828b 1965 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 156:95d6b41a828b 1966 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 156:95d6b41a828b 1967 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 1968
<> 156:95d6b41a828b 1969 /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit
<> 156:95d6b41a828b 1970 in USART CR3 register */
<> 156:95d6b41a828b 1971 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 156:95d6b41a828b 1972 /* similarly, disable the DMA TX transfer that was started to provide the
<> 156:95d6b41a828b 1973 clock to the slave device */
<> 156:95d6b41a828b 1974 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 156:95d6b41a828b 1975
<> 156:95d6b41a828b 1976 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 156:95d6b41a828b 1977 {
<> 156:95d6b41a828b 1978 HAL_USART_RxCpltCallback(husart);
<> 156:95d6b41a828b 1979 }
<> 156:95d6b41a828b 1980 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 156:95d6b41a828b 1981 else
<> 156:95d6b41a828b 1982 {
<> 156:95d6b41a828b 1983 HAL_USART_TxRxCpltCallback(husart);
<> 156:95d6b41a828b 1984 }
<> 156:95d6b41a828b 1985 husart->State= HAL_USART_STATE_READY;
<> 156:95d6b41a828b 1986 }
<> 156:95d6b41a828b 1987 /* DMA circular mode */
<> 156:95d6b41a828b 1988 else
<> 156:95d6b41a828b 1989 {
<> 156:95d6b41a828b 1990 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 156:95d6b41a828b 1991 {
<> 156:95d6b41a828b 1992 HAL_USART_RxCpltCallback(husart);
<> 156:95d6b41a828b 1993 }
<> 156:95d6b41a828b 1994 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 156:95d6b41a828b 1995 else
<> 156:95d6b41a828b 1996 {
<> 156:95d6b41a828b 1997 HAL_USART_TxRxCpltCallback(husart);
<> 156:95d6b41a828b 1998 }
<> 156:95d6b41a828b 1999 }
<> 156:95d6b41a828b 2000
<> 156:95d6b41a828b 2001 }
<> 156:95d6b41a828b 2002
<> 156:95d6b41a828b 2003 /**
<> 156:95d6b41a828b 2004 * @brief DMA USART receive process half complete callback.
<> 156:95d6b41a828b 2005 * @param hdma DMA handle.
<> 156:95d6b41a828b 2006 * @retval None
<> 156:95d6b41a828b 2007 */
<> 156:95d6b41a828b 2008 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 2009 {
<> 156:95d6b41a828b 2010 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 2011
<> 156:95d6b41a828b 2012 HAL_USART_RxHalfCpltCallback(husart);
<> 156:95d6b41a828b 2013 }
<> 156:95d6b41a828b 2014
<> 156:95d6b41a828b 2015 /**
<> 156:95d6b41a828b 2016 * @brief DMA USART communication error callback.
<> 156:95d6b41a828b 2017 * @param hdma: DMA handle.
<> 156:95d6b41a828b 2018 * @retval None
<> 156:95d6b41a828b 2019 */
<> 156:95d6b41a828b 2020 static void USART_DMAError(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 2021 {
<> 156:95d6b41a828b 2022 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 2023
<> 156:95d6b41a828b 2024 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 2025 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 2026 USART_EndTransfer(husart);
<> 156:95d6b41a828b 2027
<> 156:95d6b41a828b 2028 husart->ErrorCode |= HAL_USART_ERROR_DMA;
<> 156:95d6b41a828b 2029 husart->State= HAL_USART_STATE_READY;
<> 156:95d6b41a828b 2030
<> 156:95d6b41a828b 2031 HAL_USART_ErrorCallback(husart);
<> 156:95d6b41a828b 2032 }
<> 156:95d6b41a828b 2033
<> 156:95d6b41a828b 2034 /**
<> 156:95d6b41a828b 2035 * @brief DMA USART communication abort callback, when initiated by HAL services on Error
<> 156:95d6b41a828b 2036 * (To be called at end of DMA Abort procedure following error occurrence).
<> 156:95d6b41a828b 2037 * @param hdma DMA handle.
<> 156:95d6b41a828b 2038 * @retval None
<> 156:95d6b41a828b 2039 */
<> 156:95d6b41a828b 2040 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 2041 {
<> 156:95d6b41a828b 2042 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
<> 156:95d6b41a828b 2043 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 2044 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 2045
<> 156:95d6b41a828b 2046 HAL_USART_ErrorCallback(husart);
<> 156:95d6b41a828b 2047 }
<> 156:95d6b41a828b 2048
<> 156:95d6b41a828b 2049 /**
<> 156:95d6b41a828b 2050 * @brief DMA USART Tx communication abort callback, when initiated by user
<> 156:95d6b41a828b 2051 * (To be called at end of DMA Tx Abort procedure following user abort request).
<> 156:95d6b41a828b 2052 * @note When this callback is executed, User Abort complete call back is called only if no
<> 156:95d6b41a828b 2053 * Abort still ongoing for Rx DMA Handle.
<> 156:95d6b41a828b 2054 * @param hdma DMA handle.
<> 156:95d6b41a828b 2055 * @retval None
<> 156:95d6b41a828b 2056 */
<> 156:95d6b41a828b 2057 static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 2058 {
<> 156:95d6b41a828b 2059 USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
<> 156:95d6b41a828b 2060
<> 156:95d6b41a828b 2061 husart->hdmatx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 2062
<> 156:95d6b41a828b 2063 /* Check if an Abort process is still ongoing */
<> 156:95d6b41a828b 2064 if(husart->hdmarx != NULL)
<> 156:95d6b41a828b 2065 {
<> 156:95d6b41a828b 2066 if(husart->hdmarx->XferAbortCallback != NULL)
<> 156:95d6b41a828b 2067 {
<> 156:95d6b41a828b 2068 return;
<> 156:95d6b41a828b 2069 }
<> 156:95d6b41a828b 2070 }
<> 156:95d6b41a828b 2071
<> 156:95d6b41a828b 2072 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
<> 156:95d6b41a828b 2073 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 2074 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 2075
<> 156:95d6b41a828b 2076 /* Reset errorCode */
<> 156:95d6b41a828b 2077 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 156:95d6b41a828b 2078
<> 156:95d6b41a828b 2079 /* Clear the Error flags in the ICR register */
<> 156:95d6b41a828b 2080 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
<> 156:95d6b41a828b 2081
<> 156:95d6b41a828b 2082 /* Restore husart->State to Ready */
<> 156:95d6b41a828b 2083 husart->State = HAL_USART_STATE_READY;
<> 156:95d6b41a828b 2084
<> 156:95d6b41a828b 2085 /* Call user Abort complete callback */
<> 156:95d6b41a828b 2086 HAL_USART_AbortCpltCallback(husart);
<> 156:95d6b41a828b 2087 }
<> 156:95d6b41a828b 2088
<> 156:95d6b41a828b 2089
<> 156:95d6b41a828b 2090 /**
<> 156:95d6b41a828b 2091 * @brief DMA USART Rx communication abort callback, when initiated by user
<> 156:95d6b41a828b 2092 * (To be called at end of DMA Rx Abort procedure following user abort request).
<> 156:95d6b41a828b 2093 * @note When this callback is executed, User Abort complete call back is called only if no
<> 156:95d6b41a828b 2094 * Abort still ongoing for Tx DMA Handle.
<> 156:95d6b41a828b 2095 * @param hdma DMA handle.
<> 156:95d6b41a828b 2096 * @retval None
<> 156:95d6b41a828b 2097 */
<> 156:95d6b41a828b 2098 static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
<> 156:95d6b41a828b 2099 {
<> 156:95d6b41a828b 2100 USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
<> 156:95d6b41a828b 2101
<> 156:95d6b41a828b 2102 husart->hdmarx->XferAbortCallback = NULL;
<> 156:95d6b41a828b 2103
<> 156:95d6b41a828b 2104 /* Check if an Abort process is still ongoing */
<> 156:95d6b41a828b 2105 if(husart->hdmatx != NULL)
<> 156:95d6b41a828b 2106 {
<> 156:95d6b41a828b 2107 if(husart->hdmatx->XferAbortCallback != NULL)
<> 156:95d6b41a828b 2108 {
<> 156:95d6b41a828b 2109 return;
<> 156:95d6b41a828b 2110 }
<> 156:95d6b41a828b 2111 }
<> 156:95d6b41a828b 2112
<> 156:95d6b41a828b 2113 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
<> 156:95d6b41a828b 2114 husart->TxXferCount = 0U;
<> 156:95d6b41a828b 2115 husart->RxXferCount = 0U;
<> 156:95d6b41a828b 2116
<> 156:95d6b41a828b 2117 /* Reset errorCode */
<> 156:95d6b41a828b 2118 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 156:95d6b41a828b 2119
<> 156:95d6b41a828b 2120 /* Clear the Error flags in the ICR register */
<> 156:95d6b41a828b 2121 __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
<> 156:95d6b41a828b 2122
<> 156:95d6b41a828b 2123 /* Restore husart->State to Ready */
<> 156:95d6b41a828b 2124 husart->State = HAL_USART_STATE_READY;
<> 156:95d6b41a828b 2125
<> 156:95d6b41a828b 2126 /* Call user Abort complete callback */
<> 156:95d6b41a828b 2127 HAL_USART_AbortCpltCallback(husart);
<> 156:95d6b41a828b 2128 }
<> 156:95d6b41a828b 2129
<> 156:95d6b41a828b 2130
<> 156:95d6b41a828b 2131 /**
<> 156:95d6b41a828b 2132 * @brief Handle USART Communication Timeout.
<> 156:95d6b41a828b 2133 * @param husart USART handle.
<> 156:95d6b41a828b 2134 * @param Flag Specifies the USART flag to check.
<> 156:95d6b41a828b 2135 * @param Status the Flag status (SET or RESET).
<> 156:95d6b41a828b 2136 * @param Tickstart Tick start value
<> 156:95d6b41a828b 2137 * @param Timeout timeout duration.
<> 156:95d6b41a828b 2138 * @retval HAL status
<> 156:95d6b41a828b 2139 */
<> 156:95d6b41a828b 2140 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
<> 156:95d6b41a828b 2141 {
<> 156:95d6b41a828b 2142 /* Wait until flag is set */
<> 156:95d6b41a828b 2143 while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
<> 156:95d6b41a828b 2144 {
<> 156:95d6b41a828b 2145 /* Check for the Timeout */
<> 156:95d6b41a828b 2146 if(Timeout != HAL_MAX_DELAY)
<> 156:95d6b41a828b 2147 {
<> 156:95d6b41a828b 2148 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 156:95d6b41a828b 2149 {
<> 156:95d6b41a828b 2150 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 156:95d6b41a828b 2151 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
<> 156:95d6b41a828b 2152 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 156:95d6b41a828b 2153
<> 156:95d6b41a828b 2154 husart->State= HAL_USART_STATE_READY;
<> 156:95d6b41a828b 2155
<> 156:95d6b41a828b 2156 /* Process Unlocked */
<> 156:95d6b41a828b 2157 __HAL_UNLOCK(husart);
<> 156:95d6b41a828b 2158
<> 156:95d6b41a828b 2159 return HAL_TIMEOUT;
<> 156:95d6b41a828b 2160 }
<> 156:95d6b41a828b 2161 }
<> 156:95d6b41a828b 2162 }
<> 156:95d6b41a828b 2163 return HAL_OK;
<> 156:95d6b41a828b 2164 }
<> 156:95d6b41a828b 2165
<> 144:ef7eb2e8f9f7 2166
<> 144:ef7eb2e8f9f7 2167 /**
<> 144:ef7eb2e8f9f7 2168 * @brief Configure the USART peripheral.
<> 144:ef7eb2e8f9f7 2169 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 2170 * @retval HAL status
<> 144:ef7eb2e8f9f7 2171 */
<> 144:ef7eb2e8f9f7 2172 static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2173 {
<> 156:95d6b41a828b 2174 uint32_t tmpreg = 0x0U;
<> 144:ef7eb2e8f9f7 2175 USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED;
<> 144:ef7eb2e8f9f7 2176 HAL_StatusTypeDef ret = HAL_OK;
<> 156:95d6b41a828b 2177 uint16_t brrtemp = 0x0000U;
<> 156:95d6b41a828b 2178 uint16_t usartdiv = 0x0000U;
<> 144:ef7eb2e8f9f7 2179
<> 144:ef7eb2e8f9f7 2180 /* Check the parameters */
<> 144:ef7eb2e8f9f7 2181 assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
<> 144:ef7eb2e8f9f7 2182 assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
<> 144:ef7eb2e8f9f7 2183 assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
<> 144:ef7eb2e8f9f7 2184 assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 2185 assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
<> 144:ef7eb2e8f9f7 2186 assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
<> 144:ef7eb2e8f9f7 2187 assert_param(IS_USART_PARITY(husart->Init.Parity));
<> 144:ef7eb2e8f9f7 2188 assert_param(IS_USART_MODE(husart->Init.Mode));
<> 144:ef7eb2e8f9f7 2189
<> 144:ef7eb2e8f9f7 2190
<> 144:ef7eb2e8f9f7 2191 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 2192 /* Clear M, PCE, PS, TE and RE bits and configure
<> 144:ef7eb2e8f9f7 2193 * the USART Word Length, Parity and Mode:
<> 144:ef7eb2e8f9f7 2194 * set the M bits according to husart->Init.WordLength value
<> 144:ef7eb2e8f9f7 2195 * set PCE and PS bits according to husart->Init.Parity value
<> 144:ef7eb2e8f9f7 2196 * set TE and RE bits according to husart->Init.Mode value
<> 144:ef7eb2e8f9f7 2197 * force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */
<> 144:ef7eb2e8f9f7 2198 tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
<> 144:ef7eb2e8f9f7 2199 MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
<> 144:ef7eb2e8f9f7 2200
<> 144:ef7eb2e8f9f7 2201 /*---------------------------- USART CR2 Configuration ---------------------*/
<> 144:ef7eb2e8f9f7 2202 /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits:
<> 144:ef7eb2e8f9f7 2203 * set CPOL bit according to husart->Init.CLKPolarity value
<> 144:ef7eb2e8f9f7 2204 * set CPHA bit according to husart->Init.CLKPhase value
<> 144:ef7eb2e8f9f7 2205 * set LBCL bit according to husart->Init.CLKLastBit value
<> 144:ef7eb2e8f9f7 2206 * set STOP[13:12] bits according to husart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 2207 tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
<> 144:ef7eb2e8f9f7 2208 tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase);
<> 144:ef7eb2e8f9f7 2209 tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits);
<> 144:ef7eb2e8f9f7 2210 MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
<> 144:ef7eb2e8f9f7 2211
<> 144:ef7eb2e8f9f7 2212 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 2213 /* no CR3 register configuration */
<> 144:ef7eb2e8f9f7 2214
<> 144:ef7eb2e8f9f7 2215 /*-------------------------- USART BRR Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 2216 /* BRR is filled-up according to OVER8 bit setting which is forced to 1 */
<> 144:ef7eb2e8f9f7 2217 USART_GETCLOCKSOURCE(husart, clocksource);
<> 144:ef7eb2e8f9f7 2218 switch (clocksource)
<> 144:ef7eb2e8f9f7 2219 {
<> 144:ef7eb2e8f9f7 2220 case USART_CLOCKSOURCE_PCLK1:
<> 144:ef7eb2e8f9f7 2221 usartdiv = (uint16_t)(((2*HAL_RCC_GetPCLK1Freq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2222 break;
<> 144:ef7eb2e8f9f7 2223 case USART_CLOCKSOURCE_HSI:
<> 144:ef7eb2e8f9f7 2224 usartdiv = (uint16_t)(((2*HSI_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2225 break;
<> 144:ef7eb2e8f9f7 2226 case USART_CLOCKSOURCE_SYSCLK:
<> 144:ef7eb2e8f9f7 2227 usartdiv = (uint16_t)(((2*HAL_RCC_GetSysClockFreq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2228 break;
<> 144:ef7eb2e8f9f7 2229 case USART_CLOCKSOURCE_LSE:
<> 144:ef7eb2e8f9f7 2230 usartdiv = (uint16_t)(((2*LSE_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2231 break;
<> 144:ef7eb2e8f9f7 2232 case USART_CLOCKSOURCE_UNDEFINED:
<> 144:ef7eb2e8f9f7 2233 default:
<> 144:ef7eb2e8f9f7 2234 ret = HAL_ERROR;
<> 144:ef7eb2e8f9f7 2235 break;
<> 144:ef7eb2e8f9f7 2236 }
<> 144:ef7eb2e8f9f7 2237
<> 156:95d6b41a828b 2238 brrtemp = usartdiv & 0xFFF0U;
<> 156:95d6b41a828b 2239 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
<> 144:ef7eb2e8f9f7 2240 husart->Instance->BRR = brrtemp;
<> 144:ef7eb2e8f9f7 2241
<> 144:ef7eb2e8f9f7 2242 return ret;
<> 144:ef7eb2e8f9f7 2243 }
<> 144:ef7eb2e8f9f7 2244
<> 144:ef7eb2e8f9f7 2245 /**
<> 144:ef7eb2e8f9f7 2246 * @brief Check the USART Idle State.
<> 144:ef7eb2e8f9f7 2247 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 2248 * @retval HAL status
<> 144:ef7eb2e8f9f7 2249 */
<> 144:ef7eb2e8f9f7 2250 static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2251 {
<> 156:95d6b41a828b 2252 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 156:95d6b41a828b 2253 uint32_t tickstart = 0U;
<> 156:95d6b41a828b 2254 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 156:95d6b41a828b 2255
<> 144:ef7eb2e8f9f7 2256 /* Initialize the USART ErrorCode */
<> 144:ef7eb2e8f9f7 2257 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 2258
<> 156:95d6b41a828b 2259 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 156:95d6b41a828b 2260 /* Init tickstart for timeout managment*/
<> 156:95d6b41a828b 2261 tickstart = HAL_GetTick();
<> 156:95d6b41a828b 2262
<> 144:ef7eb2e8f9f7 2263 /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
<> 144:ef7eb2e8f9f7 2264 Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature.
<> 144:ef7eb2e8f9f7 2265 */
<> 144:ef7eb2e8f9f7 2266 if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(husart->Instance))
<> 144:ef7eb2e8f9f7 2267 {
<> 144:ef7eb2e8f9f7 2268 /* Check if the Transmitter is enabled */
<> 144:ef7eb2e8f9f7 2269 if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
<> 144:ef7eb2e8f9f7 2270 {
<> 144:ef7eb2e8f9f7 2271 /* Wait until TEACK flag is set */
<> 156:95d6b41a828b 2272 if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
<> 144:ef7eb2e8f9f7 2273 {
<> 144:ef7eb2e8f9f7 2274 /* Timeout occurred */
<> 144:ef7eb2e8f9f7 2275 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 2276 }
<> 144:ef7eb2e8f9f7 2277 }
<> 144:ef7eb2e8f9f7 2278
<> 144:ef7eb2e8f9f7 2279 /* Check if the Receiver is enabled */
<> 144:ef7eb2e8f9f7 2280 if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
<> 144:ef7eb2e8f9f7 2281 {
<> 144:ef7eb2e8f9f7 2282 /* Wait until REACK flag is set */
<> 156:95d6b41a828b 2283 if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
<> 144:ef7eb2e8f9f7 2284 {
<> 144:ef7eb2e8f9f7 2285 /* Timeout occurred */
<> 144:ef7eb2e8f9f7 2286 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 2287 }
<> 144:ef7eb2e8f9f7 2288 }
<> 144:ef7eb2e8f9f7 2289 }
<> 144:ef7eb2e8f9f7 2290 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 2291
<> 144:ef7eb2e8f9f7 2292 /* Initialize the USART state*/
<> 144:ef7eb2e8f9f7 2293 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2294
<> 144:ef7eb2e8f9f7 2295 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 2296 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 2297
<> 144:ef7eb2e8f9f7 2298 return HAL_OK;
<> 144:ef7eb2e8f9f7 2299 }
<> 144:ef7eb2e8f9f7 2300
<> 144:ef7eb2e8f9f7 2301
<> 144:ef7eb2e8f9f7 2302 /**
<> 144:ef7eb2e8f9f7 2303 * @brief Simplex send an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 2304 * @note Function called under interruption only, once
<> 144:ef7eb2e8f9f7 2305 * interruptions have been enabled by HAL_USART_Transmit_IT().
<> 144:ef7eb2e8f9f7 2306 * @note The USART errors are not managed to avoid the overrun error.
<> 156:95d6b41a828b 2307 * @param husart USART handle.
<> 144:ef7eb2e8f9f7 2308 * @retval HAL status
<> 144:ef7eb2e8f9f7 2309 */
<> 144:ef7eb2e8f9f7 2310 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2311 {
<> 156:95d6b41a828b 2312 uint16_t* tmp=0U;
<> 144:ef7eb2e8f9f7 2313
<> 156:95d6b41a828b 2314 /* Check that a Tx process is ongoing */
<> 144:ef7eb2e8f9f7 2315 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 2316 {
<> 144:ef7eb2e8f9f7 2317
<> 156:95d6b41a828b 2318 if(husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2319 {
<> 144:ef7eb2e8f9f7 2320 /* Disable the USART Transmit data register empty interrupt */
<> 144:ef7eb2e8f9f7 2321 __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<> 144:ef7eb2e8f9f7 2322
<> 144:ef7eb2e8f9f7 2323 /* Enable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 2324 __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
<> 144:ef7eb2e8f9f7 2325
<> 144:ef7eb2e8f9f7 2326 return HAL_OK;
<> 144:ef7eb2e8f9f7 2327 }
<> 144:ef7eb2e8f9f7 2328 else
<> 144:ef7eb2e8f9f7 2329 {
<> 144:ef7eb2e8f9f7 2330 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 2331 {
<> 144:ef7eb2e8f9f7 2332 tmp = (uint16_t*) husart->pTxBuffPtr;
<> 156:95d6b41a828b 2333 husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
<> 156:95d6b41a828b 2334 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2335 }
<> 144:ef7eb2e8f9f7 2336 else
<> 144:ef7eb2e8f9f7 2337 {
<> 156:95d6b41a828b 2338 husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFFU);
<> 144:ef7eb2e8f9f7 2339 }
<> 144:ef7eb2e8f9f7 2340
<> 144:ef7eb2e8f9f7 2341 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 2342
<> 144:ef7eb2e8f9f7 2343 return HAL_OK;
<> 144:ef7eb2e8f9f7 2344 }
<> 144:ef7eb2e8f9f7 2345 }
<> 144:ef7eb2e8f9f7 2346 else
<> 144:ef7eb2e8f9f7 2347 {
<> 144:ef7eb2e8f9f7 2348 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2349 }
<> 144:ef7eb2e8f9f7 2350 }
<> 144:ef7eb2e8f9f7 2351
<> 144:ef7eb2e8f9f7 2352
<> 144:ef7eb2e8f9f7 2353 /**
<> 144:ef7eb2e8f9f7 2354 * @brief Wraps up transmission in non-blocking mode.
<> 156:95d6b41a828b 2355 * @param husart Pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 2356 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 2357 * @retval HAL status
<> 144:ef7eb2e8f9f7 2358 */
<> 144:ef7eb2e8f9f7 2359 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2360 {
<> 144:ef7eb2e8f9f7 2361 /* Disable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 2362 __HAL_USART_DISABLE_IT(husart, USART_IT_TC);
<> 144:ef7eb2e8f9f7 2363
<> 144:ef7eb2e8f9f7 2364 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 2365 __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<> 144:ef7eb2e8f9f7 2366
<> 156:95d6b41a828b 2367 /* Tx process is ended, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 2368 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2369
<> 144:ef7eb2e8f9f7 2370 HAL_USART_TxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2371
<> 144:ef7eb2e8f9f7 2372 return HAL_OK;
<> 144:ef7eb2e8f9f7 2373 }
<> 144:ef7eb2e8f9f7 2374
<> 144:ef7eb2e8f9f7 2375
<> 144:ef7eb2e8f9f7 2376 /**
<> 144:ef7eb2e8f9f7 2377 * @brief Simplex receive an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 2378 * @note Function called under interruption only, once
<> 144:ef7eb2e8f9f7 2379 * interruptions have been enabled by HAL_USART_Receive_IT().
<> 156:95d6b41a828b 2380 * @param husart USART handle
<> 144:ef7eb2e8f9f7 2381 * @retval HAL status
<> 144:ef7eb2e8f9f7 2382 */
<> 144:ef7eb2e8f9f7 2383 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2384 {
<> 156:95d6b41a828b 2385 uint16_t* tmp=0U;
<> 144:ef7eb2e8f9f7 2386 uint16_t uhMask = husart->Mask;
<> 144:ef7eb2e8f9f7 2387
<> 144:ef7eb2e8f9f7 2388 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 2389 {
<> 144:ef7eb2e8f9f7 2390
<> 144:ef7eb2e8f9f7 2391 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 2392 {
<> 144:ef7eb2e8f9f7 2393 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 2394 *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<> 156:95d6b41a828b 2395 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2396 }
<> 144:ef7eb2e8f9f7 2397 else
<> 144:ef7eb2e8f9f7 2398 {
<> 144:ef7eb2e8f9f7 2399 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 2400 }
<> 144:ef7eb2e8f9f7 2401
<> 144:ef7eb2e8f9f7 2402 /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
<> 156:95d6b41a828b 2403 husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 2404
<> 156:95d6b41a828b 2405 if(--husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2406 {
<> 156:95d6b41a828b 2407 /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
<> 156:95d6b41a828b 2408 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 2409
<> 144:ef7eb2e8f9f7 2410 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 2411 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 2412
<> 156:95d6b41a828b 2413 /* Rx process is completed, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 2414 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2415
<> 144:ef7eb2e8f9f7 2416 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2417
<> 144:ef7eb2e8f9f7 2418 return HAL_OK;
<> 144:ef7eb2e8f9f7 2419 }
<> 144:ef7eb2e8f9f7 2420
<> 144:ef7eb2e8f9f7 2421 return HAL_OK;
<> 144:ef7eb2e8f9f7 2422 }
<> 144:ef7eb2e8f9f7 2423 else
<> 144:ef7eb2e8f9f7 2424 {
<> 144:ef7eb2e8f9f7 2425 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2426 }
<> 144:ef7eb2e8f9f7 2427 }
<> 144:ef7eb2e8f9f7 2428
<> 144:ef7eb2e8f9f7 2429 /**
<> 144:ef7eb2e8f9f7 2430 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
<> 144:ef7eb2e8f9f7 2431 * @note Function called under interruption only, once
<> 144:ef7eb2e8f9f7 2432 * interruptions have been enabled by HAL_USART_TransmitReceive_IT().
<> 144:ef7eb2e8f9f7 2433 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 2434 * @retval HAL status
<> 144:ef7eb2e8f9f7 2435 */
<> 144:ef7eb2e8f9f7 2436 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 2437 {
<> 156:95d6b41a828b 2438 uint16_t* tmp=0U;
<> 144:ef7eb2e8f9f7 2439 uint16_t uhMask = husart->Mask;
<> 144:ef7eb2e8f9f7 2440
<> 144:ef7eb2e8f9f7 2441 if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 2442 {
<> 144:ef7eb2e8f9f7 2443
<> 156:95d6b41a828b 2444 if(husart->TxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2445 {
<> 144:ef7eb2e8f9f7 2446 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
<> 144:ef7eb2e8f9f7 2447 {
<> 144:ef7eb2e8f9f7 2448 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 2449 {
<> 144:ef7eb2e8f9f7 2450 tmp = (uint16_t*) husart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 2451 husart->Instance->TDR = (uint16_t)(*tmp & uhMask);
<> 156:95d6b41a828b 2452 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2453 }
<> 144:ef7eb2e8f9f7 2454 else
<> 144:ef7eb2e8f9f7 2455 {
<> 144:ef7eb2e8f9f7 2456 husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 2457 }
<> 144:ef7eb2e8f9f7 2458 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 2459
<> 144:ef7eb2e8f9f7 2460 /* Check the latest data transmitted */
<> 156:95d6b41a828b 2461 if(husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2462 {
<> 144:ef7eb2e8f9f7 2463 __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<> 144:ef7eb2e8f9f7 2464 }
<> 144:ef7eb2e8f9f7 2465 }
<> 144:ef7eb2e8f9f7 2466 }
<> 144:ef7eb2e8f9f7 2467
<> 156:95d6b41a828b 2468 if(husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 2469 {
<> 144:ef7eb2e8f9f7 2470 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
<> 144:ef7eb2e8f9f7 2471 {
<> 144:ef7eb2e8f9f7 2472 if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 2473 {
<> 144:ef7eb2e8f9f7 2474 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 2475 *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<> 156:95d6b41a828b 2476 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 2477 }
<> 144:ef7eb2e8f9f7 2478 else
<> 144:ef7eb2e8f9f7 2479 {
<> 144:ef7eb2e8f9f7 2480 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 2481 }
<> 144:ef7eb2e8f9f7 2482 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 2483 }
<> 144:ef7eb2e8f9f7 2484 }
<> 144:ef7eb2e8f9f7 2485
<> 144:ef7eb2e8f9f7 2486 /* Check the latest data received */
<> 156:95d6b41a828b 2487 if(husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 2488 {
<> 156:95d6b41a828b 2489 /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
<> 156:95d6b41a828b 2490 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 2491
<> 144:ef7eb2e8f9f7 2492 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 156:95d6b41a828b 2493 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 2494
<> 156:95d6b41a828b 2495 /* Rx process is completed, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 2496 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 2497
<> 144:ef7eb2e8f9f7 2498 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 2499
<> 144:ef7eb2e8f9f7 2500 return HAL_OK;
<> 144:ef7eb2e8f9f7 2501 }
<> 144:ef7eb2e8f9f7 2502
<> 144:ef7eb2e8f9f7 2503 return HAL_OK;
<> 144:ef7eb2e8f9f7 2504 }
<> 144:ef7eb2e8f9f7 2505 else
<> 144:ef7eb2e8f9f7 2506 {
<> 144:ef7eb2e8f9f7 2507 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2508 }
<> 144:ef7eb2e8f9f7 2509 }
<> 144:ef7eb2e8f9f7 2510
<> 144:ef7eb2e8f9f7 2511 /**
<> 144:ef7eb2e8f9f7 2512 * @}
<> 144:ef7eb2e8f9f7 2513 */
<> 144:ef7eb2e8f9f7 2514
<> 144:ef7eb2e8f9f7 2515 #endif /* HAL_USART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 2516 /**
<> 144:ef7eb2e8f9f7 2517 * @}
<> 144:ef7eb2e8f9f7 2518 */
<> 144:ef7eb2e8f9f7 2519
<> 144:ef7eb2e8f9f7 2520 /**
<> 144:ef7eb2e8f9f7 2521 * @}
<> 144:ef7eb2e8f9f7 2522 */
<> 144:ef7eb2e8f9f7 2523
<> 144:ef7eb2e8f9f7 2524 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/