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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_usart.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:: <>
Date:: Fri Sep 02 15:07:44 2016 +0100
Revision:: 144:ef7eb2e8f9f7
Parent:: 0:9b334a45a8ff

This updates the lib to the mbed lib v125

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32f0xx_hal_usart.c
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	144:ef7eb2e8f9f7	5	* @version V1.4.0
<>	144:ef7eb2e8f9f7	6	* @date 27-May-2016
<>	144:ef7eb2e8f9f7	7	* @brief USART HAL module driver.
<>	144:ef7eb2e8f9f7	8	* This file provides firmware functions to manage the following
<>	144:ef7eb2e8f9f7	9	* functionalities of the Universal Synchronous Asynchronous Receiver Transmitter
<>	144:ef7eb2e8f9f7	10	* Peripheral (USART).
<>	144:ef7eb2e8f9f7	11	* + Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	12	* + IO operation functions
<>	144:ef7eb2e8f9f7	13	* + Peripheral Control functions
<>	144:ef7eb2e8f9f7	14	* + Peripheral State and Error functions
<>	144:ef7eb2e8f9f7	15	*
<>	144:ef7eb2e8f9f7	16	@verbatim
<>	144:ef7eb2e8f9f7	17	===============================================================================
<>	144:ef7eb2e8f9f7	18	##### How to use this driver #####
<>	144:ef7eb2e8f9f7	19	===============================================================================
<>	144:ef7eb2e8f9f7	20	[..]
<>	144:ef7eb2e8f9f7	21	The USART HAL driver can be used as follows:
<>	144:ef7eb2e8f9f7	22
<>	144:ef7eb2e8f9f7	23	(#) Declare a USART_HandleTypeDef handle structure (eg. USART_HandleTypeDef husart).
<>	144:ef7eb2e8f9f7	24	(#) Initialize the USART low level resources by implementing the HAL_USART_MspInit() API:
<>	144:ef7eb2e8f9f7	25	(++) Enable the USARTx interface clock.
<>	144:ef7eb2e8f9f7	26	(++) USART pins configuration:
<>	144:ef7eb2e8f9f7	27	(+++) Enable the clock for the USART GPIOs.
<>	144:ef7eb2e8f9f7	28	(+++) Configure these USART pins as alternate function pull-up.
<>	144:ef7eb2e8f9f7	29	(++) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
<>	144:ef7eb2e8f9f7	30	HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<>	144:ef7eb2e8f9f7	31	(+++) Configure the USARTx interrupt priority.
<>	144:ef7eb2e8f9f7	32	(+++) Enable the NVIC USART IRQ handle.
<>	144:ef7eb2e8f9f7	33	(++) USART interrupts handling:
<>	144:ef7eb2e8f9f7	34	-@@- The specific USART interrupts (Transmission complete interrupt,
<>	144:ef7eb2e8f9f7	35	RXNE interrupt and Error Interrupts) will be managed using the macros
<>	144:ef7eb2e8f9f7	36	__HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
<>	144:ef7eb2e8f9f7	37	(++) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
<>	144:ef7eb2e8f9f7	38	HAL_USART_Receive_DMA() and HAL_USART_TransmitReceive_DMA() APIs):
<>	144:ef7eb2e8f9f7	39	(+++) Declare a DMA handle structure for the Tx/Rx channel.
<>	144:ef7eb2e8f9f7	40	(+++) Enable the DMAx interface clock.
<>	144:ef7eb2e8f9f7	41	(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<>	144:ef7eb2e8f9f7	42	(+++) Configure the DMA Tx/Rx channel.
<>	144:ef7eb2e8f9f7	43	(+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
<>	144:ef7eb2e8f9f7	44	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
<>	144:ef7eb2e8f9f7	45
<>	144:ef7eb2e8f9f7	46	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<>	144:ef7eb2e8f9f7	47	flow control and Mode (Receiver/Transmitter) in the husart handle Init structure.
<>	144:ef7eb2e8f9f7	48
<>	144:ef7eb2e8f9f7	49	(#) Initialize the USART registers by calling the HAL_USART_Init() API:
<>	144:ef7eb2e8f9f7	50	(++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<>	144:ef7eb2e8f9f7	51	by calling the customized HAL_USART_MspInit(&husart) API.
<>	144:ef7eb2e8f9f7	52
<>	144:ef7eb2e8f9f7	53	(#) Three operation modes are available within this driver :
<>	144:ef7eb2e8f9f7	54
<>	144:ef7eb2e8f9f7	55	* Polling mode IO operation *
<>	144:ef7eb2e8f9f7	56	=================================
<>	144:ef7eb2e8f9f7	57	[..]
<>	144:ef7eb2e8f9f7	58	(+) Send an amount of data in blocking mode using HAL_USART_Transmit()
<>	144:ef7eb2e8f9f7	59	(+) Receive an amount of data in blocking mode using HAL_USART_Receive()
<>	144:ef7eb2e8f9f7	60
<>	144:ef7eb2e8f9f7	61	* Interrupt mode IO operation *
<>	144:ef7eb2e8f9f7	62	===================================
<>	144:ef7eb2e8f9f7	63	[..]
<>	144:ef7eb2e8f9f7	64	(+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
<>	144:ef7eb2e8f9f7	65	(+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	66	add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<>	144:ef7eb2e8f9f7	67	(+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	68	add his own code by customization of function pointer HAL_USART_TxCpltCallback
<>	144:ef7eb2e8f9f7	69	(+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
<>	144:ef7eb2e8f9f7	70	(+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	71	add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<>	144:ef7eb2e8f9f7	72	(+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	73	add his own code by customization of function pointer HAL_USART_RxCpltCallback
<>	144:ef7eb2e8f9f7	74	(+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<>	144:ef7eb2e8f9f7	75	add his own code by customization of function pointer HAL_USART_ErrorCallback
<>	144:ef7eb2e8f9f7	76
<>	144:ef7eb2e8f9f7	77	* DMA mode IO operation *
<>	144:ef7eb2e8f9f7	78	==============================
<>	144:ef7eb2e8f9f7	79	[..]
<>	144:ef7eb2e8f9f7	80	(+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
<>	144:ef7eb2e8f9f7	81	(+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	82	add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<>	144:ef7eb2e8f9f7	83	(+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	84	add his own code by customization of function pointer HAL_USART_TxCpltCallback
<>	144:ef7eb2e8f9f7	85	(+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
<>	144:ef7eb2e8f9f7	86	(+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	87	add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<>	144:ef7eb2e8f9f7	88	(+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<>	144:ef7eb2e8f9f7	89	add his own code by customization of function pointer HAL_USART_RxCpltCallback
<>	144:ef7eb2e8f9f7	90	(+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<>	144:ef7eb2e8f9f7	91	add his own code by customization of function pointer HAL_USART_ErrorCallback
<>	144:ef7eb2e8f9f7	92	(+) Pause the DMA Transfer using HAL_USART_DMAPause()
<>	144:ef7eb2e8f9f7	93	(+) Resume the DMA Transfer using HAL_USART_DMAResume()
<>	144:ef7eb2e8f9f7	94	(+) Stop the DMA Transfer using HAL_USART_DMAStop()
<>	144:ef7eb2e8f9f7	95
<>	144:ef7eb2e8f9f7	96	* USART HAL driver macros list *
<>	144:ef7eb2e8f9f7	97	=============================================
<>	144:ef7eb2e8f9f7	98	[..]
<>	144:ef7eb2e8f9f7	99	Below the list of most used macros in USART HAL driver.
<>	144:ef7eb2e8f9f7	100
<>	144:ef7eb2e8f9f7	101	(+) __HAL_USART_ENABLE: Enable the USART peripheral
<>	144:ef7eb2e8f9f7	102	(+) __HAL_USART_DISABLE: Disable the USART peripheral
<>	144:ef7eb2e8f9f7	103	(+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
<>	144:ef7eb2e8f9f7	104	(+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
<>	144:ef7eb2e8f9f7	105	(+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
<>	144:ef7eb2e8f9f7	106	(+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
<>	144:ef7eb2e8f9f7	107
<>	144:ef7eb2e8f9f7	108	[..]
<>	144:ef7eb2e8f9f7	109	(@) You can refer to the USART HAL driver header file for more useful macros
<>	144:ef7eb2e8f9f7	110
<>	144:ef7eb2e8f9f7	111	@endverbatim
<>	144:ef7eb2e8f9f7	112	******************************************************************************
<>	144:ef7eb2e8f9f7	113	* @attention
<>	144:ef7eb2e8f9f7	114	*
<>	144:ef7eb2e8f9f7	115	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	116	*
<>	144:ef7eb2e8f9f7	117	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	118	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	119	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	120	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	121	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	122	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	123	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	124	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	125	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	126	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	127	*
<>	144:ef7eb2e8f9f7	128	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	129	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	130	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	131	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	132	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	133	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	134	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	135	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	136	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	137	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	138	*
<>	144:ef7eb2e8f9f7	139	******************************************************************************
<>	144:ef7eb2e8f9f7	140	*/
<>	144:ef7eb2e8f9f7	141
<>	144:ef7eb2e8f9f7	142	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	143	#include "stm32f0xx_hal.h"
<>	144:ef7eb2e8f9f7	144
<>	144:ef7eb2e8f9f7	145	/** @addtogroup STM32F0xx_HAL_Driver
<>	144:ef7eb2e8f9f7	146	* @{
<>	144:ef7eb2e8f9f7	147	*/
<>	144:ef7eb2e8f9f7	148
<>	144:ef7eb2e8f9f7	149	/** @defgroup USART USART
<>	144:ef7eb2e8f9f7	150	* @brief HAL USART Synchronous module driver
<>	144:ef7eb2e8f9f7	151	* @{
<>	144:ef7eb2e8f9f7	152	*/
<>	144:ef7eb2e8f9f7	153
<>	144:ef7eb2e8f9f7	154	#ifdef HAL_USART_MODULE_ENABLED
<>	144:ef7eb2e8f9f7	155
<>	144:ef7eb2e8f9f7	156	/* Private typedef -----------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	157	/* Private define ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	158	/** @defgroup USART_Private_Constants USART Private Constants
<>	144:ef7eb2e8f9f7	159	* @{
<>	144:ef7eb2e8f9f7	160	*/
<>	144:ef7eb2e8f9f7	161	#define USART_DUMMY_DATA ((uint16_t) 0xFFFF) /!< USART transmitted dummy data /
<>	144:ef7eb2e8f9f7	162	#define USART_TEACK_REACK_TIMEOUT ((uint32_t) 1000) /!< USART TX or RX enable acknowledge time-out value /
<>	144:ef7eb2e8f9f7	163	#define USART_TXDMA_TIMEOUTVALUE 22000
<>	144:ef7eb2e8f9f7	164	#define USART_TIMEOUT_VALUE 22000
<>	144:ef7eb2e8f9f7	165	#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| \
<>	144:ef7eb2e8f9f7	166	USART_CR1_TE \| USART_CR1_RE \| USART_CR1_OVER8)) /!< USART CR1 fields of parameters set by USART_SetConfig API /
<>	144:ef7eb2e8f9f7	167	#define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA \| USART_CR2_CPOL \| \
<>	144:ef7eb2e8f9f7	168	USART_CR2_CLKEN \| USART_CR2_LBCL \| USART_CR2_STOP)) /!< USART CR2 fields of parameters set by USART_SetConfig API /
<>	144:ef7eb2e8f9f7	169	/**
<>	144:ef7eb2e8f9f7	170	* @}
<>	144:ef7eb2e8f9f7	171	*/
<>	144:ef7eb2e8f9f7	172
<>	144:ef7eb2e8f9f7	173	/* Private macros ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	174	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	175	/* Private function prototypes -----------------------------------------------*/
<>	144:ef7eb2e8f9f7	176	/** @addtogroup USART_Private_Functions USART Private Functions
<>	144:ef7eb2e8f9f7	177	* @{
<>	144:ef7eb2e8f9f7	178	*/
<>	144:ef7eb2e8f9f7	179	static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	180	static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	181	static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	182	static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	183	static void USART_DMAError(DMA_HandleTypeDef *hdma);
<>	144:ef7eb2e8f9f7	184	static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	185	static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	186	static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	187	static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	188	static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	189	static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	190	static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
<>	144:ef7eb2e8f9f7	191	/**
<>	144:ef7eb2e8f9f7	192	* @}
<>	144:ef7eb2e8f9f7	193	*/
<>	144:ef7eb2e8f9f7	194
<>	144:ef7eb2e8f9f7	195	/* Exported functions --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	196
<>	144:ef7eb2e8f9f7	197	/** @defgroup USART_Exported_Functions USART Exported Functions
<>	144:ef7eb2e8f9f7	198	* @{
<>	144:ef7eb2e8f9f7	199	*/
<>	144:ef7eb2e8f9f7	200
<>	144:ef7eb2e8f9f7	201	/** @defgroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	202	* @brief Initialization and Configuration functions
<>	144:ef7eb2e8f9f7	203	*
<>	144:ef7eb2e8f9f7	204	@verbatim
<>	144:ef7eb2e8f9f7	205	===============================================================================
<>	144:ef7eb2e8f9f7	206	##### Initialization and Configuration functions #####
<>	144:ef7eb2e8f9f7	207	===============================================================================
<>	144:ef7eb2e8f9f7	208	[..]
<>	144:ef7eb2e8f9f7	209	This subsection provides a set of functions allowing to initialize the USART
<>	144:ef7eb2e8f9f7	210	in asynchronous and in synchronous modes.
<>	144:ef7eb2e8f9f7	211	(+) For the asynchronous mode only these parameters can be configured:
<>	144:ef7eb2e8f9f7	212	(++) Baud Rate
<>	144:ef7eb2e8f9f7	213	(++) Word Length
<>	144:ef7eb2e8f9f7	214	(++) Stop Bit
<>	144:ef7eb2e8f9f7	215	(++) Parity
<>	144:ef7eb2e8f9f7	216	(++) USART polarity
<>	144:ef7eb2e8f9f7	217	(++) USART phase
<>	144:ef7eb2e8f9f7	218	(++) USART LastBit
<>	144:ef7eb2e8f9f7	219	(++) Receiver/transmitter modes
<>	144:ef7eb2e8f9f7	220
<>	144:ef7eb2e8f9f7	221	[..]
<>	144:ef7eb2e8f9f7	222	The HAL_USART_Init() function follows the USART synchronous configuration
<>	144:ef7eb2e8f9f7	223	procedure (details for the procedure are available in reference manual).
<>	144:ef7eb2e8f9f7	224
<>	144:ef7eb2e8f9f7	225	@endverbatim
<>	144:ef7eb2e8f9f7	226	* @{
<>	144:ef7eb2e8f9f7	227	*/
<>	144:ef7eb2e8f9f7	228
<>	144:ef7eb2e8f9f7	229	/*
<>	144:ef7eb2e8f9f7	230	Additional Table: If the parity is enabled, then the MSB bit of the data written
<>	144:ef7eb2e8f9f7	231	in the data register is transmitted but is changed by the parity bit.
<>	144:ef7eb2e8f9f7	232	According to device capability (support or not of 7-bit word length),
<>	144:ef7eb2e8f9f7	233	frame length is either defined by the M bit (8-bits or 9-bits)
<>	144:ef7eb2e8f9f7	234	or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
<>	144:ef7eb2e8f9f7	235	Possible USART frame formats are as listed in the following table:
<>	144:ef7eb2e8f9f7	236
<>	144:ef7eb2e8f9f7	237	Table 1. USART frame format.
<>	144:ef7eb2e8f9f7	238	+-----------------------------------------------------------------------+
<>	144:ef7eb2e8f9f7	239	\| M bit \| PCE bit \| USART frame \|
<>	144:ef7eb2e8f9f7	240	\|-------------------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	241	\| 0 \| 0 \| \| SB \| 8-bit data \| STB \| \|
<>	144:ef7eb2e8f9f7	242	\|-------------------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	243	\| 0 \| 1 \| \| SB \| 7-bit data \| PB \| STB \| \|
<>	144:ef7eb2e8f9f7	244	\|-------------------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	245	\| 1 \| 0 \| \| SB \| 9-bit data \| STB \| \|
<>	144:ef7eb2e8f9f7	246	\|-------------------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	247	\| 1 \| 1 \| \| SB \| 8-bit data \| PB \| STB \| \|
<>	144:ef7eb2e8f9f7	248	+-----------------------------------------------------------------------+
<>	144:ef7eb2e8f9f7	249	\| M1 bit \| M0 bit \| PCE bit \| USART frame \|
<>	144:ef7eb2e8f9f7	250	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	251	\| 0 \| 0 \| 0 \| \| SB \| 8 bit data \| STB \| \|
<>	144:ef7eb2e8f9f7	252	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	253	\| 0 \| 0 \| 1 \| \| SB \| 7 bit data \| PB \| STB \| \|
<>	144:ef7eb2e8f9f7	254	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	255	\| 0 \| 1 \| 0 \| \| SB \| 9 bit data \| STB \| \|
<>	144:ef7eb2e8f9f7	256	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	257	\| 0 \| 1 \| 1 \| \| SB \| 8 bit data \| PB \| STB \| \|
<>	144:ef7eb2e8f9f7	258	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	259	\| 1 \| 0 \| 0 \| \| SB \| 7 bit data \| STB \| \|
<>	144:ef7eb2e8f9f7	260	\|---------\|---------\|-----------\|---------------------------------------\|
<>	144:ef7eb2e8f9f7	261	\| 1 \| 0 \| 1 \| \| SB \| 6 bit data \| PB \| STB \| \|
<>	144:ef7eb2e8f9f7	262	+-----------------------------------------------------------------------+
<>	144:ef7eb2e8f9f7	263
<>	144:ef7eb2e8f9f7	264	*/
<>	144:ef7eb2e8f9f7	265
<>	144:ef7eb2e8f9f7	266	/**
<>	144:ef7eb2e8f9f7	267	* @brief Initializes the USART mode according to the specified
<>	144:ef7eb2e8f9f7	268	* parameters in the USART_InitTypeDef and initialize the associated handle.
<>	144:ef7eb2e8f9f7	269	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	270	* @retval HAL status
<>	144:ef7eb2e8f9f7	271	*/
<>	144:ef7eb2e8f9f7	272	HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	273	{
<>	144:ef7eb2e8f9f7	274	/* Check the USART handle allocation */
<>	144:ef7eb2e8f9f7	275	if(husart == NULL)
<>	144:ef7eb2e8f9f7	276	{
<>	144:ef7eb2e8f9f7	277	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	278	}
<>	144:ef7eb2e8f9f7	279
<>	144:ef7eb2e8f9f7	280	/* Check the parameters */
<>	144:ef7eb2e8f9f7	281	assert_param(IS_USART_INSTANCE(husart->Instance));
<>	144:ef7eb2e8f9f7	282
<>	144:ef7eb2e8f9f7	283	if(husart->State == HAL_USART_STATE_RESET)
<>	144:ef7eb2e8f9f7	284	{
<>	144:ef7eb2e8f9f7	285	/* Allocate lock resource and initialize it */
<>	144:ef7eb2e8f9f7	286	husart->Lock = HAL_UNLOCKED;
<>	144:ef7eb2e8f9f7	287
<>	144:ef7eb2e8f9f7	288	/* Init the low level hardware : GPIO, CLOCK */
<>	144:ef7eb2e8f9f7	289	HAL_USART_MspInit(husart);
<>	144:ef7eb2e8f9f7	290	}
<>	144:ef7eb2e8f9f7	291
<>	144:ef7eb2e8f9f7	292	husart->State = HAL_USART_STATE_BUSY;
<>	144:ef7eb2e8f9f7	293
<>	144:ef7eb2e8f9f7	294	/* Disable the Peripheral */
<>	144:ef7eb2e8f9f7	295	__HAL_USART_DISABLE(husart);
<>	144:ef7eb2e8f9f7	296
<>	144:ef7eb2e8f9f7	297	/* Set the Usart Communication parameters */
<>	144:ef7eb2e8f9f7	298	if (USART_SetConfig(husart) == HAL_ERROR)
<>	144:ef7eb2e8f9f7	299	{
<>	144:ef7eb2e8f9f7	300	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	301	}
<>	144:ef7eb2e8f9f7	302
<>	144:ef7eb2e8f9f7	303	/* In Synchronous mode, the following bits must be kept cleared:
<>	144:ef7eb2e8f9f7	304	- LINEN bit (if LIN is supported) in the USART_CR2 register
<>	144:ef7eb2e8f9f7	305	- SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
<>	144:ef7eb2e8f9f7	306	#if defined (USART_CR2_LINEN)
<>	144:ef7eb2e8f9f7	307	husart->Instance->CR2 &= ~USART_CR2_LINEN;
<>	144:ef7eb2e8f9f7	308	#endif
<>	144:ef7eb2e8f9f7	309	#if defined (USART_CR3_SCEN)
<>	144:ef7eb2e8f9f7	310	#if defined (USART_CR3_IREN)
<>	144:ef7eb2e8f9f7	311	husart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
<>	144:ef7eb2e8f9f7	312	#else
<>	144:ef7eb2e8f9f7	313	husart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL);
<>	144:ef7eb2e8f9f7	314	#endif
<>	144:ef7eb2e8f9f7	315	#else
<>	144:ef7eb2e8f9f7	316	#if defined (USART_CR3_IREN)
<>	144:ef7eb2e8f9f7	317	husart->Instance->CR3 &= ~(USART_CR3_HDSEL \| USART_CR3_IREN);
<>	144:ef7eb2e8f9f7	318	#else
<>	144:ef7eb2e8f9f7	319	husart->Instance->CR3 &= ~(USART_CR3_HDSEL);
<>	144:ef7eb2e8f9f7	320	#endif
<>	144:ef7eb2e8f9f7	321	#endif
<>	144:ef7eb2e8f9f7	322
<>	144:ef7eb2e8f9f7	323	/* Enable the Peripheral */
<>	144:ef7eb2e8f9f7	324	__HAL_USART_ENABLE(husart);
<>	144:ef7eb2e8f9f7	325
<>	144:ef7eb2e8f9f7	326	/* TEACK and/or REACK to check before moving husart->State to Ready */
<>	144:ef7eb2e8f9f7	327	return (USART_CheckIdleState(husart));
<>	144:ef7eb2e8f9f7	328	}
<>	144:ef7eb2e8f9f7	329
<>	144:ef7eb2e8f9f7	330	/**
<>	144:ef7eb2e8f9f7	331	* @brief DeInitialize the USART peripheral.
<>	144:ef7eb2e8f9f7	332	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	333	* @retval HAL status
<>	144:ef7eb2e8f9f7	334	*/
<>	144:ef7eb2e8f9f7	335	HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	336	{
<>	144:ef7eb2e8f9f7	337	/* Check the USART handle allocation */
<>	144:ef7eb2e8f9f7	338	if(husart == NULL)
<>	144:ef7eb2e8f9f7	339	{
<>	144:ef7eb2e8f9f7	340	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	341	}
<>	144:ef7eb2e8f9f7	342
<>	144:ef7eb2e8f9f7	343	/* Check the parameters */
<>	144:ef7eb2e8f9f7	344	assert_param(IS_USART_INSTANCE(husart->Instance));
<>	144:ef7eb2e8f9f7	345
<>	144:ef7eb2e8f9f7	346	husart->State = HAL_USART_STATE_BUSY;
<>	144:ef7eb2e8f9f7	347
<>	144:ef7eb2e8f9f7	348	husart->Instance->CR1 = 0x0;
<>	144:ef7eb2e8f9f7	349	husart->Instance->CR2 = 0x0;
<>	144:ef7eb2e8f9f7	350	husart->Instance->CR3 = 0x0;
<>	144:ef7eb2e8f9f7	351
<>	144:ef7eb2e8f9f7	352	/* DeInit the low level hardware */
<>	144:ef7eb2e8f9f7	353	HAL_USART_MspDeInit(husart);
<>	144:ef7eb2e8f9f7	354
<>	144:ef7eb2e8f9f7	355	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	356	husart->State = HAL_USART_STATE_RESET;
<>	144:ef7eb2e8f9f7	357
<>	144:ef7eb2e8f9f7	358	/* Process Unlock */
<>	144:ef7eb2e8f9f7	359	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	360
<>	144:ef7eb2e8f9f7	361	return HAL_OK;
<>	144:ef7eb2e8f9f7	362	}
<>	144:ef7eb2e8f9f7	363
<>	144:ef7eb2e8f9f7	364	/**
<>	144:ef7eb2e8f9f7	365	* @brief Initialize the USART MSP.
<>	144:ef7eb2e8f9f7	366	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	367	* @retval None
<>	144:ef7eb2e8f9f7	368	*/
<>	144:ef7eb2e8f9f7	369	__weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	370	{
<>	144:ef7eb2e8f9f7	371	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	372	UNUSED(husart);
<>	144:ef7eb2e8f9f7	373
<>	144:ef7eb2e8f9f7	374	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	375	the HAL_USART_MspInit can be implemented in the user file
<>	144:ef7eb2e8f9f7	376	*/
<>	144:ef7eb2e8f9f7	377	}
<>	144:ef7eb2e8f9f7	378
<>	144:ef7eb2e8f9f7	379	/**
<>	144:ef7eb2e8f9f7	380	* @brief DeInitialize the USART MSP.
<>	144:ef7eb2e8f9f7	381	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	382	* @retval None
<>	144:ef7eb2e8f9f7	383	*/
<>	144:ef7eb2e8f9f7	384	__weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	385	{
<>	144:ef7eb2e8f9f7	386	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	387	UNUSED(husart);
<>	144:ef7eb2e8f9f7	388
<>	144:ef7eb2e8f9f7	389	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	390	the HAL_USART_MspDeInit can be implemented in the user file
<>	144:ef7eb2e8f9f7	391	*/
<>	144:ef7eb2e8f9f7	392	}
<>	144:ef7eb2e8f9f7	393
<>	144:ef7eb2e8f9f7	394	/**
<>	144:ef7eb2e8f9f7	395	* @}
<>	144:ef7eb2e8f9f7	396	*/
<>	144:ef7eb2e8f9f7	397
<>	144:ef7eb2e8f9f7	398	/** @defgroup USART_Exported_Functions_Group2 IO operation functions
<>	144:ef7eb2e8f9f7	399	* @brief USART Transmit and Receive functions
<>	144:ef7eb2e8f9f7	400	*
<>	144:ef7eb2e8f9f7	401	@verbatim
<>	144:ef7eb2e8f9f7	402	===============================================================================
<>	144:ef7eb2e8f9f7	403	##### IO operation functions #####
<>	144:ef7eb2e8f9f7	404	===============================================================================
<>	144:ef7eb2e8f9f7	405	[..] This subsection provides a set of functions allowing to manage the USART synchronous
<>	144:ef7eb2e8f9f7	406	data transfers.
<>	144:ef7eb2e8f9f7	407
<>	144:ef7eb2e8f9f7	408	[..] The USART supports master mode only: it cannot receive or send data related to an input
<>	144:ef7eb2e8f9f7	409	clock (SCLK is always an output).
<>	144:ef7eb2e8f9f7	410
<>	144:ef7eb2e8f9f7	411	(#) There are two modes of transfer:
<>	144:ef7eb2e8f9f7	412	(++) Blocking mode: The communication is performed in polling mode.
<>	144:ef7eb2e8f9f7	413	The HAL status of all data processing is returned by the same function
<>	144:ef7eb2e8f9f7	414	after finishing transfer.
<>	144:ef7eb2e8f9f7	415	(++) No-Blocking mode: The communication is performed using Interrupts
<>	144:ef7eb2e8f9f7	416	or DMA, These APIs return the HAL status.
<>	144:ef7eb2e8f9f7	417	The end of the data processing will be indicated through the
<>	144:ef7eb2e8f9f7	418	dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
<>	144:ef7eb2e8f9f7	419	using DMA mode.
<>	144:ef7eb2e8f9f7	420	The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks
<>	144:ef7eb2e8f9f7	421	will be executed respectively at the end of the transmit or Receive process
<>	144:ef7eb2e8f9f7	422	The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected
<>	144:ef7eb2e8f9f7	423
<>	144:ef7eb2e8f9f7	424	(#) Blocking mode APIs are :
<>	144:ef7eb2e8f9f7	425	(++) HAL_USART_Transmit()in simplex mode
<>	144:ef7eb2e8f9f7	426	(++) HAL_USART_Receive() in full duplex receive only
<>	144:ef7eb2e8f9f7	427	(++) HAL_USART_TransmitReceive() in full duplex mode
<>	144:ef7eb2e8f9f7	428
<>	144:ef7eb2e8f9f7	429	(#) No-Blocking mode APIs with Interrupt are :
<>	144:ef7eb2e8f9f7	430	(++) HAL_USART_Transmit_IT()in simplex mode
<>	144:ef7eb2e8f9f7	431	(++) HAL_USART_Receive_IT() in full duplex receive only
<>	144:ef7eb2e8f9f7	432	(++) HAL_USART_TransmitReceive_IT()in full duplex mode
<>	144:ef7eb2e8f9f7	433	(++) HAL_USART_IRQHandler()
<>	144:ef7eb2e8f9f7	434
<>	144:ef7eb2e8f9f7	435	(#) No-Blocking mode APIs with DMA are :
<>	144:ef7eb2e8f9f7	436	(++) HAL_USART_Transmit_DMA()in simplex mode
<>	144:ef7eb2e8f9f7	437	(++) HAL_USART_Receive_DMA() in full duplex receive only
<>	144:ef7eb2e8f9f7	438	(++) HAL_USART_TransmitReceive_DMA() in full duplex mode
<>	144:ef7eb2e8f9f7	439	(++) HAL_USART_DMAPause()
<>	144:ef7eb2e8f9f7	440	(++) HAL_USART_DMAResume()
<>	144:ef7eb2e8f9f7	441	(++) HAL_USART_DMAStop()
<>	144:ef7eb2e8f9f7	442
<>	144:ef7eb2e8f9f7	443	(#) A set of Transfer Complete Callbacks are provided in No-Blocking mode:
<>	144:ef7eb2e8f9f7	444	(++) HAL_USART_TxCpltCallback()
<>	144:ef7eb2e8f9f7	445	(++) HAL_USART_RxCpltCallback()
<>	144:ef7eb2e8f9f7	446	(++) HAL_USART_TxHalfCpltCallback()
<>	144:ef7eb2e8f9f7	447	(++) HAL_USART_RxHalfCpltCallback()
<>	144:ef7eb2e8f9f7	448	(++) HAL_USART_ErrorCallback()
<>	144:ef7eb2e8f9f7	449	(++) HAL_USART_TxRxCpltCallback()
<>	144:ef7eb2e8f9f7	450
<>	144:ef7eb2e8f9f7	451	@endverbatim
<>	144:ef7eb2e8f9f7	452	* @{
<>	144:ef7eb2e8f9f7	453	*/
<>	144:ef7eb2e8f9f7	454
<>	144:ef7eb2e8f9f7	455	/**
<>	144:ef7eb2e8f9f7	456	* @brief Simplex send an amount of data in blocking mode.
<>	144:ef7eb2e8f9f7	457	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	458	* @param pTxData: Pointer to data buffer.
<>	144:ef7eb2e8f9f7	459	* @param Size: Amount of data to be sent.
<>	144:ef7eb2e8f9f7	460	* @param Timeout: Timeout duration.
<>	144:ef7eb2e8f9f7	461	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	462	* address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	463	* (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	464	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<>	144:ef7eb2e8f9f7	465	* @retval HAL status
<>	144:ef7eb2e8f9f7	466	*/
<>	144:ef7eb2e8f9f7	467	HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	468	{
<>	144:ef7eb2e8f9f7	469	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	470
<>	144:ef7eb2e8f9f7	471	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	472	{
<>	144:ef7eb2e8f9f7	473	if((pTxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	474	{
<>	144:ef7eb2e8f9f7	475	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	476	}
<>	144:ef7eb2e8f9f7	477
<>	144:ef7eb2e8f9f7	478	/* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	479	should be aligned on a u16 frontier, as data to be filled into TDR will be
<>	144:ef7eb2e8f9f7	480	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	481	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	482	{
<>	144:ef7eb2e8f9f7	483	if((((uint32_t)pTxData)&1) != 0)
<>	144:ef7eb2e8f9f7	484	{
<>	144:ef7eb2e8f9f7	485	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	486	}
<>	144:ef7eb2e8f9f7	487	}
<>	144:ef7eb2e8f9f7	488
<>	144:ef7eb2e8f9f7	489	/* Process Locked */
<>	144:ef7eb2e8f9f7	490	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	491
<>	144:ef7eb2e8f9f7	492	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	493	husart->State = HAL_USART_STATE_BUSY_TX;
<>	144:ef7eb2e8f9f7	494
<>	144:ef7eb2e8f9f7	495	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	496	husart->TxXferCount = Size;
<>	144:ef7eb2e8f9f7	497
<>	144:ef7eb2e8f9f7	498	/* Check the remaining data to be sent */
<>	144:ef7eb2e8f9f7	499	while(husart->TxXferCount > 0)
<>	144:ef7eb2e8f9f7	500	{
<>	144:ef7eb2e8f9f7	501	husart->TxXferCount--;
<>	144:ef7eb2e8f9f7	502	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	503	{
<>	144:ef7eb2e8f9f7	504	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	505	}
<>	144:ef7eb2e8f9f7	506	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	507	{
<>	144:ef7eb2e8f9f7	508	tmp = (uint16_t*) pTxData;
<>	144:ef7eb2e8f9f7	509	husart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<>	144:ef7eb2e8f9f7	510	pTxData += 2;
<>	144:ef7eb2e8f9f7	511	}
<>	144:ef7eb2e8f9f7	512	else
<>	144:ef7eb2e8f9f7	513	{
<>	144:ef7eb2e8f9f7	514	husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFF);
<>	144:ef7eb2e8f9f7	515	}
<>	144:ef7eb2e8f9f7	516	}
<>	144:ef7eb2e8f9f7	517
<>	144:ef7eb2e8f9f7	518	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	519	{
<>	144:ef7eb2e8f9f7	520	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	521	}
<>	144:ef7eb2e8f9f7	522
<>	144:ef7eb2e8f9f7	523	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	524
<>	144:ef7eb2e8f9f7	525	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	526	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	527
<>	144:ef7eb2e8f9f7	528	return HAL_OK;
<>	144:ef7eb2e8f9f7	529	}
<>	144:ef7eb2e8f9f7	530	else
<>	144:ef7eb2e8f9f7	531	{
<>	144:ef7eb2e8f9f7	532	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	533	}
<>	144:ef7eb2e8f9f7	534	}
<>	144:ef7eb2e8f9f7	535
<>	144:ef7eb2e8f9f7	536	/**
<>	144:ef7eb2e8f9f7	537	* @brief Receive an amount of data in blocking mode.
<>	144:ef7eb2e8f9f7	538	* @note To receive synchronous data, dummy data are simultaneously transmitted.
<>	144:ef7eb2e8f9f7	539	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	540	* @param pRxData: Pointer to data buffer.
<>	144:ef7eb2e8f9f7	541	* @param Size: Amount of data to be received.
<>	144:ef7eb2e8f9f7	542	* @param Timeout: Timeout duration.
<>	144:ef7eb2e8f9f7	543	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	544	* address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	545	* (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	546	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<>	144:ef7eb2e8f9f7	547	* @retval HAL status
<>	144:ef7eb2e8f9f7	548	*/
<>	144:ef7eb2e8f9f7	549	HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	550	{
<>	144:ef7eb2e8f9f7	551	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	552	uint16_t uhMask;
<>	144:ef7eb2e8f9f7	553
<>	144:ef7eb2e8f9f7	554	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	555	{
<>	144:ef7eb2e8f9f7	556	if((pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	557	{
<>	144:ef7eb2e8f9f7	558	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	559	}
<>	144:ef7eb2e8f9f7	560
<>	144:ef7eb2e8f9f7	561	/* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	562	should be aligned on a u16 frontier, as data to be received from RDR will be
<>	144:ef7eb2e8f9f7	563	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	564	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	565	{
<>	144:ef7eb2e8f9f7	566	if((((uint32_t)pRxData)&1) != 0)
<>	144:ef7eb2e8f9f7	567	{
<>	144:ef7eb2e8f9f7	568	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	569	}
<>	144:ef7eb2e8f9f7	570	}
<>	144:ef7eb2e8f9f7	571
<>	144:ef7eb2e8f9f7	572	/* Process Locked */
<>	144:ef7eb2e8f9f7	573	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	574
<>	144:ef7eb2e8f9f7	575	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	576	husart->State = HAL_USART_STATE_BUSY_RX;
<>	144:ef7eb2e8f9f7	577
<>	144:ef7eb2e8f9f7	578	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	579	husart->RxXferCount = Size;
<>	144:ef7eb2e8f9f7	580
<>	144:ef7eb2e8f9f7	581	/* Computation of USART mask to apply to RDR register */
<>	144:ef7eb2e8f9f7	582	USART_MASK_COMPUTATION(husart);
<>	144:ef7eb2e8f9f7	583	uhMask = husart->Mask;
<>	144:ef7eb2e8f9f7	584
<>	144:ef7eb2e8f9f7	585	/* as long as data have to be received */
<>	144:ef7eb2e8f9f7	586	while(husart->RxXferCount > 0)
<>	144:ef7eb2e8f9f7	587	{
<>	144:ef7eb2e8f9f7	588	husart->RxXferCount--;
<>	144:ef7eb2e8f9f7	589
<>	144:ef7eb2e8f9f7	590	/* Wait until TC flag is set to send dummy byte in order to generate the
<>	144:ef7eb2e8f9f7	591	* clock for the slave to send data.
<>	144:ef7eb2e8f9f7	592	* Whatever the frame length (7, 8 or 9-bit long), the same dummy value
<>	144:ef7eb2e8f9f7	593	* can be written for all the cases. */
<>	144:ef7eb2e8f9f7	594	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	595	{
<>	144:ef7eb2e8f9f7	596	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	597	}
<>	144:ef7eb2e8f9f7	598	husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FF);
<>	144:ef7eb2e8f9f7	599
<>	144:ef7eb2e8f9f7	600	/* Wait for RXNE Flag */
<>	144:ef7eb2e8f9f7	601	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	602	{
<>	144:ef7eb2e8f9f7	603	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	604	}
<>	144:ef7eb2e8f9f7	605
<>	144:ef7eb2e8f9f7	606	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	607	{
<>	144:ef7eb2e8f9f7	608	tmp = (uint16_t*) pRxData ;
<>	144:ef7eb2e8f9f7	609	*tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<>	144:ef7eb2e8f9f7	610	pRxData +=2;
<>	144:ef7eb2e8f9f7	611	}
<>	144:ef7eb2e8f9f7	612	else
<>	144:ef7eb2e8f9f7	613	{
<>	144:ef7eb2e8f9f7	614	*pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	615	}
<>	144:ef7eb2e8f9f7	616	}
<>	144:ef7eb2e8f9f7	617
<>	144:ef7eb2e8f9f7	618	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	619
<>	144:ef7eb2e8f9f7	620	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	621	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	622
<>	144:ef7eb2e8f9f7	623	return HAL_OK;
<>	144:ef7eb2e8f9f7	624	}
<>	144:ef7eb2e8f9f7	625	else
<>	144:ef7eb2e8f9f7	626	{
<>	144:ef7eb2e8f9f7	627	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	628	}
<>	144:ef7eb2e8f9f7	629	}
<>	144:ef7eb2e8f9f7	630
<>	144:ef7eb2e8f9f7	631	/**
<>	144:ef7eb2e8f9f7	632	* @brief Full-Duplex Send and Receive an amount of data in blocking mode.
<>	144:ef7eb2e8f9f7	633	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	634	* @param pTxData: pointer to TX data buffer.
<>	144:ef7eb2e8f9f7	635	* @param pRxData: pointer to RX data buffer.
<>	144:ef7eb2e8f9f7	636	* @param Size: amount of data to be sent (same amount to be received).
<>	144:ef7eb2e8f9f7	637	* @param Timeout: Timeout duration.
<>	144:ef7eb2e8f9f7	638	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	639	* address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	640	* (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	641	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<>	144:ef7eb2e8f9f7	642	* @retval HAL status
<>	144:ef7eb2e8f9f7	643	*/
<>	144:ef7eb2e8f9f7	644	HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	645	{
<>	144:ef7eb2e8f9f7	646	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	647	uint16_t uhMask;
<>	144:ef7eb2e8f9f7	648
<>	144:ef7eb2e8f9f7	649	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	650	{
<>	144:ef7eb2e8f9f7	651	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	652	{
<>	144:ef7eb2e8f9f7	653	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	654	}
<>	144:ef7eb2e8f9f7	655
<>	144:ef7eb2e8f9f7	656	/* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<>	144:ef7eb2e8f9f7	657	should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be
<>	144:ef7eb2e8f9f7	658	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	659	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	660	{
<>	144:ef7eb2e8f9f7	661	if(((((uint32_t)pTxData)&1) != 0) \|\| ((((uint32_t)pRxData)&1) != 0))
<>	144:ef7eb2e8f9f7	662	{
<>	144:ef7eb2e8f9f7	663	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	664	}
<>	144:ef7eb2e8f9f7	665	}
<>	144:ef7eb2e8f9f7	666
<>	144:ef7eb2e8f9f7	667	/* Process Locked */
<>	144:ef7eb2e8f9f7	668	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	669
<>	144:ef7eb2e8f9f7	670	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	671	husart->State = HAL_USART_STATE_BUSY_RX;
<>	144:ef7eb2e8f9f7	672
<>	144:ef7eb2e8f9f7	673	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	674	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	675	husart->TxXferCount = Size;
<>	144:ef7eb2e8f9f7	676	husart->RxXferCount = Size;
<>	144:ef7eb2e8f9f7	677
<>	144:ef7eb2e8f9f7	678	/* Computation of USART mask to apply to RDR register */
<>	144:ef7eb2e8f9f7	679	USART_MASK_COMPUTATION(husart);
<>	144:ef7eb2e8f9f7	680	uhMask = husart->Mask;
<>	144:ef7eb2e8f9f7	681
<>	144:ef7eb2e8f9f7	682	/* Check the remain data to be sent */
<>	144:ef7eb2e8f9f7	683	while(husart->TxXferCount > 0)
<>	144:ef7eb2e8f9f7	684	{
<>	144:ef7eb2e8f9f7	685	husart->TxXferCount--;
<>	144:ef7eb2e8f9f7	686	husart->RxXferCount--;
<>	144:ef7eb2e8f9f7	687
<>	144:ef7eb2e8f9f7	688	/* Wait until TC flag is set to send data */
<>	144:ef7eb2e8f9f7	689	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	690	{
<>	144:ef7eb2e8f9f7	691	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	692	}
<>	144:ef7eb2e8f9f7	693	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	694	{
<>	144:ef7eb2e8f9f7	695	tmp = (uint16_t*) pTxData;
<>	144:ef7eb2e8f9f7	696	husart->Instance->TDR = (*tmp & uhMask);
<>	144:ef7eb2e8f9f7	697	pTxData += 2;
<>	144:ef7eb2e8f9f7	698	}
<>	144:ef7eb2e8f9f7	699	else
<>	144:ef7eb2e8f9f7	700	{
<>	144:ef7eb2e8f9f7	701	husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	702	}
<>	144:ef7eb2e8f9f7	703
<>	144:ef7eb2e8f9f7	704	/* Wait for RXNE Flag */
<>	144:ef7eb2e8f9f7	705	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
<>	144:ef7eb2e8f9f7	706	{
<>	144:ef7eb2e8f9f7	707	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	708	}
<>	144:ef7eb2e8f9f7	709
<>	144:ef7eb2e8f9f7	710	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	711	{
<>	144:ef7eb2e8f9f7	712	tmp = (uint16_t*) pRxData ;
<>	144:ef7eb2e8f9f7	713	*tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<>	144:ef7eb2e8f9f7	714	pRxData +=2;
<>	144:ef7eb2e8f9f7	715	}
<>	144:ef7eb2e8f9f7	716	else
<>	144:ef7eb2e8f9f7	717	{
<>	144:ef7eb2e8f9f7	718	*pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	719	}
<>	144:ef7eb2e8f9f7	720	}
<>	144:ef7eb2e8f9f7	721
<>	144:ef7eb2e8f9f7	722	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	723
<>	144:ef7eb2e8f9f7	724	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	725	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	726
<>	144:ef7eb2e8f9f7	727	return HAL_OK;
<>	144:ef7eb2e8f9f7	728	}
<>	144:ef7eb2e8f9f7	729	else
<>	144:ef7eb2e8f9f7	730	{
<>	144:ef7eb2e8f9f7	731	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	732	}
<>	144:ef7eb2e8f9f7	733	}
<>	144:ef7eb2e8f9f7	734
<>	144:ef7eb2e8f9f7	735	/**
<>	144:ef7eb2e8f9f7	736	* @brief Send an amount of data in interrupt mode.
<>	144:ef7eb2e8f9f7	737	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	738	* @param pTxData: pointer to data buffer.
<>	144:ef7eb2e8f9f7	739	* @param Size: amount of data to be sent.
<>	144:ef7eb2e8f9f7	740	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	741	* address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	742	* (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	743	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<>	144:ef7eb2e8f9f7	744	* @retval HAL status
<>	144:ef7eb2e8f9f7	745	*/
<>	144:ef7eb2e8f9f7	746	HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	747	{
<>	144:ef7eb2e8f9f7	748	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	749	{
<>	144:ef7eb2e8f9f7	750	if((pTxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	751	{
<>	144:ef7eb2e8f9f7	752	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	753	}
<>	144:ef7eb2e8f9f7	754
<>	144:ef7eb2e8f9f7	755	/* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	756	should be aligned on a u16 frontier, as data to be filled into TDR will be
<>	144:ef7eb2e8f9f7	757	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	758	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	759	{
<>	144:ef7eb2e8f9f7	760	if((((uint32_t)pTxData)&1) != 0)
<>	144:ef7eb2e8f9f7	761	{
<>	144:ef7eb2e8f9f7	762	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	763	}
<>	144:ef7eb2e8f9f7	764	}
<>	144:ef7eb2e8f9f7	765
<>	144:ef7eb2e8f9f7	766	/* Process Locked */
<>	144:ef7eb2e8f9f7	767	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	768
<>	144:ef7eb2e8f9f7	769	husart->pTxBuffPtr = pTxData;
<>	144:ef7eb2e8f9f7	770	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	771	husart->TxXferCount = Size;
<>	144:ef7eb2e8f9f7	772
<>	144:ef7eb2e8f9f7	773	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	774	husart->State = HAL_USART_STATE_BUSY_TX;
<>	144:ef7eb2e8f9f7	775
<>	144:ef7eb2e8f9f7	776	/* The USART Error Interrupts: (Frame error, noise error, overrun error)
<>	144:ef7eb2e8f9f7	777	are not managed by the USART Transmit Process to avoid the overrun interrupt
<>	144:ef7eb2e8f9f7	778	when the usart mode is configured for transmit and receive "USART_MODE_TX_RX"
<>	144:ef7eb2e8f9f7	779	to benefit for the frame error and noise interrupts the usart mode should be
<>	144:ef7eb2e8f9f7	780	configured only for transmit "USART_MODE_TX" */
<>	144:ef7eb2e8f9f7	781
<>	144:ef7eb2e8f9f7	782	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	783	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	784
<>	144:ef7eb2e8f9f7	785	/* Enable the USART Transmit Data Register Empty Interrupt */
<>	144:ef7eb2e8f9f7	786	__HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	787
<>	144:ef7eb2e8f9f7	788	return HAL_OK;
<>	144:ef7eb2e8f9f7	789	}
<>	144:ef7eb2e8f9f7	790	else
<>	144:ef7eb2e8f9f7	791	{
<>	144:ef7eb2e8f9f7	792	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	793	}
<>	144:ef7eb2e8f9f7	794	}
<>	144:ef7eb2e8f9f7	795
<>	144:ef7eb2e8f9f7	796	/**
<>	144:ef7eb2e8f9f7	797	* @brief Receive an amount of data in blocking mode.
<>	144:ef7eb2e8f9f7	798	* @note To receive synchronous data, dummy data are simultaneously transmitted.
<>	144:ef7eb2e8f9f7	799	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	800	* @param pRxData: pointer to data buffer.
<>	144:ef7eb2e8f9f7	801	* @param Size: amount of data to be received.
<>	144:ef7eb2e8f9f7	802	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	803	* address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	804	* (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	805	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<>	144:ef7eb2e8f9f7	806	* @retval HAL status
<>	144:ef7eb2e8f9f7	807	*/
<>	144:ef7eb2e8f9f7	808	HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	809	{
<>	144:ef7eb2e8f9f7	810	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	811	{
<>	144:ef7eb2e8f9f7	812	if((pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	813	{
<>	144:ef7eb2e8f9f7	814	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	815	}
<>	144:ef7eb2e8f9f7	816
<>	144:ef7eb2e8f9f7	817	/* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	818	should be aligned on a u16 frontier, as data to be received from RDR will be
<>	144:ef7eb2e8f9f7	819	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	820	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	821	{
<>	144:ef7eb2e8f9f7	822	if((((uint32_t)pRxData)&1) != 0)
<>	144:ef7eb2e8f9f7	823	{
<>	144:ef7eb2e8f9f7	824	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	825	}
<>	144:ef7eb2e8f9f7	826	}
<>	144:ef7eb2e8f9f7	827
<>	144:ef7eb2e8f9f7	828	/* Process Locked */
<>	144:ef7eb2e8f9f7	829	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	830
<>	144:ef7eb2e8f9f7	831	husart->pRxBuffPtr = pRxData;
<>	144:ef7eb2e8f9f7	832	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	833	husart->RxXferCount = Size;
<>	144:ef7eb2e8f9f7	834
<>	144:ef7eb2e8f9f7	835	USART_MASK_COMPUTATION(husart);
<>	144:ef7eb2e8f9f7	836
<>	144:ef7eb2e8f9f7	837	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	838	husart->State = HAL_USART_STATE_BUSY_RX;
<>	144:ef7eb2e8f9f7	839
<>	144:ef7eb2e8f9f7	840	/* Enable the USART Parity Error Interrupt */
<>	144:ef7eb2e8f9f7	841	__HAL_USART_ENABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	842
<>	144:ef7eb2e8f9f7	843	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<>	144:ef7eb2e8f9f7	844	__HAL_USART_ENABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	845
<>	144:ef7eb2e8f9f7	846	/* Enable the USART Data Register not empty Interrupt */
<>	144:ef7eb2e8f9f7	847	__HAL_USART_ENABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	848
<>	144:ef7eb2e8f9f7	849	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	850	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	851
<>	144:ef7eb2e8f9f7	852
<>	144:ef7eb2e8f9f7	853	/* Send dummy byte in order to generate the clock for the Slave to send the next data */
<>	144:ef7eb2e8f9f7	854	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<>	144:ef7eb2e8f9f7	855	{
<>	144:ef7eb2e8f9f7	856	husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x01FF);
<>	144:ef7eb2e8f9f7	857	}
<>	144:ef7eb2e8f9f7	858	else
<>	144:ef7eb2e8f9f7	859	{
<>	144:ef7eb2e8f9f7	860	husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
<>	144:ef7eb2e8f9f7	861	}
<>	144:ef7eb2e8f9f7	862
<>	144:ef7eb2e8f9f7	863	return HAL_OK;
<>	144:ef7eb2e8f9f7	864	}
<>	144:ef7eb2e8f9f7	865	else
<>	144:ef7eb2e8f9f7	866	{
<>	144:ef7eb2e8f9f7	867	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	868	}
<>	144:ef7eb2e8f9f7	869	}
<>	144:ef7eb2e8f9f7	870
<>	144:ef7eb2e8f9f7	871	/**
<>	144:ef7eb2e8f9f7	872	* @brief Full-Duplex Send and Receive an amount of data in interrupt mode.
<>	144:ef7eb2e8f9f7	873	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	874	* @param pTxData: pointer to TX data buffer.
<>	144:ef7eb2e8f9f7	875	* @param pRxData: pointer to RX data buffer.
<>	144:ef7eb2e8f9f7	876	* @param Size: amount of data to be sent (same amount to be received).
<>	144:ef7eb2e8f9f7	877	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	878	* address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	879	* (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	880	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<>	144:ef7eb2e8f9f7	881	* @retval HAL status
<>	144:ef7eb2e8f9f7	882	*/
<>	144:ef7eb2e8f9f7	883	HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	884	{
<>	144:ef7eb2e8f9f7	885
<>	144:ef7eb2e8f9f7	886	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	887	{
<>	144:ef7eb2e8f9f7	888	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	889	{
<>	144:ef7eb2e8f9f7	890	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	891	}
<>	144:ef7eb2e8f9f7	892
<>	144:ef7eb2e8f9f7	893	/* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<>	144:ef7eb2e8f9f7	894	should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be
<>	144:ef7eb2e8f9f7	895	handled through a u16 cast. */
<>	144:ef7eb2e8f9f7	896	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	897	{
<>	144:ef7eb2e8f9f7	898	if(((((uint32_t)pTxData)&1) != 0) \|\| ((((uint32_t)pRxData)&1) != 0))
<>	144:ef7eb2e8f9f7	899	{
<>	144:ef7eb2e8f9f7	900	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	901	}
<>	144:ef7eb2e8f9f7	902	}
<>	144:ef7eb2e8f9f7	903
<>	144:ef7eb2e8f9f7	904	/* Process Locked */
<>	144:ef7eb2e8f9f7	905	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	906
<>	144:ef7eb2e8f9f7	907	husart->pRxBuffPtr = pRxData;
<>	144:ef7eb2e8f9f7	908	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	909	husart->RxXferCount = Size;
<>	144:ef7eb2e8f9f7	910	husart->pTxBuffPtr = pTxData;
<>	144:ef7eb2e8f9f7	911	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	912	husart->TxXferCount = Size;
<>	144:ef7eb2e8f9f7	913
<>	144:ef7eb2e8f9f7	914	/* Computation of USART mask to apply to RDR register */
<>	144:ef7eb2e8f9f7	915	USART_MASK_COMPUTATION(husart);
<>	144:ef7eb2e8f9f7	916
<>	144:ef7eb2e8f9f7	917	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	918	husart->State = HAL_USART_STATE_BUSY_TX_RX;
<>	144:ef7eb2e8f9f7	919
<>	144:ef7eb2e8f9f7	920	/* Enable the USART Data Register not empty Interrupt */
<>	144:ef7eb2e8f9f7	921	__HAL_USART_ENABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	922
<>	144:ef7eb2e8f9f7	923	/* Enable the USART Parity Error Interrupt */
<>	144:ef7eb2e8f9f7	924	__HAL_USART_ENABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	925
<>	144:ef7eb2e8f9f7	926	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<>	144:ef7eb2e8f9f7	927	__HAL_USART_ENABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	928
<>	144:ef7eb2e8f9f7	929	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	930	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	931
<>	144:ef7eb2e8f9f7	932	/* Enable the USART Transmit Data Register Empty Interrupt */
<>	144:ef7eb2e8f9f7	933	__HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	934
<>	144:ef7eb2e8f9f7	935	return HAL_OK;
<>	144:ef7eb2e8f9f7	936	}
<>	144:ef7eb2e8f9f7	937	else
<>	144:ef7eb2e8f9f7	938	{
<>	144:ef7eb2e8f9f7	939	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	940	}
<>	144:ef7eb2e8f9f7	941
<>	144:ef7eb2e8f9f7	942	}
<>	144:ef7eb2e8f9f7	943
<>	144:ef7eb2e8f9f7	944	/**
<>	144:ef7eb2e8f9f7	945	* @brief Send an amount of data in DMA mode.
<>	144:ef7eb2e8f9f7	946	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	947	* @param pTxData: pointer to data buffer.
<>	144:ef7eb2e8f9f7	948	* @param Size: amount of data to be sent.
<>	144:ef7eb2e8f9f7	949	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	950	* address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	951	* (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	952	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
<>	144:ef7eb2e8f9f7	953	* @retval HAL status
<>	144:ef7eb2e8f9f7	954	*/
<>	144:ef7eb2e8f9f7	955	HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	956	{
<>	144:ef7eb2e8f9f7	957	uint32_t *tmp=0;
<>	144:ef7eb2e8f9f7	958
<>	144:ef7eb2e8f9f7	959	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	960	{
<>	144:ef7eb2e8f9f7	961	if((pTxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	962	{
<>	144:ef7eb2e8f9f7	963	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	964	}
<>	144:ef7eb2e8f9f7	965
<>	144:ef7eb2e8f9f7	966	/* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	967	should be aligned on a u16 frontier, as data copy into TDR will be
<>	144:ef7eb2e8f9f7	968	handled by DMA from a u16 frontier. */
<>	144:ef7eb2e8f9f7	969	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	970	{
<>	144:ef7eb2e8f9f7	971	if((((uint32_t)pTxData)&1) != 0)
<>	144:ef7eb2e8f9f7	972	{
<>	144:ef7eb2e8f9f7	973	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	974	}
<>	144:ef7eb2e8f9f7	975	}
<>	144:ef7eb2e8f9f7	976
<>	144:ef7eb2e8f9f7	977	/* Process Locked */
<>	144:ef7eb2e8f9f7	978	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	979
<>	144:ef7eb2e8f9f7	980	husart->pTxBuffPtr = pTxData;
<>	144:ef7eb2e8f9f7	981	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	982	husart->TxXferCount = Size;
<>	144:ef7eb2e8f9f7	983
<>	144:ef7eb2e8f9f7	984	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	985	husart->State = HAL_USART_STATE_BUSY_TX;
<>	144:ef7eb2e8f9f7	986
<>	144:ef7eb2e8f9f7	987	/* Set the USART DMA transfer complete callback */
<>	144:ef7eb2e8f9f7	988	husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<>	144:ef7eb2e8f9f7	989
<>	144:ef7eb2e8f9f7	990	/* Set the USART DMA Half transfer complete callback */
<>	144:ef7eb2e8f9f7	991	husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<>	144:ef7eb2e8f9f7	992
<>	144:ef7eb2e8f9f7	993	/* Set the DMA error callback */
<>	144:ef7eb2e8f9f7	994	husart->hdmatx->XferErrorCallback = USART_DMAError;
<>	144:ef7eb2e8f9f7	995
<>	144:ef7eb2e8f9f7	996	/* Enable the USART transmit DMA channel */
<>	144:ef7eb2e8f9f7	997	tmp = (uint32_t*)&pTxData;
<>	144:ef7eb2e8f9f7	998	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->TDR, Size);
<>	144:ef7eb2e8f9f7	999
<>	144:ef7eb2e8f9f7	1000	/* Clear the TC flag in the ICR register */
<>	144:ef7eb2e8f9f7	1001	__HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
<>	144:ef7eb2e8f9f7	1002
<>	144:ef7eb2e8f9f7	1003	/* Enable the DMA transfer for transmit request by setting the DMAT bit
<>	144:ef7eb2e8f9f7	1004	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1005	husart->Instance->CR3 \|= USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1006
<>	144:ef7eb2e8f9f7	1007	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1008	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1009
<>	144:ef7eb2e8f9f7	1010	return HAL_OK;
<>	144:ef7eb2e8f9f7	1011	}
<>	144:ef7eb2e8f9f7	1012	else
<>	144:ef7eb2e8f9f7	1013	{
<>	144:ef7eb2e8f9f7	1014	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	1015	}
<>	144:ef7eb2e8f9f7	1016	}
<>	144:ef7eb2e8f9f7	1017
<>	144:ef7eb2e8f9f7	1018	/**
<>	144:ef7eb2e8f9f7	1019	* @brief Receive an amount of data in DMA mode.
<>	144:ef7eb2e8f9f7	1020	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1021	* @param pRxData: pointer to data buffer.
<>	144:ef7eb2e8f9f7	1022	* @param Size: amount of data to be received.
<>	144:ef7eb2e8f9f7	1023	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	1024	* address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	1025	* (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	1026	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
<>	144:ef7eb2e8f9f7	1027	* @note The USART DMA transmit channel must be configured in order to generate the clock for the slave.
<>	144:ef7eb2e8f9f7	1028	* @retval HAL status
<>	144:ef7eb2e8f9f7	1029	*/
<>	144:ef7eb2e8f9f7	1030	HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	1031	{
<>	144:ef7eb2e8f9f7	1032	uint32_t *tmp;
<>	144:ef7eb2e8f9f7	1033
<>	144:ef7eb2e8f9f7	1034	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	1035	{
<>	144:ef7eb2e8f9f7	1036	if((pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	1037	{
<>	144:ef7eb2e8f9f7	1038	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1039	}
<>	144:ef7eb2e8f9f7	1040
<>	144:ef7eb2e8f9f7	1041	/* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter
<>	144:ef7eb2e8f9f7	1042	should be aligned on a u16 frontier, as data copy from RDR will be
<>	144:ef7eb2e8f9f7	1043	handled by DMA from a u16 frontier. */
<>	144:ef7eb2e8f9f7	1044	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	1045	{
<>	144:ef7eb2e8f9f7	1046	if((((uint32_t)pRxData)&1) != 0)
<>	144:ef7eb2e8f9f7	1047	{
<>	144:ef7eb2e8f9f7	1048	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1049	}
<>	144:ef7eb2e8f9f7	1050	}
<>	144:ef7eb2e8f9f7	1051
<>	144:ef7eb2e8f9f7	1052	/* Process Locked */
<>	144:ef7eb2e8f9f7	1053	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	1054
<>	144:ef7eb2e8f9f7	1055	husart->pRxBuffPtr = pRxData;
<>	144:ef7eb2e8f9f7	1056	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	1057	husart->pTxBuffPtr = pRxData;
<>	144:ef7eb2e8f9f7	1058	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	1059
<>	144:ef7eb2e8f9f7	1060	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	1061	husart->State = HAL_USART_STATE_BUSY_RX;
<>	144:ef7eb2e8f9f7	1062
<>	144:ef7eb2e8f9f7	1063	/* Set the USART DMA Rx transfer complete callback */
<>	144:ef7eb2e8f9f7	1064	husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<>	144:ef7eb2e8f9f7	1065
<>	144:ef7eb2e8f9f7	1066	/* Set the USART DMA Half transfer complete callback */
<>	144:ef7eb2e8f9f7	1067	husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<>	144:ef7eb2e8f9f7	1068
<>	144:ef7eb2e8f9f7	1069	/* Set the USART DMA Rx transfer error callback */
<>	144:ef7eb2e8f9f7	1070	husart->hdmarx->XferErrorCallback = USART_DMAError;
<>	144:ef7eb2e8f9f7	1071
<>	144:ef7eb2e8f9f7	1072	/* Enable the USART receive DMA channel */
<>	144:ef7eb2e8f9f7	1073	tmp = (uint32_t*)&pRxData;
<>	144:ef7eb2e8f9f7	1074	HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, (uint32_t)tmp, Size);
<>	144:ef7eb2e8f9f7	1075
<>	144:ef7eb2e8f9f7	1076	/* Enable the USART transmit DMA channel: the transmit channel is used in order
<>	144:ef7eb2e8f9f7	1077	to generate in the non-blocking mode the clock to the slave device,
<>	144:ef7eb2e8f9f7	1078	this mode isn't a simplex receive mode but a full-duplex receive mode */
<>	144:ef7eb2e8f9f7	1079	tmp = (uint32_t*)&pRxData;
<>	144:ef7eb2e8f9f7	1080	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->TDR, Size);
<>	144:ef7eb2e8f9f7	1081
<>	144:ef7eb2e8f9f7	1082	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
<>	144:ef7eb2e8f9f7	1083	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1084	husart->Instance->CR3 \|= USART_CR3_DMAR;
<>	144:ef7eb2e8f9f7	1085
<>	144:ef7eb2e8f9f7	1086	/* Enable the DMA transfer for transmit request by setting the DMAT bit
<>	144:ef7eb2e8f9f7	1087	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1088	husart->Instance->CR3 \|= USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1089
<>	144:ef7eb2e8f9f7	1090	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1091	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1092
<>	144:ef7eb2e8f9f7	1093	return HAL_OK;
<>	144:ef7eb2e8f9f7	1094	}
<>	144:ef7eb2e8f9f7	1095	else
<>	144:ef7eb2e8f9f7	1096	{
<>	144:ef7eb2e8f9f7	1097	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	1098	}
<>	144:ef7eb2e8f9f7	1099	}
<>	144:ef7eb2e8f9f7	1100
<>	144:ef7eb2e8f9f7	1101	/**
<>	144:ef7eb2e8f9f7	1102	* @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode.
<>	144:ef7eb2e8f9f7	1103	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1104	* @param pTxData: pointer to TX data buffer.
<>	144:ef7eb2e8f9f7	1105	* @param pRxData: pointer to RX data buffer.
<>	144:ef7eb2e8f9f7	1106	* @param Size: amount of data to be received/sent.
<>	144:ef7eb2e8f9f7	1107	* @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<>	144:ef7eb2e8f9f7	1108	* address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
<>	144:ef7eb2e8f9f7	1109	* (as sent/received data will be handled by DMA from halfword frontier). Depending on compilation chain,
<>	144:ef7eb2e8f9f7	1110	* use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
<>	144:ef7eb2e8f9f7	1111	* @retval HAL status
<>	144:ef7eb2e8f9f7	1112	*/
<>	144:ef7eb2e8f9f7	1113	HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
<>	144:ef7eb2e8f9f7	1114	{
<>	144:ef7eb2e8f9f7	1115	uint32_t *tmp;
<>	144:ef7eb2e8f9f7	1116
<>	144:ef7eb2e8f9f7	1117	if(husart->State == HAL_USART_STATE_READY)
<>	144:ef7eb2e8f9f7	1118	{
<>	144:ef7eb2e8f9f7	1119	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0))
<>	144:ef7eb2e8f9f7	1120	{
<>	144:ef7eb2e8f9f7	1121	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1122	}
<>	144:ef7eb2e8f9f7	1123
<>	144:ef7eb2e8f9f7	1124	/* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter
<>	144:ef7eb2e8f9f7	1125	should be aligned on a u16 frontier, as data copy to/from TDR/RDR will be
<>	144:ef7eb2e8f9f7	1126	handled by DMA from a u16 frontier. */
<>	144:ef7eb2e8f9f7	1127	if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	1128	{
<>	144:ef7eb2e8f9f7	1129	if(((((uint32_t)pTxData)&1) != 0) \|\| ((((uint32_t)pRxData)&1) != 0))
<>	144:ef7eb2e8f9f7	1130	{
<>	144:ef7eb2e8f9f7	1131	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	1132	}
<>	144:ef7eb2e8f9f7	1133	}
<>	144:ef7eb2e8f9f7	1134
<>	144:ef7eb2e8f9f7	1135	/* Process Locked */
<>	144:ef7eb2e8f9f7	1136	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	1137
<>	144:ef7eb2e8f9f7	1138	husart->pRxBuffPtr = pRxData;
<>	144:ef7eb2e8f9f7	1139	husart->RxXferSize = Size;
<>	144:ef7eb2e8f9f7	1140	husart->pTxBuffPtr = pTxData;
<>	144:ef7eb2e8f9f7	1141	husart->TxXferSize = Size;
<>	144:ef7eb2e8f9f7	1142
<>	144:ef7eb2e8f9f7	1143	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	1144	husart->State = HAL_USART_STATE_BUSY_TX_RX;
<>	144:ef7eb2e8f9f7	1145
<>	144:ef7eb2e8f9f7	1146	/* Set the USART DMA Rx transfer complete callback */
<>	144:ef7eb2e8f9f7	1147	husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<>	144:ef7eb2e8f9f7	1148
<>	144:ef7eb2e8f9f7	1149	/* Set the USART DMA Half transfer complete callback */
<>	144:ef7eb2e8f9f7	1150	husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<>	144:ef7eb2e8f9f7	1151
<>	144:ef7eb2e8f9f7	1152	/* Set the USART DMA Tx transfer complete callback */
<>	144:ef7eb2e8f9f7	1153	husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<>	144:ef7eb2e8f9f7	1154
<>	144:ef7eb2e8f9f7	1155	/* Set the USART DMA Half transfer complete callback */
<>	144:ef7eb2e8f9f7	1156	husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<>	144:ef7eb2e8f9f7	1157
<>	144:ef7eb2e8f9f7	1158	/* Set the USART DMA Tx transfer error callback */
<>	144:ef7eb2e8f9f7	1159	husart->hdmatx->XferErrorCallback = USART_DMAError;
<>	144:ef7eb2e8f9f7	1160
<>	144:ef7eb2e8f9f7	1161	/* Set the USART DMA Rx transfer error callback */
<>	144:ef7eb2e8f9f7	1162	husart->hdmarx->XferErrorCallback = USART_DMAError;
<>	144:ef7eb2e8f9f7	1163
<>	144:ef7eb2e8f9f7	1164	/* Enable the USART receive DMA channel */
<>	144:ef7eb2e8f9f7	1165	tmp = (uint32_t*)&pRxData;
<>	144:ef7eb2e8f9f7	1166	HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, (uint32_t)tmp, Size);
<>	144:ef7eb2e8f9f7	1167
<>	144:ef7eb2e8f9f7	1168	/* Enable the USART transmit DMA channel */
<>	144:ef7eb2e8f9f7	1169	tmp = (uint32_t*)&pTxData;
<>	144:ef7eb2e8f9f7	1170	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->TDR, Size);
<>	144:ef7eb2e8f9f7	1171
<>	144:ef7eb2e8f9f7	1172	/* Clear the TC flag in the ICR register */
<>	144:ef7eb2e8f9f7	1173	__HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
<>	144:ef7eb2e8f9f7	1174
<>	144:ef7eb2e8f9f7	1175	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
<>	144:ef7eb2e8f9f7	1176	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1177	husart->Instance->CR3 \|= USART_CR3_DMAR;
<>	144:ef7eb2e8f9f7	1178
<>	144:ef7eb2e8f9f7	1179	/* Enable the DMA transfer for transmit request by setting the DMAT bit
<>	144:ef7eb2e8f9f7	1180	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1181	husart->Instance->CR3 \|= USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1182
<>	144:ef7eb2e8f9f7	1183	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1184	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1185
<>	144:ef7eb2e8f9f7	1186	return HAL_OK;
<>	144:ef7eb2e8f9f7	1187	}
<>	144:ef7eb2e8f9f7	1188	else
<>	144:ef7eb2e8f9f7	1189	{
<>	144:ef7eb2e8f9f7	1190	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	1191	}
<>	144:ef7eb2e8f9f7	1192	}
<>	144:ef7eb2e8f9f7	1193
<>	144:ef7eb2e8f9f7	1194	/**
<>	144:ef7eb2e8f9f7	1195	* @brief Pause the DMA Transfer.
<>	144:ef7eb2e8f9f7	1196	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1197	* @retval HAL status
<>	144:ef7eb2e8f9f7	1198	*/
<>	144:ef7eb2e8f9f7	1199	HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1200	{
<>	144:ef7eb2e8f9f7	1201	/* Process Locked */
<>	144:ef7eb2e8f9f7	1202	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	1203
<>	144:ef7eb2e8f9f7	1204	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1205	{
<>	144:ef7eb2e8f9f7	1206	/* Disable the USART DMA Tx request */
<>	144:ef7eb2e8f9f7	1207	husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
<>	144:ef7eb2e8f9f7	1208	}
<>	144:ef7eb2e8f9f7	1209	else if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1210	{
<>	144:ef7eb2e8f9f7	1211	/* Disable the USART DMA Rx request */
<>	144:ef7eb2e8f9f7	1212	husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
<>	144:ef7eb2e8f9f7	1213	}
<>	144:ef7eb2e8f9f7	1214	else if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<>	144:ef7eb2e8f9f7	1215	{
<>	144:ef7eb2e8f9f7	1216	/* Disable the USART DMA Tx request */
<>	144:ef7eb2e8f9f7	1217	husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
<>	144:ef7eb2e8f9f7	1218	/* Disable the USART DMA Rx request */
<>	144:ef7eb2e8f9f7	1219	husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
<>	144:ef7eb2e8f9f7	1220	}
<>	144:ef7eb2e8f9f7	1221
<>	144:ef7eb2e8f9f7	1222	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1223	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1224
<>	144:ef7eb2e8f9f7	1225	return HAL_OK;
<>	144:ef7eb2e8f9f7	1226	}
<>	144:ef7eb2e8f9f7	1227
<>	144:ef7eb2e8f9f7	1228	/**
<>	144:ef7eb2e8f9f7	1229	* @brief Resume the DMA Transfer.
<>	144:ef7eb2e8f9f7	1230	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1231	* @retval HAL status
<>	144:ef7eb2e8f9f7	1232	*/
<>	144:ef7eb2e8f9f7	1233	HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1234	{
<>	144:ef7eb2e8f9f7	1235	/* Process Locked */
<>	144:ef7eb2e8f9f7	1236	__HAL_LOCK(husart);
<>	144:ef7eb2e8f9f7	1237
<>	144:ef7eb2e8f9f7	1238	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1239	{
<>	144:ef7eb2e8f9f7	1240	/* Enable the USART DMA Tx request */
<>	144:ef7eb2e8f9f7	1241	husart->Instance->CR3 \|= USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1242	}
<>	144:ef7eb2e8f9f7	1243	else if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1244	{
<>	144:ef7eb2e8f9f7	1245	/* Clear the Overrun flag before resumming the Rx transfer*/
<>	144:ef7eb2e8f9f7	1246	__HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
<>	144:ef7eb2e8f9f7	1247
<>	144:ef7eb2e8f9f7	1248	/* Enable the USART DMA Rx request */
<>	144:ef7eb2e8f9f7	1249	husart->Instance->CR3 \|= USART_CR3_DMAR;
<>	144:ef7eb2e8f9f7	1250	}
<>	144:ef7eb2e8f9f7	1251	else if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<>	144:ef7eb2e8f9f7	1252	{
<>	144:ef7eb2e8f9f7	1253	/* Clear the Overrun flag before resumming the Rx transfer*/
<>	144:ef7eb2e8f9f7	1254	__HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
<>	144:ef7eb2e8f9f7	1255
<>	144:ef7eb2e8f9f7	1256	/* Enable the USART DMA Rx request before the DMA Tx request */
<>	144:ef7eb2e8f9f7	1257	husart->Instance->CR3 \|= USART_CR3_DMAR;
<>	144:ef7eb2e8f9f7	1258
<>	144:ef7eb2e8f9f7	1259	/* Enable the USART DMA Tx request */
<>	144:ef7eb2e8f9f7	1260	husart->Instance->CR3 \|= USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1261	}
<>	144:ef7eb2e8f9f7	1262
<>	144:ef7eb2e8f9f7	1263	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1264	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1265
<>	144:ef7eb2e8f9f7	1266	return HAL_OK;
<>	144:ef7eb2e8f9f7	1267	}
<>	144:ef7eb2e8f9f7	1268
<>	144:ef7eb2e8f9f7	1269	/**
<>	144:ef7eb2e8f9f7	1270	* @brief Stop the DMA Transfer.
<>	144:ef7eb2e8f9f7	1271	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1272	* @retval HAL status
<>	144:ef7eb2e8f9f7	1273	*/
<>	144:ef7eb2e8f9f7	1274	HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1275	{
<>	144:ef7eb2e8f9f7	1276	/* The Lock is not implemented on this API to allow the user application
<>	144:ef7eb2e8f9f7	1277	to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
<>	144:ef7eb2e8f9f7	1278	HAL_USART_TxHalfCpltCallback() / HAL_USART_RxHalfCpltCallback ():
<>	144:ef7eb2e8f9f7	1279	indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete interrupt is
<>	144:ef7eb2e8f9f7	1280	generated if the DMA transfer interruption occurs at the middle or at the end of the stream
<>	144:ef7eb2e8f9f7	1281	and the corresponding call back is executed.
<>	144:ef7eb2e8f9f7	1282	*/
<>	144:ef7eb2e8f9f7	1283
<>	144:ef7eb2e8f9f7	1284	/* Disable the USART Tx/Rx DMA requests */
<>	144:ef7eb2e8f9f7	1285	husart->Instance->CR3 &= ~USART_CR3_DMAT;
<>	144:ef7eb2e8f9f7	1286	husart->Instance->CR3 &= ~USART_CR3_DMAR;
<>	144:ef7eb2e8f9f7	1287
<>	144:ef7eb2e8f9f7	1288	/* Abort the USART DMA tx channel */
<>	144:ef7eb2e8f9f7	1289	if(husart->hdmatx != NULL)
<>	144:ef7eb2e8f9f7	1290	{
<>	144:ef7eb2e8f9f7	1291	HAL_DMA_Abort(husart->hdmatx);
<>	144:ef7eb2e8f9f7	1292	}
<>	144:ef7eb2e8f9f7	1293	/* Abort the USART DMA rx channel */
<>	144:ef7eb2e8f9f7	1294	if(husart->hdmarx != NULL)
<>	144:ef7eb2e8f9f7	1295	{
<>	144:ef7eb2e8f9f7	1296	HAL_DMA_Abort(husart->hdmarx);
<>	144:ef7eb2e8f9f7	1297	}
<>	144:ef7eb2e8f9f7	1298
<>	144:ef7eb2e8f9f7	1299	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1300
<>	144:ef7eb2e8f9f7	1301	return HAL_OK;
<>	144:ef7eb2e8f9f7	1302	}
<>	144:ef7eb2e8f9f7	1303
<>	144:ef7eb2e8f9f7	1304	/**
<>	144:ef7eb2e8f9f7	1305	* @brief Handle USART interrupt request.
<>	144:ef7eb2e8f9f7	1306	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1307	* @retval None
<>	144:ef7eb2e8f9f7	1308	*/
<>	144:ef7eb2e8f9f7	1309	void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1310	{
<>	144:ef7eb2e8f9f7	1311
<>	144:ef7eb2e8f9f7	1312	/* USART parity error interrupt occurred ------------------------------------*/
<>	144:ef7eb2e8f9f7	1313	if((__HAL_USART_GET_IT(husart, USART_IT_PE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_PE) != RESET))
<>	144:ef7eb2e8f9f7	1314	{
<>	144:ef7eb2e8f9f7	1315	__HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
<>	144:ef7eb2e8f9f7	1316	husart->ErrorCode \|= HAL_USART_ERROR_PE;
<>	144:ef7eb2e8f9f7	1317	/* Set the USART state ready to be able to start again the process */
<>	144:ef7eb2e8f9f7	1318	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1319	}
<>	144:ef7eb2e8f9f7	1320
<>	144:ef7eb2e8f9f7	1321	/* USART frame error interrupt occurred -------------------------------------*/
<>	144:ef7eb2e8f9f7	1322	if((__HAL_USART_GET_IT(husart, USART_IT_FE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET))
<>	144:ef7eb2e8f9f7	1323	{
<>	144:ef7eb2e8f9f7	1324	__HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
<>	144:ef7eb2e8f9f7	1325	husart->ErrorCode \|= HAL_USART_ERROR_FE;
<>	144:ef7eb2e8f9f7	1326	/* Set the USART state ready to be able to start again the process */
<>	144:ef7eb2e8f9f7	1327	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1328	}
<>	144:ef7eb2e8f9f7	1329
<>	144:ef7eb2e8f9f7	1330	/* USART noise error interrupt occurred -------------------------------------*/
<>	144:ef7eb2e8f9f7	1331	if((__HAL_USART_GET_IT(husart, USART_IT_NE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET))
<>	144:ef7eb2e8f9f7	1332	{
<>	144:ef7eb2e8f9f7	1333	__HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
<>	144:ef7eb2e8f9f7	1334	husart->ErrorCode \|= HAL_USART_ERROR_NE;
<>	144:ef7eb2e8f9f7	1335	/* Set the USART state ready to be able to start again the process */
<>	144:ef7eb2e8f9f7	1336	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1337	}
<>	144:ef7eb2e8f9f7	1338
<>	144:ef7eb2e8f9f7	1339	/* USART Over-Run interrupt occurred ----------------------------------------*/
<>	144:ef7eb2e8f9f7	1340	if((__HAL_USART_GET_IT(husart, USART_IT_ORE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET))
<>	144:ef7eb2e8f9f7	1341	{
<>	144:ef7eb2e8f9f7	1342	__HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
<>	144:ef7eb2e8f9f7	1343	husart->ErrorCode \|= HAL_USART_ERROR_ORE;
<>	144:ef7eb2e8f9f7	1344	/* Set the USART state ready to be able to start again the process */
<>	144:ef7eb2e8f9f7	1345	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1346	}
<>	144:ef7eb2e8f9f7	1347
<>	144:ef7eb2e8f9f7	1348	/* Call USART Error Call back function if need be --------------------------*/
<>	144:ef7eb2e8f9f7	1349	if(husart->ErrorCode != HAL_USART_ERROR_NONE)
<>	144:ef7eb2e8f9f7	1350	{
<>	144:ef7eb2e8f9f7	1351	HAL_USART_ErrorCallback(husart);
<>	144:ef7eb2e8f9f7	1352	}
<>	144:ef7eb2e8f9f7	1353
<>	144:ef7eb2e8f9f7	1354	/* USART in mode Receiver --------------------------------------------------*/
<>	144:ef7eb2e8f9f7	1355	if((__HAL_USART_GET_IT(husart, USART_IT_RXNE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_RXNE) != RESET))
<>	144:ef7eb2e8f9f7	1356	{
<>	144:ef7eb2e8f9f7	1357	if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1358	{
<>	144:ef7eb2e8f9f7	1359	USART_Receive_IT(husart);
<>	144:ef7eb2e8f9f7	1360	}
<>	144:ef7eb2e8f9f7	1361	else
<>	144:ef7eb2e8f9f7	1362	{
<>	144:ef7eb2e8f9f7	1363	USART_TransmitReceive_IT(husart);
<>	144:ef7eb2e8f9f7	1364	}
<>	144:ef7eb2e8f9f7	1365	}
<>	144:ef7eb2e8f9f7	1366
<>	144:ef7eb2e8f9f7	1367	/* USART in mode Transmitter -----------------------------------------------*/
<>	144:ef7eb2e8f9f7	1368	if((__HAL_USART_GET_IT(husart, USART_IT_TXE) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TXE) != RESET))
<>	144:ef7eb2e8f9f7	1369	{
<>	144:ef7eb2e8f9f7	1370	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1371	{
<>	144:ef7eb2e8f9f7	1372	USART_Transmit_IT(husart);
<>	144:ef7eb2e8f9f7	1373	}
<>	144:ef7eb2e8f9f7	1374	else
<>	144:ef7eb2e8f9f7	1375	{
<>	144:ef7eb2e8f9f7	1376	USART_TransmitReceive_IT(husart);
<>	144:ef7eb2e8f9f7	1377	}
<>	144:ef7eb2e8f9f7	1378	}
<>	144:ef7eb2e8f9f7	1379
<>	144:ef7eb2e8f9f7	1380	/* USART in mode Transmitter (transmission end) -----------------------------*/
<>	144:ef7eb2e8f9f7	1381	if((__HAL_USART_GET_IT(husart, USART_IT_TC) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TC) != RESET))
<>	144:ef7eb2e8f9f7	1382	{
<>	144:ef7eb2e8f9f7	1383	USART_EndTransmit_IT(husart);
<>	144:ef7eb2e8f9f7	1384	}
<>	144:ef7eb2e8f9f7	1385
<>	144:ef7eb2e8f9f7	1386	}
<>	144:ef7eb2e8f9f7	1387
<>	144:ef7eb2e8f9f7	1388	/**
<>	144:ef7eb2e8f9f7	1389	* @brief Tx Transfer completed callback.
<>	144:ef7eb2e8f9f7	1390	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1391	* @retval None
<>	144:ef7eb2e8f9f7	1392	*/
<>	144:ef7eb2e8f9f7	1393	__weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1394	{
<>	144:ef7eb2e8f9f7	1395	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1396	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1397
<>	144:ef7eb2e8f9f7	1398	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1399	the HAL_USART_TxCpltCallback can be implemented in the user file.
<>	144:ef7eb2e8f9f7	1400	*/
<>	144:ef7eb2e8f9f7	1401	}
<>	144:ef7eb2e8f9f7	1402
<>	144:ef7eb2e8f9f7	1403	/**
<>	144:ef7eb2e8f9f7	1404	* @brief Tx Half Transfer completed callback.
<>	144:ef7eb2e8f9f7	1405	* @param husart: USART handle
<>	144:ef7eb2e8f9f7	1406	* @retval None
<>	144:ef7eb2e8f9f7	1407	*/
<>	144:ef7eb2e8f9f7	1408	__weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1409	{
<>	144:ef7eb2e8f9f7	1410	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1411	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1412
<>	144:ef7eb2e8f9f7	1413	/* NOTE: This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1414	the HAL_USART_TxHalfCpltCallback can be implemented in the user file.
<>	144:ef7eb2e8f9f7	1415	*/
<>	144:ef7eb2e8f9f7	1416	}
<>	144:ef7eb2e8f9f7	1417
<>	144:ef7eb2e8f9f7	1418	/**
<>	144:ef7eb2e8f9f7	1419	* @brief Rx Transfer completed callback.
<>	144:ef7eb2e8f9f7	1420	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1421	* @retval None
<>	144:ef7eb2e8f9f7	1422	*/
<>	144:ef7eb2e8f9f7	1423	__weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1424	{
<>	144:ef7eb2e8f9f7	1425	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1426	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1427
<>	144:ef7eb2e8f9f7	1428	/* NOTE: This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1429	the HAL_USART_RxCpltCallback can be implemented in the user file.
<>	144:ef7eb2e8f9f7	1430	*/
<>	144:ef7eb2e8f9f7	1431	}
<>	144:ef7eb2e8f9f7	1432
<>	144:ef7eb2e8f9f7	1433	/**
<>	144:ef7eb2e8f9f7	1434	* @brief Rx Half Transfer completed callback.
<>	144:ef7eb2e8f9f7	1435	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1436	* @retval None
<>	144:ef7eb2e8f9f7	1437	*/
<>	144:ef7eb2e8f9f7	1438	__weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1439	{
<>	144:ef7eb2e8f9f7	1440	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1441	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1442
<>	144:ef7eb2e8f9f7	1443	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1444	the HAL_USART_RxHalfCpltCallback can be implemented in the user file
<>	144:ef7eb2e8f9f7	1445	*/
<>	144:ef7eb2e8f9f7	1446	}
<>	144:ef7eb2e8f9f7	1447
<>	144:ef7eb2e8f9f7	1448	/**
<>	144:ef7eb2e8f9f7	1449	* @brief Tx/Rx Transfers completed callback for the non-blocking process.
<>	144:ef7eb2e8f9f7	1450	* @param husart: USART handle
<>	144:ef7eb2e8f9f7	1451	* @retval None
<>	144:ef7eb2e8f9f7	1452	*/
<>	144:ef7eb2e8f9f7	1453	__weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1454	{
<>	144:ef7eb2e8f9f7	1455	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1456	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1457
<>	144:ef7eb2e8f9f7	1458	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1459	the HAL_USART_TxRxCpltCallback can be implemented in the user file
<>	144:ef7eb2e8f9f7	1460	*/
<>	144:ef7eb2e8f9f7	1461	}
<>	144:ef7eb2e8f9f7	1462
<>	144:ef7eb2e8f9f7	1463	/**
<>	144:ef7eb2e8f9f7	1464	* @brief USART error callback.
<>	144:ef7eb2e8f9f7	1465	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1466	* @retval None
<>	144:ef7eb2e8f9f7	1467	*/
<>	144:ef7eb2e8f9f7	1468	__weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1469	{
<>	144:ef7eb2e8f9f7	1470	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1471	UNUSED(husart);
<>	144:ef7eb2e8f9f7	1472
<>	144:ef7eb2e8f9f7	1473	/* NOTE : This function should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1474	the HAL_USART_ErrorCallback can be implemented in the user file.
<>	144:ef7eb2e8f9f7	1475	*/
<>	144:ef7eb2e8f9f7	1476	}
<>	144:ef7eb2e8f9f7	1477
<>	144:ef7eb2e8f9f7	1478	/**
<>	144:ef7eb2e8f9f7	1479	* @}
<>	144:ef7eb2e8f9f7	1480	*/
<>	144:ef7eb2e8f9f7	1481
<>	144:ef7eb2e8f9f7	1482	/** @defgroup USART_Exported_Functions_Group3 Peripheral State and Error functions
<>	144:ef7eb2e8f9f7	1483	* @brief USART Peripheral State and Error functions
<>	144:ef7eb2e8f9f7	1484	*
<>	144:ef7eb2e8f9f7	1485	@verbatim
<>	144:ef7eb2e8f9f7	1486	==============================================================================
<>	144:ef7eb2e8f9f7	1487	##### Peripheral State and Error functions #####
<>	144:ef7eb2e8f9f7	1488	==============================================================================
<>	144:ef7eb2e8f9f7	1489	[..]
<>	144:ef7eb2e8f9f7	1490	This subsection provides functions allowing to :
<>	144:ef7eb2e8f9f7	1491	(+) Return the USART handle state
<>	144:ef7eb2e8f9f7	1492	(+) Return the USART handle error code
<>	144:ef7eb2e8f9f7	1493
<>	144:ef7eb2e8f9f7	1494	@endverbatim
<>	144:ef7eb2e8f9f7	1495	* @{
<>	144:ef7eb2e8f9f7	1496	*/
<>	144:ef7eb2e8f9f7	1497
<>	144:ef7eb2e8f9f7	1498
<>	144:ef7eb2e8f9f7	1499	/**
<>	144:ef7eb2e8f9f7	1500	* @brief Return the USART handle state.
<>	144:ef7eb2e8f9f7	1501	* @param husart : pointer to a USART_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1502	* the configuration information for the specified USART.
<>	144:ef7eb2e8f9f7	1503	* @retval USART handle state
<>	144:ef7eb2e8f9f7	1504	*/
<>	144:ef7eb2e8f9f7	1505	HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1506	{
<>	144:ef7eb2e8f9f7	1507	return husart->State;
<>	144:ef7eb2e8f9f7	1508	}
<>	144:ef7eb2e8f9f7	1509
<>	144:ef7eb2e8f9f7	1510	/**
<>	144:ef7eb2e8f9f7	1511	* @brief Return the USART error code.
<>	144:ef7eb2e8f9f7	1512	* @param husart : pointer to a USART_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1513	* the configuration information for the specified USART.
<>	144:ef7eb2e8f9f7	1514	* @retval USART handle Error Code
<>	144:ef7eb2e8f9f7	1515	*/
<>	144:ef7eb2e8f9f7	1516	uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1517	{
<>	144:ef7eb2e8f9f7	1518	return husart->ErrorCode;
<>	144:ef7eb2e8f9f7	1519	}
<>	144:ef7eb2e8f9f7	1520
<>	144:ef7eb2e8f9f7	1521	/**
<>	144:ef7eb2e8f9f7	1522	* @}
<>	144:ef7eb2e8f9f7	1523	*/
<>	144:ef7eb2e8f9f7	1524
<>	144:ef7eb2e8f9f7	1525	/**
<>	144:ef7eb2e8f9f7	1526	* @}
<>	144:ef7eb2e8f9f7	1527	*/
<>	144:ef7eb2e8f9f7	1528
<>	144:ef7eb2e8f9f7	1529	/** @defgroup USART_Private_Functions USART Private Functions
<>	144:ef7eb2e8f9f7	1530	* @brief USART Private functions
<>	144:ef7eb2e8f9f7	1531	*
<>	144:ef7eb2e8f9f7	1532	@verbatim
<>	144:ef7eb2e8f9f7	1533	[..]
<>	144:ef7eb2e8f9f7	1534	This subsection provides a set of functions allowing to control the USART.
<>	144:ef7eb2e8f9f7	1535	(+) USART_SetConfig() API is used to set the USART communication parameters.
<>	144:ef7eb2e8f9f7	1536	(+) USART_CheckIdleState() APi ensures that TEACK and/or REACK bits are set after initialization
<>	144:ef7eb2e8f9f7	1537
<>	144:ef7eb2e8f9f7	1538	@endverbatim
<>	144:ef7eb2e8f9f7	1539	* @{
<>	144:ef7eb2e8f9f7	1540	*/
<>	144:ef7eb2e8f9f7	1541
<>	144:ef7eb2e8f9f7	1542	/**
<>	144:ef7eb2e8f9f7	1543	* @brief Configure the USART peripheral.
<>	144:ef7eb2e8f9f7	1544	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1545	* @retval HAL status
<>	144:ef7eb2e8f9f7	1546	*/
<>	144:ef7eb2e8f9f7	1547	static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1548	{
<>	144:ef7eb2e8f9f7	1549	uint32_t tmpreg = 0x0;
<>	144:ef7eb2e8f9f7	1550	USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED;
<>	144:ef7eb2e8f9f7	1551	HAL_StatusTypeDef ret = HAL_OK;
<>	144:ef7eb2e8f9f7	1552	uint16_t brrtemp = 0x0000;
<>	144:ef7eb2e8f9f7	1553	uint16_t usartdiv = 0x0000;
<>	144:ef7eb2e8f9f7	1554
<>	144:ef7eb2e8f9f7	1555	/* Check the parameters */
<>	144:ef7eb2e8f9f7	1556	assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
<>	144:ef7eb2e8f9f7	1557	assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
<>	144:ef7eb2e8f9f7	1558	assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
<>	144:ef7eb2e8f9f7	1559	assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
<>	144:ef7eb2e8f9f7	1560	assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
<>	144:ef7eb2e8f9f7	1561	assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
<>	144:ef7eb2e8f9f7	1562	assert_param(IS_USART_PARITY(husart->Init.Parity));
<>	144:ef7eb2e8f9f7	1563	assert_param(IS_USART_MODE(husart->Init.Mode));
<>	144:ef7eb2e8f9f7	1564
<>	144:ef7eb2e8f9f7	1565
<>	144:ef7eb2e8f9f7	1566	/-------------------------- USART CR1 Configuration -----------------------/
<>	144:ef7eb2e8f9f7	1567	/* Clear M, PCE, PS, TE and RE bits and configure
<>	144:ef7eb2e8f9f7	1568	* the USART Word Length, Parity and Mode:
<>	144:ef7eb2e8f9f7	1569	* set the M bits according to husart->Init.WordLength value
<>	144:ef7eb2e8f9f7	1570	* set PCE and PS bits according to husart->Init.Parity value
<>	144:ef7eb2e8f9f7	1571	* set TE and RE bits according to husart->Init.Mode value
<>	144:ef7eb2e8f9f7	1572	* force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */
<>	144:ef7eb2e8f9f7	1573	tmpreg = (uint32_t)husart->Init.WordLength \| husart->Init.Parity \| husart->Init.Mode \| USART_CR1_OVER8;
<>	144:ef7eb2e8f9f7	1574	MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
<>	144:ef7eb2e8f9f7	1575
<>	144:ef7eb2e8f9f7	1576	/---------------------------- USART CR2 Configuration ---------------------/
<>	144:ef7eb2e8f9f7	1577	/* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits:
<>	144:ef7eb2e8f9f7	1578	* set CPOL bit according to husart->Init.CLKPolarity value
<>	144:ef7eb2e8f9f7	1579	* set CPHA bit according to husart->Init.CLKPhase value
<>	144:ef7eb2e8f9f7	1580	* set LBCL bit according to husart->Init.CLKLastBit value
<>	144:ef7eb2e8f9f7	1581	* set STOP[13:12] bits according to husart->Init.StopBits value */
<>	144:ef7eb2e8f9f7	1582	tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
<>	144:ef7eb2e8f9f7	1583	tmpreg \|= ((uint32_t)husart->Init.CLKPolarity \| (uint32_t)husart->Init.CLKPhase);
<>	144:ef7eb2e8f9f7	1584	tmpreg \|= ((uint32_t)husart->Init.CLKLastBit \| (uint32_t)husart->Init.StopBits);
<>	144:ef7eb2e8f9f7	1585	MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
<>	144:ef7eb2e8f9f7	1586
<>	144:ef7eb2e8f9f7	1587	/-------------------------- USART CR3 Configuration -----------------------/
<>	144:ef7eb2e8f9f7	1588	/* no CR3 register configuration */
<>	144:ef7eb2e8f9f7	1589
<>	144:ef7eb2e8f9f7	1590	/-------------------------- USART BRR Configuration -----------------------/
<>	144:ef7eb2e8f9f7	1591	/* BRR is filled-up according to OVER8 bit setting which is forced to 1 */
<>	144:ef7eb2e8f9f7	1592	USART_GETCLOCKSOURCE(husart, clocksource);
<>	144:ef7eb2e8f9f7	1593	switch (clocksource)
<>	144:ef7eb2e8f9f7	1594	{
<>	144:ef7eb2e8f9f7	1595	case USART_CLOCKSOURCE_PCLK1:
<>	144:ef7eb2e8f9f7	1596	usartdiv = (uint16_t)(((2*HAL_RCC_GetPCLK1Freq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<>	144:ef7eb2e8f9f7	1597	break;
<>	144:ef7eb2e8f9f7	1598	case USART_CLOCKSOURCE_HSI:
<>	144:ef7eb2e8f9f7	1599	usartdiv = (uint16_t)(((2*HSI_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<>	144:ef7eb2e8f9f7	1600	break;
<>	144:ef7eb2e8f9f7	1601	case USART_CLOCKSOURCE_SYSCLK:
<>	144:ef7eb2e8f9f7	1602	usartdiv = (uint16_t)(((2*HAL_RCC_GetSysClockFreq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<>	144:ef7eb2e8f9f7	1603	break;
<>	144:ef7eb2e8f9f7	1604	case USART_CLOCKSOURCE_LSE:
<>	144:ef7eb2e8f9f7	1605	usartdiv = (uint16_t)(((2*LSE_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
<>	144:ef7eb2e8f9f7	1606	break;
<>	144:ef7eb2e8f9f7	1607	case USART_CLOCKSOURCE_UNDEFINED:
<>	144:ef7eb2e8f9f7	1608	default:
<>	144:ef7eb2e8f9f7	1609	ret = HAL_ERROR;
<>	144:ef7eb2e8f9f7	1610	break;
<>	144:ef7eb2e8f9f7	1611	}
<>	144:ef7eb2e8f9f7	1612
<>	144:ef7eb2e8f9f7	1613	brrtemp = usartdiv & 0xFFF0;
<>	144:ef7eb2e8f9f7	1614	brrtemp \|= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);
<>	144:ef7eb2e8f9f7	1615	husart->Instance->BRR = brrtemp;
<>	144:ef7eb2e8f9f7	1616
<>	144:ef7eb2e8f9f7	1617	return ret;
<>	144:ef7eb2e8f9f7	1618	}
<>	144:ef7eb2e8f9f7	1619
<>	144:ef7eb2e8f9f7	1620	/**
<>	144:ef7eb2e8f9f7	1621	* @brief Check the USART Idle State.
<>	144:ef7eb2e8f9f7	1622	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1623	* @retval HAL status
<>	144:ef7eb2e8f9f7	1624	*/
<>	144:ef7eb2e8f9f7	1625	static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1626	{
<>	144:ef7eb2e8f9f7	1627	/* Initialize the USART ErrorCode */
<>	144:ef7eb2e8f9f7	1628	husart->ErrorCode = HAL_USART_ERROR_NONE;
<>	144:ef7eb2e8f9f7	1629
<>	144:ef7eb2e8f9f7	1630	/* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
<>	144:ef7eb2e8f9f7	1631	Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature.
<>	144:ef7eb2e8f9f7	1632	*/
<>	144:ef7eb2e8f9f7	1633	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<>	144:ef7eb2e8f9f7	1634	if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(husart->Instance))
<>	144:ef7eb2e8f9f7	1635	{
<>	144:ef7eb2e8f9f7	1636	/* Check if the Transmitter is enabled */
<>	144:ef7eb2e8f9f7	1637	if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
<>	144:ef7eb2e8f9f7	1638	{
<>	144:ef7eb2e8f9f7	1639	/* Wait until TEACK flag is set */
<>	144:ef7eb2e8f9f7	1640	if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
<>	144:ef7eb2e8f9f7	1641	{
<>	144:ef7eb2e8f9f7	1642	/* Timeout occurred */
<>	144:ef7eb2e8f9f7	1643	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1644	}
<>	144:ef7eb2e8f9f7	1645	}
<>	144:ef7eb2e8f9f7	1646
<>	144:ef7eb2e8f9f7	1647	/* Check if the Receiver is enabled */
<>	144:ef7eb2e8f9f7	1648	if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
<>	144:ef7eb2e8f9f7	1649	{
<>	144:ef7eb2e8f9f7	1650	/* Wait until REACK flag is set */
<>	144:ef7eb2e8f9f7	1651	if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
<>	144:ef7eb2e8f9f7	1652	{
<>	144:ef7eb2e8f9f7	1653	/* Timeout occurred */
<>	144:ef7eb2e8f9f7	1654	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1655	}
<>	144:ef7eb2e8f9f7	1656	}
<>	144:ef7eb2e8f9f7	1657	}
<>	144:ef7eb2e8f9f7	1658	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<>	144:ef7eb2e8f9f7	1659
<>	144:ef7eb2e8f9f7	1660	/* Initialize the USART state*/
<>	144:ef7eb2e8f9f7	1661	husart->State= HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1662
<>	144:ef7eb2e8f9f7	1663	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1664	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1665
<>	144:ef7eb2e8f9f7	1666	return HAL_OK;
<>	144:ef7eb2e8f9f7	1667	}
<>	144:ef7eb2e8f9f7	1668
<>	144:ef7eb2e8f9f7	1669
<>	144:ef7eb2e8f9f7	1670	/**
<>	144:ef7eb2e8f9f7	1671	* @brief Handle USART Communication Timeout.
<>	144:ef7eb2e8f9f7	1672	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1673	* @param Flag: specifies the USART flag to check.
<>	144:ef7eb2e8f9f7	1674	* @param Status: the Flag status (SET or RESET).
<>	144:ef7eb2e8f9f7	1675	* @param Timeout: timeout duration.
<>	144:ef7eb2e8f9f7	1676	* @retval HAL status
<>	144:ef7eb2e8f9f7	1677	*/
<>	144:ef7eb2e8f9f7	1678	static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	1679	{
<>	144:ef7eb2e8f9f7	1680	uint32_t tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1681
<>	144:ef7eb2e8f9f7	1682	/* Wait until flag is set */
<>	144:ef7eb2e8f9f7	1683	if(Status == RESET)
<>	144:ef7eb2e8f9f7	1684	{
<>	144:ef7eb2e8f9f7	1685	while(__HAL_USART_GET_FLAG(husart, Flag) == RESET)
<>	144:ef7eb2e8f9f7	1686	{
<>	144:ef7eb2e8f9f7	1687	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1688	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1689	{
<>	144:ef7eb2e8f9f7	1690	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
<>	144:ef7eb2e8f9f7	1691	{
<>	144:ef7eb2e8f9f7	1692	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<>	144:ef7eb2e8f9f7	1693	__HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	1694	__HAL_USART_DISABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	1695	__HAL_USART_DISABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	1696	__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	1697
<>	144:ef7eb2e8f9f7	1698	husart->State= HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1699
<>	144:ef7eb2e8f9f7	1700	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1701	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1702
<>	144:ef7eb2e8f9f7	1703	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1704	}
<>	144:ef7eb2e8f9f7	1705	}
<>	144:ef7eb2e8f9f7	1706	}
<>	144:ef7eb2e8f9f7	1707	}
<>	144:ef7eb2e8f9f7	1708	else
<>	144:ef7eb2e8f9f7	1709	{
<>	144:ef7eb2e8f9f7	1710	while(__HAL_USART_GET_FLAG(husart, Flag) != RESET)
<>	144:ef7eb2e8f9f7	1711	{
<>	144:ef7eb2e8f9f7	1712	/* Check for the Timeout */
<>	144:ef7eb2e8f9f7	1713	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1714	{
<>	144:ef7eb2e8f9f7	1715	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
<>	144:ef7eb2e8f9f7	1716	{
<>	144:ef7eb2e8f9f7	1717	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<>	144:ef7eb2e8f9f7	1718	__HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	1719	__HAL_USART_DISABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	1720	__HAL_USART_DISABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	1721	__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	1722
<>	144:ef7eb2e8f9f7	1723	husart->State= HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1724
<>	144:ef7eb2e8f9f7	1725	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1726	__HAL_UNLOCK(husart);
<>	144:ef7eb2e8f9f7	1727
<>	144:ef7eb2e8f9f7	1728	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1729	}
<>	144:ef7eb2e8f9f7	1730	}
<>	144:ef7eb2e8f9f7	1731	}
<>	144:ef7eb2e8f9f7	1732	}
<>	144:ef7eb2e8f9f7	1733	return HAL_OK;
<>	144:ef7eb2e8f9f7	1734	}
<>	144:ef7eb2e8f9f7	1735
<>	144:ef7eb2e8f9f7	1736
<>	144:ef7eb2e8f9f7	1737	/**
<>	144:ef7eb2e8f9f7	1738	* @brief DMA USART transmit process complete callback.
<>	144:ef7eb2e8f9f7	1739	* @param hdma: DMA handle
<>	144:ef7eb2e8f9f7	1740	* @retval None
<>	144:ef7eb2e8f9f7	1741	*/
<>	144:ef7eb2e8f9f7	1742	static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1743	{
<>	144:ef7eb2e8f9f7	1744	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	1745
<>	144:ef7eb2e8f9f7	1746	/* DMA Normal mode */
<>	144:ef7eb2e8f9f7	1747	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<>	144:ef7eb2e8f9f7	1748	{
<>	144:ef7eb2e8f9f7	1749	husart->TxXferCount = 0;
<>	144:ef7eb2e8f9f7	1750
<>	144:ef7eb2e8f9f7	1751	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1752	{
<>	144:ef7eb2e8f9f7	1753	/* Disable the DMA transfer for transmit request by resetting the DMAT bit
<>	144:ef7eb2e8f9f7	1754	in the USART CR3 register */
<>	144:ef7eb2e8f9f7	1755	husart->Instance->CR3 &= ~(USART_CR3_DMAT);
<>	144:ef7eb2e8f9f7	1756
<>	144:ef7eb2e8f9f7	1757	/* Enable the USART Transmit Complete Interrupt */
<>	144:ef7eb2e8f9f7	1758	__HAL_USART_ENABLE_IT(husart, USART_IT_TC);
<>	144:ef7eb2e8f9f7	1759	}
<>	144:ef7eb2e8f9f7	1760	}
<>	144:ef7eb2e8f9f7	1761	/* DMA Circular mode */
<>	144:ef7eb2e8f9f7	1762	else
<>	144:ef7eb2e8f9f7	1763	{
<>	144:ef7eb2e8f9f7	1764	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1765	{
<>	144:ef7eb2e8f9f7	1766	HAL_USART_TxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1767	}
<>	144:ef7eb2e8f9f7	1768	}
<>	144:ef7eb2e8f9f7	1769	}
<>	144:ef7eb2e8f9f7	1770
<>	144:ef7eb2e8f9f7	1771
<>	144:ef7eb2e8f9f7	1772	/**
<>	144:ef7eb2e8f9f7	1773	* @brief DMA USART transmit process half complete callback.
<>	144:ef7eb2e8f9f7	1774	* @param hdma : DMA handle.
<>	144:ef7eb2e8f9f7	1775	* @retval None
<>	144:ef7eb2e8f9f7	1776	*/
<>	144:ef7eb2e8f9f7	1777	static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1778	{
<>	144:ef7eb2e8f9f7	1779	USART_HandleTypeDef* husart = (USART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	144:ef7eb2e8f9f7	1780
<>	144:ef7eb2e8f9f7	1781	HAL_USART_TxHalfCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1782	}
<>	144:ef7eb2e8f9f7	1783
<>	144:ef7eb2e8f9f7	1784	/**
<>	144:ef7eb2e8f9f7	1785	* @brief DMA USART receive process complete callback.
<>	144:ef7eb2e8f9f7	1786	* @param hdma: DMA handle.
<>	144:ef7eb2e8f9f7	1787	* @retval None
<>	144:ef7eb2e8f9f7	1788	*/
<>	144:ef7eb2e8f9f7	1789	static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1790	{
<>	144:ef7eb2e8f9f7	1791	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	1792
<>	144:ef7eb2e8f9f7	1793	/* DMA Normal mode */
<>	144:ef7eb2e8f9f7	1794	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<>	144:ef7eb2e8f9f7	1795	{
<>	144:ef7eb2e8f9f7	1796	husart->RxXferCount = 0;
<>	144:ef7eb2e8f9f7	1797
<>	144:ef7eb2e8f9f7	1798	/* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit
<>	144:ef7eb2e8f9f7	1799	in USART CR3 register */
<>	144:ef7eb2e8f9f7	1800	husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
<>	144:ef7eb2e8f9f7	1801	/* similarly, disable the DMA TX transfer that was started to provide the
<>	144:ef7eb2e8f9f7	1802	clock to the slave device */
<>	144:ef7eb2e8f9f7	1803	husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
<>	144:ef7eb2e8f9f7	1804
<>	144:ef7eb2e8f9f7	1805	if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1806	{
<>	144:ef7eb2e8f9f7	1807	HAL_USART_RxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1808	}
<>	144:ef7eb2e8f9f7	1809	/* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<>	144:ef7eb2e8f9f7	1810	else
<>	144:ef7eb2e8f9f7	1811	{
<>	144:ef7eb2e8f9f7	1812	HAL_USART_TxRxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1813	}
<>	144:ef7eb2e8f9f7	1814	husart->State= HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1815	}
<>	144:ef7eb2e8f9f7	1816	/* DMA circular mode */
<>	144:ef7eb2e8f9f7	1817	else
<>	144:ef7eb2e8f9f7	1818	{
<>	144:ef7eb2e8f9f7	1819	if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1820	{
<>	144:ef7eb2e8f9f7	1821	HAL_USART_RxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1822	}
<>	144:ef7eb2e8f9f7	1823	/* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<>	144:ef7eb2e8f9f7	1824	else
<>	144:ef7eb2e8f9f7	1825	{
<>	144:ef7eb2e8f9f7	1826	HAL_USART_TxRxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1827	}
<>	144:ef7eb2e8f9f7	1828	}
<>	144:ef7eb2e8f9f7	1829
<>	144:ef7eb2e8f9f7	1830	}
<>	144:ef7eb2e8f9f7	1831
<>	144:ef7eb2e8f9f7	1832	/**
<>	144:ef7eb2e8f9f7	1833	* @brief DMA USART receive process half complete callback.
<>	144:ef7eb2e8f9f7	1834	* @param hdma : DMA handle.
<>	144:ef7eb2e8f9f7	1835	* @retval None
<>	144:ef7eb2e8f9f7	1836	*/
<>	144:ef7eb2e8f9f7	1837	static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1838	{
<>	144:ef7eb2e8f9f7	1839	USART_HandleTypeDef* husart = (USART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	144:ef7eb2e8f9f7	1840
<>	144:ef7eb2e8f9f7	1841	HAL_USART_RxHalfCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1842	}
<>	144:ef7eb2e8f9f7	1843
<>	144:ef7eb2e8f9f7	1844	/**
<>	144:ef7eb2e8f9f7	1845	* @brief DMA USART communication error callback.
<>	144:ef7eb2e8f9f7	1846	* @param hdma: DMA handle.
<>	144:ef7eb2e8f9f7	1847	* @retval None
<>	144:ef7eb2e8f9f7	1848	*/
<>	144:ef7eb2e8f9f7	1849	static void USART_DMAError(DMA_HandleTypeDef *hdma)
<>	144:ef7eb2e8f9f7	1850	{
<>	144:ef7eb2e8f9f7	1851	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<>	144:ef7eb2e8f9f7	1852
<>	144:ef7eb2e8f9f7	1853	husart->RxXferCount = 0;
<>	144:ef7eb2e8f9f7	1854	husart->TxXferCount = 0;
<>	144:ef7eb2e8f9f7	1855	husart->ErrorCode \|= HAL_USART_ERROR_DMA;
<>	144:ef7eb2e8f9f7	1856	husart->State= HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1857
<>	144:ef7eb2e8f9f7	1858	HAL_USART_ErrorCallback(husart);
<>	144:ef7eb2e8f9f7	1859	}
<>	144:ef7eb2e8f9f7	1860
<>	144:ef7eb2e8f9f7	1861	/**
<>	144:ef7eb2e8f9f7	1862	* @brief Simplex send an amount of data in non-blocking mode.
<>	144:ef7eb2e8f9f7	1863	* @note Function called under interruption only, once
<>	144:ef7eb2e8f9f7	1864	* interruptions have been enabled by HAL_USART_Transmit_IT().
<>	144:ef7eb2e8f9f7	1865	* @note The USART errors are not managed to avoid the overrun error.
<>	144:ef7eb2e8f9f7	1866	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1867	* @retval HAL status
<>	144:ef7eb2e8f9f7	1868	*/
<>	144:ef7eb2e8f9f7	1869	static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1870	{
<>	144:ef7eb2e8f9f7	1871	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	1872
<>	144:ef7eb2e8f9f7	1873	if(husart->State == HAL_USART_STATE_BUSY_TX)
<>	144:ef7eb2e8f9f7	1874	{
<>	144:ef7eb2e8f9f7	1875
<>	144:ef7eb2e8f9f7	1876	if(husart->TxXferCount == 0)
<>	144:ef7eb2e8f9f7	1877	{
<>	144:ef7eb2e8f9f7	1878	/* Disable the USART Transmit data register empty interrupt */
<>	144:ef7eb2e8f9f7	1879	__HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	1880
<>	144:ef7eb2e8f9f7	1881	/* Enable the USART Transmit Complete Interrupt */
<>	144:ef7eb2e8f9f7	1882	__HAL_USART_ENABLE_IT(husart, USART_IT_TC);
<>	144:ef7eb2e8f9f7	1883
<>	144:ef7eb2e8f9f7	1884	return HAL_OK;
<>	144:ef7eb2e8f9f7	1885	}
<>	144:ef7eb2e8f9f7	1886	else
<>	144:ef7eb2e8f9f7	1887	{
<>	144:ef7eb2e8f9f7	1888	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	1889	{
<>	144:ef7eb2e8f9f7	1890	tmp = (uint16_t*) husart->pTxBuffPtr;
<>	144:ef7eb2e8f9f7	1891	husart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<>	144:ef7eb2e8f9f7	1892	husart->pTxBuffPtr += 2;
<>	144:ef7eb2e8f9f7	1893	}
<>	144:ef7eb2e8f9f7	1894	else
<>	144:ef7eb2e8f9f7	1895	{
<>	144:ef7eb2e8f9f7	1896	husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF);
<>	144:ef7eb2e8f9f7	1897	}
<>	144:ef7eb2e8f9f7	1898
<>	144:ef7eb2e8f9f7	1899	husart->TxXferCount--;
<>	144:ef7eb2e8f9f7	1900
<>	144:ef7eb2e8f9f7	1901	return HAL_OK;
<>	144:ef7eb2e8f9f7	1902	}
<>	144:ef7eb2e8f9f7	1903	}
<>	144:ef7eb2e8f9f7	1904	else
<>	144:ef7eb2e8f9f7	1905	{
<>	144:ef7eb2e8f9f7	1906	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	1907	}
<>	144:ef7eb2e8f9f7	1908	}
<>	144:ef7eb2e8f9f7	1909
<>	144:ef7eb2e8f9f7	1910
<>	144:ef7eb2e8f9f7	1911	/**
<>	144:ef7eb2e8f9f7	1912	* @brief Wraps up transmission in non-blocking mode.
<>	144:ef7eb2e8f9f7	1913	* @param husart: pointer to a USART_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1914	* the configuration information for the specified USART module.
<>	144:ef7eb2e8f9f7	1915	* @retval HAL status
<>	144:ef7eb2e8f9f7	1916	*/
<>	144:ef7eb2e8f9f7	1917	static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1918	{
<>	144:ef7eb2e8f9f7	1919	/* Disable the USART Transmit Complete Interrupt */
<>	144:ef7eb2e8f9f7	1920	__HAL_USART_DISABLE_IT(husart, USART_IT_TC);
<>	144:ef7eb2e8f9f7	1921
<>	144:ef7eb2e8f9f7	1922	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<>	144:ef7eb2e8f9f7	1923	__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	1924
<>	144:ef7eb2e8f9f7	1925	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1926
<>	144:ef7eb2e8f9f7	1927	HAL_USART_TxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1928
<>	144:ef7eb2e8f9f7	1929	return HAL_OK;
<>	144:ef7eb2e8f9f7	1930	}
<>	144:ef7eb2e8f9f7	1931
<>	144:ef7eb2e8f9f7	1932
<>	144:ef7eb2e8f9f7	1933	/**
<>	144:ef7eb2e8f9f7	1934	* @brief Simplex receive an amount of data in non-blocking mode.
<>	144:ef7eb2e8f9f7	1935	* @note Function called under interruption only, once
<>	144:ef7eb2e8f9f7	1936	* interruptions have been enabled by HAL_USART_Receive_IT().
<>	144:ef7eb2e8f9f7	1937	* @param husart: USART handle
<>	144:ef7eb2e8f9f7	1938	* @retval HAL status
<>	144:ef7eb2e8f9f7	1939	*/
<>	144:ef7eb2e8f9f7	1940	static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1941	{
<>	144:ef7eb2e8f9f7	1942	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	1943	uint16_t uhMask = husart->Mask;
<>	144:ef7eb2e8f9f7	1944
<>	144:ef7eb2e8f9f7	1945	if(husart->State == HAL_USART_STATE_BUSY_RX)
<>	144:ef7eb2e8f9f7	1946	{
<>	144:ef7eb2e8f9f7	1947
<>	144:ef7eb2e8f9f7	1948	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	1949	{
<>	144:ef7eb2e8f9f7	1950	tmp = (uint16_t*) husart->pRxBuffPtr;
<>	144:ef7eb2e8f9f7	1951	*tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<>	144:ef7eb2e8f9f7	1952	husart->pRxBuffPtr += 2;
<>	144:ef7eb2e8f9f7	1953	}
<>	144:ef7eb2e8f9f7	1954	else
<>	144:ef7eb2e8f9f7	1955	{
<>	144:ef7eb2e8f9f7	1956	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	1957	}
<>	144:ef7eb2e8f9f7	1958
<>	144:ef7eb2e8f9f7	1959	/* Send dummy byte in order to generate the clock for the Slave to Send the next data */
<>	144:ef7eb2e8f9f7	1960	husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF);
<>	144:ef7eb2e8f9f7	1961
<>	144:ef7eb2e8f9f7	1962	if(--husart->RxXferCount == 0)
<>	144:ef7eb2e8f9f7	1963	{
<>	144:ef7eb2e8f9f7	1964	__HAL_USART_DISABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	1965
<>	144:ef7eb2e8f9f7	1966	/* Disable the USART Parity Error Interrupt */
<>	144:ef7eb2e8f9f7	1967	__HAL_USART_DISABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	1968
<>	144:ef7eb2e8f9f7	1969	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<>	144:ef7eb2e8f9f7	1970	__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	1971
<>	144:ef7eb2e8f9f7	1972	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	1973
<>	144:ef7eb2e8f9f7	1974	HAL_USART_RxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	1975
<>	144:ef7eb2e8f9f7	1976	return HAL_OK;
<>	144:ef7eb2e8f9f7	1977	}
<>	144:ef7eb2e8f9f7	1978
<>	144:ef7eb2e8f9f7	1979	return HAL_OK;
<>	144:ef7eb2e8f9f7	1980	}
<>	144:ef7eb2e8f9f7	1981	else
<>	144:ef7eb2e8f9f7	1982	{
<>	144:ef7eb2e8f9f7	1983	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	1984	}
<>	144:ef7eb2e8f9f7	1985	}
<>	144:ef7eb2e8f9f7	1986
<>	144:ef7eb2e8f9f7	1987	/**
<>	144:ef7eb2e8f9f7	1988	* @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
<>	144:ef7eb2e8f9f7	1989	* @note Function called under interruption only, once
<>	144:ef7eb2e8f9f7	1990	* interruptions have been enabled by HAL_USART_TransmitReceive_IT().
<>	144:ef7eb2e8f9f7	1991	* @param husart: USART handle.
<>	144:ef7eb2e8f9f7	1992	* @retval HAL status
<>	144:ef7eb2e8f9f7	1993	*/
<>	144:ef7eb2e8f9f7	1994	static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
<>	144:ef7eb2e8f9f7	1995	{
<>	144:ef7eb2e8f9f7	1996	uint16_t* tmp=0;
<>	144:ef7eb2e8f9f7	1997	uint16_t uhMask = husart->Mask;
<>	144:ef7eb2e8f9f7	1998
<>	144:ef7eb2e8f9f7	1999	if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<>	144:ef7eb2e8f9f7	2000	{
<>	144:ef7eb2e8f9f7	2001
<>	144:ef7eb2e8f9f7	2002	if(husart->TxXferCount != 0x00)
<>	144:ef7eb2e8f9f7	2003	{
<>	144:ef7eb2e8f9f7	2004	if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
<>	144:ef7eb2e8f9f7	2005	{
<>	144:ef7eb2e8f9f7	2006	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	2007	{
<>	144:ef7eb2e8f9f7	2008	tmp = (uint16_t*) husart->pTxBuffPtr;
<>	144:ef7eb2e8f9f7	2009	husart->Instance->TDR = (uint16_t)(*tmp & uhMask);
<>	144:ef7eb2e8f9f7	2010	husart->pTxBuffPtr += 2;
<>	144:ef7eb2e8f9f7	2011	}
<>	144:ef7eb2e8f9f7	2012	else
<>	144:ef7eb2e8f9f7	2013	{
<>	144:ef7eb2e8f9f7	2014	husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	2015	}
<>	144:ef7eb2e8f9f7	2016	husart->TxXferCount--;
<>	144:ef7eb2e8f9f7	2017
<>	144:ef7eb2e8f9f7	2018	/* Check the latest data transmitted */
<>	144:ef7eb2e8f9f7	2019	if(husart->TxXferCount == 0)
<>	144:ef7eb2e8f9f7	2020	{
<>	144:ef7eb2e8f9f7	2021	__HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
<>	144:ef7eb2e8f9f7	2022	}
<>	144:ef7eb2e8f9f7	2023	}
<>	144:ef7eb2e8f9f7	2024	}
<>	144:ef7eb2e8f9f7	2025
<>	144:ef7eb2e8f9f7	2026	if(husart->RxXferCount != 0x00)
<>	144:ef7eb2e8f9f7	2027	{
<>	144:ef7eb2e8f9f7	2028	if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
<>	144:ef7eb2e8f9f7	2029	{
<>	144:ef7eb2e8f9f7	2030	if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
<>	144:ef7eb2e8f9f7	2031	{
<>	144:ef7eb2e8f9f7	2032	tmp = (uint16_t*) husart->pRxBuffPtr;
<>	144:ef7eb2e8f9f7	2033	*tmp = (uint16_t)(husart->Instance->RDR & uhMask);
<>	144:ef7eb2e8f9f7	2034	husart->pRxBuffPtr += 2;
<>	144:ef7eb2e8f9f7	2035	}
<>	144:ef7eb2e8f9f7	2036	else
<>	144:ef7eb2e8f9f7	2037	{
<>	144:ef7eb2e8f9f7	2038	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
<>	144:ef7eb2e8f9f7	2039	}
<>	144:ef7eb2e8f9f7	2040	husart->RxXferCount--;
<>	144:ef7eb2e8f9f7	2041	}
<>	144:ef7eb2e8f9f7	2042	}
<>	144:ef7eb2e8f9f7	2043
<>	144:ef7eb2e8f9f7	2044	/* Check the latest data received */
<>	144:ef7eb2e8f9f7	2045	if(husart->RxXferCount == 0)
<>	144:ef7eb2e8f9f7	2046	{
<>	144:ef7eb2e8f9f7	2047	__HAL_USART_DISABLE_IT(husart, USART_IT_RXNE);
<>	144:ef7eb2e8f9f7	2048
<>	144:ef7eb2e8f9f7	2049	/* Disable the USART Parity Error Interrupt */
<>	144:ef7eb2e8f9f7	2050	__HAL_USART_DISABLE_IT(husart, USART_IT_PE);
<>	144:ef7eb2e8f9f7	2051
<>	144:ef7eb2e8f9f7	2052	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<>	144:ef7eb2e8f9f7	2053	__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
<>	144:ef7eb2e8f9f7	2054
<>	144:ef7eb2e8f9f7	2055	husart->State = HAL_USART_STATE_READY;
<>	144:ef7eb2e8f9f7	2056
<>	144:ef7eb2e8f9f7	2057	HAL_USART_TxRxCpltCallback(husart);
<>	144:ef7eb2e8f9f7	2058
<>	144:ef7eb2e8f9f7	2059	return HAL_OK;
<>	144:ef7eb2e8f9f7	2060	}
<>	144:ef7eb2e8f9f7	2061
<>	144:ef7eb2e8f9f7	2062	return HAL_OK;
<>	144:ef7eb2e8f9f7	2063	}
<>	144:ef7eb2e8f9f7	2064	else
<>	144:ef7eb2e8f9f7	2065	{
<>	144:ef7eb2e8f9f7	2066	return HAL_BUSY;
<>	144:ef7eb2e8f9f7	2067	}
<>	144:ef7eb2e8f9f7	2068	}
<>	144:ef7eb2e8f9f7	2069
<>	144:ef7eb2e8f9f7	2070	/**
<>	144:ef7eb2e8f9f7	2071	* @}
<>	144:ef7eb2e8f9f7	2072	*/
<>	144:ef7eb2e8f9f7	2073
<>	144:ef7eb2e8f9f7	2074	#endif /* HAL_USART_MODULE_ENABLED */
<>	144:ef7eb2e8f9f7	2075	/**
<>	144:ef7eb2e8f9f7	2076	* @}
<>	144:ef7eb2e8f9f7	2077	*/
<>	144:ef7eb2e8f9f7	2078
<>	144:ef7eb2e8f9f7	2079	/**
<>	144:ef7eb2e8f9f7	2080	* @}
<>	144:ef7eb2e8f9f7	2081	*/
<>	144:ef7eb2e8f9f7	2082
<>	144:ef7eb2e8f9f7	2083	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/