mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pwr.h@181:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
181:57724642e740
Parent:
167:e84263d55307 
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal_pwr.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of PWR HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
AnnaBridge 167:e84263d55307 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32L4xx_HAL_PWR_H
<> 144:ef7eb2e8f9f7 38 #define __STM32L4xx_HAL_PWR_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 45 #include "stm32l4xx_hal_def.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup PWR
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @defgroup PWR_Exported_Types PWR Exported Types
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /**
<> 144:ef7eb2e8f9f7 62 * @brief PWR PVD configuration structure definition
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64 typedef struct
<> 144:ef7eb2e8f9f7 65 {
<> 144:ef7eb2e8f9f7 66 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
<> 144:ef7eb2e8f9f7 67 This parameter can be a value of @ref PWR_PVD_detection_level. */
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
<> 144:ef7eb2e8f9f7 70 This parameter can be a value of @ref PWR_PVD_Mode. */
<> 144:ef7eb2e8f9f7 71 }PWR_PVDTypeDef;
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 /**
<> 144:ef7eb2e8f9f7 75 * @}
<> 144:ef7eb2e8f9f7 76 */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /** @defgroup PWR_Exported_Constants PWR Exported Constants
<> 144:ef7eb2e8f9f7 81 * @{
<> 144:ef7eb2e8f9f7 82 */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels
<> 144:ef7eb2e8f9f7 86 * @{
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */
<> 144:ef7eb2e8f9f7 89 #define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */
<> 144:ef7eb2e8f9f7 90 #define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */
<> 144:ef7eb2e8f9f7 91 #define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */
<> 144:ef7eb2e8f9f7 92 #define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */
<> 144:ef7eb2e8f9f7 93 #define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */
<> 144:ef7eb2e8f9f7 94 #define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */
<> 144:ef7eb2e8f9f7 95 #define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */
<> 144:ef7eb2e8f9f7 96 /**
<> 144:ef7eb2e8f9f7 97 * @}
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */
<> 144:ef7eb2e8f9f7 104 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
<> 144:ef7eb2e8f9f7 105 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 106 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 107 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
<> 144:ef7eb2e8f9f7 108 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 109 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @}
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
<> 144:ef7eb2e8f9f7 118 * @{
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */
<> 144:ef7eb2e8f9f7 121 #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */
<> 144:ef7eb2e8f9f7 122 /**
<> 144:ef7eb2e8f9f7 123 * @}
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
<> 144:ef7eb2e8f9f7 127 * @{
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */
<> 144:ef7eb2e8f9f7 130 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */
<> 144:ef7eb2e8f9f7 131 /**
<> 144:ef7eb2e8f9f7 132 * @}
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
<> 144:ef7eb2e8f9f7 136 * @{
<> 144:ef7eb2e8f9f7 137 */
<> 144:ef7eb2e8f9f7 138 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */
<> 144:ef7eb2e8f9f7 139 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */
<> 144:ef7eb2e8f9f7 140 /**
<> 144:ef7eb2e8f9f7 141 * @}
<> 144:ef7eb2e8f9f7 142 */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
<> 144:ef7eb2e8f9f7 146 * @{
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
<> 144:ef7eb2e8f9f7 149 /**
<> 144:ef7eb2e8f9f7 150 * @}
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line
<> 144:ef7eb2e8f9f7 154 * @{
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156 #define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */
<> 144:ef7eb2e8f9f7 157 /**
<> 144:ef7eb2e8f9f7 158 * @}
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /**
<> 144:ef7eb2e8f9f7 162 * @}
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 166 /** @defgroup PWR_Exported_Macros PWR Exported Macros
<> 144:ef7eb2e8f9f7 167 * @{
<> 144:ef7eb2e8f9f7 168 */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /** @brief Check whether or not a specific PWR flag is set.
<> 144:ef7eb2e8f9f7 171 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 172 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 173 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 174 * was received from the WKUP pin 1.
<> 144:ef7eb2e8f9f7 175 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 176 * was received from the WKUP pin 2.
<> 144:ef7eb2e8f9f7 177 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 178 * was received from the WKUP pin 3.
<> 144:ef7eb2e8f9f7 179 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 180 * was received from the WKUP pin 4.
<> 144:ef7eb2e8f9f7 181 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 182 * was received from the WKUP pin 5.
<> 144:ef7eb2e8f9f7 183 * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system
<> 144:ef7eb2e8f9f7 184 * entered StandBy mode.
<> 144:ef7eb2e8f9f7 185 * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on
<> 144:ef7eb2e8f9f7 186 * the internal wakeup line.
<> 144:ef7eb2e8f9f7 187 * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the
<> 144:ef7eb2e8f9f7 188 * low-power regulator is ready.
<> 144:ef7eb2e8f9f7 189 * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the
<> 144:ef7eb2e8f9f7 190 * regulator is ready in main mode or is in low-power mode.
<> 144:ef7eb2e8f9f7 191 * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready
<> 144:ef7eb2e8f9f7 192 * in the selected voltage range or is still changing to the required voltage level.
<> 144:ef7eb2e8f9f7 193 * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is
<> 144:ef7eb2e8f9f7 194 * below or above the selected PVD threshold.
<> 144:ef7eb2e8f9f7 195 * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is
<> 144:ef7eb2e8f9f7 196 * is below or above PVM1 threshold (applicable when USB feature is supported).
<> 144:ef7eb2e8f9f7 197 @if STM32L486xx
<> 144:ef7eb2e8f9f7 198 * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is
<> 144:ef7eb2e8f9f7 199 * is below or above PVM2 threshold (applicable when VDDIO2 is present on device).
<> 144:ef7eb2e8f9f7 200 @endif
<> 144:ef7eb2e8f9f7 201 * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is
<> 144:ef7eb2e8f9f7 202 * is below or above PVM3 threshold.
<> 144:ef7eb2e8f9f7 203 * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is
<> 144:ef7eb2e8f9f7 204 * is below or above PVM4 threshold.
<> 144:ef7eb2e8f9f7 205 *
<> 144:ef7eb2e8f9f7 206 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208 #define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\
<> 144:ef7eb2e8f9f7 209 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\
<> 144:ef7eb2e8f9f7 210 (PWR->SR2 & (1U << ((__FLAG__) & 31U))) )
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /** @brief Clear a specific PWR flag.
<> 144:ef7eb2e8f9f7 213 * @param __FLAG__: specifies the flag to clear.
<> 144:ef7eb2e8f9f7 214 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 215 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 216 * was received from the WKUP pin 1.
<> 144:ef7eb2e8f9f7 217 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 218 * was received from the WKUP pin 2.
<> 144:ef7eb2e8f9f7 219 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 220 * was received from the WKUP pin 3.
<> 144:ef7eb2e8f9f7 221 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 222 * was received from the WKUP pin 4.
<> 144:ef7eb2e8f9f7 223 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
<> 144:ef7eb2e8f9f7 224 * was received from the WKUP pin 5.
<> 144:ef7eb2e8f9f7 225 * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags.
<> 144:ef7eb2e8f9f7 226 * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system
<> 144:ef7eb2e8f9f7 227 * entered Standby mode.
<> 144:ef7eb2e8f9f7 228 * @retval None
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\
<> 144:ef7eb2e8f9f7 231 (PWR->SCR = (__FLAG__)) :\
<> 144:ef7eb2e8f9f7 232 (PWR->SCR = (1U << ((__FLAG__) & 31U))) )
<> 144:ef7eb2e8f9f7 233 /**
<> 144:ef7eb2e8f9f7 234 * @brief Enable the PVD Extended Interrupt Line.
<> 144:ef7eb2e8f9f7 235 * @retval None
<> 144:ef7eb2e8f9f7 236 */
<> 144:ef7eb2e8f9f7 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @brief Disable the PVD Extended Interrupt Line.
<> 144:ef7eb2e8f9f7 241 * @retval None
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @brief Enable the PVD Event Line.
<> 144:ef7eb2e8f9f7 247 * @retval None
<> 144:ef7eb2e8f9f7 248 */
<> 144:ef7eb2e8f9f7 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD)
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @brief Disable the PVD Event Line.
<> 144:ef7eb2e8f9f7 253 * @retval None
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD)
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /**
<> 144:ef7eb2e8f9f7 258 * @brief Enable the PVD Extended Interrupt Rising Trigger.
<> 144:ef7eb2e8f9f7 259 * @retval None
<> 144:ef7eb2e8f9f7 260 */
<> 144:ef7eb2e8f9f7 261 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 /**
<> 144:ef7eb2e8f9f7 264 * @brief Disable the PVD Extended Interrupt Rising Trigger.
<> 144:ef7eb2e8f9f7 265 * @retval None
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @brief Enable the PVD Extended Interrupt Falling Trigger.
<> 144:ef7eb2e8f9f7 271 * @retval None
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /**
<> 144:ef7eb2e8f9f7 277 * @brief Disable the PVD Extended Interrupt Falling Trigger.
<> 144:ef7eb2e8f9f7 278 * @retval None
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /**
<> 144:ef7eb2e8f9f7 284 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
<> 144:ef7eb2e8f9f7 285 * @retval None
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
<> 144:ef7eb2e8f9f7 288 do { \
<> 144:ef7eb2e8f9f7 289 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 290 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 291 } while(0)
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /**
<> 144:ef7eb2e8f9f7 294 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
<> 144:ef7eb2e8f9f7 295 * @retval None
<> 144:ef7eb2e8f9f7 296 */
<> 144:ef7eb2e8f9f7 297 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
<> 144:ef7eb2e8f9f7 298 do { \
<> 144:ef7eb2e8f9f7 299 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
<> 144:ef7eb2e8f9f7 300 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
<> 144:ef7eb2e8f9f7 301 } while(0)
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @brief Generate a Software interrupt on selected EXTI line.
<> 144:ef7eb2e8f9f7 305 * @retval None
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 /**
<> 144:ef7eb2e8f9f7 310 * @brief Check whether or not the PVD EXTI interrupt flag is set.
<> 144:ef7eb2e8f9f7 311 * @retval EXTI PVD Line Status.
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR1 & PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @brief Clear the PVD EXTI interrupt flag.
<> 144:ef7eb2e8f9f7 317 * @retval None
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD)
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /**
<> 144:ef7eb2e8f9f7 322 * @}
<> 144:ef7eb2e8f9f7 323 */
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /* Private macros --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 327 /** @addtogroup PWR_Private_Macros PWR Private Macros
<> 144:ef7eb2e8f9f7 328 * @{
<> 144:ef7eb2e8f9f7 329 */
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
<> 144:ef7eb2e8f9f7 332 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
<> 144:ef7eb2e8f9f7 333 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
<> 144:ef7eb2e8f9f7 334 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\
<> 144:ef7eb2e8f9f7 337 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\
<> 144:ef7eb2e8f9f7 338 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\
<> 144:ef7eb2e8f9f7 339 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\
<> 144:ef7eb2e8f9f7 340 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\
<> 144:ef7eb2e8f9f7 341 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\
<> 144:ef7eb2e8f9f7 342 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
<> 144:ef7eb2e8f9f7 345 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @}
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /* Include PWR HAL Extended module */
<> 144:ef7eb2e8f9f7 356 #include "stm32l4xx_hal_pwr_ex.h"
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
<> 144:ef7eb2e8f9f7 361 * @{
<> 144:ef7eb2e8f9f7 362 */
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 365 * @{
<> 144:ef7eb2e8f9f7 366 */
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 /* Initialization and de-initialization functions *******************************/
<> 144:ef7eb2e8f9f7 369 void HAL_PWR_DeInit(void);
<> 144:ef7eb2e8f9f7 370 void HAL_PWR_EnableBkUpAccess(void);
<> 144:ef7eb2e8f9f7 371 void HAL_PWR_DisableBkUpAccess(void);
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /**
<> 144:ef7eb2e8f9f7 374 * @}
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
<> 144:ef7eb2e8f9f7 378 * @{
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 382 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
<> 144:ef7eb2e8f9f7 383 void HAL_PWR_EnablePVD(void);
<> 144:ef7eb2e8f9f7 384 void HAL_PWR_DisablePVD(void);
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /* WakeUp pins configuration functions ****************************************/
<> 144:ef7eb2e8f9f7 388 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
<> 144:ef7eb2e8f9f7 389 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 /* Low Power modes configuration functions ************************************/
<> 144:ef7eb2e8f9f7 392 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
<> 144:ef7eb2e8f9f7 393 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
<> 144:ef7eb2e8f9f7 394 void HAL_PWR_EnterSTANDBYMode(void);
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 void HAL_PWR_EnableSleepOnExit(void);
<> 144:ef7eb2e8f9f7 397 void HAL_PWR_DisableSleepOnExit(void);
<> 144:ef7eb2e8f9f7 398 void HAL_PWR_EnableSEVOnPend(void);
<> 144:ef7eb2e8f9f7 399 void HAL_PWR_DisableSEVOnPend(void);
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 void HAL_PWR_PVDCallback(void);
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 /**
<> 144:ef7eb2e8f9f7 405 * @}
<> 144:ef7eb2e8f9f7 406 */
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 /**
<> 144:ef7eb2e8f9f7 409 * @}
<> 144:ef7eb2e8f9f7 410 */
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /**
<> 144:ef7eb2e8f9f7 413 * @}
<> 144:ef7eb2e8f9f7 414 */
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /**
<> 144:ef7eb2e8f9f7 417 * @}
<> 144:ef7eb2e8f9f7 418 */
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 421 }
<> 144:ef7eb2e8f9f7 422 #endif
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 #endif /* __STM32L4xx_HAL_PWR_H */
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/