mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2s.c@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Child:
- 184:08ed48f1de7f
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /** |
<> | 149:156823d33999 | 2 | ****************************************************************************** |
<> | 149:156823d33999 | 3 | * @file stm32l1xx_hal_i2s.c |
<> | 149:156823d33999 | 4 | * @author MCD Application Team |
<> | 149:156823d33999 | 5 | * @version V1.2.0 |
<> | 149:156823d33999 | 6 | * @date 01-July-2016 |
<> | 149:156823d33999 | 7 | * @brief I2S HAL module driver. |
<> | 149:156823d33999 | 8 | * This file provides firmware functions to manage the following |
<> | 149:156823d33999 | 9 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
<> | 149:156823d33999 | 10 | * + Initialization and de-initialization functions |
<> | 149:156823d33999 | 11 | * + IO operation functions |
<> | 149:156823d33999 | 12 | * + Peripheral State and Errors functions |
<> | 149:156823d33999 | 13 | @verbatim |
<> | 149:156823d33999 | 14 | =============================================================================== |
<> | 149:156823d33999 | 15 | ##### How to use this driver ##### |
<> | 149:156823d33999 | 16 | =============================================================================== |
<> | 149:156823d33999 | 17 | [..] |
<> | 149:156823d33999 | 18 | The I2S HAL driver can be used as follow: |
<> | 149:156823d33999 | 19 | |
<> | 149:156823d33999 | 20 | (#) Declare a I2S_HandleTypeDef handle structure. |
<> | 149:156823d33999 | 21 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
<> | 149:156823d33999 | 22 | (##) Enable the SPIx interface clock. |
<> | 149:156823d33999 | 23 | (##) I2S pins configuration: |
<> | 149:156823d33999 | 24 | (+++) Enable the clock for the I2S GPIOs. |
<> | 149:156823d33999 | 25 | (+++) Configure these I2S pins as alternate function. |
<> | 149:156823d33999 | 26 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
<> | 149:156823d33999 | 27 | and HAL_I2S_Receive_IT() APIs). |
<> | 149:156823d33999 | 28 | (+++) Configure the I2Sx interrupt priority. |
<> | 149:156823d33999 | 29 | (+++) Enable the NVIC I2S IRQ handle. |
<> | 149:156823d33999 | 30 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
<> | 149:156823d33999 | 31 | and HAL_I2S_Receive_DMA() APIs: |
<> | 149:156823d33999 | 32 | (+++) Declare a DMA handle structure for the Tx/Rx Channel. |
<> | 149:156823d33999 | 33 | (+++) Enable the DMAx interface clock. |
<> | 149:156823d33999 | 34 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
<> | 149:156823d33999 | 35 | (+++) Configure the DMA Tx/Rx Channel. |
<> | 149:156823d33999 | 36 | (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle. |
<> | 149:156823d33999 | 37 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
<> | 149:156823d33999 | 38 | DMA Tx/Rx Channel. |
<> | 149:156823d33999 | 39 | |
<> | 149:156823d33999 | 40 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
<> | 149:156823d33999 | 41 | using HAL_I2S_Init() function. |
<> | 149:156823d33999 | 42 | |
<> | 149:156823d33999 | 43 | -@- The specific I2S interrupts (Transmission complete interrupt, |
<> | 149:156823d33999 | 44 | RXNE interrupt and Error Interrupts) will be managed using the macros |
<> | 149:156823d33999 | 45 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process. |
<> | 149:156823d33999 | 46 | -@- Make sure that either: |
<> | 149:156823d33999 | 47 | (+@) External clock source is configured after setting correctly |
<> | 149:156823d33999 | 48 | the define constant HSE_VALUE in the stm32l1xx_hal_conf.h file. |
<> | 149:156823d33999 | 49 | |
<> | 149:156823d33999 | 50 | (#) Three mode of operations are available within this driver : |
<> | 149:156823d33999 | 51 | |
<> | 149:156823d33999 | 52 | *** Polling mode IO operation *** |
<> | 149:156823d33999 | 53 | ================================= |
<> | 149:156823d33999 | 54 | [..] |
<> | 149:156823d33999 | 55 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
<> | 149:156823d33999 | 56 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
<> | 149:156823d33999 | 57 | |
<> | 149:156823d33999 | 58 | *** Interrupt mode IO operation *** |
<> | 149:156823d33999 | 59 | =================================== |
<> | 149:156823d33999 | 60 | [..] |
<> | 149:156823d33999 | 61 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
<> | 149:156823d33999 | 62 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
<> | 149:156823d33999 | 63 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
<> | 149:156823d33999 | 64 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
<> | 149:156823d33999 | 65 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
<> | 149:156823d33999 | 66 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
<> | 149:156823d33999 | 67 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
<> | 149:156823d33999 | 68 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
<> | 149:156823d33999 | 69 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
<> | 149:156823d33999 | 70 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
<> | 149:156823d33999 | 71 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
<> | 149:156823d33999 | 72 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
<> | 149:156823d33999 | 73 | |
<> | 149:156823d33999 | 74 | *** DMA mode IO operation *** |
<> | 149:156823d33999 | 75 | ============================== |
<> | 149:156823d33999 | 76 | [..] |
<> | 149:156823d33999 | 77 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
<> | 149:156823d33999 | 78 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
<> | 149:156823d33999 | 79 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
<> | 149:156823d33999 | 80 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
<> | 149:156823d33999 | 81 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
<> | 149:156823d33999 | 82 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
<> | 149:156823d33999 | 83 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
<> | 149:156823d33999 | 84 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
<> | 149:156823d33999 | 85 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
<> | 149:156823d33999 | 86 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
<> | 149:156823d33999 | 87 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
<> | 149:156823d33999 | 88 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
<> | 149:156823d33999 | 89 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
<> | 149:156823d33999 | 90 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
<> | 149:156823d33999 | 91 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
<> | 149:156823d33999 | 92 | |
<> | 149:156823d33999 | 93 | *** I2S HAL driver macros list *** |
<> | 149:156823d33999 | 94 | ============================================= |
<> | 149:156823d33999 | 95 | [..] |
<> | 149:156823d33999 | 96 | Below the list of most used macros in USART HAL driver. |
<> | 149:156823d33999 | 97 | |
<> | 149:156823d33999 | 98 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
<> | 149:156823d33999 | 99 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
<> | 149:156823d33999 | 100 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
<> | 149:156823d33999 | 101 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
<> | 149:156823d33999 | 102 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
<> | 149:156823d33999 | 103 | |
<> | 149:156823d33999 | 104 | [..] |
<> | 149:156823d33999 | 105 | (@) You can refer to the I2S HAL driver header file for more useful macros |
<> | 149:156823d33999 | 106 | |
<> | 149:156823d33999 | 107 | @endverbatim |
<> | 149:156823d33999 | 108 | ****************************************************************************** |
<> | 149:156823d33999 | 109 | * @attention |
<> | 149:156823d33999 | 110 | * |
<> | 149:156823d33999 | 111 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 149:156823d33999 | 112 | * |
<> | 149:156823d33999 | 113 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 149:156823d33999 | 114 | * are permitted provided that the following conditions are met: |
<> | 149:156823d33999 | 115 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 149:156823d33999 | 116 | * this list of conditions and the following disclaimer. |
<> | 149:156823d33999 | 117 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 149:156823d33999 | 118 | * this list of conditions and the following disclaimer in the documentation |
<> | 149:156823d33999 | 119 | * and/or other materials provided with the distribution. |
<> | 149:156823d33999 | 120 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 149:156823d33999 | 121 | * may be used to endorse or promote products derived from this software |
<> | 149:156823d33999 | 122 | * without specific prior written permission. |
<> | 149:156823d33999 | 123 | * |
<> | 149:156823d33999 | 124 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 149:156823d33999 | 125 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 149:156823d33999 | 126 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 149:156823d33999 | 127 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 149:156823d33999 | 128 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 149:156823d33999 | 129 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 149:156823d33999 | 130 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 149:156823d33999 | 131 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 149:156823d33999 | 132 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 149:156823d33999 | 133 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 149:156823d33999 | 134 | * |
<> | 149:156823d33999 | 135 | ****************************************************************************** |
<> | 149:156823d33999 | 136 | */ |
<> | 149:156823d33999 | 137 | |
<> | 149:156823d33999 | 138 | /* Includes ------------------------------------------------------------------*/ |
<> | 149:156823d33999 | 139 | #include "stm32l1xx_hal.h" |
<> | 149:156823d33999 | 140 | |
<> | 149:156823d33999 | 141 | /** @addtogroup STM32L1xx_HAL_Driver |
<> | 149:156823d33999 | 142 | * @{ |
<> | 149:156823d33999 | 143 | */ |
<> | 149:156823d33999 | 144 | |
<> | 149:156823d33999 | 145 | /** @defgroup I2S I2S |
<> | 149:156823d33999 | 146 | * @brief I2S HAL module driver |
<> | 149:156823d33999 | 147 | * @{ |
<> | 149:156823d33999 | 148 | */ |
<> | 149:156823d33999 | 149 | |
<> | 149:156823d33999 | 150 | #ifdef HAL_I2S_MODULE_ENABLED |
<> | 149:156823d33999 | 151 | #if defined(STM32L100xC) || \ |
<> | 149:156823d33999 | 152 | defined(STM32L151xC) || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xE) || defined(STM32L151xDX) || \ |
<> | 149:156823d33999 | 153 | defined(STM32L152xC) || defined(STM32L152xCA) || defined(STM32L152xD) || defined(STM32L152xE) || defined(STM32L152xDX) || \ |
<> | 149:156823d33999 | 154 | defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) || defined(STM32L162xDX) |
<> | 149:156823d33999 | 155 | |
<> | 149:156823d33999 | 156 | /* Private typedef -----------------------------------------------------------*/ |
<> | 149:156823d33999 | 157 | /* Private define ------------------------------------------------------------*/ |
<> | 149:156823d33999 | 158 | /* Private macro -------------------------------------------------------------*/ |
<> | 149:156823d33999 | 159 | /* Private variables ---------------------------------------------------------*/ |
<> | 149:156823d33999 | 160 | /* Private function prototypes -----------------------------------------------*/ |
<> | 149:156823d33999 | 161 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
<> | 149:156823d33999 | 162 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
<> | 149:156823d33999 | 163 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
<> | 149:156823d33999 | 164 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
<> | 149:156823d33999 | 165 | static void I2S_DMAError(DMA_HandleTypeDef *hdma); |
<> | 149:156823d33999 | 166 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
<> | 149:156823d33999 | 167 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
<> | 149:156823d33999 | 168 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout); |
<> | 149:156823d33999 | 169 | |
<> | 149:156823d33999 | 170 | /* Private functions ---------------------------------------------------------*/ |
<> | 149:156823d33999 | 171 | |
<> | 149:156823d33999 | 172 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
<> | 149:156823d33999 | 173 | * @{ |
<> | 149:156823d33999 | 174 | */ |
<> | 149:156823d33999 | 175 | |
<> | 149:156823d33999 | 176 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
<> | 149:156823d33999 | 177 | * @brief Initialization and Configuration functions |
<> | 149:156823d33999 | 178 | * |
<> | 149:156823d33999 | 179 | @verbatim |
<> | 149:156823d33999 | 180 | =============================================================================== |
<> | 149:156823d33999 | 181 | ##### Initialization and de-initialization functions ##### |
<> | 149:156823d33999 | 182 | =============================================================================== |
<> | 149:156823d33999 | 183 | [..] This subsection provides a set of functions allowing to initialize and |
<> | 149:156823d33999 | 184 | de-initialiaze the I2Sx peripheral in simplex mode: |
<> | 149:156823d33999 | 185 | |
<> | 149:156823d33999 | 186 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
<> | 149:156823d33999 | 187 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
<> | 149:156823d33999 | 188 | |
<> | 149:156823d33999 | 189 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
<> | 149:156823d33999 | 190 | the selected configuration: |
<> | 149:156823d33999 | 191 | (++) Mode |
<> | 149:156823d33999 | 192 | (++) Standard |
<> | 149:156823d33999 | 193 | (++) Data Format |
<> | 149:156823d33999 | 194 | (++) MCLK Output |
<> | 149:156823d33999 | 195 | (++) Audio frequency |
<> | 149:156823d33999 | 196 | (++) Polarity |
<> | 149:156823d33999 | 197 | |
<> | 149:156823d33999 | 198 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
<> | 149:156823d33999 | 199 | of the selected I2Sx periperal. |
<> | 149:156823d33999 | 200 | @endverbatim |
<> | 149:156823d33999 | 201 | * @{ |
<> | 149:156823d33999 | 202 | */ |
<> | 149:156823d33999 | 203 | |
<> | 149:156823d33999 | 204 | /** |
<> | 149:156823d33999 | 205 | * @brief Initializes the I2S according to the specified parameters |
<> | 149:156823d33999 | 206 | * in the I2S_InitTypeDef and create the associated handle. |
<> | 149:156823d33999 | 207 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 208 | * the configuration information for I2S module |
<> | 149:156823d33999 | 209 | * @retval HAL status |
<> | 149:156823d33999 | 210 | */ |
<> | 149:156823d33999 | 211 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 212 | { |
<> | 149:156823d33999 | 213 | uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1; |
<> | 149:156823d33999 | 214 | uint32_t tmp = 0, i2sclk = 0; |
<> | 149:156823d33999 | 215 | |
<> | 149:156823d33999 | 216 | /* Check the I2S handle allocation */ |
<> | 149:156823d33999 | 217 | if(hi2s == NULL) |
<> | 149:156823d33999 | 218 | { |
<> | 149:156823d33999 | 219 | return HAL_ERROR; |
<> | 149:156823d33999 | 220 | } |
<> | 149:156823d33999 | 221 | |
<> | 149:156823d33999 | 222 | /* Check the I2S parameters */ |
<> | 149:156823d33999 | 223 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
<> | 149:156823d33999 | 224 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
<> | 149:156823d33999 | 225 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
<> | 149:156823d33999 | 226 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
<> | 149:156823d33999 | 227 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
<> | 149:156823d33999 | 228 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
<> | 149:156823d33999 | 229 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
<> | 149:156823d33999 | 230 | |
<> | 149:156823d33999 | 231 | if(hi2s->State == HAL_I2S_STATE_RESET) |
<> | 149:156823d33999 | 232 | { |
<> | 149:156823d33999 | 233 | /* Allocate lock resource and initialize it */ |
<> | 149:156823d33999 | 234 | hi2s->Lock = HAL_UNLOCKED; |
<> | 149:156823d33999 | 235 | |
<> | 149:156823d33999 | 236 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
<> | 149:156823d33999 | 237 | HAL_I2S_MspInit(hi2s); |
<> | 149:156823d33999 | 238 | } |
<> | 149:156823d33999 | 239 | |
<> | 149:156823d33999 | 240 | hi2s->State = HAL_I2S_STATE_BUSY; |
<> | 149:156823d33999 | 241 | |
<> | 149:156823d33999 | 242 | /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ |
<> | 149:156823d33999 | 243 | if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT) |
<> | 149:156823d33999 | 244 | { |
<> | 149:156823d33999 | 245 | i2sodd = (uint32_t)0; |
<> | 149:156823d33999 | 246 | i2sdiv = (uint32_t)2; |
<> | 149:156823d33999 | 247 | } |
<> | 149:156823d33999 | 248 | /* If the requested audio frequency is not the default, compute the prescaler */ |
<> | 149:156823d33999 | 249 | else |
<> | 149:156823d33999 | 250 | { |
<> | 149:156823d33999 | 251 | /* Check the frame length (For the Prescaler computing) *******************/ |
<> | 149:156823d33999 | 252 | if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B) |
<> | 149:156823d33999 | 253 | { |
<> | 149:156823d33999 | 254 | /* Packet length is 16 bits */ |
<> | 149:156823d33999 | 255 | packetlength = 1; |
<> | 149:156823d33999 | 256 | } |
<> | 149:156823d33999 | 257 | else |
<> | 149:156823d33999 | 258 | { |
<> | 149:156823d33999 | 259 | /* Packet length is 32 bits */ |
<> | 149:156823d33999 | 260 | packetlength = 2; |
<> | 149:156823d33999 | 261 | } |
<> | 149:156823d33999 | 262 | |
<> | 149:156823d33999 | 263 | /* Get the source clock value: based on System Clock value */ |
<> | 149:156823d33999 | 264 | i2sclk = HAL_RCC_GetSysClockFreq(); |
<> | 149:156823d33999 | 265 | |
<> | 149:156823d33999 | 266 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
<> | 149:156823d33999 | 267 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
<> | 149:156823d33999 | 268 | { |
<> | 149:156823d33999 | 269 | /* MCLK output is enabled */ |
<> | 149:156823d33999 | 270 | tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5); |
<> | 149:156823d33999 | 271 | } |
<> | 149:156823d33999 | 272 | else |
<> | 149:156823d33999 | 273 | { |
<> | 149:156823d33999 | 274 | /* MCLK output is disabled */ |
<> | 149:156823d33999 | 275 | tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5); |
<> | 149:156823d33999 | 276 | } |
<> | 149:156823d33999 | 277 | |
<> | 149:156823d33999 | 278 | /* Remove the flatting point */ |
<> | 149:156823d33999 | 279 | tmp = tmp / 10; |
<> | 149:156823d33999 | 280 | |
<> | 149:156823d33999 | 281 | /* Check the parity of the divider */ |
<> | 149:156823d33999 | 282 | i2sodd = (uint32_t)(tmp & (uint32_t)1); |
<> | 149:156823d33999 | 283 | |
<> | 149:156823d33999 | 284 | /* Compute the i2sdiv prescaler */ |
<> | 149:156823d33999 | 285 | i2sdiv = (uint32_t)((tmp - i2sodd) / 2); |
<> | 149:156823d33999 | 286 | |
<> | 149:156823d33999 | 287 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
<> | 149:156823d33999 | 288 | i2sodd = (uint32_t) (i2sodd << 8); |
<> | 149:156823d33999 | 289 | } |
<> | 149:156823d33999 | 290 | |
<> | 149:156823d33999 | 291 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
<> | 149:156823d33999 | 292 | if((i2sdiv < 2) || (i2sdiv > 0xFF)) |
<> | 149:156823d33999 | 293 | { |
<> | 149:156823d33999 | 294 | /* Set the default values */ |
<> | 149:156823d33999 | 295 | i2sdiv = 2; |
<> | 149:156823d33999 | 296 | i2sodd = 0; |
<> | 149:156823d33999 | 297 | } |
<> | 149:156823d33999 | 298 | |
<> | 149:156823d33999 | 299 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/ |
<> | 149:156823d33999 | 300 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
<> | 149:156823d33999 | 301 | /* And configure the I2S with the I2S_InitStruct values */ |
<> | 149:156823d33999 | 302 | MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\ |
<> | 149:156823d33999 | 303 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\ |
<> | 149:156823d33999 | 304 | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\ |
<> | 149:156823d33999 | 305 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD),\ |
<> | 149:156823d33999 | 306 | (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\ |
<> | 149:156823d33999 | 307 | hi2s->Init.Standard | hi2s->Init.DataFormat |\ |
<> | 149:156823d33999 | 308 | hi2s->Init.CPOL)); |
<> | 149:156823d33999 | 309 | |
<> | 149:156823d33999 | 310 | /* Write to SPIx I2SPR register the computed value */ |
<> | 149:156823d33999 | 311 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput)); |
<> | 149:156823d33999 | 312 | |
<> | 149:156823d33999 | 313 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 314 | hi2s->State= HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 315 | |
<> | 149:156823d33999 | 316 | return HAL_OK; |
<> | 149:156823d33999 | 317 | } |
<> | 149:156823d33999 | 318 | |
<> | 149:156823d33999 | 319 | /** |
<> | 149:156823d33999 | 320 | * @brief DeInitializes the I2S peripheral |
<> | 149:156823d33999 | 321 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 322 | * the configuration information for I2S module |
<> | 149:156823d33999 | 323 | * @retval HAL status |
<> | 149:156823d33999 | 324 | */ |
<> | 149:156823d33999 | 325 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 326 | { |
<> | 149:156823d33999 | 327 | /* Check the I2S handle allocation */ |
<> | 149:156823d33999 | 328 | if(hi2s == NULL) |
<> | 149:156823d33999 | 329 | { |
<> | 149:156823d33999 | 330 | return HAL_ERROR; |
<> | 149:156823d33999 | 331 | } |
<> | 149:156823d33999 | 332 | |
<> | 149:156823d33999 | 333 | hi2s->State = HAL_I2S_STATE_BUSY; |
<> | 149:156823d33999 | 334 | |
<> | 149:156823d33999 | 335 | /* Disable the I2S Peripheral Clock */ |
<> | 149:156823d33999 | 336 | __HAL_I2S_DISABLE(hi2s); |
<> | 149:156823d33999 | 337 | |
<> | 149:156823d33999 | 338 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
<> | 149:156823d33999 | 339 | HAL_I2S_MspDeInit(hi2s); |
<> | 149:156823d33999 | 340 | |
<> | 149:156823d33999 | 341 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 342 | hi2s->State = HAL_I2S_STATE_RESET; |
<> | 149:156823d33999 | 343 | |
<> | 149:156823d33999 | 344 | /* Release Lock */ |
<> | 149:156823d33999 | 345 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 346 | |
<> | 149:156823d33999 | 347 | return HAL_OK; |
<> | 149:156823d33999 | 348 | } |
<> | 149:156823d33999 | 349 | |
<> | 149:156823d33999 | 350 | /** |
<> | 149:156823d33999 | 351 | * @brief I2S MSP Init |
<> | 149:156823d33999 | 352 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 353 | * the configuration information for I2S module |
<> | 149:156823d33999 | 354 | * @retval None |
<> | 149:156823d33999 | 355 | */ |
<> | 149:156823d33999 | 356 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 357 | { |
<> | 149:156823d33999 | 358 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 359 | UNUSED(hi2s); |
<> | 149:156823d33999 | 360 | |
<> | 149:156823d33999 | 361 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 362 | the HAL_I2S_MspInit could be implemented in the user file |
<> | 149:156823d33999 | 363 | */ |
<> | 149:156823d33999 | 364 | } |
<> | 149:156823d33999 | 365 | |
<> | 149:156823d33999 | 366 | /** |
<> | 149:156823d33999 | 367 | * @brief I2S MSP DeInit |
<> | 149:156823d33999 | 368 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 369 | * the configuration information for I2S module |
<> | 149:156823d33999 | 370 | * @retval None |
<> | 149:156823d33999 | 371 | */ |
<> | 149:156823d33999 | 372 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 373 | { |
<> | 149:156823d33999 | 374 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 375 | UNUSED(hi2s); |
<> | 149:156823d33999 | 376 | |
<> | 149:156823d33999 | 377 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 378 | the HAL_I2S_MspDeInit could be implemented in the user file |
<> | 149:156823d33999 | 379 | */ |
<> | 149:156823d33999 | 380 | } |
<> | 149:156823d33999 | 381 | |
<> | 149:156823d33999 | 382 | /** |
<> | 149:156823d33999 | 383 | * @} |
<> | 149:156823d33999 | 384 | */ |
<> | 149:156823d33999 | 385 | |
<> | 149:156823d33999 | 386 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions |
<> | 149:156823d33999 | 387 | * @brief Data transfers functions |
<> | 149:156823d33999 | 388 | * |
<> | 149:156823d33999 | 389 | @verbatim |
<> | 149:156823d33999 | 390 | =============================================================================== |
<> | 149:156823d33999 | 391 | ##### IO operation functions ##### |
<> | 149:156823d33999 | 392 | =============================================================================== |
<> | 149:156823d33999 | 393 | [..] |
<> | 149:156823d33999 | 394 | This subsection provides a set of functions allowing to manage the I2S data |
<> | 149:156823d33999 | 395 | transfers. |
<> | 149:156823d33999 | 396 | |
<> | 149:156823d33999 | 397 | (#) There are two modes of transfer: |
<> | 149:156823d33999 | 398 | (++) Blocking mode : The communication is performed in the polling mode. |
<> | 149:156823d33999 | 399 | The status of all data processing is returned by the same function |
<> | 149:156823d33999 | 400 | after finishing transfer. |
<> | 149:156823d33999 | 401 | (++) No-Blocking mode : The communication is performed using Interrupts |
<> | 149:156823d33999 | 402 | or DMA. These functions return the status of the transfer startup. |
<> | 149:156823d33999 | 403 | The end of the data processing will be indicated through the |
<> | 149:156823d33999 | 404 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
<> | 149:156823d33999 | 405 | using DMA mode. |
<> | 149:156823d33999 | 406 | |
<> | 149:156823d33999 | 407 | (#) Blocking mode functions are : |
<> | 149:156823d33999 | 408 | (++) HAL_I2S_Transmit() |
<> | 149:156823d33999 | 409 | (++) HAL_I2S_Receive() |
<> | 149:156823d33999 | 410 | |
<> | 149:156823d33999 | 411 | (#) No-Blocking mode functions with Interrupt are : |
<> | 149:156823d33999 | 412 | (++) HAL_I2S_Transmit_IT() |
<> | 149:156823d33999 | 413 | (++) HAL_I2S_Receive_IT() |
<> | 149:156823d33999 | 414 | |
<> | 149:156823d33999 | 415 | (#) No-Blocking mode functions with DMA are : |
<> | 149:156823d33999 | 416 | (++) HAL_I2S_Transmit_DMA() |
<> | 149:156823d33999 | 417 | (++) HAL_I2S_Receive_DMA() |
<> | 149:156823d33999 | 418 | |
<> | 149:156823d33999 | 419 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
<> | 149:156823d33999 | 420 | (++) HAL_I2S_TxCpltCallback() |
<> | 149:156823d33999 | 421 | (++) HAL_I2S_RxCpltCallback() |
<> | 149:156823d33999 | 422 | (++) HAL_I2S_ErrorCallback() |
<> | 149:156823d33999 | 423 | |
<> | 149:156823d33999 | 424 | @endverbatim |
<> | 149:156823d33999 | 425 | * @{ |
<> | 149:156823d33999 | 426 | */ |
<> | 149:156823d33999 | 427 | |
<> | 149:156823d33999 | 428 | /** |
<> | 149:156823d33999 | 429 | * @brief Transmit an amount of data in blocking mode |
<> | 149:156823d33999 | 430 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 431 | * the configuration information for I2S module |
<> | 149:156823d33999 | 432 | * @param pData: a 16-bit pointer to data buffer. |
<> | 149:156823d33999 | 433 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 434 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 435 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 436 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 437 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 438 | * @param Timeout: Timeout duration |
<> | 149:156823d33999 | 439 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 440 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 441 | * @retval HAL status |
<> | 149:156823d33999 | 442 | */ |
<> | 149:156823d33999 | 443 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
<> | 149:156823d33999 | 444 | { |
<> | 149:156823d33999 | 445 | if((pData == NULL ) || (Size == 0)) |
<> | 149:156823d33999 | 446 | { |
<> | 149:156823d33999 | 447 | return HAL_ERROR; |
<> | 149:156823d33999 | 448 | } |
<> | 149:156823d33999 | 449 | |
<> | 149:156823d33999 | 450 | /* Process Locked */ |
<> | 149:156823d33999 | 451 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 452 | |
<> | 149:156823d33999 | 453 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 454 | { |
<> | 149:156823d33999 | 455 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 456 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 457 | { |
<> | 149:156823d33999 | 458 | hi2s->TxXferSize = (Size << 1); |
<> | 149:156823d33999 | 459 | hi2s->TxXferCount = (Size << 1); |
<> | 149:156823d33999 | 460 | } |
<> | 149:156823d33999 | 461 | else |
<> | 149:156823d33999 | 462 | { |
<> | 149:156823d33999 | 463 | hi2s->TxXferSize = Size; |
<> | 149:156823d33999 | 464 | hi2s->TxXferCount = Size; |
<> | 149:156823d33999 | 465 | } |
<> | 149:156823d33999 | 466 | |
<> | 149:156823d33999 | 467 | /* Set state and reset error code */ |
<> | 149:156823d33999 | 468 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 469 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
<> | 149:156823d33999 | 470 | hi2s->pTxBuffPtr = pData; |
<> | 149:156823d33999 | 471 | |
<> | 149:156823d33999 | 472 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 473 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 474 | { |
<> | 149:156823d33999 | 475 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 476 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 477 | } |
<> | 149:156823d33999 | 478 | |
<> | 149:156823d33999 | 479 | while(hi2s->TxXferCount > 0) |
<> | 149:156823d33999 | 480 | { |
<> | 149:156823d33999 | 481 | /* Wait until TXE flag is set */ |
<> | 149:156823d33999 | 482 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
<> | 149:156823d33999 | 483 | { |
<> | 149:156823d33999 | 484 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 485 | } |
<> | 149:156823d33999 | 486 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
<> | 149:156823d33999 | 487 | hi2s->TxXferCount--; |
<> | 149:156823d33999 | 488 | } |
<> | 149:156823d33999 | 489 | |
<> | 149:156823d33999 | 490 | /* Wait until TXE flag is set, to confirm the end of the transcation */ |
<> | 149:156823d33999 | 491 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK) |
<> | 149:156823d33999 | 492 | { |
<> | 149:156823d33999 | 493 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 494 | } |
<> | 149:156823d33999 | 495 | |
<> | 149:156823d33999 | 496 | /* Check if Slave mode is selected */ |
<> | 149:156823d33999 | 497 | if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX)) |
<> | 149:156823d33999 | 498 | { |
<> | 149:156823d33999 | 499 | /* Wait until Busy flag is reset */ |
<> | 149:156823d33999 | 500 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK) |
<> | 149:156823d33999 | 501 | { |
<> | 149:156823d33999 | 502 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 503 | } |
<> | 149:156823d33999 | 504 | } |
<> | 149:156823d33999 | 505 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 506 | |
<> | 149:156823d33999 | 507 | /* Process Unlocked */ |
<> | 149:156823d33999 | 508 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 509 | |
<> | 149:156823d33999 | 510 | return HAL_OK; |
<> | 149:156823d33999 | 511 | } |
<> | 149:156823d33999 | 512 | else |
<> | 149:156823d33999 | 513 | { |
<> | 149:156823d33999 | 514 | /* Process Unlocked */ |
<> | 149:156823d33999 | 515 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 516 | return HAL_BUSY; |
<> | 149:156823d33999 | 517 | } |
<> | 149:156823d33999 | 518 | } |
<> | 149:156823d33999 | 519 | |
<> | 149:156823d33999 | 520 | /** |
<> | 149:156823d33999 | 521 | * @brief Receive an amount of data in blocking mode |
<> | 149:156823d33999 | 522 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 523 | * the configuration information for I2S module |
<> | 149:156823d33999 | 524 | * @param pData: a 16-bit pointer to data buffer. |
<> | 149:156823d33999 | 525 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 526 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 527 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 528 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 529 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 530 | * @param Timeout: Timeout duration |
<> | 149:156823d33999 | 531 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 532 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 533 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
<> | 149:156823d33999 | 534 | * in continouse way and as the I2S is not disabled at the end of the I2S transaction. |
<> | 149:156823d33999 | 535 | * @retval HAL status |
<> | 149:156823d33999 | 536 | */ |
<> | 149:156823d33999 | 537 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
<> | 149:156823d33999 | 538 | { |
<> | 149:156823d33999 | 539 | if((pData == NULL ) || (Size == 0)) |
<> | 149:156823d33999 | 540 | { |
<> | 149:156823d33999 | 541 | return HAL_ERROR; |
<> | 149:156823d33999 | 542 | } |
<> | 149:156823d33999 | 543 | |
<> | 149:156823d33999 | 544 | /* Process Locked */ |
<> | 149:156823d33999 | 545 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 546 | |
<> | 149:156823d33999 | 547 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 548 | { |
<> | 149:156823d33999 | 549 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 550 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 551 | { |
<> | 149:156823d33999 | 552 | hi2s->RxXferSize = (Size << 1); |
<> | 149:156823d33999 | 553 | hi2s->RxXferCount = (Size << 1); |
<> | 149:156823d33999 | 554 | } |
<> | 149:156823d33999 | 555 | else |
<> | 149:156823d33999 | 556 | { |
<> | 149:156823d33999 | 557 | hi2s->RxXferSize = Size; |
<> | 149:156823d33999 | 558 | hi2s->RxXferCount = Size; |
<> | 149:156823d33999 | 559 | } |
<> | 149:156823d33999 | 560 | |
<> | 149:156823d33999 | 561 | /* Set state and reset error code */ |
<> | 149:156823d33999 | 562 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 563 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
<> | 149:156823d33999 | 564 | hi2s->pRxBuffPtr = pData; |
<> | 149:156823d33999 | 565 | |
<> | 149:156823d33999 | 566 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 567 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 568 | { |
<> | 149:156823d33999 | 569 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 570 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 571 | } |
<> | 149:156823d33999 | 572 | |
<> | 149:156823d33999 | 573 | /* Receive data */ |
<> | 149:156823d33999 | 574 | while(hi2s->RxXferCount > 0) |
<> | 149:156823d33999 | 575 | { |
<> | 149:156823d33999 | 576 | /* Wait until RXNE flag is set */ |
<> | 149:156823d33999 | 577 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
<> | 149:156823d33999 | 578 | { |
<> | 149:156823d33999 | 579 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 580 | } |
<> | 149:156823d33999 | 581 | |
<> | 149:156823d33999 | 582 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
<> | 149:156823d33999 | 583 | hi2s->RxXferCount--; |
<> | 149:156823d33999 | 584 | } |
<> | 149:156823d33999 | 585 | |
<> | 149:156823d33999 | 586 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 587 | |
<> | 149:156823d33999 | 588 | /* Process Unlocked */ |
<> | 149:156823d33999 | 589 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 590 | |
<> | 149:156823d33999 | 591 | return HAL_OK; |
<> | 149:156823d33999 | 592 | } |
<> | 149:156823d33999 | 593 | else |
<> | 149:156823d33999 | 594 | { |
<> | 149:156823d33999 | 595 | /* Process Unlocked */ |
<> | 149:156823d33999 | 596 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 597 | return HAL_BUSY; |
<> | 149:156823d33999 | 598 | } |
<> | 149:156823d33999 | 599 | } |
<> | 149:156823d33999 | 600 | |
<> | 149:156823d33999 | 601 | /** |
<> | 149:156823d33999 | 602 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
<> | 149:156823d33999 | 603 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 604 | * the configuration information for I2S module |
<> | 149:156823d33999 | 605 | * @param pData: a 16-bit pointer to data buffer. |
<> | 149:156823d33999 | 606 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 607 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 608 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 609 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 610 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 611 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 612 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 613 | * @retval HAL status |
<> | 149:156823d33999 | 614 | */ |
<> | 149:156823d33999 | 615 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
<> | 149:156823d33999 | 616 | { |
<> | 149:156823d33999 | 617 | if((pData == NULL) || (Size == 0)) |
<> | 149:156823d33999 | 618 | { |
<> | 149:156823d33999 | 619 | return HAL_ERROR; |
<> | 149:156823d33999 | 620 | } |
<> | 149:156823d33999 | 621 | |
<> | 149:156823d33999 | 622 | /* Process Locked */ |
<> | 149:156823d33999 | 623 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 624 | |
<> | 149:156823d33999 | 625 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 626 | { |
<> | 149:156823d33999 | 627 | hi2s->pTxBuffPtr = pData; |
<> | 149:156823d33999 | 628 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
<> | 149:156823d33999 | 629 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 630 | |
<> | 149:156823d33999 | 631 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 632 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 633 | { |
<> | 149:156823d33999 | 634 | hi2s->TxXferSize = (Size << 1); |
<> | 149:156823d33999 | 635 | hi2s->TxXferCount = (Size << 1); |
<> | 149:156823d33999 | 636 | } |
<> | 149:156823d33999 | 637 | else |
<> | 149:156823d33999 | 638 | { |
<> | 149:156823d33999 | 639 | hi2s->TxXferSize = Size; |
<> | 149:156823d33999 | 640 | hi2s->TxXferCount = Size; |
<> | 149:156823d33999 | 641 | } |
<> | 149:156823d33999 | 642 | |
<> | 149:156823d33999 | 643 | /* Enable TXE and ERR interrupt */ |
<> | 149:156823d33999 | 644 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 645 | |
<> | 149:156823d33999 | 646 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 647 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 648 | { |
<> | 149:156823d33999 | 649 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 650 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 651 | } |
<> | 149:156823d33999 | 652 | |
<> | 149:156823d33999 | 653 | /* Process Unlocked */ |
<> | 149:156823d33999 | 654 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 655 | |
<> | 149:156823d33999 | 656 | return HAL_OK; |
<> | 149:156823d33999 | 657 | } |
<> | 149:156823d33999 | 658 | else |
<> | 149:156823d33999 | 659 | { |
<> | 149:156823d33999 | 660 | /* Process Unlocked */ |
<> | 149:156823d33999 | 661 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 662 | return HAL_BUSY; |
<> | 149:156823d33999 | 663 | } |
<> | 149:156823d33999 | 664 | } |
<> | 149:156823d33999 | 665 | |
<> | 149:156823d33999 | 666 | /** |
<> | 149:156823d33999 | 667 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
<> | 149:156823d33999 | 668 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 669 | * the configuration information for I2S module |
<> | 149:156823d33999 | 670 | * @param pData: a 16-bit pointer to the Receive data buffer. |
<> | 149:156823d33999 | 671 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 672 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 673 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 674 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 675 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 676 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 677 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 678 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
<> | 149:156823d33999 | 679 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
<> | 149:156823d33999 | 680 | * @retval HAL status |
<> | 149:156823d33999 | 681 | */ |
<> | 149:156823d33999 | 682 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
<> | 149:156823d33999 | 683 | { |
<> | 149:156823d33999 | 684 | if((pData == NULL) || (Size == 0)) |
<> | 149:156823d33999 | 685 | { |
<> | 149:156823d33999 | 686 | return HAL_ERROR; |
<> | 149:156823d33999 | 687 | } |
<> | 149:156823d33999 | 688 | |
<> | 149:156823d33999 | 689 | /* Process Locked */ |
<> | 149:156823d33999 | 690 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 691 | |
<> | 149:156823d33999 | 692 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 693 | { |
<> | 149:156823d33999 | 694 | hi2s->pRxBuffPtr = pData; |
<> | 149:156823d33999 | 695 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
<> | 149:156823d33999 | 696 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 697 | |
<> | 149:156823d33999 | 698 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 699 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 700 | { |
<> | 149:156823d33999 | 701 | hi2s->RxXferSize = (Size << 1); |
<> | 149:156823d33999 | 702 | hi2s->RxXferCount = (Size << 1); |
<> | 149:156823d33999 | 703 | } |
<> | 149:156823d33999 | 704 | else |
<> | 149:156823d33999 | 705 | { |
<> | 149:156823d33999 | 706 | hi2s->RxXferSize = Size; |
<> | 149:156823d33999 | 707 | hi2s->RxXferCount = Size; |
<> | 149:156823d33999 | 708 | } |
<> | 149:156823d33999 | 709 | |
<> | 149:156823d33999 | 710 | /* Enable TXE and ERR interrupt */ |
<> | 149:156823d33999 | 711 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 712 | |
<> | 149:156823d33999 | 713 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 714 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 715 | { |
<> | 149:156823d33999 | 716 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 717 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 718 | } |
<> | 149:156823d33999 | 719 | |
<> | 149:156823d33999 | 720 | /* Process Unlocked */ |
<> | 149:156823d33999 | 721 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 722 | |
<> | 149:156823d33999 | 723 | return HAL_OK; |
<> | 149:156823d33999 | 724 | } |
<> | 149:156823d33999 | 725 | else |
<> | 149:156823d33999 | 726 | { |
<> | 149:156823d33999 | 727 | /* Process Unlocked */ |
<> | 149:156823d33999 | 728 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 729 | return HAL_BUSY; |
<> | 149:156823d33999 | 730 | } |
<> | 149:156823d33999 | 731 | } |
<> | 149:156823d33999 | 732 | |
<> | 149:156823d33999 | 733 | /** |
<> | 149:156823d33999 | 734 | * @brief Transmit an amount of data in non-blocking mode with DMA |
<> | 149:156823d33999 | 735 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 736 | * the configuration information for I2S module |
<> | 149:156823d33999 | 737 | * @param pData: a 16-bit pointer to the Transmit data buffer. |
<> | 149:156823d33999 | 738 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 739 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 740 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 741 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 742 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 743 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 744 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 745 | * @retval HAL status |
<> | 149:156823d33999 | 746 | */ |
<> | 149:156823d33999 | 747 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
<> | 149:156823d33999 | 748 | { |
<> | 149:156823d33999 | 749 | if((pData == NULL) || (Size == 0)) |
<> | 149:156823d33999 | 750 | { |
<> | 149:156823d33999 | 751 | return HAL_ERROR; |
<> | 149:156823d33999 | 752 | } |
<> | 149:156823d33999 | 753 | |
<> | 149:156823d33999 | 754 | /* Process Locked */ |
<> | 149:156823d33999 | 755 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 756 | |
<> | 149:156823d33999 | 757 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 758 | { |
<> | 149:156823d33999 | 759 | hi2s->pTxBuffPtr = pData; |
<> | 149:156823d33999 | 760 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
<> | 149:156823d33999 | 761 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 762 | |
<> | 149:156823d33999 | 763 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 764 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 765 | { |
<> | 149:156823d33999 | 766 | hi2s->TxXferSize = (Size << 1); |
<> | 149:156823d33999 | 767 | hi2s->TxXferCount = (Size << 1); |
<> | 149:156823d33999 | 768 | } |
<> | 149:156823d33999 | 769 | else |
<> | 149:156823d33999 | 770 | { |
<> | 149:156823d33999 | 771 | hi2s->TxXferSize = Size; |
<> | 149:156823d33999 | 772 | hi2s->TxXferCount = Size; |
<> | 149:156823d33999 | 773 | } |
<> | 149:156823d33999 | 774 | |
<> | 149:156823d33999 | 775 | /* Set the I2S Tx DMA Half transfert complete callback */ |
<> | 149:156823d33999 | 776 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
<> | 149:156823d33999 | 777 | |
<> | 149:156823d33999 | 778 | /* Set the I2S Tx DMA transfert complete callback */ |
<> | 149:156823d33999 | 779 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
<> | 149:156823d33999 | 780 | |
<> | 149:156823d33999 | 781 | /* Set the DMA error callback */ |
<> | 149:156823d33999 | 782 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
<> | 149:156823d33999 | 783 | |
<> | 149:156823d33999 | 784 | /* Enable the Tx DMA Channel */ |
<> | 149:156823d33999 | 785 | HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
<> | 149:156823d33999 | 786 | |
<> | 149:156823d33999 | 787 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 788 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 789 | { |
<> | 149:156823d33999 | 790 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 791 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 792 | } |
<> | 149:156823d33999 | 793 | |
<> | 149:156823d33999 | 794 | /* Check if the I2S Tx request is already enabled */ |
<> | 149:156823d33999 | 795 | if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN) |
<> | 149:156823d33999 | 796 | { |
<> | 149:156823d33999 | 797 | /* Enable Tx DMA Request */ |
<> | 149:156823d33999 | 798 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
<> | 149:156823d33999 | 799 | } |
<> | 149:156823d33999 | 800 | |
<> | 149:156823d33999 | 801 | /* Process Unlocked */ |
<> | 149:156823d33999 | 802 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 803 | |
<> | 149:156823d33999 | 804 | return HAL_OK; |
<> | 149:156823d33999 | 805 | } |
<> | 149:156823d33999 | 806 | else |
<> | 149:156823d33999 | 807 | { |
<> | 149:156823d33999 | 808 | /* Process Unlocked */ |
<> | 149:156823d33999 | 809 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 810 | return HAL_BUSY; |
<> | 149:156823d33999 | 811 | } |
<> | 149:156823d33999 | 812 | } |
<> | 149:156823d33999 | 813 | |
<> | 149:156823d33999 | 814 | /** |
<> | 149:156823d33999 | 815 | * @brief Receive an amount of data in non-blocking mode with DMA |
<> | 149:156823d33999 | 816 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 817 | * the configuration information for I2S module |
<> | 149:156823d33999 | 818 | * @param pData: a 16-bit pointer to the Receive data buffer. |
<> | 149:156823d33999 | 819 | * @param Size: number of data sample to be sent: |
<> | 149:156823d33999 | 820 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
<> | 149:156823d33999 | 821 | * configuration phase, the Size parameter means the number of 16-bit data length |
<> | 149:156823d33999 | 822 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
<> | 149:156823d33999 | 823 | * the Size parameter means the number of 16-bit data length. |
<> | 149:156823d33999 | 824 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
<> | 149:156823d33999 | 825 | * between Master and Slave(example: audio streaming). |
<> | 149:156823d33999 | 826 | * @retval HAL status |
<> | 149:156823d33999 | 827 | */ |
<> | 149:156823d33999 | 828 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
<> | 149:156823d33999 | 829 | { |
<> | 149:156823d33999 | 830 | if((pData == NULL) || (Size == 0)) |
<> | 149:156823d33999 | 831 | { |
<> | 149:156823d33999 | 832 | return HAL_ERROR; |
<> | 149:156823d33999 | 833 | } |
<> | 149:156823d33999 | 834 | |
<> | 149:156823d33999 | 835 | /* Process Locked */ |
<> | 149:156823d33999 | 836 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 837 | |
<> | 149:156823d33999 | 838 | if(hi2s->State == HAL_I2S_STATE_READY) |
<> | 149:156823d33999 | 839 | { |
<> | 149:156823d33999 | 840 | hi2s->pRxBuffPtr = pData; |
<> | 149:156823d33999 | 841 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
<> | 149:156823d33999 | 842 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
<> | 149:156823d33999 | 843 | |
<> | 149:156823d33999 | 844 | if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\ |
<> | 149:156823d33999 | 845 | ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B)) |
<> | 149:156823d33999 | 846 | { |
<> | 149:156823d33999 | 847 | hi2s->RxXferSize = (Size << 1); |
<> | 149:156823d33999 | 848 | hi2s->RxXferCount = (Size << 1); |
<> | 149:156823d33999 | 849 | } |
<> | 149:156823d33999 | 850 | else |
<> | 149:156823d33999 | 851 | { |
<> | 149:156823d33999 | 852 | hi2s->RxXferSize = Size; |
<> | 149:156823d33999 | 853 | hi2s->RxXferCount = Size; |
<> | 149:156823d33999 | 854 | } |
<> | 149:156823d33999 | 855 | |
<> | 149:156823d33999 | 856 | |
<> | 149:156823d33999 | 857 | /* Set the I2S Rx DMA Half transfert complete callback */ |
<> | 149:156823d33999 | 858 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
<> | 149:156823d33999 | 859 | |
<> | 149:156823d33999 | 860 | /* Set the I2S Rx DMA transfert complete callback */ |
<> | 149:156823d33999 | 861 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
<> | 149:156823d33999 | 862 | |
<> | 149:156823d33999 | 863 | /* Set the DMA error callback */ |
<> | 149:156823d33999 | 864 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
<> | 149:156823d33999 | 865 | |
<> | 149:156823d33999 | 866 | /* Check if Master Receiver mode is selected */ |
<> | 149:156823d33999 | 867 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
<> | 149:156823d33999 | 868 | { |
<> | 149:156823d33999 | 869 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
<> | 149:156823d33999 | 870 | access to the SPI_SR register. */ |
<> | 149:156823d33999 | 871 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
<> | 149:156823d33999 | 872 | } |
<> | 149:156823d33999 | 873 | |
<> | 149:156823d33999 | 874 | /* Enable the Rx DMA Channel */ |
<> | 149:156823d33999 | 875 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize); |
<> | 149:156823d33999 | 876 | |
<> | 149:156823d33999 | 877 | /* Check if the I2S is already enabled */ |
<> | 149:156823d33999 | 878 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
<> | 149:156823d33999 | 879 | { |
<> | 149:156823d33999 | 880 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 881 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 882 | } |
<> | 149:156823d33999 | 883 | |
<> | 149:156823d33999 | 884 | /* Check if the I2S Rx request is already enabled */ |
<> | 149:156823d33999 | 885 | if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN) |
<> | 149:156823d33999 | 886 | { |
<> | 149:156823d33999 | 887 | /* Enable Rx DMA Request */ |
<> | 149:156823d33999 | 888 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
<> | 149:156823d33999 | 889 | } |
<> | 149:156823d33999 | 890 | |
<> | 149:156823d33999 | 891 | /* Process Unlocked */ |
<> | 149:156823d33999 | 892 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 893 | |
<> | 149:156823d33999 | 894 | return HAL_OK; |
<> | 149:156823d33999 | 895 | } |
<> | 149:156823d33999 | 896 | else |
<> | 149:156823d33999 | 897 | { |
<> | 149:156823d33999 | 898 | /* Process Unlocked */ |
<> | 149:156823d33999 | 899 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 900 | return HAL_BUSY; |
<> | 149:156823d33999 | 901 | } |
<> | 149:156823d33999 | 902 | } |
<> | 149:156823d33999 | 903 | |
<> | 149:156823d33999 | 904 | /** |
<> | 149:156823d33999 | 905 | * @brief Pauses the audio stream playing from the Media. |
<> | 149:156823d33999 | 906 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 907 | * the configuration information for I2S module |
<> | 149:156823d33999 | 908 | * @retval HAL status |
<> | 149:156823d33999 | 909 | */ |
<> | 149:156823d33999 | 910 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 911 | { |
<> | 149:156823d33999 | 912 | /* Process Locked */ |
<> | 149:156823d33999 | 913 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 914 | |
<> | 149:156823d33999 | 915 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
<> | 149:156823d33999 | 916 | { |
<> | 149:156823d33999 | 917 | /* Disable the I2S DMA Tx request */ |
<> | 149:156823d33999 | 918 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
<> | 149:156823d33999 | 919 | } |
<> | 149:156823d33999 | 920 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
<> | 149:156823d33999 | 921 | { |
<> | 149:156823d33999 | 922 | /* Disable the I2S DMA Rx request */ |
<> | 149:156823d33999 | 923 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
<> | 149:156823d33999 | 924 | } |
<> | 149:156823d33999 | 925 | |
<> | 149:156823d33999 | 926 | /* Process Unlocked */ |
<> | 149:156823d33999 | 927 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 928 | |
<> | 149:156823d33999 | 929 | return HAL_OK; |
<> | 149:156823d33999 | 930 | } |
<> | 149:156823d33999 | 931 | |
<> | 149:156823d33999 | 932 | /** |
<> | 149:156823d33999 | 933 | * @brief Resumes the audio stream playing from the Media. |
<> | 149:156823d33999 | 934 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 935 | * the configuration information for I2S module |
<> | 149:156823d33999 | 936 | * @retval HAL status |
<> | 149:156823d33999 | 937 | */ |
<> | 149:156823d33999 | 938 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 939 | { |
<> | 149:156823d33999 | 940 | /* Process Locked */ |
<> | 149:156823d33999 | 941 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 942 | |
<> | 149:156823d33999 | 943 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
<> | 149:156823d33999 | 944 | { |
<> | 149:156823d33999 | 945 | /* Enable the I2S DMA Tx request */ |
<> | 149:156823d33999 | 946 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
<> | 149:156823d33999 | 947 | } |
<> | 149:156823d33999 | 948 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
<> | 149:156823d33999 | 949 | { |
<> | 149:156823d33999 | 950 | /* Enable the I2S DMA Rx request */ |
<> | 149:156823d33999 | 951 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
<> | 149:156823d33999 | 952 | } |
<> | 149:156823d33999 | 953 | |
<> | 149:156823d33999 | 954 | /* If the I2S peripheral is still not enabled, enable it */ |
<> | 149:156823d33999 | 955 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0) |
<> | 149:156823d33999 | 956 | { |
<> | 149:156823d33999 | 957 | /* Enable I2S peripheral */ |
<> | 149:156823d33999 | 958 | __HAL_I2S_ENABLE(hi2s); |
<> | 149:156823d33999 | 959 | } |
<> | 149:156823d33999 | 960 | |
<> | 149:156823d33999 | 961 | /* Process Unlocked */ |
<> | 149:156823d33999 | 962 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 963 | |
<> | 149:156823d33999 | 964 | return HAL_OK; |
<> | 149:156823d33999 | 965 | } |
<> | 149:156823d33999 | 966 | |
<> | 149:156823d33999 | 967 | /** |
<> | 149:156823d33999 | 968 | * @brief Resumes the audio stream playing from the Media. |
<> | 149:156823d33999 | 969 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 970 | * the configuration information for I2S module |
<> | 149:156823d33999 | 971 | * @retval HAL status |
<> | 149:156823d33999 | 972 | */ |
<> | 149:156823d33999 | 973 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 974 | { |
<> | 149:156823d33999 | 975 | /* Process Locked */ |
<> | 149:156823d33999 | 976 | __HAL_LOCK(hi2s); |
<> | 149:156823d33999 | 977 | |
<> | 149:156823d33999 | 978 | /* Disable the I2S Tx/Rx DMA requests */ |
<> | 149:156823d33999 | 979 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
<> | 149:156823d33999 | 980 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
<> | 149:156823d33999 | 981 | |
<> | 149:156823d33999 | 982 | /* Abort the I2S DMA Channel tx */ |
<> | 149:156823d33999 | 983 | if(hi2s->hdmatx != NULL) |
<> | 149:156823d33999 | 984 | { |
<> | 149:156823d33999 | 985 | /* Disable the I2S DMA channel */ |
<> | 149:156823d33999 | 986 | __HAL_DMA_DISABLE(hi2s->hdmatx); |
<> | 149:156823d33999 | 987 | HAL_DMA_Abort(hi2s->hdmatx); |
<> | 149:156823d33999 | 988 | } |
<> | 149:156823d33999 | 989 | /* Abort the I2S DMA Channel rx */ |
<> | 149:156823d33999 | 990 | if(hi2s->hdmarx != NULL) |
<> | 149:156823d33999 | 991 | { |
<> | 149:156823d33999 | 992 | /* Disable the I2S DMA channel */ |
<> | 149:156823d33999 | 993 | __HAL_DMA_DISABLE(hi2s->hdmarx); |
<> | 149:156823d33999 | 994 | HAL_DMA_Abort(hi2s->hdmarx); |
<> | 149:156823d33999 | 995 | } |
<> | 149:156823d33999 | 996 | |
<> | 149:156823d33999 | 997 | /* Disable I2S peripheral */ |
<> | 149:156823d33999 | 998 | __HAL_I2S_DISABLE(hi2s); |
<> | 149:156823d33999 | 999 | |
<> | 149:156823d33999 | 1000 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1001 | |
<> | 149:156823d33999 | 1002 | /* Process Unlocked */ |
<> | 149:156823d33999 | 1003 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 1004 | |
<> | 149:156823d33999 | 1005 | return HAL_OK; |
<> | 149:156823d33999 | 1006 | } |
<> | 149:156823d33999 | 1007 | |
<> | 149:156823d33999 | 1008 | /** |
<> | 149:156823d33999 | 1009 | * @brief This function handles I2S interrupt request. |
<> | 149:156823d33999 | 1010 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1011 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1012 | * @retval None |
<> | 149:156823d33999 | 1013 | */ |
<> | 149:156823d33999 | 1014 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1015 | { |
<> | 149:156823d33999 | 1016 | uint32_t i2ssr = hi2s->Instance->SR; |
<> | 149:156823d33999 | 1017 | |
<> | 149:156823d33999 | 1018 | /* I2S in mode Receiver ------------------------------------------------*/ |
<> | 149:156823d33999 | 1019 | if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) && |
<> | 149:156823d33999 | 1020 | ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
<> | 149:156823d33999 | 1021 | { |
<> | 149:156823d33999 | 1022 | I2S_Receive_IT(hi2s); |
<> | 149:156823d33999 | 1023 | return; |
<> | 149:156823d33999 | 1024 | } |
<> | 149:156823d33999 | 1025 | |
<> | 149:156823d33999 | 1026 | /* I2S in mode Tramitter -----------------------------------------------*/ |
<> | 149:156823d33999 | 1027 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
<> | 149:156823d33999 | 1028 | { |
<> | 149:156823d33999 | 1029 | I2S_Transmit_IT(hi2s); |
<> | 149:156823d33999 | 1030 | return; |
<> | 149:156823d33999 | 1031 | } |
<> | 149:156823d33999 | 1032 | |
<> | 149:156823d33999 | 1033 | /* I2S interrupt error -------------------------------------------------*/ |
<> | 149:156823d33999 | 1034 | if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET) |
<> | 149:156823d33999 | 1035 | { |
<> | 149:156823d33999 | 1036 | /* I2S Overrun error interrupt occured ---------------------------------*/ |
<> | 149:156823d33999 | 1037 | if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) |
<> | 149:156823d33999 | 1038 | { |
<> | 149:156823d33999 | 1039 | /* Disable RXNE and ERR interrupt */ |
<> | 149:156823d33999 | 1040 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 1041 | |
<> | 149:156823d33999 | 1042 | /* Set the error code and execute error callback*/ |
<> | 149:156823d33999 | 1043 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); |
<> | 149:156823d33999 | 1044 | } |
<> | 149:156823d33999 | 1045 | |
<> | 149:156823d33999 | 1046 | /* I2S Underrun error interrupt occured --------------------------------*/ |
<> | 149:156823d33999 | 1047 | if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) |
<> | 149:156823d33999 | 1048 | { |
<> | 149:156823d33999 | 1049 | /* Disable TXE and ERR interrupt */ |
<> | 149:156823d33999 | 1050 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 1051 | |
<> | 149:156823d33999 | 1052 | /* Set the error code and execute error callback*/ |
<> | 149:156823d33999 | 1053 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); |
<> | 149:156823d33999 | 1054 | } |
<> | 149:156823d33999 | 1055 | |
<> | 149:156823d33999 | 1056 | /* I2S Frame format error interrupt occured --------------------------*/ |
<> | 149:156823d33999 | 1057 | if((i2ssr & I2S_FLAG_FRE) == I2S_FLAG_FRE) |
<> | 149:156823d33999 | 1058 | { |
<> | 149:156823d33999 | 1059 | /* Disable TXE and ERR interrupt */ |
<> | 149:156823d33999 | 1060 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_RXNE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 1061 | |
<> | 149:156823d33999 | 1062 | /* Set the error code and execute error callback*/ |
<> | 149:156823d33999 | 1063 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_FRE); |
<> | 149:156823d33999 | 1064 | } |
<> | 149:156823d33999 | 1065 | |
<> | 149:156823d33999 | 1066 | /* Set the I2S State ready */ |
<> | 149:156823d33999 | 1067 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1068 | /* Call the Error Callback */ |
<> | 149:156823d33999 | 1069 | HAL_I2S_ErrorCallback(hi2s); |
<> | 149:156823d33999 | 1070 | } |
<> | 149:156823d33999 | 1071 | } |
<> | 149:156823d33999 | 1072 | |
<> | 149:156823d33999 | 1073 | /** |
<> | 149:156823d33999 | 1074 | * @brief Tx Transfer Half completed callbacks |
<> | 149:156823d33999 | 1075 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1076 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1077 | * @retval None |
<> | 149:156823d33999 | 1078 | */ |
<> | 149:156823d33999 | 1079 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1080 | { |
<> | 149:156823d33999 | 1081 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 1082 | UNUSED(hi2s); |
<> | 149:156823d33999 | 1083 | |
<> | 149:156823d33999 | 1084 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 1085 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file |
<> | 149:156823d33999 | 1086 | */ |
<> | 149:156823d33999 | 1087 | } |
<> | 149:156823d33999 | 1088 | |
<> | 149:156823d33999 | 1089 | /** |
<> | 149:156823d33999 | 1090 | * @brief Tx Transfer completed callbacks |
<> | 149:156823d33999 | 1091 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1092 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1093 | * @retval None |
<> | 149:156823d33999 | 1094 | */ |
<> | 149:156823d33999 | 1095 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1096 | { |
<> | 149:156823d33999 | 1097 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 1098 | UNUSED(hi2s); |
<> | 149:156823d33999 | 1099 | |
<> | 149:156823d33999 | 1100 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 1101 | the HAL_I2S_TxCpltCallback could be implemented in the user file |
<> | 149:156823d33999 | 1102 | */ |
<> | 149:156823d33999 | 1103 | } |
<> | 149:156823d33999 | 1104 | |
<> | 149:156823d33999 | 1105 | /** |
<> | 149:156823d33999 | 1106 | * @brief Rx Transfer half completed callbacks |
<> | 149:156823d33999 | 1107 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1108 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1109 | * @retval None |
<> | 149:156823d33999 | 1110 | */ |
<> | 149:156823d33999 | 1111 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1112 | { |
<> | 149:156823d33999 | 1113 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 1114 | UNUSED(hi2s); |
<> | 149:156823d33999 | 1115 | |
<> | 149:156823d33999 | 1116 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 1117 | the HAL_I2S_RxHalfCpltCallback could be implemented in the user file |
<> | 149:156823d33999 | 1118 | */ |
<> | 149:156823d33999 | 1119 | } |
<> | 149:156823d33999 | 1120 | |
<> | 149:156823d33999 | 1121 | /** |
<> | 149:156823d33999 | 1122 | * @brief Rx Transfer completed callbacks |
<> | 149:156823d33999 | 1123 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1124 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1125 | * @retval None |
<> | 149:156823d33999 | 1126 | */ |
<> | 149:156823d33999 | 1127 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1128 | { |
<> | 149:156823d33999 | 1129 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 1130 | UNUSED(hi2s); |
<> | 149:156823d33999 | 1131 | |
<> | 149:156823d33999 | 1132 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 1133 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
<> | 149:156823d33999 | 1134 | */ |
<> | 149:156823d33999 | 1135 | } |
<> | 149:156823d33999 | 1136 | |
<> | 149:156823d33999 | 1137 | /** |
<> | 149:156823d33999 | 1138 | * @brief I2S error callbacks |
<> | 149:156823d33999 | 1139 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1140 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1141 | * @retval None |
<> | 149:156823d33999 | 1142 | */ |
<> | 149:156823d33999 | 1143 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1144 | { |
<> | 149:156823d33999 | 1145 | /* Prevent unused argument(s) compilation warning */ |
<> | 149:156823d33999 | 1146 | UNUSED(hi2s); |
<> | 149:156823d33999 | 1147 | |
<> | 149:156823d33999 | 1148 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 149:156823d33999 | 1149 | the HAL_I2S_ErrorCallback could be implemented in the user file |
<> | 149:156823d33999 | 1150 | */ |
<> | 149:156823d33999 | 1151 | } |
<> | 149:156823d33999 | 1152 | |
<> | 149:156823d33999 | 1153 | /** |
<> | 149:156823d33999 | 1154 | * @} |
<> | 149:156823d33999 | 1155 | */ |
<> | 149:156823d33999 | 1156 | |
<> | 149:156823d33999 | 1157 | /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
<> | 149:156823d33999 | 1158 | * @brief Peripheral State functions |
<> | 149:156823d33999 | 1159 | * |
<> | 149:156823d33999 | 1160 | @verbatim |
<> | 149:156823d33999 | 1161 | =============================================================================== |
<> | 149:156823d33999 | 1162 | ##### Peripheral State and Errors functions ##### |
<> | 149:156823d33999 | 1163 | =============================================================================== |
<> | 149:156823d33999 | 1164 | [..] |
<> | 149:156823d33999 | 1165 | This subsection permits to get in run-time the status of the peripheral |
<> | 149:156823d33999 | 1166 | and the data flow. |
<> | 149:156823d33999 | 1167 | |
<> | 149:156823d33999 | 1168 | @endverbatim |
<> | 149:156823d33999 | 1169 | * @{ |
<> | 149:156823d33999 | 1170 | */ |
<> | 149:156823d33999 | 1171 | |
<> | 149:156823d33999 | 1172 | /** |
<> | 149:156823d33999 | 1173 | * @brief Return the I2S state |
<> | 149:156823d33999 | 1174 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1175 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1176 | * @retval HAL state |
<> | 149:156823d33999 | 1177 | */ |
<> | 149:156823d33999 | 1178 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1179 | { |
<> | 149:156823d33999 | 1180 | return hi2s->State; |
<> | 149:156823d33999 | 1181 | } |
<> | 149:156823d33999 | 1182 | |
<> | 149:156823d33999 | 1183 | /** |
<> | 149:156823d33999 | 1184 | * @brief Return the I2S error code |
<> | 149:156823d33999 | 1185 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1186 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1187 | * @retval I2S Error Code |
<> | 149:156823d33999 | 1188 | */ |
<> | 149:156823d33999 | 1189 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1190 | { |
<> | 149:156823d33999 | 1191 | return hi2s->ErrorCode; |
<> | 149:156823d33999 | 1192 | } |
<> | 149:156823d33999 | 1193 | /** |
<> | 149:156823d33999 | 1194 | * @} |
<> | 149:156823d33999 | 1195 | */ |
<> | 149:156823d33999 | 1196 | |
<> | 149:156823d33999 | 1197 | /** |
<> | 149:156823d33999 | 1198 | * @} |
<> | 149:156823d33999 | 1199 | */ |
<> | 149:156823d33999 | 1200 | |
<> | 149:156823d33999 | 1201 | |
<> | 149:156823d33999 | 1202 | /** @defgroup I2S_Private_Functions I2S Private Functions |
<> | 149:156823d33999 | 1203 | * @{ |
<> | 149:156823d33999 | 1204 | */ |
<> | 149:156823d33999 | 1205 | /** |
<> | 149:156823d33999 | 1206 | * @brief DMA I2S transmit process complete callback |
<> | 149:156823d33999 | 1207 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1208 | * the configuration information for the specified DMA module. |
<> | 149:156823d33999 | 1209 | * @retval None |
<> | 149:156823d33999 | 1210 | */ |
<> | 149:156823d33999 | 1211 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
<> | 149:156823d33999 | 1212 | { |
<> | 149:156823d33999 | 1213 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 149:156823d33999 | 1214 | |
<> | 149:156823d33999 | 1215 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
<> | 149:156823d33999 | 1216 | { |
<> | 149:156823d33999 | 1217 | /* Disable Tx DMA Request */ |
<> | 149:156823d33999 | 1218 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
<> | 149:156823d33999 | 1219 | |
<> | 149:156823d33999 | 1220 | hi2s->TxXferCount = 0; |
<> | 149:156823d33999 | 1221 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1222 | } |
<> | 149:156823d33999 | 1223 | HAL_I2S_TxCpltCallback(hi2s); |
<> | 149:156823d33999 | 1224 | } |
<> | 149:156823d33999 | 1225 | |
<> | 149:156823d33999 | 1226 | /** |
<> | 149:156823d33999 | 1227 | * @brief DMA I2S transmit process half complete callback |
<> | 149:156823d33999 | 1228 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1229 | * the configuration information for the specified DMA module. |
<> | 149:156823d33999 | 1230 | * @retval None |
<> | 149:156823d33999 | 1231 | */ |
<> | 149:156823d33999 | 1232 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
<> | 149:156823d33999 | 1233 | { |
<> | 149:156823d33999 | 1234 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 149:156823d33999 | 1235 | |
<> | 149:156823d33999 | 1236 | HAL_I2S_TxHalfCpltCallback(hi2s); |
<> | 149:156823d33999 | 1237 | } |
<> | 149:156823d33999 | 1238 | |
<> | 149:156823d33999 | 1239 | /** |
<> | 149:156823d33999 | 1240 | * @brief DMA I2S receive process complete callback |
<> | 149:156823d33999 | 1241 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1242 | * the configuration information for the specified DMA module. |
<> | 149:156823d33999 | 1243 | * @retval None |
<> | 149:156823d33999 | 1244 | */ |
<> | 149:156823d33999 | 1245 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
<> | 149:156823d33999 | 1246 | { |
<> | 149:156823d33999 | 1247 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 149:156823d33999 | 1248 | |
<> | 149:156823d33999 | 1249 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
<> | 149:156823d33999 | 1250 | { |
<> | 149:156823d33999 | 1251 | /* Disable Rx DMA Request */ |
<> | 149:156823d33999 | 1252 | CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); |
<> | 149:156823d33999 | 1253 | hi2s->RxXferCount = 0; |
<> | 149:156823d33999 | 1254 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1255 | } |
<> | 149:156823d33999 | 1256 | HAL_I2S_RxCpltCallback(hi2s); |
<> | 149:156823d33999 | 1257 | } |
<> | 149:156823d33999 | 1258 | |
<> | 149:156823d33999 | 1259 | /** |
<> | 149:156823d33999 | 1260 | * @brief DMA I2S receive process half complete callback |
<> | 149:156823d33999 | 1261 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1262 | * the configuration information for the specified DMA module. |
<> | 149:156823d33999 | 1263 | * @retval None |
<> | 149:156823d33999 | 1264 | */ |
<> | 149:156823d33999 | 1265 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
<> | 149:156823d33999 | 1266 | { |
<> | 149:156823d33999 | 1267 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 149:156823d33999 | 1268 | |
<> | 149:156823d33999 | 1269 | HAL_I2S_RxHalfCpltCallback(hi2s); |
<> | 149:156823d33999 | 1270 | } |
<> | 149:156823d33999 | 1271 | |
<> | 149:156823d33999 | 1272 | /** |
<> | 149:156823d33999 | 1273 | * @brief DMA I2S communication error callback |
<> | 149:156823d33999 | 1274 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1275 | * the configuration information for the specified DMA module. |
<> | 149:156823d33999 | 1276 | * @retval None |
<> | 149:156823d33999 | 1277 | */ |
<> | 149:156823d33999 | 1278 | static void I2S_DMAError(DMA_HandleTypeDef *hdma) |
<> | 149:156823d33999 | 1279 | { |
<> | 149:156823d33999 | 1280 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
<> | 149:156823d33999 | 1281 | |
<> | 149:156823d33999 | 1282 | /* Disable Rx and Tx DMA Request */ |
<> | 149:156823d33999 | 1283 | CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
<> | 149:156823d33999 | 1284 | hi2s->TxXferCount = 0; |
<> | 149:156823d33999 | 1285 | hi2s->RxXferCount = 0; |
<> | 149:156823d33999 | 1286 | |
<> | 149:156823d33999 | 1287 | hi2s->State= HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1288 | |
<> | 149:156823d33999 | 1289 | /* Set the error code and execute error callback*/ |
<> | 149:156823d33999 | 1290 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA); |
<> | 149:156823d33999 | 1291 | HAL_I2S_ErrorCallback(hi2s); |
<> | 149:156823d33999 | 1292 | } |
<> | 149:156823d33999 | 1293 | |
<> | 149:156823d33999 | 1294 | /** |
<> | 149:156823d33999 | 1295 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
<> | 149:156823d33999 | 1296 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1297 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1298 | * @retval None |
<> | 149:156823d33999 | 1299 | */ |
<> | 149:156823d33999 | 1300 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1301 | { |
<> | 149:156823d33999 | 1302 | /* Transmit data */ |
<> | 149:156823d33999 | 1303 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
<> | 149:156823d33999 | 1304 | hi2s->TxXferCount--; |
<> | 149:156823d33999 | 1305 | |
<> | 149:156823d33999 | 1306 | if(hi2s->TxXferCount == 0) |
<> | 149:156823d33999 | 1307 | { |
<> | 149:156823d33999 | 1308 | /* Disable TXE and ERR interrupt */ |
<> | 149:156823d33999 | 1309 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 1310 | |
<> | 149:156823d33999 | 1311 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1312 | HAL_I2S_TxCpltCallback(hi2s); |
<> | 149:156823d33999 | 1313 | } |
<> | 149:156823d33999 | 1314 | } |
<> | 149:156823d33999 | 1315 | |
<> | 149:156823d33999 | 1316 | /** |
<> | 149:156823d33999 | 1317 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
<> | 149:156823d33999 | 1318 | * @param hi2s: I2S handle |
<> | 149:156823d33999 | 1319 | * @retval None |
<> | 149:156823d33999 | 1320 | */ |
<> | 149:156823d33999 | 1321 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
<> | 149:156823d33999 | 1322 | { |
<> | 149:156823d33999 | 1323 | /* Receive data */ |
<> | 149:156823d33999 | 1324 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
<> | 149:156823d33999 | 1325 | hi2s->RxXferCount--; |
<> | 149:156823d33999 | 1326 | |
<> | 149:156823d33999 | 1327 | if(hi2s->RxXferCount == 0) |
<> | 149:156823d33999 | 1328 | { |
<> | 149:156823d33999 | 1329 | /* Disable RXNE and ERR interrupt */ |
<> | 149:156823d33999 | 1330 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
<> | 149:156823d33999 | 1331 | |
<> | 149:156823d33999 | 1332 | hi2s->State = HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1333 | HAL_I2S_RxCpltCallback(hi2s); |
<> | 149:156823d33999 | 1334 | } |
<> | 149:156823d33999 | 1335 | } |
<> | 149:156823d33999 | 1336 | |
<> | 149:156823d33999 | 1337 | |
<> | 149:156823d33999 | 1338 | /** |
<> | 149:156823d33999 | 1339 | * @brief This function handles I2S Communication Timeout. |
<> | 149:156823d33999 | 1340 | * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains |
<> | 149:156823d33999 | 1341 | * the configuration information for I2S module |
<> | 149:156823d33999 | 1342 | * @param Flag: Flag checked |
<> | 149:156823d33999 | 1343 | * @param Status: Value of the flag expected |
<> | 149:156823d33999 | 1344 | * @param Timeout: Duration of the timeout |
<> | 149:156823d33999 | 1345 | * @retval HAL status |
<> | 149:156823d33999 | 1346 | */ |
<> | 149:156823d33999 | 1347 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout) |
<> | 149:156823d33999 | 1348 | { |
<> | 149:156823d33999 | 1349 | uint32_t tickstart = 0; |
<> | 149:156823d33999 | 1350 | |
<> | 149:156823d33999 | 1351 | /* Get tick */ |
<> | 149:156823d33999 | 1352 | tickstart = HAL_GetTick(); |
<> | 149:156823d33999 | 1353 | |
<> | 149:156823d33999 | 1354 | /* Wait until flag is set */ |
<> | 149:156823d33999 | 1355 | if(Status == RESET) |
<> | 149:156823d33999 | 1356 | { |
<> | 149:156823d33999 | 1357 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET) |
<> | 149:156823d33999 | 1358 | { |
<> | 149:156823d33999 | 1359 | if(Timeout != HAL_MAX_DELAY) |
<> | 149:156823d33999 | 1360 | { |
<> | 149:156823d33999 | 1361 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
<> | 149:156823d33999 | 1362 | { |
<> | 149:156823d33999 | 1363 | /* Set the I2S State ready */ |
<> | 149:156823d33999 | 1364 | hi2s->State= HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1365 | |
<> | 149:156823d33999 | 1366 | /* Process Unlocked */ |
<> | 149:156823d33999 | 1367 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 1368 | |
<> | 149:156823d33999 | 1369 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 1370 | } |
<> | 149:156823d33999 | 1371 | } |
<> | 149:156823d33999 | 1372 | } |
<> | 149:156823d33999 | 1373 | } |
<> | 149:156823d33999 | 1374 | else |
<> | 149:156823d33999 | 1375 | { |
<> | 149:156823d33999 | 1376 | while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET) |
<> | 149:156823d33999 | 1377 | { |
<> | 149:156823d33999 | 1378 | if(Timeout != HAL_MAX_DELAY) |
<> | 149:156823d33999 | 1379 | { |
<> | 149:156823d33999 | 1380 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
<> | 149:156823d33999 | 1381 | { |
<> | 149:156823d33999 | 1382 | /* Set the I2S State ready */ |
<> | 149:156823d33999 | 1383 | hi2s->State= HAL_I2S_STATE_READY; |
<> | 149:156823d33999 | 1384 | |
<> | 149:156823d33999 | 1385 | /* Process Unlocked */ |
<> | 149:156823d33999 | 1386 | __HAL_UNLOCK(hi2s); |
<> | 149:156823d33999 | 1387 | |
<> | 149:156823d33999 | 1388 | return HAL_TIMEOUT; |
<> | 149:156823d33999 | 1389 | } |
<> | 149:156823d33999 | 1390 | } |
<> | 149:156823d33999 | 1391 | } |
<> | 149:156823d33999 | 1392 | } |
<> | 149:156823d33999 | 1393 | return HAL_OK; |
<> | 149:156823d33999 | 1394 | } |
<> | 149:156823d33999 | 1395 | |
<> | 149:156823d33999 | 1396 | /** |
<> | 149:156823d33999 | 1397 | * @} |
<> | 149:156823d33999 | 1398 | */ |
<> | 149:156823d33999 | 1399 | #endif /* STM32L100xC || |
<> | 149:156823d33999 | 1400 | STM32L151xC || STM32L151xCA || STM32L151xD || STM32L151xE || STM32L151xDX ||\\ |
<> | 149:156823d33999 | 1401 | STM32L152xC || STM32L152xCA || STM32L152xD || STM32L152xE || STM32L152xDX ||\\ |
<> | 149:156823d33999 | 1402 | STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */ |
<> | 149:156823d33999 | 1403 | #endif /* HAL_I2S_MODULE_ENABLED */ |
<> | 149:156823d33999 | 1404 | /** |
<> | 149:156823d33999 | 1405 | * @} |
<> | 149:156823d33999 | 1406 | */ |
<> | 149:156823d33999 | 1407 | |
<> | 149:156823d33999 | 1408 | /** |
<> | 149:156823d33999 | 1409 | * @} |
<> | 149:156823d33999 | 1410 | */ |
<> | 149:156823d33999 | 1411 | |
<> | 149:156823d33999 | 1412 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |