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mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_cryp.c@149:156823d33999, 2016-10-28 (annotated)

Committer:: <>
Date:: Fri Oct 28 11:17:30 2016 +0100
Revision:: 149:156823d33999
Child:: 184:08ed48f1de7f

This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	149:156823d33999	1	/**
<>	149:156823d33999	2	******************************************************************************
<>	149:156823d33999	3	* @file stm32l1xx_hal_cryp.c
<>	149:156823d33999	4	* @author MCD Application Team
<>	149:156823d33999	5	* @version V1.2.0
<>	149:156823d33999	6	* @date 01-July-2016
<>	149:156823d33999	7	* @brief CRYP HAL module driver.
<>	149:156823d33999	8	*
<>	149:156823d33999	9	* This file provides firmware functions to manage the following
<>	149:156823d33999	10	* functionalities of the Cryptography (CRYP) peripheral:
<>	149:156823d33999	11	* + Initialization and de-initialization functions
<>	149:156823d33999	12	* + Processing functions by algorithm using polling mode
<>	149:156823d33999	13	* + Processing functions by algorithm using interrupt mode
<>	149:156823d33999	14	* + Processing functions by algorithm using DMA mode
<>	149:156823d33999	15	* + Peripheral State functions
<>	149:156823d33999	16	*
<>	149:156823d33999	17	@verbatim
<>	149:156823d33999	18	==============================================================================
<>	149:156823d33999	19	##### How to use this driver #####
<>	149:156823d33999	20	==============================================================================
<>	149:156823d33999	21	[..]
<>	149:156823d33999	22	The CRYP HAL driver can be used as follows:
<>	149:156823d33999	23
<>	149:156823d33999	24	(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
<>	149:156823d33999	25	(##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
<>	149:156823d33999	26	(##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
<>	149:156823d33999	27	(+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
<>	149:156823d33999	28	(+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
<>	149:156823d33999	29	(+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
<>	149:156823d33999	30	(##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
<>	149:156823d33999	31	(+) Enable the DMA2 interface clock using
<>	149:156823d33999	32	(++) __HAL_RCC_DMA2_CLK_ENABLE()
<>	149:156823d33999	33	(+) Configure and enable two DMA Channels one for managing data transfer from
<>	149:156823d33999	34	memory to peripheral (input channel) and another channel for managing data
<>	149:156823d33999	35	transfer from peripheral to memory (output channel)
<>	149:156823d33999	36	(+) Associate the initialized DMA handle to the CRYP DMA handle
<>	149:156823d33999	37	using __HAL_LINKDMA()
<>	149:156823d33999	38	(+) Configure the priority and enable the NVIC for the transfer complete
<>	149:156823d33999	39	interrupt on the two DMA Streams. The output stream should have higher
<>	149:156823d33999	40	priority than the input stream.
<>	149:156823d33999	41	(++) HAL_NVIC_SetPriority()
<>	149:156823d33999	42	(++) HAL_NVIC_EnableIRQ()
<>	149:156823d33999	43
<>	149:156823d33999	44	(#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
<>	149:156823d33999	45	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
<>	149:156823d33999	46	(##) The encryption/decryption key.
<>	149:156823d33999	47	(##) The initialization vector (counter). It is not used ECB mode.
<>	149:156823d33999	48
<>	149:156823d33999	49	(#)Three processing (encryption/decryption) functions are available:
<>	149:156823d33999	50	(##) Polling mode: encryption and decryption APIs are blocking functions
<>	149:156823d33999	51	i.e. they process the data and wait till the processing is finished
<>	149:156823d33999	52	e.g. HAL_CRYP_AESCBC_Encrypt()
<>	149:156823d33999	53	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
<>	149:156823d33999	54	i.e. they process the data under interrupt
<>	149:156823d33999	55	e.g. HAL_CRYP_AESCBC_Encrypt_IT()
<>	149:156823d33999	56	(##) DMA mode: encryption and decryption APIs are not blocking functions
<>	149:156823d33999	57	i.e. the data transfer is ensured by DMA
<>	149:156823d33999	58	e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
<>	149:156823d33999	59
<>	149:156823d33999	60	(#)When the processing function is called for the first time after HAL_CRYP_Init()
<>	149:156823d33999	61	the CRYP peripheral is initialized and processes the buffer in input.
<>	149:156823d33999	62	At second call, the processing function performs an append of the already
<>	149:156823d33999	63	processed buffer.
<>	149:156823d33999	64	When a new data block is to be processed, call HAL_CRYP_Init() then the
<>	149:156823d33999	65	processing function.
<>	149:156823d33999	66
<>	149:156823d33999	67	(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
<>	149:156823d33999	68
<>	149:156823d33999	69	@endverbatim
<>	149:156823d33999	70	******************************************************************************
<>	149:156823d33999	71	* @attention
<>	149:156823d33999	72	*
<>	149:156823d33999	73	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	149:156823d33999	74	*
<>	149:156823d33999	75	* Redistribution and use in source and binary forms, with or without modification,
<>	149:156823d33999	76	* are permitted provided that the following conditions are met:
<>	149:156823d33999	77	* 1. Redistributions of source code must retain the above copyright notice,
<>	149:156823d33999	78	* this list of conditions and the following disclaimer.
<>	149:156823d33999	79	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	149:156823d33999	80	* this list of conditions and the following disclaimer in the documentation
<>	149:156823d33999	81	* and/or other materials provided with the distribution.
<>	149:156823d33999	82	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	149:156823d33999	83	* may be used to endorse or promote products derived from this software
<>	149:156823d33999	84	* without specific prior written permission.
<>	149:156823d33999	85	*
<>	149:156823d33999	86	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	149:156823d33999	87	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	149:156823d33999	88	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	149:156823d33999	89	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	149:156823d33999	90	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	149:156823d33999	91	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	149:156823d33999	92	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	149:156823d33999	93	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	149:156823d33999	94	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	149:156823d33999	95	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	149:156823d33999	96	*
<>	149:156823d33999	97	******************************************************************************
<>	149:156823d33999	98	*/
<>	149:156823d33999	99
<>	149:156823d33999	100	/* Includes ------------------------------------------------------------------*/
<>	149:156823d33999	101	#include "stm32l1xx_hal.h"
<>	149:156823d33999	102
<>	149:156823d33999	103	#ifdef HAL_CRYP_MODULE_ENABLED
<>	149:156823d33999	104
<>	149:156823d33999	105	/** @addtogroup STM32L1xx_HAL_Driver
<>	149:156823d33999	106	* @{
<>	149:156823d33999	107	*/
<>	149:156823d33999	108
<>	149:156823d33999	109	/** @defgroup CRYP CRYP
<>	149:156823d33999	110	* @brief CRYP HAL module driver.
<>	149:156823d33999	111	* @{
<>	149:156823d33999	112	*/
<>	149:156823d33999	113
<>	149:156823d33999	114	#if defined(STM32L162xC) \|\| defined(STM32L162xCA) \|\| defined(STM32L162xD) \|\| defined(STM32L162xE) \|\| defined(STM32L162xDX)
<>	149:156823d33999	115
<>	149:156823d33999	116	/* Private typedef -----------------------------------------------------------*/
<>	149:156823d33999	117	/* Private define ------------------------------------------------------------*/
<>	149:156823d33999	118
<>	149:156823d33999	119	/** @defgroup CRYP_Private_Defines CRYP Private Defines
<>	149:156823d33999	120	* @{
<>	149:156823d33999	121	*/
<>	149:156823d33999	122
<>	149:156823d33999	123	#define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE \| AES_CR_CHMOD)
<>	149:156823d33999	124
<>	149:156823d33999	125	/**
<>	149:156823d33999	126	* @}
<>	149:156823d33999	127	*/
<>	149:156823d33999	128
<>	149:156823d33999	129	/* Private macro -------------------------------------------------------------*/
<>	149:156823d33999	130	/* Private variables ---------------------------------------------------------*/
<>	149:156823d33999	131	/* Private function prototypes -----------------------------------------------*/
<>	149:156823d33999	132
<>	149:156823d33999	133	/** @defgroup CRYP_Private_Functions CRYP Private Functions
<>	149:156823d33999	134	* @{
<>	149:156823d33999	135	*/
<>	149:156823d33999	136
<>	149:156823d33999	137	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
<>	149:156823d33999	138	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector);
<>	149:156823d33999	139	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key);
<>	149:156823d33999	140	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
<>	149:156823d33999	141	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	142	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	143	static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	144	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
<>	149:156823d33999	145
<>	149:156823d33999	146	/**
<>	149:156823d33999	147	* @}
<>	149:156823d33999	148	*/
<>	149:156823d33999	149
<>	149:156823d33999	150	/* Private functions ---------------------------------------------------------*/
<>	149:156823d33999	151
<>	149:156823d33999	152	/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
<>	149:156823d33999	153	* @{
<>	149:156823d33999	154	*/
<>	149:156823d33999	155
<>	149:156823d33999	156	/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
<>	149:156823d33999	157	* @brief Initialization and Configuration functions.
<>	149:156823d33999	158	*
<>	149:156823d33999	159	@verbatim
<>	149:156823d33999	160	==============================================================================
<>	149:156823d33999	161	##### Initialization and de-initialization functions #####
<>	149:156823d33999	162	==============================================================================
<>	149:156823d33999	163	[..] This section provides functions allowing to:
<>	149:156823d33999	164	(+) Initialize the CRYP according to the specified parameters
<>	149:156823d33999	165	in the CRYP_InitTypeDef and creates the associated handle
<>	149:156823d33999	166	(+) DeInitialize the CRYP peripheral
<>	149:156823d33999	167	(+) Initialize the CRYP MSP
<>	149:156823d33999	168	(+) DeInitialize CRYP MSP
<>	149:156823d33999	169
<>	149:156823d33999	170	@endverbatim
<>	149:156823d33999	171	* @{
<>	149:156823d33999	172	*/
<>	149:156823d33999	173
<>	149:156823d33999	174	/**
<>	149:156823d33999	175	* @brief Initializes the CRYP according to the specified
<>	149:156823d33999	176	* parameters in the CRYP_InitTypeDef and creates the associated handle.
<>	149:156823d33999	177	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	178	* the configuration information for CRYP module
<>	149:156823d33999	179	* @retval HAL status
<>	149:156823d33999	180	*/
<>	149:156823d33999	181	HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	182	{
<>	149:156823d33999	183	/* Check the CRYP handle allocation */
<>	149:156823d33999	184	if(hcryp == NULL)
<>	149:156823d33999	185	{
<>	149:156823d33999	186	return HAL_ERROR;
<>	149:156823d33999	187	}
<>	149:156823d33999	188
<>	149:156823d33999	189	/* Check the parameters */
<>	149:156823d33999	190	assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
<>	149:156823d33999	191	assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
<>	149:156823d33999	192
<>	149:156823d33999	193	if(hcryp->State == HAL_CRYP_STATE_RESET)
<>	149:156823d33999	194	{
<>	149:156823d33999	195	/* Allocate lock resource and initialize it */
<>	149:156823d33999	196	hcryp->Lock = HAL_UNLOCKED;
<>	149:156823d33999	197
<>	149:156823d33999	198	/* Init the low level hardware */
<>	149:156823d33999	199	HAL_CRYP_MspInit(hcryp);
<>	149:156823d33999	200	}
<>	149:156823d33999	201
<>	149:156823d33999	202	/* Check if AES already enabled */
<>	149:156823d33999	203	if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
<>	149:156823d33999	204	{
<>	149:156823d33999	205	/* Change the CRYP state */
<>	149:156823d33999	206	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	207
<>	149:156823d33999	208	/* Set the data type*/
<>	149:156823d33999	209	MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
<>	149:156823d33999	210
<>	149:156823d33999	211	/* Reset CrypInCount and CrypOutCount */
<>	149:156823d33999	212	hcryp->CrypInCount = 0;
<>	149:156823d33999	213	hcryp->CrypOutCount = 0;
<>	149:156823d33999	214
<>	149:156823d33999	215	/* Change the CRYP state */
<>	149:156823d33999	216	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	217
<>	149:156823d33999	218	/* Set the default CRYP phase */
<>	149:156823d33999	219	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	149:156823d33999	220
<>	149:156823d33999	221	/* Return function status */
<>	149:156823d33999	222	return HAL_OK;
<>	149:156823d33999	223	}
<>	149:156823d33999	224	else
<>	149:156823d33999	225	{
<>	149:156823d33999	226	/* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
<>	149:156823d33999	227	/* enabled is forbidden to avoid unpredictable AES behavior.*/
<>	149:156823d33999	228
<>	149:156823d33999	229	/* Return function status */
<>	149:156823d33999	230	return HAL_ERROR;
<>	149:156823d33999	231	}
<>	149:156823d33999	232
<>	149:156823d33999	233	}
<>	149:156823d33999	234
<>	149:156823d33999	235	/**
<>	149:156823d33999	236	* @brief DeInitializes the CRYP peripheral.
<>	149:156823d33999	237	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	238	* the configuration information for CRYP module
<>	149:156823d33999	239	* @retval HAL status
<>	149:156823d33999	240	*/
<>	149:156823d33999	241	HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	242	{
<>	149:156823d33999	243	/* Check the CRYP handle allocation */
<>	149:156823d33999	244	if(hcryp == NULL)
<>	149:156823d33999	245	{
<>	149:156823d33999	246	return HAL_ERROR;
<>	149:156823d33999	247	}
<>	149:156823d33999	248
<>	149:156823d33999	249	/* Change the CRYP state */
<>	149:156823d33999	250	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	251
<>	149:156823d33999	252	/* Set the default CRYP phase */
<>	149:156823d33999	253	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	149:156823d33999	254
<>	149:156823d33999	255	/* Reset CrypInCount and CrypOutCount */
<>	149:156823d33999	256	hcryp->CrypInCount = 0;
<>	149:156823d33999	257	hcryp->CrypOutCount = 0;
<>	149:156823d33999	258
<>	149:156823d33999	259	/* Disable the CRYP Peripheral Clock */
<>	149:156823d33999	260	__HAL_CRYP_DISABLE(hcryp);
<>	149:156823d33999	261
<>	149:156823d33999	262	/* DeInit the low level hardware: CLOCK, NVIC.*/
<>	149:156823d33999	263	HAL_CRYP_MspDeInit(hcryp);
<>	149:156823d33999	264
<>	149:156823d33999	265	/* Change the CRYP state */
<>	149:156823d33999	266	hcryp->State = HAL_CRYP_STATE_RESET;
<>	149:156823d33999	267
<>	149:156823d33999	268	/* Release Lock */
<>	149:156823d33999	269	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	270
<>	149:156823d33999	271	/* Return function status */
<>	149:156823d33999	272	return HAL_OK;
<>	149:156823d33999	273	}
<>	149:156823d33999	274
<>	149:156823d33999	275	/**
<>	149:156823d33999	276	* @brief Initializes the CRYP MSP.
<>	149:156823d33999	277	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	278	* the configuration information for CRYP module
<>	149:156823d33999	279	* @retval None
<>	149:156823d33999	280	*/
<>	149:156823d33999	281	__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	282	{
<>	149:156823d33999	283	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	284	UNUSED(hcryp);
<>	149:156823d33999	285
<>	149:156823d33999	286	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	287	the HAL_CRYP_MspInit can be implemented in the user file */
<>	149:156823d33999	288	}
<>	149:156823d33999	289
<>	149:156823d33999	290	/**
<>	149:156823d33999	291	* @brief DeInitializes CRYP MSP.
<>	149:156823d33999	292	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	293	* the configuration information for CRYP module
<>	149:156823d33999	294	* @retval None
<>	149:156823d33999	295	*/
<>	149:156823d33999	296	__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	297	{
<>	149:156823d33999	298	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	299	UNUSED(hcryp);
<>	149:156823d33999	300
<>	149:156823d33999	301	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	302	the HAL_CRYP_MspDeInit can be implemented in the user file */
<>	149:156823d33999	303	}
<>	149:156823d33999	304
<>	149:156823d33999	305	/**
<>	149:156823d33999	306	* @}
<>	149:156823d33999	307	*/
<>	149:156823d33999	308
<>	149:156823d33999	309	/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
<>	149:156823d33999	310	* @brief processing functions.
<>	149:156823d33999	311	*
<>	149:156823d33999	312	@verbatim
<>	149:156823d33999	313	==============================================================================
<>	149:156823d33999	314	##### AES processing functions #####
<>	149:156823d33999	315	==============================================================================
<>	149:156823d33999	316	[..] This section provides functions allowing to:
<>	149:156823d33999	317	(+) Encrypt plaintext using AES algorithm in different chaining modes
<>	149:156823d33999	318	(+) Decrypt cyphertext using AES algorithm in different chaining modes
<>	149:156823d33999	319	[..] Three processing functions are available:
<>	149:156823d33999	320	(+) Polling mode
<>	149:156823d33999	321	(+) Interrupt mode
<>	149:156823d33999	322	(+) DMA mode
<>	149:156823d33999	323
<>	149:156823d33999	324	@endverbatim
<>	149:156823d33999	325	* @{
<>	149:156823d33999	326	*/
<>	149:156823d33999	327
<>	149:156823d33999	328	/**
<>	149:156823d33999	329	* @brief Initializes the CRYP peripheral in AES ECB encryption mode
<>	149:156823d33999	330	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	331	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	332	* the configuration information for CRYP module
<>	149:156823d33999	333	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	334	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	335	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	336	* @param Timeout: Specify Timeout value
<>	149:156823d33999	337	* @retval HAL status
<>	149:156823d33999	338	*/
<>	149:156823d33999	339	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	340	{
<>	149:156823d33999	341	/* Process Locked */
<>	149:156823d33999	342	__HAL_LOCK(hcryp);
<>	149:156823d33999	343
<>	149:156823d33999	344	/* Check that data aligned on u32 and Size multiple of 16*/
<>	149:156823d33999	345	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	346	{
<>	149:156823d33999	347	/* Process Locked */
<>	149:156823d33999	348	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	349
<>	149:156823d33999	350	/* Return function status */
<>	149:156823d33999	351	return HAL_ERROR;
<>	149:156823d33999	352	}
<>	149:156823d33999	353
<>	149:156823d33999	354	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	355	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	356	{
<>	149:156823d33999	357	/* Change the CRYP state */
<>	149:156823d33999	358	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	359
<>	149:156823d33999	360	/* Check if initialization phase has already been performed */
<>	149:156823d33999	361	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	362	{
<>	149:156823d33999	363	/* Set the key */
<>	149:156823d33999	364	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	365
<>	149:156823d33999	366	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	367	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	368
<>	149:156823d33999	369	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	370	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	371
<>	149:156823d33999	372	/* Enable CRYP */
<>	149:156823d33999	373	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	374
<>	149:156823d33999	375	/* Set the phase */
<>	149:156823d33999	376	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	377	}
<>	149:156823d33999	378
<>	149:156823d33999	379	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	380	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	381	{
<>	149:156823d33999	382	return HAL_TIMEOUT;
<>	149:156823d33999	383	}
<>	149:156823d33999	384
<>	149:156823d33999	385	/* Change the CRYP state */
<>	149:156823d33999	386	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	387
<>	149:156823d33999	388	/* Process Unlocked */
<>	149:156823d33999	389	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	390
<>	149:156823d33999	391	/* Return function status */
<>	149:156823d33999	392	return HAL_OK;
<>	149:156823d33999	393	}
<>	149:156823d33999	394	else
<>	149:156823d33999	395	{
<>	149:156823d33999	396	/* Process Locked */
<>	149:156823d33999	397	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	398
<>	149:156823d33999	399	/* Return function status */
<>	149:156823d33999	400	return HAL_ERROR;
<>	149:156823d33999	401	}
<>	149:156823d33999	402	}
<>	149:156823d33999	403
<>	149:156823d33999	404	/**
<>	149:156823d33999	405	* @brief Initializes the CRYP peripheral in AES CBC encryption mode
<>	149:156823d33999	406	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	407	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	408	* the configuration information for CRYP module
<>	149:156823d33999	409	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	410	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	411	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	412	* @param Timeout: Specify Timeout value
<>	149:156823d33999	413	* @retval HAL status
<>	149:156823d33999	414	*/
<>	149:156823d33999	415	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	416	{
<>	149:156823d33999	417	/* Process Locked */
<>	149:156823d33999	418	__HAL_LOCK(hcryp);
<>	149:156823d33999	419
<>	149:156823d33999	420	/* Check that data aligned on u32 */
<>	149:156823d33999	421	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	422	{
<>	149:156823d33999	423	/* Process Locked */
<>	149:156823d33999	424	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	425
<>	149:156823d33999	426	/* Return function status */
<>	149:156823d33999	427	return HAL_ERROR;
<>	149:156823d33999	428	}
<>	149:156823d33999	429
<>	149:156823d33999	430	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	431	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	432	{
<>	149:156823d33999	433	/* Change the CRYP state */
<>	149:156823d33999	434	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	435
<>	149:156823d33999	436	/* Check if initialization phase has already been performed */
<>	149:156823d33999	437	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	438	{
<>	149:156823d33999	439	/* Set the key */
<>	149:156823d33999	440	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	441
<>	149:156823d33999	442	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	443	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	444
<>	149:156823d33999	445	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	446	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	447
<>	149:156823d33999	448	/* Set the Initialization Vector */
<>	149:156823d33999	449	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	450
<>	149:156823d33999	451	/* Enable CRYP */
<>	149:156823d33999	452	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	453
<>	149:156823d33999	454	/* Set the phase */
<>	149:156823d33999	455	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	456	}
<>	149:156823d33999	457
<>	149:156823d33999	458	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	459	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	460	{
<>	149:156823d33999	461	return HAL_TIMEOUT;
<>	149:156823d33999	462	}
<>	149:156823d33999	463
<>	149:156823d33999	464	/* Change the CRYP state */
<>	149:156823d33999	465	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	466
<>	149:156823d33999	467	/* Process Unlocked */
<>	149:156823d33999	468	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	469
<>	149:156823d33999	470	/* Return function status */
<>	149:156823d33999	471	return HAL_OK;
<>	149:156823d33999	472	}
<>	149:156823d33999	473	else
<>	149:156823d33999	474	{
<>	149:156823d33999	475	/* Process Locked */
<>	149:156823d33999	476	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	477
<>	149:156823d33999	478	/* Return function status */
<>	149:156823d33999	479	return HAL_ERROR;
<>	149:156823d33999	480	}
<>	149:156823d33999	481	}
<>	149:156823d33999	482
<>	149:156823d33999	483	/**
<>	149:156823d33999	484	* @brief Initializes the CRYP peripheral in AES CTR encryption mode
<>	149:156823d33999	485	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	486	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	487	* the configuration information for CRYP module
<>	149:156823d33999	488	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	489	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	490	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	491	* @param Timeout: Specify Timeout value
<>	149:156823d33999	492	* @retval HAL status
<>	149:156823d33999	493	*/
<>	149:156823d33999	494	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	495	{
<>	149:156823d33999	496	/* Process Locked */
<>	149:156823d33999	497	__HAL_LOCK(hcryp);
<>	149:156823d33999	498
<>	149:156823d33999	499	/* Check that data aligned on u32 */
<>	149:156823d33999	500	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	501	{
<>	149:156823d33999	502	/* Process Locked */
<>	149:156823d33999	503	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	504
<>	149:156823d33999	505	/* Return function status */
<>	149:156823d33999	506	return HAL_ERROR;
<>	149:156823d33999	507	}
<>	149:156823d33999	508
<>	149:156823d33999	509	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	510	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	511	{
<>	149:156823d33999	512	/* Change the CRYP state */
<>	149:156823d33999	513	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	514
<>	149:156823d33999	515	/* Check if initialization phase has already been performed */
<>	149:156823d33999	516	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	517	{
<>	149:156823d33999	518	/* Set the key */
<>	149:156823d33999	519	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	520
<>	149:156823d33999	521	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	522	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	523
<>	149:156823d33999	524	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	525	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	526
<>	149:156823d33999	527	/* Set the Initialization Vector */
<>	149:156823d33999	528	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	529
<>	149:156823d33999	530	/* Enable CRYP */
<>	149:156823d33999	531	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	532
<>	149:156823d33999	533	/* Set the phase */
<>	149:156823d33999	534	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	535	}
<>	149:156823d33999	536
<>	149:156823d33999	537	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	538	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	539	{
<>	149:156823d33999	540	return HAL_TIMEOUT;
<>	149:156823d33999	541	}
<>	149:156823d33999	542
<>	149:156823d33999	543	/* Change the CRYP state */
<>	149:156823d33999	544	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	545
<>	149:156823d33999	546	/* Process Unlocked */
<>	149:156823d33999	547	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	548
<>	149:156823d33999	549	/* Return function status */
<>	149:156823d33999	550	return HAL_OK;
<>	149:156823d33999	551	}
<>	149:156823d33999	552	else
<>	149:156823d33999	553	{
<>	149:156823d33999	554	/* Release Lock */
<>	149:156823d33999	555	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	556
<>	149:156823d33999	557	/* Return function status */
<>	149:156823d33999	558	return HAL_ERROR;
<>	149:156823d33999	559	}
<>	149:156823d33999	560	}
<>	149:156823d33999	561
<>	149:156823d33999	562	/**
<>	149:156823d33999	563	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	149:156823d33999	564	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	565	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	566	* the configuration information for CRYP module
<>	149:156823d33999	567	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	568	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	569	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	570	* @param Timeout: Specify Timeout value
<>	149:156823d33999	571	* @retval HAL status
<>	149:156823d33999	572	*/
<>	149:156823d33999	573	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	574	{
<>	149:156823d33999	575	/* Process Locked */
<>	149:156823d33999	576	__HAL_LOCK(hcryp);
<>	149:156823d33999	577
<>	149:156823d33999	578	/* Check that data aligned on u32 */
<>	149:156823d33999	579	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	580	{
<>	149:156823d33999	581	/* Process Locked */
<>	149:156823d33999	582	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	583
<>	149:156823d33999	584	/* Return function status */
<>	149:156823d33999	585	return HAL_ERROR;
<>	149:156823d33999	586	}
<>	149:156823d33999	587
<>	149:156823d33999	588	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	589	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	590	{
<>	149:156823d33999	591	/* Change the CRYP state */
<>	149:156823d33999	592	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	593
<>	149:156823d33999	594	/* Check if initialization phase has already been performed */
<>	149:156823d33999	595	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	596	{
<>	149:156823d33999	597	/* Set the key */
<>	149:156823d33999	598	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	599
<>	149:156823d33999	600	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	601	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	602
<>	149:156823d33999	603	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	604	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	605
<>	149:156823d33999	606	/* Enable CRYP */
<>	149:156823d33999	607	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	608
<>	149:156823d33999	609	/* Set the phase */
<>	149:156823d33999	610	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	611	}
<>	149:156823d33999	612
<>	149:156823d33999	613	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	614	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	615	{
<>	149:156823d33999	616	return HAL_TIMEOUT;
<>	149:156823d33999	617	}
<>	149:156823d33999	618
<>	149:156823d33999	619	/* Change the CRYP state */
<>	149:156823d33999	620	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	621
<>	149:156823d33999	622	/* Process Unlocked */
<>	149:156823d33999	623	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	624
<>	149:156823d33999	625	/* Return function status */
<>	149:156823d33999	626	return HAL_OK;
<>	149:156823d33999	627	}
<>	149:156823d33999	628	else
<>	149:156823d33999	629	{
<>	149:156823d33999	630	/* Release Lock */
<>	149:156823d33999	631	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	632
<>	149:156823d33999	633	/* Return function status */
<>	149:156823d33999	634	return HAL_ERROR;
<>	149:156823d33999	635	}
<>	149:156823d33999	636	}
<>	149:156823d33999	637
<>	149:156823d33999	638	/**
<>	149:156823d33999	639	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	149:156823d33999	640	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	641	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	642	* the configuration information for CRYP module
<>	149:156823d33999	643	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	644	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	645	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	646	* @param Timeout: Specify Timeout value
<>	149:156823d33999	647	* @retval HAL status
<>	149:156823d33999	648	*/
<>	149:156823d33999	649	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	650	{
<>	149:156823d33999	651	/* Process Locked */
<>	149:156823d33999	652	__HAL_LOCK(hcryp);
<>	149:156823d33999	653
<>	149:156823d33999	654	/* Check that data aligned on u32 */
<>	149:156823d33999	655	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	656	{
<>	149:156823d33999	657	/* Process Locked */
<>	149:156823d33999	658	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	659
<>	149:156823d33999	660	/* Return function status */
<>	149:156823d33999	661	return HAL_ERROR;
<>	149:156823d33999	662	}
<>	149:156823d33999	663
<>	149:156823d33999	664	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	665	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	666	{
<>	149:156823d33999	667	/* Change the CRYP state */
<>	149:156823d33999	668	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	669
<>	149:156823d33999	670	/* Check if initialization phase has already been performed */
<>	149:156823d33999	671	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	672	{
<>	149:156823d33999	673	/* Set the key */
<>	149:156823d33999	674	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	675
<>	149:156823d33999	676	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	677	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	678
<>	149:156823d33999	679	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	680	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	681
<>	149:156823d33999	682	/* Set the Initialization Vector */
<>	149:156823d33999	683	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	684
<>	149:156823d33999	685	/* Enable CRYP */
<>	149:156823d33999	686	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	687
<>	149:156823d33999	688	/* Set the phase */
<>	149:156823d33999	689	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	690	}
<>	149:156823d33999	691
<>	149:156823d33999	692	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	693	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	694	{
<>	149:156823d33999	695	return HAL_TIMEOUT;
<>	149:156823d33999	696	}
<>	149:156823d33999	697
<>	149:156823d33999	698	/* Change the CRYP state */
<>	149:156823d33999	699	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	700
<>	149:156823d33999	701	/* Process Unlocked */
<>	149:156823d33999	702	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	703
<>	149:156823d33999	704	/* Return function status */
<>	149:156823d33999	705	return HAL_OK;
<>	149:156823d33999	706	}
<>	149:156823d33999	707	else
<>	149:156823d33999	708	{
<>	149:156823d33999	709	/* Release Lock */
<>	149:156823d33999	710	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	711
<>	149:156823d33999	712	/* Return function status */
<>	149:156823d33999	713	return HAL_ERROR;
<>	149:156823d33999	714	}
<>	149:156823d33999	715	}
<>	149:156823d33999	716
<>	149:156823d33999	717	/**
<>	149:156823d33999	718	* @brief Initializes the CRYP peripheral in AES CTR decryption mode
<>	149:156823d33999	719	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	720	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	721	* the configuration information for CRYP module
<>	149:156823d33999	722	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	723	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	724	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	725	* @param Timeout: Specify Timeout value
<>	149:156823d33999	726	* @retval HAL status
<>	149:156823d33999	727	*/
<>	149:156823d33999	728	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	729	{
<>	149:156823d33999	730	/* Process Locked */
<>	149:156823d33999	731	__HAL_LOCK(hcryp);
<>	149:156823d33999	732
<>	149:156823d33999	733	/* Check that data aligned on u32 */
<>	149:156823d33999	734	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	735	{
<>	149:156823d33999	736	/* Process Locked */
<>	149:156823d33999	737	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	738
<>	149:156823d33999	739	/* Return function status */
<>	149:156823d33999	740	return HAL_ERROR;
<>	149:156823d33999	741	}
<>	149:156823d33999	742
<>	149:156823d33999	743	/* Check if initialization phase has already been performed */
<>	149:156823d33999	744	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
<>	149:156823d33999	745	{
<>	149:156823d33999	746	/* Change the CRYP state */
<>	149:156823d33999	747	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	748
<>	149:156823d33999	749	/* Set the key */
<>	149:156823d33999	750	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	751
<>	149:156823d33999	752	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	753	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	754
<>	149:156823d33999	755	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	149:156823d33999	756	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	757
<>	149:156823d33999	758	/* Set the Initialization Vector */
<>	149:156823d33999	759	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	760
<>	149:156823d33999	761	/* Enable CRYP */
<>	149:156823d33999	762	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	763
<>	149:156823d33999	764	/* Set the phase */
<>	149:156823d33999	765	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	766	}
<>	149:156823d33999	767
<>	149:156823d33999	768	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	769	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	770	{
<>	149:156823d33999	771	return HAL_TIMEOUT;
<>	149:156823d33999	772	}
<>	149:156823d33999	773
<>	149:156823d33999	774	/* Change the CRYP state */
<>	149:156823d33999	775	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	776
<>	149:156823d33999	777	/* Process Unlocked */
<>	149:156823d33999	778	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	779
<>	149:156823d33999	780	/* Return function status */
<>	149:156823d33999	781	return HAL_OK;
<>	149:156823d33999	782	}
<>	149:156823d33999	783
<>	149:156823d33999	784	/**
<>	149:156823d33999	785	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
<>	149:156823d33999	786	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	787	* the configuration information for CRYP module
<>	149:156823d33999	788	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	789	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	790	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	791	* @retval HAL status
<>	149:156823d33999	792	*/
<>	149:156823d33999	793	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	794	{
<>	149:156823d33999	795	uint32_t inputaddr = 0;
<>	149:156823d33999	796
<>	149:156823d33999	797	/* Check that data aligned on u32 */
<>	149:156823d33999	798	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	799	{
<>	149:156823d33999	800	/* Process Locked */
<>	149:156823d33999	801	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	802
<>	149:156823d33999	803	/* Return function status */
<>	149:156823d33999	804	return HAL_ERROR;
<>	149:156823d33999	805	}
<>	149:156823d33999	806
<>	149:156823d33999	807	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	808	{
<>	149:156823d33999	809	/* Process Locked */
<>	149:156823d33999	810	__HAL_LOCK(hcryp);
<>	149:156823d33999	811
<>	149:156823d33999	812	/* Get the buffer addresses and sizes */
<>	149:156823d33999	813	hcryp->CrypInCount = Size;
<>	149:156823d33999	814	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	815	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	816	hcryp->CrypOutCount = Size;
<>	149:156823d33999	817
<>	149:156823d33999	818	/* Change the CRYP state */
<>	149:156823d33999	819	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	820
<>	149:156823d33999	821	/* Check if initialization phase has already been performed */
<>	149:156823d33999	822	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	823	{
<>	149:156823d33999	824	/* Set the key */
<>	149:156823d33999	825	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	826
<>	149:156823d33999	827	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	828	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	829
<>	149:156823d33999	830	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	831	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	832
<>	149:156823d33999	833	/* Set the phase */
<>	149:156823d33999	834	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	835	}
<>	149:156823d33999	836
<>	149:156823d33999	837	/* Enable Interrupts */
<>	149:156823d33999	838	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	839
<>	149:156823d33999	840	/* Enable CRYP */
<>	149:156823d33999	841	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	842
<>	149:156823d33999	843	/* Get the last input data adress */
<>	149:156823d33999	844	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	845
<>	149:156823d33999	846	/* Write the Input block in the Data Input register */
<>	149:156823d33999	847	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	848	inputaddr+=4;
<>	149:156823d33999	849	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	850	inputaddr+=4;
<>	149:156823d33999	851	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	852	inputaddr+=4;
<>	149:156823d33999	853	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	854	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	855	hcryp->CrypInCount -= 16;
<>	149:156823d33999	856
<>	149:156823d33999	857	/* Return function status */
<>	149:156823d33999	858	return HAL_OK;
<>	149:156823d33999	859	}
<>	149:156823d33999	860	else
<>	149:156823d33999	861	{
<>	149:156823d33999	862	/* Release Lock */
<>	149:156823d33999	863	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	864
<>	149:156823d33999	865	/* Return function status */
<>	149:156823d33999	866	return HAL_ERROR;
<>	149:156823d33999	867	}
<>	149:156823d33999	868	}
<>	149:156823d33999	869
<>	149:156823d33999	870	/**
<>	149:156823d33999	871	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
<>	149:156823d33999	872	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	873	* the configuration information for CRYP module
<>	149:156823d33999	874	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	875	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	876	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	877	* @retval HAL status
<>	149:156823d33999	878	*/
<>	149:156823d33999	879	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	880	{
<>	149:156823d33999	881	uint32_t inputaddr = 0;
<>	149:156823d33999	882
<>	149:156823d33999	883	/* Check that data aligned on u32 */
<>	149:156823d33999	884	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	885	{
<>	149:156823d33999	886	/* Process Locked */
<>	149:156823d33999	887	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	888
<>	149:156823d33999	889	/* Return function status */
<>	149:156823d33999	890	return HAL_ERROR;
<>	149:156823d33999	891	}
<>	149:156823d33999	892
<>	149:156823d33999	893	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	894	{
<>	149:156823d33999	895	/* Process Locked */
<>	149:156823d33999	896	__HAL_LOCK(hcryp);
<>	149:156823d33999	897
<>	149:156823d33999	898	/* Get the buffer addresses and sizes */
<>	149:156823d33999	899	hcryp->CrypInCount = Size;
<>	149:156823d33999	900	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	901	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	902	hcryp->CrypOutCount = Size;
<>	149:156823d33999	903
<>	149:156823d33999	904	/* Change the CRYP state */
<>	149:156823d33999	905	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	906
<>	149:156823d33999	907	/* Check if initialization phase has already been performed */
<>	149:156823d33999	908	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	909	{
<>	149:156823d33999	910	/* Set the key */
<>	149:156823d33999	911	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	912
<>	149:156823d33999	913	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	914	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	915
<>	149:156823d33999	916	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	917	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	918
<>	149:156823d33999	919	/* Set the Initialization Vector */
<>	149:156823d33999	920	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	921
<>	149:156823d33999	922	/* Set the phase */
<>	149:156823d33999	923	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	924	}
<>	149:156823d33999	925
<>	149:156823d33999	926	/* Enable Interrupts */
<>	149:156823d33999	927	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	928
<>	149:156823d33999	929	/* Enable CRYP */
<>	149:156823d33999	930	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	931
<>	149:156823d33999	932	/* Get the last input data adress */
<>	149:156823d33999	933	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	934
<>	149:156823d33999	935	/* Write the Input block in the Data Input register */
<>	149:156823d33999	936	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	937	inputaddr+=4;
<>	149:156823d33999	938	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	939	inputaddr+=4;
<>	149:156823d33999	940	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	941	inputaddr+=4;
<>	149:156823d33999	942	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	943	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	944	hcryp->CrypInCount -= 16;
<>	149:156823d33999	945
<>	149:156823d33999	946	/* Return function status */
<>	149:156823d33999	947	return HAL_OK;
<>	149:156823d33999	948	}
<>	149:156823d33999	949	else
<>	149:156823d33999	950	{
<>	149:156823d33999	951	/* Release Lock */
<>	149:156823d33999	952	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	953
<>	149:156823d33999	954	/* Return function status */
<>	149:156823d33999	955	return HAL_ERROR;
<>	149:156823d33999	956	}
<>	149:156823d33999	957	}
<>	149:156823d33999	958
<>	149:156823d33999	959	/**
<>	149:156823d33999	960	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
<>	149:156823d33999	961	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	962	* the configuration information for CRYP module
<>	149:156823d33999	963	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	964	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	965	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	966	* @retval HAL status
<>	149:156823d33999	967	*/
<>	149:156823d33999	968	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	969	{
<>	149:156823d33999	970	uint32_t inputaddr = 0;
<>	149:156823d33999	971
<>	149:156823d33999	972	/* Check that data aligned on u32 */
<>	149:156823d33999	973	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	974	{
<>	149:156823d33999	975	/* Process Locked */
<>	149:156823d33999	976	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	977
<>	149:156823d33999	978	/* Return function status */
<>	149:156823d33999	979	return HAL_ERROR;
<>	149:156823d33999	980	}
<>	149:156823d33999	981
<>	149:156823d33999	982	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	983	{
<>	149:156823d33999	984	/* Process Locked */
<>	149:156823d33999	985	__HAL_LOCK(hcryp);
<>	149:156823d33999	986
<>	149:156823d33999	987	/* Get the buffer addresses and sizes */
<>	149:156823d33999	988	hcryp->CrypInCount = Size;
<>	149:156823d33999	989	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	990	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	991	hcryp->CrypOutCount = Size;
<>	149:156823d33999	992
<>	149:156823d33999	993	/* Change the CRYP state */
<>	149:156823d33999	994	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	995
<>	149:156823d33999	996	/* Check if initialization phase has already been performed */
<>	149:156823d33999	997	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	998	{
<>	149:156823d33999	999	/* Set the key */
<>	149:156823d33999	1000	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1001
<>	149:156823d33999	1002	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1003	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1004
<>	149:156823d33999	1005	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1006	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	1007
<>	149:156823d33999	1008	/* Set the Initialization Vector */
<>	149:156823d33999	1009	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1010
<>	149:156823d33999	1011	/* Set the phase */
<>	149:156823d33999	1012	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1013	}
<>	149:156823d33999	1014
<>	149:156823d33999	1015	/* Enable Interrupts */
<>	149:156823d33999	1016	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1017
<>	149:156823d33999	1018	/* Enable CRYP */
<>	149:156823d33999	1019	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1020
<>	149:156823d33999	1021	/* Get the last input data adress */
<>	149:156823d33999	1022	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1023
<>	149:156823d33999	1024	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1025	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1026	inputaddr+=4;
<>	149:156823d33999	1027	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1028	inputaddr+=4;
<>	149:156823d33999	1029	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1030	inputaddr+=4;
<>	149:156823d33999	1031	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1032	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1033	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1034
<>	149:156823d33999	1035	/* Return function status */
<>	149:156823d33999	1036	return HAL_OK;
<>	149:156823d33999	1037	}
<>	149:156823d33999	1038	else
<>	149:156823d33999	1039	{
<>	149:156823d33999	1040	/* Release Lock */
<>	149:156823d33999	1041	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1042
<>	149:156823d33999	1043	/* Return function status */
<>	149:156823d33999	1044	return HAL_ERROR;
<>	149:156823d33999	1045	}
<>	149:156823d33999	1046	}
<>	149:156823d33999	1047
<>	149:156823d33999	1048	/**
<>	149:156823d33999	1049	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
<>	149:156823d33999	1050	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1051	* the configuration information for CRYP module
<>	149:156823d33999	1052	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1053	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1054	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1055	* @retval HAL status
<>	149:156823d33999	1056	*/
<>	149:156823d33999	1057	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1058	{
<>	149:156823d33999	1059	uint32_t inputaddr = 0;
<>	149:156823d33999	1060
<>	149:156823d33999	1061	/* Check that data aligned on u32 */
<>	149:156823d33999	1062	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1063	{
<>	149:156823d33999	1064	/* Process Locked */
<>	149:156823d33999	1065	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1066
<>	149:156823d33999	1067	/* Return function status */
<>	149:156823d33999	1068	return HAL_ERROR;
<>	149:156823d33999	1069	}
<>	149:156823d33999	1070
<>	149:156823d33999	1071	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1072	{
<>	149:156823d33999	1073	/* Process Locked */
<>	149:156823d33999	1074	__HAL_LOCK(hcryp);
<>	149:156823d33999	1075
<>	149:156823d33999	1076	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1077	hcryp->CrypInCount = Size;
<>	149:156823d33999	1078	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1079	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1080	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1081
<>	149:156823d33999	1082	/* Change the CRYP state */
<>	149:156823d33999	1083	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1084
<>	149:156823d33999	1085	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1086	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1087	{
<>	149:156823d33999	1088	/* Set the key */
<>	149:156823d33999	1089	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1090
<>	149:156823d33999	1091	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1092	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1093
<>	149:156823d33999	1094	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	1095	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	1096
<>	149:156823d33999	1097	/* Set the phase */
<>	149:156823d33999	1098	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1099	}
<>	149:156823d33999	1100
<>	149:156823d33999	1101	/* Enable Interrupts */
<>	149:156823d33999	1102	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1103
<>	149:156823d33999	1104	/* Enable CRYP */
<>	149:156823d33999	1105	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1106
<>	149:156823d33999	1107	/* Get the last input data adress */
<>	149:156823d33999	1108	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1109
<>	149:156823d33999	1110	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1111	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1112	inputaddr+=4;
<>	149:156823d33999	1113	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1114	inputaddr+=4;
<>	149:156823d33999	1115	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1116	inputaddr+=4;
<>	149:156823d33999	1117	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1118	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1119	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1120
<>	149:156823d33999	1121	/* Return function status */
<>	149:156823d33999	1122	return HAL_OK;
<>	149:156823d33999	1123	}
<>	149:156823d33999	1124	else
<>	149:156823d33999	1125	{
<>	149:156823d33999	1126	/* Release Lock */
<>	149:156823d33999	1127	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1128
<>	149:156823d33999	1129	/* Return function status */
<>	149:156823d33999	1130	return HAL_ERROR;
<>	149:156823d33999	1131	}
<>	149:156823d33999	1132	}
<>	149:156823d33999	1133
<>	149:156823d33999	1134	/**
<>	149:156823d33999	1135	* @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
<>	149:156823d33999	1136	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1137	* the configuration information for CRYP module
<>	149:156823d33999	1138	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1139	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1140	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1141	* @retval HAL status
<>	149:156823d33999	1142	*/
<>	149:156823d33999	1143	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1144	{
<>	149:156823d33999	1145	uint32_t inputaddr = 0;
<>	149:156823d33999	1146
<>	149:156823d33999	1147	/* Check that data aligned on u32 */
<>	149:156823d33999	1148	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1149	{
<>	149:156823d33999	1150	/* Process Locked */
<>	149:156823d33999	1151	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1152
<>	149:156823d33999	1153	/* Return function status */
<>	149:156823d33999	1154	return HAL_ERROR;
<>	149:156823d33999	1155	}
<>	149:156823d33999	1156
<>	149:156823d33999	1157	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1158	{
<>	149:156823d33999	1159	/* Process Locked */
<>	149:156823d33999	1160	__HAL_LOCK(hcryp);
<>	149:156823d33999	1161
<>	149:156823d33999	1162	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1163	hcryp->CrypInCount = Size;
<>	149:156823d33999	1164	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1165	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1166	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1167
<>	149:156823d33999	1168	/* Change the CRYP state */
<>	149:156823d33999	1169	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1170
<>	149:156823d33999	1171	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1172	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1173	{
<>	149:156823d33999	1174	/* Set the key */
<>	149:156823d33999	1175	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1176
<>	149:156823d33999	1177	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1178	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1179
<>	149:156823d33999	1180	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	1181	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	1182
<>	149:156823d33999	1183	/* Set the Initialization Vector */
<>	149:156823d33999	1184	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1185
<>	149:156823d33999	1186	/* Set the phase */
<>	149:156823d33999	1187	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1188	}
<>	149:156823d33999	1189
<>	149:156823d33999	1190	/* Enable Interrupts */
<>	149:156823d33999	1191	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1192
<>	149:156823d33999	1193	/* Enable CRYP */
<>	149:156823d33999	1194	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1195
<>	149:156823d33999	1196	/* Get the last input data adress */
<>	149:156823d33999	1197	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1198
<>	149:156823d33999	1199	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1200	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1201	inputaddr+=4;
<>	149:156823d33999	1202	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1203	inputaddr+=4;
<>	149:156823d33999	1204	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1205	inputaddr+=4;
<>	149:156823d33999	1206	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1207	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1208	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1209
<>	149:156823d33999	1210	/* Return function status */
<>	149:156823d33999	1211	return HAL_OK;
<>	149:156823d33999	1212	}
<>	149:156823d33999	1213	else
<>	149:156823d33999	1214	{
<>	149:156823d33999	1215	/* Release Lock */
<>	149:156823d33999	1216	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1217
<>	149:156823d33999	1218	/* Return function status */
<>	149:156823d33999	1219	return HAL_ERROR;
<>	149:156823d33999	1220	}
<>	149:156823d33999	1221	}
<>	149:156823d33999	1222
<>	149:156823d33999	1223	/**
<>	149:156823d33999	1224	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
<>	149:156823d33999	1225	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1226	* the configuration information for CRYP module
<>	149:156823d33999	1227	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1228	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1229	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1230	* @retval HAL status
<>	149:156823d33999	1231	*/
<>	149:156823d33999	1232	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1233	{
<>	149:156823d33999	1234	uint32_t inputaddr = 0;
<>	149:156823d33999	1235
<>	149:156823d33999	1236	/* Check that data aligned on u32 */
<>	149:156823d33999	1237	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1238	{
<>	149:156823d33999	1239	/* Process Locked */
<>	149:156823d33999	1240	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1241
<>	149:156823d33999	1242	/* Return function status */
<>	149:156823d33999	1243	return HAL_ERROR;
<>	149:156823d33999	1244	}
<>	149:156823d33999	1245
<>	149:156823d33999	1246	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1247	{
<>	149:156823d33999	1248	/* Process Locked */
<>	149:156823d33999	1249	__HAL_LOCK(hcryp);
<>	149:156823d33999	1250
<>	149:156823d33999	1251	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1252	hcryp->CrypInCount = Size;
<>	149:156823d33999	1253	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1254	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1255	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1256
<>	149:156823d33999	1257	/* Change the CRYP state */
<>	149:156823d33999	1258	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1259
<>	149:156823d33999	1260	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1261	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1262	{
<>	149:156823d33999	1263	/* Set the key */
<>	149:156823d33999	1264	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1265
<>	149:156823d33999	1266	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1267	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1268
<>	149:156823d33999	1269	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	149:156823d33999	1270	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	1271
<>	149:156823d33999	1272	/* Set the Initialization Vector */
<>	149:156823d33999	1273	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1274
<>	149:156823d33999	1275	/* Set the phase */
<>	149:156823d33999	1276	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1277	}
<>	149:156823d33999	1278
<>	149:156823d33999	1279	/* Enable Interrupts */
<>	149:156823d33999	1280	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1281
<>	149:156823d33999	1282	/* Enable CRYP */
<>	149:156823d33999	1283	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1284
<>	149:156823d33999	1285	/* Get the last input data adress */
<>	149:156823d33999	1286	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1287
<>	149:156823d33999	1288	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1289	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1290	inputaddr+=4;
<>	149:156823d33999	1291	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1292	inputaddr+=4;
<>	149:156823d33999	1293	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1294	inputaddr+=4;
<>	149:156823d33999	1295	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1296	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1297	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1298
<>	149:156823d33999	1299	/* Return function status */
<>	149:156823d33999	1300	return HAL_OK;
<>	149:156823d33999	1301	}
<>	149:156823d33999	1302	else
<>	149:156823d33999	1303	{
<>	149:156823d33999	1304	/* Release Lock */
<>	149:156823d33999	1305	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1306
<>	149:156823d33999	1307	/* Return function status */
<>	149:156823d33999	1308	return HAL_ERROR;
<>	149:156823d33999	1309	}
<>	149:156823d33999	1310	}
<>	149:156823d33999	1311
<>	149:156823d33999	1312	/**
<>	149:156823d33999	1313	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
<>	149:156823d33999	1314	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1315	* the configuration information for CRYP module
<>	149:156823d33999	1316	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1317	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1318	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1319	* @retval HAL status
<>	149:156823d33999	1320	*/
<>	149:156823d33999	1321	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1322	{
<>	149:156823d33999	1323	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1324
<>	149:156823d33999	1325	/* Check that data aligned on u32 */
<>	149:156823d33999	1326	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1327	{
<>	149:156823d33999	1328	/* Process Locked */
<>	149:156823d33999	1329	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1330
<>	149:156823d33999	1331	/* Return function status */
<>	149:156823d33999	1332	return HAL_ERROR;
<>	149:156823d33999	1333	}
<>	149:156823d33999	1334
<>	149:156823d33999	1335	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1336	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1337	{
<>	149:156823d33999	1338	/* Process Locked */
<>	149:156823d33999	1339	__HAL_LOCK(hcryp);
<>	149:156823d33999	1340
<>	149:156823d33999	1341	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1342	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1343
<>	149:156823d33999	1344	/* Change the CRYP state */
<>	149:156823d33999	1345	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1346
<>	149:156823d33999	1347	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1348	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1349	{
<>	149:156823d33999	1350	/* Set the key */
<>	149:156823d33999	1351	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1352
<>	149:156823d33999	1353	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	1354	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	1355
<>	149:156823d33999	1356	/* Set the phase */
<>	149:156823d33999	1357	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1358	}
<>	149:156823d33999	1359	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1360	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1361
<>	149:156823d33999	1362	/* Process Unlocked */
<>	149:156823d33999	1363	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1364
<>	149:156823d33999	1365	/* Return function status */
<>	149:156823d33999	1366	return HAL_OK;
<>	149:156823d33999	1367	}
<>	149:156823d33999	1368	else
<>	149:156823d33999	1369	{
<>	149:156823d33999	1370	/* Release Lock */
<>	149:156823d33999	1371	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1372
<>	149:156823d33999	1373	return HAL_ERROR;
<>	149:156823d33999	1374	}
<>	149:156823d33999	1375	}
<>	149:156823d33999	1376
<>	149:156823d33999	1377	/**
<>	149:156823d33999	1378	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	149:156823d33999	1379	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1380	* the configuration information for CRYP module
<>	149:156823d33999	1381	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1382	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1383	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1384	* @retval HAL status
<>	149:156823d33999	1385	*/
<>	149:156823d33999	1386	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1387	{
<>	149:156823d33999	1388	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1389
<>	149:156823d33999	1390	/* Check that data aligned on u32 */
<>	149:156823d33999	1391	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1392	{
<>	149:156823d33999	1393	/* Process Locked */
<>	149:156823d33999	1394	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1395
<>	149:156823d33999	1396	/* Return function status */
<>	149:156823d33999	1397	return HAL_ERROR;
<>	149:156823d33999	1398	}
<>	149:156823d33999	1399
<>	149:156823d33999	1400	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1401	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1402	{
<>	149:156823d33999	1403	/* Process Locked */
<>	149:156823d33999	1404	__HAL_LOCK(hcryp);
<>	149:156823d33999	1405
<>	149:156823d33999	1406	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1407	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1408
<>	149:156823d33999	1409	/* Change the CRYP state */
<>	149:156823d33999	1410	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1411
<>	149:156823d33999	1412	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1413	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1414	{
<>	149:156823d33999	1415	/* Set the key */
<>	149:156823d33999	1416	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1417
<>	149:156823d33999	1418	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	1419	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	1420
<>	149:156823d33999	1421	/* Set the Initialization Vector */
<>	149:156823d33999	1422	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1423
<>	149:156823d33999	1424	/* Set the phase */
<>	149:156823d33999	1425	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1426	}
<>	149:156823d33999	1427	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1428	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1429
<>	149:156823d33999	1430	/* Process Unlocked */
<>	149:156823d33999	1431	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1432
<>	149:156823d33999	1433	/* Return function status */
<>	149:156823d33999	1434	return HAL_OK;
<>	149:156823d33999	1435	}
<>	149:156823d33999	1436	else
<>	149:156823d33999	1437	{
<>	149:156823d33999	1438	/* Release Lock */
<>	149:156823d33999	1439	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1440
<>	149:156823d33999	1441	return HAL_ERROR;
<>	149:156823d33999	1442	}
<>	149:156823d33999	1443	}
<>	149:156823d33999	1444
<>	149:156823d33999	1445	/**
<>	149:156823d33999	1446	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
<>	149:156823d33999	1447	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1448	* the configuration information for CRYP module
<>	149:156823d33999	1449	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1450	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1451	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1452	* @retval HAL status
<>	149:156823d33999	1453	*/
<>	149:156823d33999	1454	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1455	{
<>	149:156823d33999	1456	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1457
<>	149:156823d33999	1458	/* Check that data aligned on u32 */
<>	149:156823d33999	1459	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1460	{
<>	149:156823d33999	1461	/* Process Locked */
<>	149:156823d33999	1462	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1463
<>	149:156823d33999	1464	/* Return function status */
<>	149:156823d33999	1465	return HAL_ERROR;
<>	149:156823d33999	1466	}
<>	149:156823d33999	1467
<>	149:156823d33999	1468	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1469	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1470	{
<>	149:156823d33999	1471	/* Process Locked */
<>	149:156823d33999	1472	__HAL_LOCK(hcryp);
<>	149:156823d33999	1473
<>	149:156823d33999	1474	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1475	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1476
<>	149:156823d33999	1477	/* Change the CRYP state */
<>	149:156823d33999	1478	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1479
<>	149:156823d33999	1480	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1481	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1482	{
<>	149:156823d33999	1483	/* Set the key */
<>	149:156823d33999	1484	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1485
<>	149:156823d33999	1486	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1487	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	1488
<>	149:156823d33999	1489	/* Set the Initialization Vector */
<>	149:156823d33999	1490	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1491
<>	149:156823d33999	1492	/* Set the phase */
<>	149:156823d33999	1493	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1494	}
<>	149:156823d33999	1495
<>	149:156823d33999	1496	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1497	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1498
<>	149:156823d33999	1499	/* Process Unlocked */
<>	149:156823d33999	1500	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1501
<>	149:156823d33999	1502	/* Return function status */
<>	149:156823d33999	1503	return HAL_OK;
<>	149:156823d33999	1504	}
<>	149:156823d33999	1505	else
<>	149:156823d33999	1506	{
<>	149:156823d33999	1507	/* Release Lock */
<>	149:156823d33999	1508	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1509
<>	149:156823d33999	1510	return HAL_ERROR;
<>	149:156823d33999	1511	}
<>	149:156823d33999	1512	}
<>	149:156823d33999	1513
<>	149:156823d33999	1514	/**
<>	149:156823d33999	1515	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
<>	149:156823d33999	1516	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1517	* the configuration information for CRYP module
<>	149:156823d33999	1518	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1519	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1520	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1521	* @retval HAL status
<>	149:156823d33999	1522	*/
<>	149:156823d33999	1523	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1524	{
<>	149:156823d33999	1525	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1526
<>	149:156823d33999	1527	/* Check that data aligned on u32 */
<>	149:156823d33999	1528	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1529	{
<>	149:156823d33999	1530	/* Process Locked */
<>	149:156823d33999	1531	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1532
<>	149:156823d33999	1533	/* Return function status */
<>	149:156823d33999	1534	return HAL_ERROR;
<>	149:156823d33999	1535	}
<>	149:156823d33999	1536
<>	149:156823d33999	1537	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1538	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1539	{
<>	149:156823d33999	1540	/* Process Locked */
<>	149:156823d33999	1541	__HAL_LOCK(hcryp);
<>	149:156823d33999	1542
<>	149:156823d33999	1543	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1544	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1545
<>	149:156823d33999	1546	/* Change the CRYP state */
<>	149:156823d33999	1547	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1548
<>	149:156823d33999	1549	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1550	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1551	{
<>	149:156823d33999	1552	/* Set the key */
<>	149:156823d33999	1553	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1554
<>	149:156823d33999	1555	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1556	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1557
<>	149:156823d33999	1558	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	1559	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	1560
<>	149:156823d33999	1561	/* Set the phase */
<>	149:156823d33999	1562	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1563	}
<>	149:156823d33999	1564
<>	149:156823d33999	1565	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1566	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1567
<>	149:156823d33999	1568	/* Process Unlocked */
<>	149:156823d33999	1569	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1570
<>	149:156823d33999	1571	/* Return function status */
<>	149:156823d33999	1572	return HAL_OK;
<>	149:156823d33999	1573	}
<>	149:156823d33999	1574	else
<>	149:156823d33999	1575	{
<>	149:156823d33999	1576	/* Release Lock */
<>	149:156823d33999	1577	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1578
<>	149:156823d33999	1579	return HAL_ERROR;
<>	149:156823d33999	1580	}
<>	149:156823d33999	1581	}
<>	149:156823d33999	1582
<>	149:156823d33999	1583	/**
<>	149:156823d33999	1584	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	149:156823d33999	1585	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1586	* the configuration information for CRYP module
<>	149:156823d33999	1587	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1588	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1589	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1590	* @retval HAL status
<>	149:156823d33999	1591	*/
<>	149:156823d33999	1592	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1593	{
<>	149:156823d33999	1594	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1595
<>	149:156823d33999	1596	/* Check that data aligned on u32 */
<>	149:156823d33999	1597	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1598	{
<>	149:156823d33999	1599	/* Process Locked */
<>	149:156823d33999	1600	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1601
<>	149:156823d33999	1602	/* Return function status */
<>	149:156823d33999	1603	return HAL_ERROR;
<>	149:156823d33999	1604	}
<>	149:156823d33999	1605
<>	149:156823d33999	1606	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1607	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1608	{
<>	149:156823d33999	1609	/* Process Locked */
<>	149:156823d33999	1610	__HAL_LOCK(hcryp);
<>	149:156823d33999	1611
<>	149:156823d33999	1612	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1613	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1614
<>	149:156823d33999	1615	/* Change the CRYP state */
<>	149:156823d33999	1616	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1617
<>	149:156823d33999	1618	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1619	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1620	{
<>	149:156823d33999	1621	/* Set the key */
<>	149:156823d33999	1622	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1623
<>	149:156823d33999	1624	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1625	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1626
<>	149:156823d33999	1627	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	1628	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	1629
<>	149:156823d33999	1630	/* Set the Initialization Vector */
<>	149:156823d33999	1631	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1632
<>	149:156823d33999	1633	/* Set the phase */
<>	149:156823d33999	1634	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1635	}
<>	149:156823d33999	1636
<>	149:156823d33999	1637	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1638	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1639
<>	149:156823d33999	1640	/* Process Unlocked */
<>	149:156823d33999	1641	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1642
<>	149:156823d33999	1643	/* Return function status */
<>	149:156823d33999	1644	return HAL_OK;
<>	149:156823d33999	1645	}
<>	149:156823d33999	1646	else
<>	149:156823d33999	1647	{
<>	149:156823d33999	1648	/* Release Lock */
<>	149:156823d33999	1649	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1650
<>	149:156823d33999	1651	return HAL_ERROR;
<>	149:156823d33999	1652	}
<>	149:156823d33999	1653	}
<>	149:156823d33999	1654
<>	149:156823d33999	1655	/**
<>	149:156823d33999	1656	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
<>	149:156823d33999	1657	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1658	* the configuration information for CRYP module
<>	149:156823d33999	1659	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1660	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1661	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1662	* @retval HAL status
<>	149:156823d33999	1663	*/
<>	149:156823d33999	1664	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1665	{
<>	149:156823d33999	1666	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1667
<>	149:156823d33999	1668	/* Check that data aligned on u32 */
<>	149:156823d33999	1669	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1670	{
<>	149:156823d33999	1671	/* Process Locked */
<>	149:156823d33999	1672	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1673
<>	149:156823d33999	1674	/* Return function status */
<>	149:156823d33999	1675	return HAL_ERROR;
<>	149:156823d33999	1676	}
<>	149:156823d33999	1677
<>	149:156823d33999	1678	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1679	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1680	{
<>	149:156823d33999	1681	/* Process Locked */
<>	149:156823d33999	1682	__HAL_LOCK(hcryp);
<>	149:156823d33999	1683
<>	149:156823d33999	1684	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1685	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1686
<>	149:156823d33999	1687	/* Change the CRYP state */
<>	149:156823d33999	1688	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1689
<>	149:156823d33999	1690	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1691	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1692	{
<>	149:156823d33999	1693	/* Set the key */
<>	149:156823d33999	1694	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1695
<>	149:156823d33999	1696	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1697	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	1698
<>	149:156823d33999	1699	/* Set the Initialization Vector */
<>	149:156823d33999	1700	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1701
<>	149:156823d33999	1702	/* Set the phase */
<>	149:156823d33999	1703	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1704	}
<>	149:156823d33999	1705
<>	149:156823d33999	1706	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1707	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1708
<>	149:156823d33999	1709	/* Process Unlocked */
<>	149:156823d33999	1710	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1711
<>	149:156823d33999	1712	/* Return function status */
<>	149:156823d33999	1713	return HAL_OK;
<>	149:156823d33999	1714	}
<>	149:156823d33999	1715	else
<>	149:156823d33999	1716	{
<>	149:156823d33999	1717	/* Release Lock */
<>	149:156823d33999	1718	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1719
<>	149:156823d33999	1720	return HAL_ERROR;
<>	149:156823d33999	1721	}
<>	149:156823d33999	1722	}
<>	149:156823d33999	1723
<>	149:156823d33999	1724	/**
<>	149:156823d33999	1725	* @}
<>	149:156823d33999	1726	*/
<>	149:156823d33999	1727
<>	149:156823d33999	1728	/** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions
<>	149:156823d33999	1729	* @brief DMA callback functions.
<>	149:156823d33999	1730	*
<>	149:156823d33999	1731	@verbatim
<>	149:156823d33999	1732	==============================================================================
<>	149:156823d33999	1733	##### DMA callback functions #####
<>	149:156823d33999	1734	==============================================================================
<>	149:156823d33999	1735	[..] This section provides DMA callback functions:
<>	149:156823d33999	1736	(+) DMA Input data transfer complete
<>	149:156823d33999	1737	(+) DMA Output data transfer complete
<>	149:156823d33999	1738	(+) DMA error
<>	149:156823d33999	1739
<>	149:156823d33999	1740	@endverbatim
<>	149:156823d33999	1741	* @{
<>	149:156823d33999	1742	*/
<>	149:156823d33999	1743
<>	149:156823d33999	1744	/**
<>	149:156823d33999	1745	* @brief CRYP error callback.
<>	149:156823d33999	1746	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1747	* the configuration information for CRYP module
<>	149:156823d33999	1748	* @retval None
<>	149:156823d33999	1749	*/
<>	149:156823d33999	1750	__weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1751	{
<>	149:156823d33999	1752	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1753	UNUSED(hcryp);
<>	149:156823d33999	1754
<>	149:156823d33999	1755	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1756	the HAL_CRYP_ErrorCallback can be implemented in the user file
<>	149:156823d33999	1757	*/
<>	149:156823d33999	1758	}
<>	149:156823d33999	1759
<>	149:156823d33999	1760	/**
<>	149:156823d33999	1761	* @brief Input transfer completed callback.
<>	149:156823d33999	1762	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1763	* the configuration information for CRYP module
<>	149:156823d33999	1764	* @retval None
<>	149:156823d33999	1765	*/
<>	149:156823d33999	1766	__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1767	{
<>	149:156823d33999	1768	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1769	UNUSED(hcryp);
<>	149:156823d33999	1770
<>	149:156823d33999	1771	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1772	the HAL_CRYP_InCpltCallback can be implemented in the user file
<>	149:156823d33999	1773	*/
<>	149:156823d33999	1774	}
<>	149:156823d33999	1775
<>	149:156823d33999	1776	/**
<>	149:156823d33999	1777	* @brief Output transfer completed callback.
<>	149:156823d33999	1778	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1779	* the configuration information for CRYP module
<>	149:156823d33999	1780	* @retval None
<>	149:156823d33999	1781	*/
<>	149:156823d33999	1782	__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1783	{
<>	149:156823d33999	1784	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1785	UNUSED(hcryp);
<>	149:156823d33999	1786
<>	149:156823d33999	1787	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1788	the HAL_CRYP_OutCpltCallback can be implemented in the user file
<>	149:156823d33999	1789	*/
<>	149:156823d33999	1790	}
<>	149:156823d33999	1791
<>	149:156823d33999	1792	/**
<>	149:156823d33999	1793	* @}
<>	149:156823d33999	1794	*/
<>	149:156823d33999	1795
<>	149:156823d33999	1796	/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
<>	149:156823d33999	1797	* @brief CRYP IRQ handler.
<>	149:156823d33999	1798	*
<>	149:156823d33999	1799	@verbatim
<>	149:156823d33999	1800	==============================================================================
<>	149:156823d33999	1801	##### CRYP IRQ handler management #####
<>	149:156823d33999	1802	==============================================================================
<>	149:156823d33999	1803	[..] This section provides CRYP IRQ handler function.
<>	149:156823d33999	1804
<>	149:156823d33999	1805	@endverbatim
<>	149:156823d33999	1806	* @{
<>	149:156823d33999	1807	*/
<>	149:156823d33999	1808
<>	149:156823d33999	1809	/**
<>	149:156823d33999	1810	* @brief This function handles CRYP interrupt request.
<>	149:156823d33999	1811	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1812	* the configuration information for CRYP module
<>	149:156823d33999	1813	* @retval None
<>	149:156823d33999	1814	*/
<>	149:156823d33999	1815	void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1816	{
<>	149:156823d33999	1817	/* Check if error occurred*/
<>	149:156823d33999	1818	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
<>	149:156823d33999	1819	{
<>	149:156823d33999	1820	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
<>	149:156823d33999	1821	{
<>	149:156823d33999	1822	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
<>	149:156823d33999	1823	}
<>	149:156823d33999	1824
<>	149:156823d33999	1825	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
<>	149:156823d33999	1826	{
<>	149:156823d33999	1827	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
<>	149:156823d33999	1828	}
<>	149:156823d33999	1829
<>	149:156823d33999	1830	if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_CCF) != RESET)
<>	149:156823d33999	1831	{
<>	149:156823d33999	1832	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1833	}
<>	149:156823d33999	1834
<>	149:156823d33999	1835	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	149:156823d33999	1836	/* Disable Computation Complete Interrupt */
<>	149:156823d33999	1837	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
<>	149:156823d33999	1838	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
<>	149:156823d33999	1839
<>	149:156823d33999	1840	HAL_CRYP_ErrorCallback(hcryp);
<>	149:156823d33999	1841
<>	149:156823d33999	1842	/* Process Unlocked */
<>	149:156823d33999	1843	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1844
<>	149:156823d33999	1845	return;
<>	149:156823d33999	1846	}
<>	149:156823d33999	1847
<>	149:156823d33999	1848	/* Check if computation complete interrupt was enabled*/
<>	149:156823d33999	1849	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
<>	149:156823d33999	1850	{
<>	149:156823d33999	1851	/* Clear CCF Flag */
<>	149:156823d33999	1852	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1853
<>	149:156823d33999	1854	CRYP_EncryptDecrypt_IT(hcryp);
<>	149:156823d33999	1855	}
<>	149:156823d33999	1856	}
<>	149:156823d33999	1857
<>	149:156823d33999	1858	/**
<>	149:156823d33999	1859	* @}
<>	149:156823d33999	1860	*/
<>	149:156823d33999	1861
<>	149:156823d33999	1862	/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
<>	149:156823d33999	1863	* @brief Peripheral State functions.
<>	149:156823d33999	1864	*
<>	149:156823d33999	1865	@verbatim
<>	149:156823d33999	1866	==============================================================================
<>	149:156823d33999	1867	##### Peripheral State functions #####
<>	149:156823d33999	1868	==============================================================================
<>	149:156823d33999	1869	[..]
<>	149:156823d33999	1870	This subsection permits to get in run-time the status of the peripheral.
<>	149:156823d33999	1871
<>	149:156823d33999	1872	@endverbatim
<>	149:156823d33999	1873	* @{
<>	149:156823d33999	1874	*/
<>	149:156823d33999	1875
<>	149:156823d33999	1876	/**
<>	149:156823d33999	1877	* @brief Returns the CRYP state.
<>	149:156823d33999	1878	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1879	* the configuration information for CRYP module
<>	149:156823d33999	1880	* @retval HAL state
<>	149:156823d33999	1881	*/
<>	149:156823d33999	1882	HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1883	{
<>	149:156823d33999	1884	return hcryp->State;
<>	149:156823d33999	1885	}
<>	149:156823d33999	1886
<>	149:156823d33999	1887	/**
<>	149:156823d33999	1888	* @}
<>	149:156823d33999	1889	*/
<>	149:156823d33999	1890
<>	149:156823d33999	1891	/**
<>	149:156823d33999	1892	* @}
<>	149:156823d33999	1893	*/
<>	149:156823d33999	1894
<>	149:156823d33999	1895	/** @addtogroup CRYP_Private_Functions
<>	149:156823d33999	1896	* @{
<>	149:156823d33999	1897	*/
<>	149:156823d33999	1898
<>	149:156823d33999	1899	/**
<>	149:156823d33999	1900	* @brief IT function called under interruption context to continue encryption or decryption
<>	149:156823d33999	1901	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1902	* the configuration information for CRYP module
<>	149:156823d33999	1903	* @retval HAL status
<>	149:156823d33999	1904	*/
<>	149:156823d33999	1905	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1906	{
<>	149:156823d33999	1907	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1908
<>	149:156823d33999	1909	/* Get the last Output data adress */
<>	149:156823d33999	1910	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	149:156823d33999	1911
<>	149:156823d33999	1912	/* Read the Output block from the Output Register */
<>	149:156823d33999	1913	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1914	outputaddr+=4;
<>	149:156823d33999	1915	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1916	outputaddr+=4;
<>	149:156823d33999	1917	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1918	outputaddr+=4;
<>	149:156823d33999	1919	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1920
<>	149:156823d33999	1921	hcryp->pCrypOutBuffPtr += 16;
<>	149:156823d33999	1922	hcryp->CrypOutCount -= 16;
<>	149:156823d33999	1923
<>	149:156823d33999	1924	/* Check if all input text is encrypted or decrypted */
<>	149:156823d33999	1925	if(hcryp->CrypOutCount == 0)
<>	149:156823d33999	1926	{
<>	149:156823d33999	1927	/* Disable Computation Complete Interrupt */
<>	149:156823d33999	1928	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1929	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_ERR);
<>	149:156823d33999	1930
<>	149:156823d33999	1931	/* Process Unlocked */
<>	149:156823d33999	1932	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1933
<>	149:156823d33999	1934	/* Change the CRYP state */
<>	149:156823d33999	1935	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	1936
<>	149:156823d33999	1937	/* Call computation complete callback */
<>	149:156823d33999	1938	HAL_CRYPEx_ComputationCpltCallback(hcryp);
<>	149:156823d33999	1939	}
<>	149:156823d33999	1940	else /* Process the rest of input text */
<>	149:156823d33999	1941	{
<>	149:156823d33999	1942	/* Get the last Intput data adress */
<>	149:156823d33999	1943	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1944
<>	149:156823d33999	1945	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1946	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1947	inputaddr+=4;
<>	149:156823d33999	1948	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1949	inputaddr+=4;
<>	149:156823d33999	1950	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1951	inputaddr+=4;
<>	149:156823d33999	1952	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1953	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1954	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1955	}
<>	149:156823d33999	1956	return HAL_OK;
<>	149:156823d33999	1957	}
<>	149:156823d33999	1958	/**
<>	149:156823d33999	1959	* @brief DMA CRYP Input Data process complete callback.
<>	149:156823d33999	1960	* @param hdma: DMA handle
<>	149:156823d33999	1961	* @retval None
<>	149:156823d33999	1962	*/
<>	149:156823d33999	1963	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	1964	{
<>	149:156823d33999	1965	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	1966
<>	149:156823d33999	1967	/* Disable the DMA transfer for input request */
<>	149:156823d33999	1968	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
<>	149:156823d33999	1969
<>	149:156823d33999	1970	/* Call input data transfer complete callback */
<>	149:156823d33999	1971	HAL_CRYP_InCpltCallback(hcryp);
<>	149:156823d33999	1972	}
<>	149:156823d33999	1973
<>	149:156823d33999	1974	/**
<>	149:156823d33999	1975	* @brief DMA CRYP Output Data process complete callback.
<>	149:156823d33999	1976	* @param hdma: DMA handle
<>	149:156823d33999	1977	* @retval None
<>	149:156823d33999	1978	*/
<>	149:156823d33999	1979	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	1980	{
<>	149:156823d33999	1981	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	1982
<>	149:156823d33999	1983	/* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
<>	149:156823d33999	1984	in the DMACR register */
<>	149:156823d33999	1985	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
<>	149:156823d33999	1986
<>	149:156823d33999	1987	/* Clear CCF Flag */
<>	149:156823d33999	1988	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1989
<>	149:156823d33999	1990	/* Disable CRYP */
<>	149:156823d33999	1991	__HAL_CRYP_DISABLE(hcryp);
<>	149:156823d33999	1992
<>	149:156823d33999	1993	/* Change the CRYP state to ready */
<>	149:156823d33999	1994	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	1995
<>	149:156823d33999	1996	/* Call output data transfer complete callback */
<>	149:156823d33999	1997	HAL_CRYP_OutCpltCallback(hcryp);
<>	149:156823d33999	1998	}
<>	149:156823d33999	1999
<>	149:156823d33999	2000	/**
<>	149:156823d33999	2001	* @brief DMA CRYP communication error callback.
<>	149:156823d33999	2002	* @param hdma: DMA handle
<>	149:156823d33999	2003	* @retval None
<>	149:156823d33999	2004	*/
<>	149:156823d33999	2005	static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	2006	{
<>	149:156823d33999	2007	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	2008	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	149:156823d33999	2009	HAL_CRYP_ErrorCallback(hcryp);
<>	149:156823d33999	2010	}
<>	149:156823d33999	2011
<>	149:156823d33999	2012	/**
<>	149:156823d33999	2013	* @brief Writes the Key in Key registers.
<>	149:156823d33999	2014	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2015	* the configuration information for CRYP module
<>	149:156823d33999	2016	* @param Key: Pointer to Key buffer
<>	149:156823d33999	2017	* @note Key must be written as little endian.
<>	149:156823d33999	2018	* If Key pointer points at address n,
<>	149:156823d33999	2019	* n[15:0] contains key[96:127],
<>	149:156823d33999	2020	* (n+4)[15:0] contains key[64:95],
<>	149:156823d33999	2021	* (n+8)[15:0] contains key[32:63] and
<>	149:156823d33999	2022	* (n+12)[15:0] contains key[0:31]
<>	149:156823d33999	2023	* @retval None
<>	149:156823d33999	2024	*/
<>	149:156823d33999	2025	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key)
<>	149:156823d33999	2026	{
<>	149:156823d33999	2027	uint32_t keyaddr = (uint32_t)Key;
<>	149:156823d33999	2028
<>	149:156823d33999	2029	hcryp->Instance->KEYR3 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2030	keyaddr+=4;
<>	149:156823d33999	2031	hcryp->Instance->KEYR2 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2032	keyaddr+=4;
<>	149:156823d33999	2033	hcryp->Instance->KEYR1 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2034	keyaddr+=4;
<>	149:156823d33999	2035	hcryp->Instance->KEYR0 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2036	}
<>	149:156823d33999	2037
<>	149:156823d33999	2038	/**
<>	149:156823d33999	2039	* @brief Writes the InitVector/InitCounter in IV registers.
<>	149:156823d33999	2040	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2041	* the configuration information for CRYP module
<>	149:156823d33999	2042	* @param InitVector: Pointer to InitVector/InitCounter buffer
<>	149:156823d33999	2043	* @note Init Vector must be written as little endian.
<>	149:156823d33999	2044	* If Init Vector pointer points at address n,
<>	149:156823d33999	2045	* n[15:0] contains Vector[96:127],
<>	149:156823d33999	2046	* (n+4)[15:0] contains Vector[64:95],
<>	149:156823d33999	2047	* (n+8)[15:0] contains Vector[32:63] and
<>	149:156823d33999	2048	* (n+12)[15:0] contains Vector[0:31]
<>	149:156823d33999	2049	* @retval None
<>	149:156823d33999	2050	*/
<>	149:156823d33999	2051	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector)
<>	149:156823d33999	2052	{
<>	149:156823d33999	2053	uint32_t ivaddr = (uint32_t)InitVector;
<>	149:156823d33999	2054
<>	149:156823d33999	2055	hcryp->Instance->IVR3 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2056	ivaddr+=4;
<>	149:156823d33999	2057	hcryp->Instance->IVR2 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2058	ivaddr+=4;
<>	149:156823d33999	2059	hcryp->Instance->IVR1 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2060	ivaddr+=4;
<>	149:156823d33999	2061	hcryp->Instance->IVR0 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2062	}
<>	149:156823d33999	2063
<>	149:156823d33999	2064	/**
<>	149:156823d33999	2065	* @brief Process Data: Writes Input data in polling mode and reads the output data
<>	149:156823d33999	2066	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2067	* the configuration information for CRYP module
<>	149:156823d33999	2068	* @param Input: Pointer to the Input buffer
<>	149:156823d33999	2069	* @param Ilength: Length of the Input buffer, must be a multiple of 16.
<>	149:156823d33999	2070	* @param Output: Pointer to the returned buffer
<>	149:156823d33999	2071	* @param Timeout: Specify Timeout value
<>	149:156823d33999	2072	* @retval None
<>	149:156823d33999	2073	*/
<>	149:156823d33999	2074	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
<>	149:156823d33999	2075	{
<>	149:156823d33999	2076	uint32_t tickstart = 0;
<>	149:156823d33999	2077
<>	149:156823d33999	2078	uint32_t index = 0;
<>	149:156823d33999	2079	uint32_t inputaddr = (uint32_t)Input;
<>	149:156823d33999	2080	uint32_t outputaddr = (uint32_t)Output;
<>	149:156823d33999	2081
<>	149:156823d33999	2082	for(index=0; (index < Ilength); index += 16)
<>	149:156823d33999	2083	{
<>	149:156823d33999	2084	/* Write the Input block in the Data Input register */
<>	149:156823d33999	2085	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2086	inputaddr+=4;
<>	149:156823d33999	2087	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2088	inputaddr+=4;
<>	149:156823d33999	2089	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2090	inputaddr+=4;
<>	149:156823d33999	2091	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2092	inputaddr+=4;
<>	149:156823d33999	2093
<>	149:156823d33999	2094	/* Get timeout */
<>	149:156823d33999	2095	tickstart = HAL_GetTick();
<>	149:156823d33999	2096
<>	149:156823d33999	2097	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
<>	149:156823d33999	2098	{
<>	149:156823d33999	2099	/* Check for the Timeout */
<>	149:156823d33999	2100	if(Timeout != HAL_MAX_DELAY)
<>	149:156823d33999	2101	{
<>	149:156823d33999	2102	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	149:156823d33999	2103	{
<>	149:156823d33999	2104	/* Change state */
<>	149:156823d33999	2105	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	149:156823d33999	2106
<>	149:156823d33999	2107	/* Process Unlocked */
<>	149:156823d33999	2108	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	2109
<>	149:156823d33999	2110	return HAL_TIMEOUT;
<>	149:156823d33999	2111	}
<>	149:156823d33999	2112	}
<>	149:156823d33999	2113	}
<>	149:156823d33999	2114	/* Clear CCF Flag */
<>	149:156823d33999	2115	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	2116
<>	149:156823d33999	2117	/* Read the Output block from the Data Output Register */
<>	149:156823d33999	2118	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2119	outputaddr+=4;
<>	149:156823d33999	2120	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2121	outputaddr+=4;
<>	149:156823d33999	2122	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2123	outputaddr+=4;
<>	149:156823d33999	2124	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2125	outputaddr+=4;
<>	149:156823d33999	2126	}
<>	149:156823d33999	2127	/* Return function status */
<>	149:156823d33999	2128	return HAL_OK;
<>	149:156823d33999	2129	}
<>	149:156823d33999	2130
<>	149:156823d33999	2131	/**
<>	149:156823d33999	2132	* @brief Set the DMA configuration and start the DMA transfer
<>	149:156823d33999	2133	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2134	* the configuration information for CRYP module
<>	149:156823d33999	2135	* @param inputaddr: address of the Input buffer
<>	149:156823d33999	2136	* @param Size: Size of the Input buffer, must be a multiple of 16.
<>	149:156823d33999	2137	* @param outputaddr: address of the Output buffer
<>	149:156823d33999	2138	* @retval None
<>	149:156823d33999	2139	*/
<>	149:156823d33999	2140	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
<>	149:156823d33999	2141	{
<>	149:156823d33999	2142	/* Set the CRYP DMA transfer complete callback */
<>	149:156823d33999	2143	hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
<>	149:156823d33999	2144	/* Set the DMA error callback */
<>	149:156823d33999	2145	hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
<>	149:156823d33999	2146
<>	149:156823d33999	2147	/* Set the CRYP DMA transfer complete callback */
<>	149:156823d33999	2148	hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
<>	149:156823d33999	2149	/* Set the DMA error callback */
<>	149:156823d33999	2150	hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
<>	149:156823d33999	2151
<>	149:156823d33999	2152	/* Enable the DMA In DMA Stream */
<>	149:156823d33999	2153	HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
<>	149:156823d33999	2154
<>	149:156823d33999	2155	/* Enable the DMA Out DMA Stream */
<>	149:156823d33999	2156	HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
<>	149:156823d33999	2157
<>	149:156823d33999	2158	/* Enable In and Out DMA requests */
<>	149:156823d33999	2159	SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN \| AES_CR_DMAOUTEN));
<>	149:156823d33999	2160
<>	149:156823d33999	2161	/* Enable CRYP */
<>	149:156823d33999	2162	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	2163	}
<>	149:156823d33999	2164
<>	149:156823d33999	2165	/**
<>	149:156823d33999	2166	* @}
<>	149:156823d33999	2167	*/
<>	149:156823d33999	2168
<>	149:156823d33999	2169	#endif /* STM32L162xC \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L162xE \|\| STM32L162xDX*/
<>	149:156823d33999	2170
<>	149:156823d33999	2171	/**
<>	149:156823d33999	2172	* @}
<>	149:156823d33999	2173	*/
<>	149:156823d33999	2174
<>	149:156823d33999	2175	/**
<>	149:156823d33999	2176	* @}
<>	149:156823d33999	2177	*/
<>	149:156823d33999	2178
<>	149:156823d33999	2179	#endif /* HAL_CRYP_MODULE_ENABLED */
<>	149:156823d33999	2180
<>	149:156823d33999	2181	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/