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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_cryp.c@184:08ed48f1de7f, 2018-04-19 (annotated)

Committer:: AnnaBridge
Date:: Thu Apr 19 17:12:19 2018 +0100
Revision:: 184:08ed48f1de7f
Parent:: 149:156823d33999

mbed-dev library. Release version 161

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	149:156823d33999	1	/**
<>	149:156823d33999	2	******************************************************************************
<>	149:156823d33999	3	* @file stm32l1xx_hal_cryp.c
<>	149:156823d33999	4	* @author MCD Application Team
<>	149:156823d33999	5	* @brief CRYP HAL module driver.
<>	149:156823d33999	6	*
<>	149:156823d33999	7	* This file provides firmware functions to manage the following
<>	149:156823d33999	8	* functionalities of the Cryptography (CRYP) peripheral:
<>	149:156823d33999	9	* + Initialization and de-initialization functions
<>	149:156823d33999	10	* + Processing functions by algorithm using polling mode
<>	149:156823d33999	11	* + Processing functions by algorithm using interrupt mode
<>	149:156823d33999	12	* + Processing functions by algorithm using DMA mode
<>	149:156823d33999	13	* + Peripheral State functions
<>	149:156823d33999	14	*
<>	149:156823d33999	15	@verbatim
<>	149:156823d33999	16	==============================================================================
<>	149:156823d33999	17	##### How to use this driver #####
<>	149:156823d33999	18	==============================================================================
<>	149:156823d33999	19	[..]
<>	149:156823d33999	20	The CRYP HAL driver can be used as follows:
<>	149:156823d33999	21
<>	149:156823d33999	22	(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
<>	149:156823d33999	23	(##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
<>	149:156823d33999	24	(##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
<>	149:156823d33999	25	(+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
<>	149:156823d33999	26	(+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
<>	149:156823d33999	27	(+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
<>	149:156823d33999	28	(##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
<>	149:156823d33999	29	(+) Enable the DMA2 interface clock using
<>	149:156823d33999	30	(++) __HAL_RCC_DMA2_CLK_ENABLE()
<>	149:156823d33999	31	(+) Configure and enable two DMA Channels one for managing data transfer from
<>	149:156823d33999	32	memory to peripheral (input channel) and another channel for managing data
<>	149:156823d33999	33	transfer from peripheral to memory (output channel)
<>	149:156823d33999	34	(+) Associate the initialized DMA handle to the CRYP DMA handle
<>	149:156823d33999	35	using __HAL_LINKDMA()
<>	149:156823d33999	36	(+) Configure the priority and enable the NVIC for the transfer complete
<>	149:156823d33999	37	interrupt on the two DMA Streams. The output stream should have higher
<>	149:156823d33999	38	priority than the input stream.
<>	149:156823d33999	39	(++) HAL_NVIC_SetPriority()
<>	149:156823d33999	40	(++) HAL_NVIC_EnableIRQ()
<>	149:156823d33999	41
<>	149:156823d33999	42	(#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
<>	149:156823d33999	43	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
<>	149:156823d33999	44	(##) The encryption/decryption key.
<>	149:156823d33999	45	(##) The initialization vector (counter). It is not used ECB mode.
<>	149:156823d33999	46
<>	149:156823d33999	47	(#)Three processing (encryption/decryption) functions are available:
<>	149:156823d33999	48	(##) Polling mode: encryption and decryption APIs are blocking functions
<>	149:156823d33999	49	i.e. they process the data and wait till the processing is finished
<>	149:156823d33999	50	e.g. HAL_CRYP_AESCBC_Encrypt()
<>	149:156823d33999	51	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
<>	149:156823d33999	52	i.e. they process the data under interrupt
<>	149:156823d33999	53	e.g. HAL_CRYP_AESCBC_Encrypt_IT()
<>	149:156823d33999	54	(##) DMA mode: encryption and decryption APIs are not blocking functions
<>	149:156823d33999	55	i.e. the data transfer is ensured by DMA
<>	149:156823d33999	56	e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
<>	149:156823d33999	57
<>	149:156823d33999	58	(#)When the processing function is called for the first time after HAL_CRYP_Init()
<>	149:156823d33999	59	the CRYP peripheral is initialized and processes the buffer in input.
<>	149:156823d33999	60	At second call, the processing function performs an append of the already
<>	149:156823d33999	61	processed buffer.
<>	149:156823d33999	62	When a new data block is to be processed, call HAL_CRYP_Init() then the
<>	149:156823d33999	63	processing function.
<>	149:156823d33999	64
<>	149:156823d33999	65	(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
<>	149:156823d33999	66
<>	149:156823d33999	67	@endverbatim
<>	149:156823d33999	68	******************************************************************************
<>	149:156823d33999	69	* @attention
<>	149:156823d33999	70	*
AnnaBridge	184:08ed48f1de7f	71	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<>	149:156823d33999	72	*
<>	149:156823d33999	73	* Redistribution and use in source and binary forms, with or without modification,
<>	149:156823d33999	74	* are permitted provided that the following conditions are met:
<>	149:156823d33999	75	* 1. Redistributions of source code must retain the above copyright notice,
<>	149:156823d33999	76	* this list of conditions and the following disclaimer.
<>	149:156823d33999	77	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	149:156823d33999	78	* this list of conditions and the following disclaimer in the documentation
<>	149:156823d33999	79	* and/or other materials provided with the distribution.
<>	149:156823d33999	80	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	149:156823d33999	81	* may be used to endorse or promote products derived from this software
<>	149:156823d33999	82	* without specific prior written permission.
<>	149:156823d33999	83	*
<>	149:156823d33999	84	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	149:156823d33999	85	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	149:156823d33999	86	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	149:156823d33999	87	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	149:156823d33999	88	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	149:156823d33999	89	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	149:156823d33999	90	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	149:156823d33999	91	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	149:156823d33999	92	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	149:156823d33999	93	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	149:156823d33999	94	*
<>	149:156823d33999	95	******************************************************************************
<>	149:156823d33999	96	*/
<>	149:156823d33999	97
<>	149:156823d33999	98	/* Includes ------------------------------------------------------------------*/
<>	149:156823d33999	99	#include "stm32l1xx_hal.h"
<>	149:156823d33999	100
<>	149:156823d33999	101	#ifdef HAL_CRYP_MODULE_ENABLED
<>	149:156823d33999	102
<>	149:156823d33999	103	/** @addtogroup STM32L1xx_HAL_Driver
<>	149:156823d33999	104	* @{
<>	149:156823d33999	105	*/
<>	149:156823d33999	106
<>	149:156823d33999	107	/** @defgroup CRYP CRYP
<>	149:156823d33999	108	* @brief CRYP HAL module driver.
<>	149:156823d33999	109	* @{
<>	149:156823d33999	110	*/
<>	149:156823d33999	111
<>	149:156823d33999	112	#if defined(STM32L162xC) \|\| defined(STM32L162xCA) \|\| defined(STM32L162xD) \|\| defined(STM32L162xE) \|\| defined(STM32L162xDX)
<>	149:156823d33999	113
<>	149:156823d33999	114	/* Private typedef -----------------------------------------------------------*/
<>	149:156823d33999	115	/* Private define ------------------------------------------------------------*/
<>	149:156823d33999	116
<>	149:156823d33999	117	/** @defgroup CRYP_Private_Defines CRYP Private Defines
<>	149:156823d33999	118	* @{
<>	149:156823d33999	119	*/
<>	149:156823d33999	120
<>	149:156823d33999	121	#define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE \| AES_CR_CHMOD)
<>	149:156823d33999	122
<>	149:156823d33999	123	/**
<>	149:156823d33999	124	* @}
<>	149:156823d33999	125	*/
<>	149:156823d33999	126
<>	149:156823d33999	127	/* Private macro -------------------------------------------------------------*/
<>	149:156823d33999	128	/* Private variables ---------------------------------------------------------*/
<>	149:156823d33999	129	/* Private function prototypes -----------------------------------------------*/
<>	149:156823d33999	130
<>	149:156823d33999	131	/** @defgroup CRYP_Private_Functions CRYP Private Functions
<>	149:156823d33999	132	* @{
<>	149:156823d33999	133	*/
<>	149:156823d33999	134
<>	149:156823d33999	135	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
<>	149:156823d33999	136	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector);
<>	149:156823d33999	137	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key);
<>	149:156823d33999	138	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
<>	149:156823d33999	139	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	140	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	141	static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
<>	149:156823d33999	142	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
<>	149:156823d33999	143
<>	149:156823d33999	144	/**
<>	149:156823d33999	145	* @}
<>	149:156823d33999	146	*/
<>	149:156823d33999	147
<>	149:156823d33999	148	/* Private functions ---------------------------------------------------------*/
<>	149:156823d33999	149
<>	149:156823d33999	150	/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
<>	149:156823d33999	151	* @{
<>	149:156823d33999	152	*/
<>	149:156823d33999	153
<>	149:156823d33999	154	/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
<>	149:156823d33999	155	* @brief Initialization and Configuration functions.
<>	149:156823d33999	156	*
<>	149:156823d33999	157	@verbatim
<>	149:156823d33999	158	==============================================================================
<>	149:156823d33999	159	##### Initialization and de-initialization functions #####
<>	149:156823d33999	160	==============================================================================
<>	149:156823d33999	161	[..] This section provides functions allowing to:
<>	149:156823d33999	162	(+) Initialize the CRYP according to the specified parameters
<>	149:156823d33999	163	in the CRYP_InitTypeDef and creates the associated handle
<>	149:156823d33999	164	(+) DeInitialize the CRYP peripheral
<>	149:156823d33999	165	(+) Initialize the CRYP MSP
<>	149:156823d33999	166	(+) DeInitialize CRYP MSP
<>	149:156823d33999	167
<>	149:156823d33999	168	@endverbatim
<>	149:156823d33999	169	* @{
<>	149:156823d33999	170	*/
<>	149:156823d33999	171
<>	149:156823d33999	172	/**
<>	149:156823d33999	173	* @brief Initializes the CRYP according to the specified
<>	149:156823d33999	174	* parameters in the CRYP_InitTypeDef and creates the associated handle.
<>	149:156823d33999	175	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	176	* the configuration information for CRYP module
<>	149:156823d33999	177	* @retval HAL status
<>	149:156823d33999	178	*/
<>	149:156823d33999	179	HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	180	{
<>	149:156823d33999	181	/* Check the CRYP handle allocation */
<>	149:156823d33999	182	if(hcryp == NULL)
<>	149:156823d33999	183	{
<>	149:156823d33999	184	return HAL_ERROR;
<>	149:156823d33999	185	}
<>	149:156823d33999	186
<>	149:156823d33999	187	/* Check the parameters */
<>	149:156823d33999	188	assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
<>	149:156823d33999	189	assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
<>	149:156823d33999	190
<>	149:156823d33999	191	if(hcryp->State == HAL_CRYP_STATE_RESET)
<>	149:156823d33999	192	{
<>	149:156823d33999	193	/* Allocate lock resource and initialize it */
<>	149:156823d33999	194	hcryp->Lock = HAL_UNLOCKED;
<>	149:156823d33999	195
<>	149:156823d33999	196	/* Init the low level hardware */
<>	149:156823d33999	197	HAL_CRYP_MspInit(hcryp);
<>	149:156823d33999	198	}
<>	149:156823d33999	199
<>	149:156823d33999	200	/* Check if AES already enabled */
<>	149:156823d33999	201	if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
<>	149:156823d33999	202	{
<>	149:156823d33999	203	/* Change the CRYP state */
<>	149:156823d33999	204	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	205
<>	149:156823d33999	206	/* Set the data type*/
<>	149:156823d33999	207	MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
<>	149:156823d33999	208
<>	149:156823d33999	209	/* Reset CrypInCount and CrypOutCount */
<>	149:156823d33999	210	hcryp->CrypInCount = 0;
<>	149:156823d33999	211	hcryp->CrypOutCount = 0;
<>	149:156823d33999	212
<>	149:156823d33999	213	/* Change the CRYP state */
<>	149:156823d33999	214	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	215
<>	149:156823d33999	216	/* Set the default CRYP phase */
<>	149:156823d33999	217	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	149:156823d33999	218
<>	149:156823d33999	219	/* Return function status */
<>	149:156823d33999	220	return HAL_OK;
<>	149:156823d33999	221	}
<>	149:156823d33999	222	else
<>	149:156823d33999	223	{
<>	149:156823d33999	224	/* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
<>	149:156823d33999	225	/* enabled is forbidden to avoid unpredictable AES behavior.*/
<>	149:156823d33999	226
<>	149:156823d33999	227	/* Return function status */
<>	149:156823d33999	228	return HAL_ERROR;
<>	149:156823d33999	229	}
<>	149:156823d33999	230
<>	149:156823d33999	231	}
<>	149:156823d33999	232
<>	149:156823d33999	233	/**
<>	149:156823d33999	234	* @brief DeInitializes the CRYP peripheral.
<>	149:156823d33999	235	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	236	* the configuration information for CRYP module
<>	149:156823d33999	237	* @retval HAL status
<>	149:156823d33999	238	*/
<>	149:156823d33999	239	HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	240	{
<>	149:156823d33999	241	/* Check the CRYP handle allocation */
<>	149:156823d33999	242	if(hcryp == NULL)
<>	149:156823d33999	243	{
<>	149:156823d33999	244	return HAL_ERROR;
<>	149:156823d33999	245	}
<>	149:156823d33999	246
<>	149:156823d33999	247	/* Change the CRYP state */
<>	149:156823d33999	248	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	249
<>	149:156823d33999	250	/* Set the default CRYP phase */
<>	149:156823d33999	251	hcryp->Phase = HAL_CRYP_PHASE_READY;
<>	149:156823d33999	252
<>	149:156823d33999	253	/* Reset CrypInCount and CrypOutCount */
<>	149:156823d33999	254	hcryp->CrypInCount = 0;
<>	149:156823d33999	255	hcryp->CrypOutCount = 0;
<>	149:156823d33999	256
<>	149:156823d33999	257	/* Disable the CRYP Peripheral Clock */
<>	149:156823d33999	258	__HAL_CRYP_DISABLE(hcryp);
<>	149:156823d33999	259
<>	149:156823d33999	260	/* DeInit the low level hardware: CLOCK, NVIC.*/
<>	149:156823d33999	261	HAL_CRYP_MspDeInit(hcryp);
<>	149:156823d33999	262
<>	149:156823d33999	263	/* Change the CRYP state */
<>	149:156823d33999	264	hcryp->State = HAL_CRYP_STATE_RESET;
<>	149:156823d33999	265
<>	149:156823d33999	266	/* Release Lock */
<>	149:156823d33999	267	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	268
<>	149:156823d33999	269	/* Return function status */
<>	149:156823d33999	270	return HAL_OK;
<>	149:156823d33999	271	}
<>	149:156823d33999	272
<>	149:156823d33999	273	/**
<>	149:156823d33999	274	* @brief Initializes the CRYP MSP.
<>	149:156823d33999	275	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	276	* the configuration information for CRYP module
<>	149:156823d33999	277	* @retval None
<>	149:156823d33999	278	*/
<>	149:156823d33999	279	__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	280	{
<>	149:156823d33999	281	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	282	UNUSED(hcryp);
<>	149:156823d33999	283
<>	149:156823d33999	284	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	285	the HAL_CRYP_MspInit can be implemented in the user file */
<>	149:156823d33999	286	}
<>	149:156823d33999	287
<>	149:156823d33999	288	/**
<>	149:156823d33999	289	* @brief DeInitializes CRYP MSP.
<>	149:156823d33999	290	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	291	* the configuration information for CRYP module
<>	149:156823d33999	292	* @retval None
<>	149:156823d33999	293	*/
<>	149:156823d33999	294	__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	295	{
<>	149:156823d33999	296	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	297	UNUSED(hcryp);
<>	149:156823d33999	298
<>	149:156823d33999	299	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	300	the HAL_CRYP_MspDeInit can be implemented in the user file */
<>	149:156823d33999	301	}
<>	149:156823d33999	302
<>	149:156823d33999	303	/**
<>	149:156823d33999	304	* @}
<>	149:156823d33999	305	*/
<>	149:156823d33999	306
<>	149:156823d33999	307	/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
<>	149:156823d33999	308	* @brief processing functions.
<>	149:156823d33999	309	*
<>	149:156823d33999	310	@verbatim
<>	149:156823d33999	311	==============================================================================
<>	149:156823d33999	312	##### AES processing functions #####
<>	149:156823d33999	313	==============================================================================
<>	149:156823d33999	314	[..] This section provides functions allowing to:
<>	149:156823d33999	315	(+) Encrypt plaintext using AES algorithm in different chaining modes
<>	149:156823d33999	316	(+) Decrypt cyphertext using AES algorithm in different chaining modes
<>	149:156823d33999	317	[..] Three processing functions are available:
<>	149:156823d33999	318	(+) Polling mode
<>	149:156823d33999	319	(+) Interrupt mode
<>	149:156823d33999	320	(+) DMA mode
<>	149:156823d33999	321
<>	149:156823d33999	322	@endverbatim
<>	149:156823d33999	323	* @{
<>	149:156823d33999	324	*/
<>	149:156823d33999	325
<>	149:156823d33999	326	/**
<>	149:156823d33999	327	* @brief Initializes the CRYP peripheral in AES ECB encryption mode
<>	149:156823d33999	328	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	329	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	330	* the configuration information for CRYP module
<>	149:156823d33999	331	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	332	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	333	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	334	* @param Timeout: Specify Timeout value
<>	149:156823d33999	335	* @retval HAL status
<>	149:156823d33999	336	*/
<>	149:156823d33999	337	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	338	{
<>	149:156823d33999	339	/* Process Locked */
<>	149:156823d33999	340	__HAL_LOCK(hcryp);
<>	149:156823d33999	341
<>	149:156823d33999	342	/* Check that data aligned on u32 and Size multiple of 16*/
<>	149:156823d33999	343	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	344	{
<>	149:156823d33999	345	/* Process Locked */
<>	149:156823d33999	346	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	347
<>	149:156823d33999	348	/* Return function status */
<>	149:156823d33999	349	return HAL_ERROR;
<>	149:156823d33999	350	}
<>	149:156823d33999	351
<>	149:156823d33999	352	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	353	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	354	{
<>	149:156823d33999	355	/* Change the CRYP state */
<>	149:156823d33999	356	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	357
<>	149:156823d33999	358	/* Check if initialization phase has already been performed */
<>	149:156823d33999	359	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	360	{
<>	149:156823d33999	361	/* Set the key */
<>	149:156823d33999	362	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	363
<>	149:156823d33999	364	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	365	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	366
<>	149:156823d33999	367	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	368	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	369
<>	149:156823d33999	370	/* Enable CRYP */
<>	149:156823d33999	371	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	372
<>	149:156823d33999	373	/* Set the phase */
<>	149:156823d33999	374	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	375	}
<>	149:156823d33999	376
<>	149:156823d33999	377	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	378	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	379	{
<>	149:156823d33999	380	return HAL_TIMEOUT;
<>	149:156823d33999	381	}
<>	149:156823d33999	382
<>	149:156823d33999	383	/* Change the CRYP state */
<>	149:156823d33999	384	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	385
<>	149:156823d33999	386	/* Process Unlocked */
<>	149:156823d33999	387	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	388
<>	149:156823d33999	389	/* Return function status */
<>	149:156823d33999	390	return HAL_OK;
<>	149:156823d33999	391	}
<>	149:156823d33999	392	else
<>	149:156823d33999	393	{
<>	149:156823d33999	394	/* Process Locked */
<>	149:156823d33999	395	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	396
<>	149:156823d33999	397	/* Return function status */
<>	149:156823d33999	398	return HAL_ERROR;
<>	149:156823d33999	399	}
<>	149:156823d33999	400	}
<>	149:156823d33999	401
<>	149:156823d33999	402	/**
<>	149:156823d33999	403	* @brief Initializes the CRYP peripheral in AES CBC encryption mode
<>	149:156823d33999	404	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	405	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	406	* the configuration information for CRYP module
<>	149:156823d33999	407	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	408	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	409	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	410	* @param Timeout: Specify Timeout value
<>	149:156823d33999	411	* @retval HAL status
<>	149:156823d33999	412	*/
<>	149:156823d33999	413	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	414	{
<>	149:156823d33999	415	/* Process Locked */
<>	149:156823d33999	416	__HAL_LOCK(hcryp);
<>	149:156823d33999	417
<>	149:156823d33999	418	/* Check that data aligned on u32 */
<>	149:156823d33999	419	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	420	{
<>	149:156823d33999	421	/* Process Locked */
<>	149:156823d33999	422	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	423
<>	149:156823d33999	424	/* Return function status */
<>	149:156823d33999	425	return HAL_ERROR;
<>	149:156823d33999	426	}
<>	149:156823d33999	427
<>	149:156823d33999	428	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	429	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	430	{
<>	149:156823d33999	431	/* Change the CRYP state */
<>	149:156823d33999	432	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	433
<>	149:156823d33999	434	/* Check if initialization phase has already been performed */
<>	149:156823d33999	435	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	436	{
<>	149:156823d33999	437	/* Set the key */
<>	149:156823d33999	438	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	439
<>	149:156823d33999	440	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	441	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	442
<>	149:156823d33999	443	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	444	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	445
<>	149:156823d33999	446	/* Set the Initialization Vector */
<>	149:156823d33999	447	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	448
<>	149:156823d33999	449	/* Enable CRYP */
<>	149:156823d33999	450	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	451
<>	149:156823d33999	452	/* Set the phase */
<>	149:156823d33999	453	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	454	}
<>	149:156823d33999	455
<>	149:156823d33999	456	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	457	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	458	{
<>	149:156823d33999	459	return HAL_TIMEOUT;
<>	149:156823d33999	460	}
<>	149:156823d33999	461
<>	149:156823d33999	462	/* Change the CRYP state */
<>	149:156823d33999	463	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	464
<>	149:156823d33999	465	/* Process Unlocked */
<>	149:156823d33999	466	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	467
<>	149:156823d33999	468	/* Return function status */
<>	149:156823d33999	469	return HAL_OK;
<>	149:156823d33999	470	}
<>	149:156823d33999	471	else
<>	149:156823d33999	472	{
<>	149:156823d33999	473	/* Process Locked */
<>	149:156823d33999	474	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	475
<>	149:156823d33999	476	/* Return function status */
<>	149:156823d33999	477	return HAL_ERROR;
<>	149:156823d33999	478	}
<>	149:156823d33999	479	}
<>	149:156823d33999	480
<>	149:156823d33999	481	/**
<>	149:156823d33999	482	* @brief Initializes the CRYP peripheral in AES CTR encryption mode
<>	149:156823d33999	483	* then encrypt pPlainData. The cypher data are available in pCypherData
<>	149:156823d33999	484	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	485	* the configuration information for CRYP module
<>	149:156823d33999	486	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	487	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	488	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	489	* @param Timeout: Specify Timeout value
<>	149:156823d33999	490	* @retval HAL status
<>	149:156823d33999	491	*/
<>	149:156823d33999	492	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
<>	149:156823d33999	493	{
<>	149:156823d33999	494	/* Process Locked */
<>	149:156823d33999	495	__HAL_LOCK(hcryp);
<>	149:156823d33999	496
<>	149:156823d33999	497	/* Check that data aligned on u32 */
<>	149:156823d33999	498	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	499	{
<>	149:156823d33999	500	/* Process Locked */
<>	149:156823d33999	501	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	502
<>	149:156823d33999	503	/* Return function status */
<>	149:156823d33999	504	return HAL_ERROR;
<>	149:156823d33999	505	}
<>	149:156823d33999	506
<>	149:156823d33999	507	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	508	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	509	{
<>	149:156823d33999	510	/* Change the CRYP state */
<>	149:156823d33999	511	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	512
<>	149:156823d33999	513	/* Check if initialization phase has already been performed */
<>	149:156823d33999	514	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	515	{
<>	149:156823d33999	516	/* Set the key */
<>	149:156823d33999	517	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	518
<>	149:156823d33999	519	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	520	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	521
<>	149:156823d33999	522	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	523	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	524
<>	149:156823d33999	525	/* Set the Initialization Vector */
<>	149:156823d33999	526	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	527
<>	149:156823d33999	528	/* Enable CRYP */
<>	149:156823d33999	529	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	530
<>	149:156823d33999	531	/* Set the phase */
<>	149:156823d33999	532	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	533	}
<>	149:156823d33999	534
<>	149:156823d33999	535	/* Write Plain Data and Get Cypher Data */
<>	149:156823d33999	536	if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
<>	149:156823d33999	537	{
<>	149:156823d33999	538	return HAL_TIMEOUT;
<>	149:156823d33999	539	}
<>	149:156823d33999	540
<>	149:156823d33999	541	/* Change the CRYP state */
<>	149:156823d33999	542	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	543
<>	149:156823d33999	544	/* Process Unlocked */
<>	149:156823d33999	545	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	546
<>	149:156823d33999	547	/* Return function status */
<>	149:156823d33999	548	return HAL_OK;
<>	149:156823d33999	549	}
<>	149:156823d33999	550	else
<>	149:156823d33999	551	{
<>	149:156823d33999	552	/* Release Lock */
<>	149:156823d33999	553	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	554
<>	149:156823d33999	555	/* Return function status */
<>	149:156823d33999	556	return HAL_ERROR;
<>	149:156823d33999	557	}
<>	149:156823d33999	558	}
<>	149:156823d33999	559
<>	149:156823d33999	560	/**
<>	149:156823d33999	561	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	149:156823d33999	562	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	563	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	564	* the configuration information for CRYP module
<>	149:156823d33999	565	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	566	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	567	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	568	* @param Timeout: Specify Timeout value
<>	149:156823d33999	569	* @retval HAL status
<>	149:156823d33999	570	*/
<>	149:156823d33999	571	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	572	{
<>	149:156823d33999	573	/* Process Locked */
<>	149:156823d33999	574	__HAL_LOCK(hcryp);
<>	149:156823d33999	575
<>	149:156823d33999	576	/* Check that data aligned on u32 */
<>	149:156823d33999	577	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	578	{
<>	149:156823d33999	579	/* Process Locked */
<>	149:156823d33999	580	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	581
<>	149:156823d33999	582	/* Return function status */
<>	149:156823d33999	583	return HAL_ERROR;
<>	149:156823d33999	584	}
<>	149:156823d33999	585
<>	149:156823d33999	586	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	587	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	588	{
<>	149:156823d33999	589	/* Change the CRYP state */
<>	149:156823d33999	590	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	591
<>	149:156823d33999	592	/* Check if initialization phase has already been performed */
<>	149:156823d33999	593	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	594	{
<>	149:156823d33999	595	/* Set the key */
<>	149:156823d33999	596	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	597
<>	149:156823d33999	598	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	599	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	600
<>	149:156823d33999	601	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	602	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	603
<>	149:156823d33999	604	/* Enable CRYP */
<>	149:156823d33999	605	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	606
<>	149:156823d33999	607	/* Set the phase */
<>	149:156823d33999	608	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	609	}
<>	149:156823d33999	610
<>	149:156823d33999	611	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	612	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	613	{
<>	149:156823d33999	614	return HAL_TIMEOUT;
<>	149:156823d33999	615	}
<>	149:156823d33999	616
<>	149:156823d33999	617	/* Change the CRYP state */
<>	149:156823d33999	618	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	619
<>	149:156823d33999	620	/* Process Unlocked */
<>	149:156823d33999	621	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	622
<>	149:156823d33999	623	/* Return function status */
<>	149:156823d33999	624	return HAL_OK;
<>	149:156823d33999	625	}
<>	149:156823d33999	626	else
<>	149:156823d33999	627	{
<>	149:156823d33999	628	/* Release Lock */
<>	149:156823d33999	629	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	630
<>	149:156823d33999	631	/* Return function status */
<>	149:156823d33999	632	return HAL_ERROR;
<>	149:156823d33999	633	}
<>	149:156823d33999	634	}
<>	149:156823d33999	635
<>	149:156823d33999	636	/**
<>	149:156823d33999	637	* @brief Initializes the CRYP peripheral in AES ECB decryption mode
<>	149:156823d33999	638	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	639	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	640	* the configuration information for CRYP module
<>	149:156823d33999	641	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	642	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	643	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	644	* @param Timeout: Specify Timeout value
<>	149:156823d33999	645	* @retval HAL status
<>	149:156823d33999	646	*/
<>	149:156823d33999	647	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	648	{
<>	149:156823d33999	649	/* Process Locked */
<>	149:156823d33999	650	__HAL_LOCK(hcryp);
<>	149:156823d33999	651
<>	149:156823d33999	652	/* Check that data aligned on u32 */
<>	149:156823d33999	653	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	654	{
<>	149:156823d33999	655	/* Process Locked */
<>	149:156823d33999	656	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	657
<>	149:156823d33999	658	/* Return function status */
<>	149:156823d33999	659	return HAL_ERROR;
<>	149:156823d33999	660	}
<>	149:156823d33999	661
<>	149:156823d33999	662	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	663	if(hcryp->State != HAL_CRYP_STATE_RESET)
<>	149:156823d33999	664	{
<>	149:156823d33999	665	/* Change the CRYP state */
<>	149:156823d33999	666	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	667
<>	149:156823d33999	668	/* Check if initialization phase has already been performed */
<>	149:156823d33999	669	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	670	{
<>	149:156823d33999	671	/* Set the key */
<>	149:156823d33999	672	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	673
<>	149:156823d33999	674	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	675	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	676
<>	149:156823d33999	677	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	678	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	679
<>	149:156823d33999	680	/* Set the Initialization Vector */
<>	149:156823d33999	681	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	682
<>	149:156823d33999	683	/* Enable CRYP */
<>	149:156823d33999	684	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	685
<>	149:156823d33999	686	/* Set the phase */
<>	149:156823d33999	687	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	688	}
<>	149:156823d33999	689
<>	149:156823d33999	690	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	691	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	692	{
<>	149:156823d33999	693	return HAL_TIMEOUT;
<>	149:156823d33999	694	}
<>	149:156823d33999	695
<>	149:156823d33999	696	/* Change the CRYP state */
<>	149:156823d33999	697	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	698
<>	149:156823d33999	699	/* Process Unlocked */
<>	149:156823d33999	700	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	701
<>	149:156823d33999	702	/* Return function status */
<>	149:156823d33999	703	return HAL_OK;
<>	149:156823d33999	704	}
<>	149:156823d33999	705	else
<>	149:156823d33999	706	{
<>	149:156823d33999	707	/* Release Lock */
<>	149:156823d33999	708	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	709
<>	149:156823d33999	710	/* Return function status */
<>	149:156823d33999	711	return HAL_ERROR;
<>	149:156823d33999	712	}
<>	149:156823d33999	713	}
<>	149:156823d33999	714
<>	149:156823d33999	715	/**
<>	149:156823d33999	716	* @brief Initializes the CRYP peripheral in AES CTR decryption mode
<>	149:156823d33999	717	* then decrypted pCypherData. The cypher data are available in pPlainData
<>	149:156823d33999	718	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	719	* the configuration information for CRYP module
<>	149:156823d33999	720	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	721	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	722	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	723	* @param Timeout: Specify Timeout value
<>	149:156823d33999	724	* @retval HAL status
<>	149:156823d33999	725	*/
<>	149:156823d33999	726	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
<>	149:156823d33999	727	{
<>	149:156823d33999	728	/* Process Locked */
<>	149:156823d33999	729	__HAL_LOCK(hcryp);
<>	149:156823d33999	730
<>	149:156823d33999	731	/* Check that data aligned on u32 */
<>	149:156823d33999	732	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	733	{
<>	149:156823d33999	734	/* Process Locked */
<>	149:156823d33999	735	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	736
<>	149:156823d33999	737	/* Return function status */
<>	149:156823d33999	738	return HAL_ERROR;
<>	149:156823d33999	739	}
<>	149:156823d33999	740
<>	149:156823d33999	741	/* Check if initialization phase has already been performed */
<>	149:156823d33999	742	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
<>	149:156823d33999	743	{
<>	149:156823d33999	744	/* Change the CRYP state */
<>	149:156823d33999	745	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	746
<>	149:156823d33999	747	/* Set the key */
<>	149:156823d33999	748	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	749
<>	149:156823d33999	750	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	751	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	752
<>	149:156823d33999	753	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	149:156823d33999	754	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	755
<>	149:156823d33999	756	/* Set the Initialization Vector */
<>	149:156823d33999	757	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	758
<>	149:156823d33999	759	/* Enable CRYP */
<>	149:156823d33999	760	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	761
<>	149:156823d33999	762	/* Set the phase */
<>	149:156823d33999	763	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	764	}
<>	149:156823d33999	765
<>	149:156823d33999	766	/* Write Cypher Data and Get Plain Data */
<>	149:156823d33999	767	if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
<>	149:156823d33999	768	{
<>	149:156823d33999	769	return HAL_TIMEOUT;
<>	149:156823d33999	770	}
<>	149:156823d33999	771
<>	149:156823d33999	772	/* Change the CRYP state */
<>	149:156823d33999	773	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	774
<>	149:156823d33999	775	/* Process Unlocked */
<>	149:156823d33999	776	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	777
<>	149:156823d33999	778	/* Return function status */
<>	149:156823d33999	779	return HAL_OK;
<>	149:156823d33999	780	}
<>	149:156823d33999	781
<>	149:156823d33999	782	/**
<>	149:156823d33999	783	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
<>	149:156823d33999	784	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	785	* the configuration information for CRYP module
<>	149:156823d33999	786	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	787	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	788	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	789	* @retval HAL status
<>	149:156823d33999	790	*/
<>	149:156823d33999	791	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	792	{
<>	149:156823d33999	793	uint32_t inputaddr = 0;
<>	149:156823d33999	794
<>	149:156823d33999	795	/* Check that data aligned on u32 */
<>	149:156823d33999	796	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	797	{
<>	149:156823d33999	798	/* Process Locked */
<>	149:156823d33999	799	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	800
<>	149:156823d33999	801	/* Return function status */
<>	149:156823d33999	802	return HAL_ERROR;
<>	149:156823d33999	803	}
<>	149:156823d33999	804
<>	149:156823d33999	805	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	806	{
<>	149:156823d33999	807	/* Process Locked */
<>	149:156823d33999	808	__HAL_LOCK(hcryp);
<>	149:156823d33999	809
<>	149:156823d33999	810	/* Get the buffer addresses and sizes */
<>	149:156823d33999	811	hcryp->CrypInCount = Size;
<>	149:156823d33999	812	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	813	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	814	hcryp->CrypOutCount = Size;
<>	149:156823d33999	815
<>	149:156823d33999	816	/* Change the CRYP state */
<>	149:156823d33999	817	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	818
<>	149:156823d33999	819	/* Check if initialization phase has already been performed */
<>	149:156823d33999	820	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	821	{
<>	149:156823d33999	822	/* Set the key */
<>	149:156823d33999	823	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	824
<>	149:156823d33999	825	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	826	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	827
<>	149:156823d33999	828	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	829	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	830
<>	149:156823d33999	831	/* Set the phase */
<>	149:156823d33999	832	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	833	}
<>	149:156823d33999	834
<>	149:156823d33999	835	/* Enable Interrupts */
<>	149:156823d33999	836	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	837
<>	149:156823d33999	838	/* Enable CRYP */
<>	149:156823d33999	839	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	840
<>	149:156823d33999	841	/* Get the last input data adress */
<>	149:156823d33999	842	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	843
<>	149:156823d33999	844	/* Write the Input block in the Data Input register */
<>	149:156823d33999	845	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	846	inputaddr+=4;
<>	149:156823d33999	847	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	848	inputaddr+=4;
<>	149:156823d33999	849	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	850	inputaddr+=4;
<>	149:156823d33999	851	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	852	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	853	hcryp->CrypInCount -= 16;
<>	149:156823d33999	854
<>	149:156823d33999	855	/* Return function status */
<>	149:156823d33999	856	return HAL_OK;
<>	149:156823d33999	857	}
<>	149:156823d33999	858	else
<>	149:156823d33999	859	{
<>	149:156823d33999	860	/* Release Lock */
<>	149:156823d33999	861	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	862
<>	149:156823d33999	863	/* Return function status */
<>	149:156823d33999	864	return HAL_ERROR;
<>	149:156823d33999	865	}
<>	149:156823d33999	866	}
<>	149:156823d33999	867
<>	149:156823d33999	868	/**
<>	149:156823d33999	869	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
<>	149:156823d33999	870	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	871	* the configuration information for CRYP module
<>	149:156823d33999	872	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	873	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	874	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	875	* @retval HAL status
<>	149:156823d33999	876	*/
<>	149:156823d33999	877	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	878	{
<>	149:156823d33999	879	uint32_t inputaddr = 0;
<>	149:156823d33999	880
<>	149:156823d33999	881	/* Check that data aligned on u32 */
<>	149:156823d33999	882	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	883	{
<>	149:156823d33999	884	/* Process Locked */
<>	149:156823d33999	885	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	886
<>	149:156823d33999	887	/* Return function status */
<>	149:156823d33999	888	return HAL_ERROR;
<>	149:156823d33999	889	}
<>	149:156823d33999	890
<>	149:156823d33999	891	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	892	{
<>	149:156823d33999	893	/* Process Locked */
<>	149:156823d33999	894	__HAL_LOCK(hcryp);
<>	149:156823d33999	895
<>	149:156823d33999	896	/* Get the buffer addresses and sizes */
<>	149:156823d33999	897	hcryp->CrypInCount = Size;
<>	149:156823d33999	898	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	899	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	900	hcryp->CrypOutCount = Size;
<>	149:156823d33999	901
<>	149:156823d33999	902	/* Change the CRYP state */
<>	149:156823d33999	903	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	904
<>	149:156823d33999	905	/* Check if initialization phase has already been performed */
<>	149:156823d33999	906	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	907	{
<>	149:156823d33999	908	/* Set the key */
<>	149:156823d33999	909	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	910
<>	149:156823d33999	911	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	912	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	913
<>	149:156823d33999	914	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	915	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	916
<>	149:156823d33999	917	/* Set the Initialization Vector */
<>	149:156823d33999	918	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	919
<>	149:156823d33999	920	/* Set the phase */
<>	149:156823d33999	921	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	922	}
<>	149:156823d33999	923
<>	149:156823d33999	924	/* Enable Interrupts */
<>	149:156823d33999	925	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	926
<>	149:156823d33999	927	/* Enable CRYP */
<>	149:156823d33999	928	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	929
<>	149:156823d33999	930	/* Get the last input data adress */
<>	149:156823d33999	931	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	932
<>	149:156823d33999	933	/* Write the Input block in the Data Input register */
<>	149:156823d33999	934	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	935	inputaddr+=4;
<>	149:156823d33999	936	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	937	inputaddr+=4;
<>	149:156823d33999	938	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	939	inputaddr+=4;
<>	149:156823d33999	940	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	941	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	942	hcryp->CrypInCount -= 16;
<>	149:156823d33999	943
<>	149:156823d33999	944	/* Return function status */
<>	149:156823d33999	945	return HAL_OK;
<>	149:156823d33999	946	}
<>	149:156823d33999	947	else
<>	149:156823d33999	948	{
<>	149:156823d33999	949	/* Release Lock */
<>	149:156823d33999	950	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	951
<>	149:156823d33999	952	/* Return function status */
<>	149:156823d33999	953	return HAL_ERROR;
<>	149:156823d33999	954	}
<>	149:156823d33999	955	}
<>	149:156823d33999	956
<>	149:156823d33999	957	/**
<>	149:156823d33999	958	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
<>	149:156823d33999	959	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	960	* the configuration information for CRYP module
<>	149:156823d33999	961	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	962	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	963	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	964	* @retval HAL status
<>	149:156823d33999	965	*/
<>	149:156823d33999	966	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	967	{
<>	149:156823d33999	968	uint32_t inputaddr = 0;
<>	149:156823d33999	969
<>	149:156823d33999	970	/* Check that data aligned on u32 */
<>	149:156823d33999	971	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	972	{
<>	149:156823d33999	973	/* Process Locked */
<>	149:156823d33999	974	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	975
<>	149:156823d33999	976	/* Return function status */
<>	149:156823d33999	977	return HAL_ERROR;
<>	149:156823d33999	978	}
<>	149:156823d33999	979
<>	149:156823d33999	980	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	981	{
<>	149:156823d33999	982	/* Process Locked */
<>	149:156823d33999	983	__HAL_LOCK(hcryp);
<>	149:156823d33999	984
<>	149:156823d33999	985	/* Get the buffer addresses and sizes */
<>	149:156823d33999	986	hcryp->CrypInCount = Size;
<>	149:156823d33999	987	hcryp->pCrypInBuffPtr = pPlainData;
<>	149:156823d33999	988	hcryp->pCrypOutBuffPtr = pCypherData;
<>	149:156823d33999	989	hcryp->CrypOutCount = Size;
<>	149:156823d33999	990
<>	149:156823d33999	991	/* Change the CRYP state */
<>	149:156823d33999	992	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	993
<>	149:156823d33999	994	/* Check if initialization phase has already been performed */
<>	149:156823d33999	995	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	996	{
<>	149:156823d33999	997	/* Set the key */
<>	149:156823d33999	998	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	999
<>	149:156823d33999	1000	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1001	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1002
<>	149:156823d33999	1003	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1004	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	1005
<>	149:156823d33999	1006	/* Set the Initialization Vector */
<>	149:156823d33999	1007	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1008
<>	149:156823d33999	1009	/* Set the phase */
<>	149:156823d33999	1010	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1011	}
<>	149:156823d33999	1012
<>	149:156823d33999	1013	/* Enable Interrupts */
<>	149:156823d33999	1014	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1015
<>	149:156823d33999	1016	/* Enable CRYP */
<>	149:156823d33999	1017	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1018
<>	149:156823d33999	1019	/* Get the last input data adress */
<>	149:156823d33999	1020	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1021
<>	149:156823d33999	1022	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1023	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1024	inputaddr+=4;
<>	149:156823d33999	1025	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1026	inputaddr+=4;
<>	149:156823d33999	1027	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1028	inputaddr+=4;
<>	149:156823d33999	1029	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1030	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1031	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1032
<>	149:156823d33999	1033	/* Return function status */
<>	149:156823d33999	1034	return HAL_OK;
<>	149:156823d33999	1035	}
<>	149:156823d33999	1036	else
<>	149:156823d33999	1037	{
<>	149:156823d33999	1038	/* Release Lock */
<>	149:156823d33999	1039	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1040
<>	149:156823d33999	1041	/* Return function status */
<>	149:156823d33999	1042	return HAL_ERROR;
<>	149:156823d33999	1043	}
<>	149:156823d33999	1044	}
<>	149:156823d33999	1045
<>	149:156823d33999	1046	/**
<>	149:156823d33999	1047	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
<>	149:156823d33999	1048	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1049	* the configuration information for CRYP module
<>	149:156823d33999	1050	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1051	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1052	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1053	* @retval HAL status
<>	149:156823d33999	1054	*/
<>	149:156823d33999	1055	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1056	{
<>	149:156823d33999	1057	uint32_t inputaddr = 0;
<>	149:156823d33999	1058
<>	149:156823d33999	1059	/* Check that data aligned on u32 */
<>	149:156823d33999	1060	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1061	{
<>	149:156823d33999	1062	/* Process Locked */
<>	149:156823d33999	1063	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1064
<>	149:156823d33999	1065	/* Return function status */
<>	149:156823d33999	1066	return HAL_ERROR;
<>	149:156823d33999	1067	}
<>	149:156823d33999	1068
<>	149:156823d33999	1069	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1070	{
<>	149:156823d33999	1071	/* Process Locked */
<>	149:156823d33999	1072	__HAL_LOCK(hcryp);
<>	149:156823d33999	1073
<>	149:156823d33999	1074	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1075	hcryp->CrypInCount = Size;
<>	149:156823d33999	1076	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1077	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1078	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1079
<>	149:156823d33999	1080	/* Change the CRYP state */
<>	149:156823d33999	1081	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1082
<>	149:156823d33999	1083	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1084	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1085	{
<>	149:156823d33999	1086	/* Set the key */
<>	149:156823d33999	1087	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1088
<>	149:156823d33999	1089	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1090	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1091
<>	149:156823d33999	1092	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	1093	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	1094
<>	149:156823d33999	1095	/* Set the phase */
<>	149:156823d33999	1096	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1097	}
<>	149:156823d33999	1098
<>	149:156823d33999	1099	/* Enable Interrupts */
<>	149:156823d33999	1100	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1101
<>	149:156823d33999	1102	/* Enable CRYP */
<>	149:156823d33999	1103	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1104
<>	149:156823d33999	1105	/* Get the last input data adress */
<>	149:156823d33999	1106	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1107
<>	149:156823d33999	1108	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1109	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1110	inputaddr+=4;
<>	149:156823d33999	1111	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1112	inputaddr+=4;
<>	149:156823d33999	1113	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1114	inputaddr+=4;
<>	149:156823d33999	1115	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1116	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1117	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1118
<>	149:156823d33999	1119	/* Return function status */
<>	149:156823d33999	1120	return HAL_OK;
<>	149:156823d33999	1121	}
<>	149:156823d33999	1122	else
<>	149:156823d33999	1123	{
<>	149:156823d33999	1124	/* Release Lock */
<>	149:156823d33999	1125	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1126
<>	149:156823d33999	1127	/* Return function status */
<>	149:156823d33999	1128	return HAL_ERROR;
<>	149:156823d33999	1129	}
<>	149:156823d33999	1130	}
<>	149:156823d33999	1131
<>	149:156823d33999	1132	/**
<>	149:156823d33999	1133	* @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
<>	149:156823d33999	1134	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1135	* the configuration information for CRYP module
<>	149:156823d33999	1136	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1137	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1138	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1139	* @retval HAL status
<>	149:156823d33999	1140	*/
<>	149:156823d33999	1141	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1142	{
<>	149:156823d33999	1143	uint32_t inputaddr = 0;
<>	149:156823d33999	1144
<>	149:156823d33999	1145	/* Check that data aligned on u32 */
<>	149:156823d33999	1146	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1147	{
<>	149:156823d33999	1148	/* Process Locked */
<>	149:156823d33999	1149	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1150
<>	149:156823d33999	1151	/* Return function status */
<>	149:156823d33999	1152	return HAL_ERROR;
<>	149:156823d33999	1153	}
<>	149:156823d33999	1154
<>	149:156823d33999	1155	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1156	{
<>	149:156823d33999	1157	/* Process Locked */
<>	149:156823d33999	1158	__HAL_LOCK(hcryp);
<>	149:156823d33999	1159
<>	149:156823d33999	1160	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1161	hcryp->CrypInCount = Size;
<>	149:156823d33999	1162	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1163	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1164	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1165
<>	149:156823d33999	1166	/* Change the CRYP state */
<>	149:156823d33999	1167	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1168
<>	149:156823d33999	1169	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1170	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1171	{
<>	149:156823d33999	1172	/* Set the key */
<>	149:156823d33999	1173	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1174
<>	149:156823d33999	1175	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1176	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1177
<>	149:156823d33999	1178	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	1179	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	1180
<>	149:156823d33999	1181	/* Set the Initialization Vector */
<>	149:156823d33999	1182	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1183
<>	149:156823d33999	1184	/* Set the phase */
<>	149:156823d33999	1185	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1186	}
<>	149:156823d33999	1187
<>	149:156823d33999	1188	/* Enable Interrupts */
<>	149:156823d33999	1189	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1190
<>	149:156823d33999	1191	/* Enable CRYP */
<>	149:156823d33999	1192	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1193
<>	149:156823d33999	1194	/* Get the last input data adress */
<>	149:156823d33999	1195	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1196
<>	149:156823d33999	1197	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1198	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1199	inputaddr+=4;
<>	149:156823d33999	1200	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1201	inputaddr+=4;
<>	149:156823d33999	1202	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1203	inputaddr+=4;
<>	149:156823d33999	1204	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1205	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1206	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1207
<>	149:156823d33999	1208	/* Return function status */
<>	149:156823d33999	1209	return HAL_OK;
<>	149:156823d33999	1210	}
<>	149:156823d33999	1211	else
<>	149:156823d33999	1212	{
<>	149:156823d33999	1213	/* Release Lock */
<>	149:156823d33999	1214	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1215
<>	149:156823d33999	1216	/* Return function status */
<>	149:156823d33999	1217	return HAL_ERROR;
<>	149:156823d33999	1218	}
<>	149:156823d33999	1219	}
<>	149:156823d33999	1220
<>	149:156823d33999	1221	/**
<>	149:156823d33999	1222	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
<>	149:156823d33999	1223	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1224	* the configuration information for CRYP module
<>	149:156823d33999	1225	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1226	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1227	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1228	* @retval HAL status
<>	149:156823d33999	1229	*/
<>	149:156823d33999	1230	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1231	{
<>	149:156823d33999	1232	uint32_t inputaddr = 0;
<>	149:156823d33999	1233
<>	149:156823d33999	1234	/* Check that data aligned on u32 */
<>	149:156823d33999	1235	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1236	{
<>	149:156823d33999	1237	/* Process Locked */
<>	149:156823d33999	1238	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1239
<>	149:156823d33999	1240	/* Return function status */
<>	149:156823d33999	1241	return HAL_ERROR;
<>	149:156823d33999	1242	}
<>	149:156823d33999	1243
<>	149:156823d33999	1244	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1245	{
<>	149:156823d33999	1246	/* Process Locked */
<>	149:156823d33999	1247	__HAL_LOCK(hcryp);
<>	149:156823d33999	1248
<>	149:156823d33999	1249	/* Get the buffer addresses and sizes */
<>	149:156823d33999	1250	hcryp->CrypInCount = Size;
<>	149:156823d33999	1251	hcryp->pCrypInBuffPtr = pCypherData;
<>	149:156823d33999	1252	hcryp->pCrypOutBuffPtr = pPlainData;
<>	149:156823d33999	1253	hcryp->CrypOutCount = Size;
<>	149:156823d33999	1254
<>	149:156823d33999	1255	/* Change the CRYP state */
<>	149:156823d33999	1256	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1257
<>	149:156823d33999	1258	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1259	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1260	{
<>	149:156823d33999	1261	/* Set the key */
<>	149:156823d33999	1262	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1263
<>	149:156823d33999	1264	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1265	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1266
<>	149:156823d33999	1267	/* Set the CRYP peripheral in AES CTR decryption mode */
<>	149:156823d33999	1268	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	1269
<>	149:156823d33999	1270	/* Set the Initialization Vector */
<>	149:156823d33999	1271	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1272
<>	149:156823d33999	1273	/* Set the phase */
<>	149:156823d33999	1274	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1275	}
<>	149:156823d33999	1276
<>	149:156823d33999	1277	/* Enable Interrupts */
<>	149:156823d33999	1278	__HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1279
<>	149:156823d33999	1280	/* Enable CRYP */
<>	149:156823d33999	1281	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	1282
<>	149:156823d33999	1283	/* Get the last input data adress */
<>	149:156823d33999	1284	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1285
<>	149:156823d33999	1286	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1287	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1288	inputaddr+=4;
<>	149:156823d33999	1289	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1290	inputaddr+=4;
<>	149:156823d33999	1291	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1292	inputaddr+=4;
<>	149:156823d33999	1293	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1294	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1295	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1296
<>	149:156823d33999	1297	/* Return function status */
<>	149:156823d33999	1298	return HAL_OK;
<>	149:156823d33999	1299	}
<>	149:156823d33999	1300	else
<>	149:156823d33999	1301	{
<>	149:156823d33999	1302	/* Release Lock */
<>	149:156823d33999	1303	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1304
<>	149:156823d33999	1305	/* Return function status */
<>	149:156823d33999	1306	return HAL_ERROR;
<>	149:156823d33999	1307	}
<>	149:156823d33999	1308	}
<>	149:156823d33999	1309
<>	149:156823d33999	1310	/**
<>	149:156823d33999	1311	* @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
<>	149:156823d33999	1312	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1313	* the configuration information for CRYP module
<>	149:156823d33999	1314	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1315	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1316	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1317	* @retval HAL status
<>	149:156823d33999	1318	*/
<>	149:156823d33999	1319	HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1320	{
<>	149:156823d33999	1321	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1322
<>	149:156823d33999	1323	/* Check that data aligned on u32 */
<>	149:156823d33999	1324	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1325	{
<>	149:156823d33999	1326	/* Process Locked */
<>	149:156823d33999	1327	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1328
<>	149:156823d33999	1329	/* Return function status */
<>	149:156823d33999	1330	return HAL_ERROR;
<>	149:156823d33999	1331	}
<>	149:156823d33999	1332
<>	149:156823d33999	1333	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1334	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1335	{
<>	149:156823d33999	1336	/* Process Locked */
<>	149:156823d33999	1337	__HAL_LOCK(hcryp);
<>	149:156823d33999	1338
<>	149:156823d33999	1339	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1340	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1341
<>	149:156823d33999	1342	/* Change the CRYP state */
<>	149:156823d33999	1343	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1344
<>	149:156823d33999	1345	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1346	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1347	{
<>	149:156823d33999	1348	/* Set the key */
<>	149:156823d33999	1349	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1350
<>	149:156823d33999	1351	/* Set the CRYP peripheral in AES ECB mode */
<>	149:156823d33999	1352	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
<>	149:156823d33999	1353
<>	149:156823d33999	1354	/* Set the phase */
<>	149:156823d33999	1355	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1356	}
<>	149:156823d33999	1357	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1358	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1359
<>	149:156823d33999	1360	/* Process Unlocked */
<>	149:156823d33999	1361	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1362
<>	149:156823d33999	1363	/* Return function status */
<>	149:156823d33999	1364	return HAL_OK;
<>	149:156823d33999	1365	}
<>	149:156823d33999	1366	else
<>	149:156823d33999	1367	{
<>	149:156823d33999	1368	/* Release Lock */
<>	149:156823d33999	1369	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1370
<>	149:156823d33999	1371	return HAL_ERROR;
<>	149:156823d33999	1372	}
<>	149:156823d33999	1373	}
<>	149:156823d33999	1374
<>	149:156823d33999	1375	/**
<>	149:156823d33999	1376	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	149:156823d33999	1377	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1378	* the configuration information for CRYP module
<>	149:156823d33999	1379	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1380	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1381	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1382	* @retval HAL status
<>	149:156823d33999	1383	*/
<>	149:156823d33999	1384	HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1385	{
<>	149:156823d33999	1386	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1387
<>	149:156823d33999	1388	/* Check that data aligned on u32 */
<>	149:156823d33999	1389	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1390	{
<>	149:156823d33999	1391	/* Process Locked */
<>	149:156823d33999	1392	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1393
<>	149:156823d33999	1394	/* Return function status */
<>	149:156823d33999	1395	return HAL_ERROR;
<>	149:156823d33999	1396	}
<>	149:156823d33999	1397
<>	149:156823d33999	1398	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1399	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1400	{
<>	149:156823d33999	1401	/* Process Locked */
<>	149:156823d33999	1402	__HAL_LOCK(hcryp);
<>	149:156823d33999	1403
<>	149:156823d33999	1404	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1405	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1406
<>	149:156823d33999	1407	/* Change the CRYP state */
<>	149:156823d33999	1408	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1409
<>	149:156823d33999	1410	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1411	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1412	{
<>	149:156823d33999	1413	/* Set the key */
<>	149:156823d33999	1414	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1415
<>	149:156823d33999	1416	/* Set the CRYP peripheral in AES CBC mode */
<>	149:156823d33999	1417	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
<>	149:156823d33999	1418
<>	149:156823d33999	1419	/* Set the Initialization Vector */
<>	149:156823d33999	1420	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1421
<>	149:156823d33999	1422	/* Set the phase */
<>	149:156823d33999	1423	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1424	}
<>	149:156823d33999	1425	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1426	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1427
<>	149:156823d33999	1428	/* Process Unlocked */
<>	149:156823d33999	1429	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1430
<>	149:156823d33999	1431	/* Return function status */
<>	149:156823d33999	1432	return HAL_OK;
<>	149:156823d33999	1433	}
<>	149:156823d33999	1434	else
<>	149:156823d33999	1435	{
<>	149:156823d33999	1436	/* Release Lock */
<>	149:156823d33999	1437	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1438
<>	149:156823d33999	1439	return HAL_ERROR;
<>	149:156823d33999	1440	}
<>	149:156823d33999	1441	}
<>	149:156823d33999	1442
<>	149:156823d33999	1443	/**
<>	149:156823d33999	1444	* @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
<>	149:156823d33999	1445	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1446	* the configuration information for CRYP module
<>	149:156823d33999	1447	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1448	* @param Size: Length of the plaintext buffer, must be a multiple of 16.
<>	149:156823d33999	1449	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1450	* @retval HAL status
<>	149:156823d33999	1451	*/
<>	149:156823d33999	1452	HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
<>	149:156823d33999	1453	{
<>	149:156823d33999	1454	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1455
<>	149:156823d33999	1456	/* Check that data aligned on u32 */
<>	149:156823d33999	1457	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1458	{
<>	149:156823d33999	1459	/* Process Locked */
<>	149:156823d33999	1460	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1461
<>	149:156823d33999	1462	/* Return function status */
<>	149:156823d33999	1463	return HAL_ERROR;
<>	149:156823d33999	1464	}
<>	149:156823d33999	1465
<>	149:156823d33999	1466	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1467	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1468	{
<>	149:156823d33999	1469	/* Process Locked */
<>	149:156823d33999	1470	__HAL_LOCK(hcryp);
<>	149:156823d33999	1471
<>	149:156823d33999	1472	inputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1473	outputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1474
<>	149:156823d33999	1475	/* Change the CRYP state */
<>	149:156823d33999	1476	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1477
<>	149:156823d33999	1478	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1479	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1480	{
<>	149:156823d33999	1481	/* Set the key */
<>	149:156823d33999	1482	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1483
<>	149:156823d33999	1484	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1485	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
<>	149:156823d33999	1486
<>	149:156823d33999	1487	/* Set the Initialization Vector */
<>	149:156823d33999	1488	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1489
<>	149:156823d33999	1490	/* Set the phase */
<>	149:156823d33999	1491	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1492	}
<>	149:156823d33999	1493
<>	149:156823d33999	1494	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1495	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1496
<>	149:156823d33999	1497	/* Process Unlocked */
<>	149:156823d33999	1498	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1499
<>	149:156823d33999	1500	/* Return function status */
<>	149:156823d33999	1501	return HAL_OK;
<>	149:156823d33999	1502	}
<>	149:156823d33999	1503	else
<>	149:156823d33999	1504	{
<>	149:156823d33999	1505	/* Release Lock */
<>	149:156823d33999	1506	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1507
<>	149:156823d33999	1508	return HAL_ERROR;
<>	149:156823d33999	1509	}
<>	149:156823d33999	1510	}
<>	149:156823d33999	1511
<>	149:156823d33999	1512	/**
<>	149:156823d33999	1513	* @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
<>	149:156823d33999	1514	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1515	* the configuration information for CRYP module
<>	149:156823d33999	1516	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1517	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1518	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1519	* @retval HAL status
<>	149:156823d33999	1520	*/
<>	149:156823d33999	1521	HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1522	{
<>	149:156823d33999	1523	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1524
<>	149:156823d33999	1525	/* Check that data aligned on u32 */
<>	149:156823d33999	1526	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1527	{
<>	149:156823d33999	1528	/* Process Locked */
<>	149:156823d33999	1529	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1530
<>	149:156823d33999	1531	/* Return function status */
<>	149:156823d33999	1532	return HAL_ERROR;
<>	149:156823d33999	1533	}
<>	149:156823d33999	1534
<>	149:156823d33999	1535	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1536	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1537	{
<>	149:156823d33999	1538	/* Process Locked */
<>	149:156823d33999	1539	__HAL_LOCK(hcryp);
<>	149:156823d33999	1540
<>	149:156823d33999	1541	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1542	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1543
<>	149:156823d33999	1544	/* Change the CRYP state */
<>	149:156823d33999	1545	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1546
<>	149:156823d33999	1547	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1548	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1549	{
<>	149:156823d33999	1550	/* Set the key */
<>	149:156823d33999	1551	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1552
<>	149:156823d33999	1553	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1554	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1555
<>	149:156823d33999	1556	/* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
<>	149:156823d33999	1557	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
<>	149:156823d33999	1558
<>	149:156823d33999	1559	/* Set the phase */
<>	149:156823d33999	1560	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1561	}
<>	149:156823d33999	1562
<>	149:156823d33999	1563	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1564	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1565
<>	149:156823d33999	1566	/* Process Unlocked */
<>	149:156823d33999	1567	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1568
<>	149:156823d33999	1569	/* Return function status */
<>	149:156823d33999	1570	return HAL_OK;
<>	149:156823d33999	1571	}
<>	149:156823d33999	1572	else
<>	149:156823d33999	1573	{
<>	149:156823d33999	1574	/* Release Lock */
<>	149:156823d33999	1575	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1576
<>	149:156823d33999	1577	return HAL_ERROR;
<>	149:156823d33999	1578	}
<>	149:156823d33999	1579	}
<>	149:156823d33999	1580
<>	149:156823d33999	1581	/**
<>	149:156823d33999	1582	* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
<>	149:156823d33999	1583	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1584	* the configuration information for CRYP module
<>	149:156823d33999	1585	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1586	* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
<>	149:156823d33999	1587	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1588	* @retval HAL status
<>	149:156823d33999	1589	*/
<>	149:156823d33999	1590	HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1591	{
<>	149:156823d33999	1592	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1593
<>	149:156823d33999	1594	/* Check that data aligned on u32 */
<>	149:156823d33999	1595	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1596	{
<>	149:156823d33999	1597	/* Process Locked */
<>	149:156823d33999	1598	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1599
<>	149:156823d33999	1600	/* Return function status */
<>	149:156823d33999	1601	return HAL_ERROR;
<>	149:156823d33999	1602	}
<>	149:156823d33999	1603
<>	149:156823d33999	1604	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1605	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1606	{
<>	149:156823d33999	1607	/* Process Locked */
<>	149:156823d33999	1608	__HAL_LOCK(hcryp);
<>	149:156823d33999	1609
<>	149:156823d33999	1610	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1611	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1612
<>	149:156823d33999	1613	/* Change the CRYP state */
<>	149:156823d33999	1614	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1615
<>	149:156823d33999	1616	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1617	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1618	{
<>	149:156823d33999	1619	/* Set the key */
<>	149:156823d33999	1620	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1621
<>	149:156823d33999	1622	/* Reset the CHMOD & MODE bits */
<>	149:156823d33999	1623	CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
<>	149:156823d33999	1624
<>	149:156823d33999	1625	/* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
<>	149:156823d33999	1626	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
<>	149:156823d33999	1627
<>	149:156823d33999	1628	/* Set the Initialization Vector */
<>	149:156823d33999	1629	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1630
<>	149:156823d33999	1631	/* Set the phase */
<>	149:156823d33999	1632	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1633	}
<>	149:156823d33999	1634
<>	149:156823d33999	1635	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1636	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1637
<>	149:156823d33999	1638	/* Process Unlocked */
<>	149:156823d33999	1639	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1640
<>	149:156823d33999	1641	/* Return function status */
<>	149:156823d33999	1642	return HAL_OK;
<>	149:156823d33999	1643	}
<>	149:156823d33999	1644	else
<>	149:156823d33999	1645	{
<>	149:156823d33999	1646	/* Release Lock */
<>	149:156823d33999	1647	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1648
<>	149:156823d33999	1649	return HAL_ERROR;
<>	149:156823d33999	1650	}
<>	149:156823d33999	1651	}
<>	149:156823d33999	1652
<>	149:156823d33999	1653	/**
<>	149:156823d33999	1654	* @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
<>	149:156823d33999	1655	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1656	* the configuration information for CRYP module
<>	149:156823d33999	1657	* @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
<>	149:156823d33999	1658	* @param Size: Length of the plaintext buffer, must be a multiple of 16
<>	149:156823d33999	1659	* @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
<>	149:156823d33999	1660	* @retval HAL status
<>	149:156823d33999	1661	*/
<>	149:156823d33999	1662	HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
<>	149:156823d33999	1663	{
<>	149:156823d33999	1664	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1665
<>	149:156823d33999	1666	/* Check that data aligned on u32 */
<>	149:156823d33999	1667	if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) \|\| (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) \|\| ((Size & (uint16_t)0x000F) != 0))
<>	149:156823d33999	1668	{
<>	149:156823d33999	1669	/* Process Locked */
<>	149:156823d33999	1670	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1671
<>	149:156823d33999	1672	/* Return function status */
<>	149:156823d33999	1673	return HAL_ERROR;
<>	149:156823d33999	1674	}
<>	149:156823d33999	1675
<>	149:156823d33999	1676	/* Check if HAL_CRYP_Init has been called */
<>	149:156823d33999	1677	if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
<>	149:156823d33999	1678	{
<>	149:156823d33999	1679	/* Process Locked */
<>	149:156823d33999	1680	__HAL_LOCK(hcryp);
<>	149:156823d33999	1681
<>	149:156823d33999	1682	inputaddr = (uint32_t)pCypherData;
<>	149:156823d33999	1683	outputaddr = (uint32_t)pPlainData;
<>	149:156823d33999	1684
<>	149:156823d33999	1685	/* Change the CRYP state */
<>	149:156823d33999	1686	hcryp->State = HAL_CRYP_STATE_BUSY;
<>	149:156823d33999	1687
<>	149:156823d33999	1688	/* Check if initialization phase has already been performed */
<>	149:156823d33999	1689	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
<>	149:156823d33999	1690	{
<>	149:156823d33999	1691	/* Set the key */
<>	149:156823d33999	1692	CRYP_SetKey(hcryp, hcryp->Init.pKey);
<>	149:156823d33999	1693
<>	149:156823d33999	1694	/* Set the CRYP peripheral in AES CTR mode */
<>	149:156823d33999	1695	__HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
<>	149:156823d33999	1696
<>	149:156823d33999	1697	/* Set the Initialization Vector */
<>	149:156823d33999	1698	CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
<>	149:156823d33999	1699
<>	149:156823d33999	1700	/* Set the phase */
<>	149:156823d33999	1701	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
<>	149:156823d33999	1702	}
<>	149:156823d33999	1703
<>	149:156823d33999	1704	/* Set the input and output addresses and start DMA transfer */
<>	149:156823d33999	1705	CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
<>	149:156823d33999	1706
<>	149:156823d33999	1707	/* Process Unlocked */
<>	149:156823d33999	1708	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1709
<>	149:156823d33999	1710	/* Return function status */
<>	149:156823d33999	1711	return HAL_OK;
<>	149:156823d33999	1712	}
<>	149:156823d33999	1713	else
<>	149:156823d33999	1714	{
<>	149:156823d33999	1715	/* Release Lock */
<>	149:156823d33999	1716	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1717
<>	149:156823d33999	1718	return HAL_ERROR;
<>	149:156823d33999	1719	}
<>	149:156823d33999	1720	}
<>	149:156823d33999	1721
<>	149:156823d33999	1722	/**
<>	149:156823d33999	1723	* @}
<>	149:156823d33999	1724	*/
<>	149:156823d33999	1725
<>	149:156823d33999	1726	/** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions
<>	149:156823d33999	1727	* @brief DMA callback functions.
<>	149:156823d33999	1728	*
<>	149:156823d33999	1729	@verbatim
<>	149:156823d33999	1730	==============================================================================
<>	149:156823d33999	1731	##### DMA callback functions #####
<>	149:156823d33999	1732	==============================================================================
<>	149:156823d33999	1733	[..] This section provides DMA callback functions:
<>	149:156823d33999	1734	(+) DMA Input data transfer complete
<>	149:156823d33999	1735	(+) DMA Output data transfer complete
<>	149:156823d33999	1736	(+) DMA error
<>	149:156823d33999	1737
<>	149:156823d33999	1738	@endverbatim
<>	149:156823d33999	1739	* @{
<>	149:156823d33999	1740	*/
<>	149:156823d33999	1741
<>	149:156823d33999	1742	/**
<>	149:156823d33999	1743	* @brief CRYP error callback.
<>	149:156823d33999	1744	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1745	* the configuration information for CRYP module
<>	149:156823d33999	1746	* @retval None
<>	149:156823d33999	1747	*/
<>	149:156823d33999	1748	__weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1749	{
<>	149:156823d33999	1750	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1751	UNUSED(hcryp);
<>	149:156823d33999	1752
<>	149:156823d33999	1753	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1754	the HAL_CRYP_ErrorCallback can be implemented in the user file
<>	149:156823d33999	1755	*/
<>	149:156823d33999	1756	}
<>	149:156823d33999	1757
<>	149:156823d33999	1758	/**
<>	149:156823d33999	1759	* @brief Input transfer completed callback.
<>	149:156823d33999	1760	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1761	* the configuration information for CRYP module
<>	149:156823d33999	1762	* @retval None
<>	149:156823d33999	1763	*/
<>	149:156823d33999	1764	__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1765	{
<>	149:156823d33999	1766	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1767	UNUSED(hcryp);
<>	149:156823d33999	1768
<>	149:156823d33999	1769	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1770	the HAL_CRYP_InCpltCallback can be implemented in the user file
<>	149:156823d33999	1771	*/
<>	149:156823d33999	1772	}
<>	149:156823d33999	1773
<>	149:156823d33999	1774	/**
<>	149:156823d33999	1775	* @brief Output transfer completed callback.
<>	149:156823d33999	1776	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1777	* the configuration information for CRYP module
<>	149:156823d33999	1778	* @retval None
<>	149:156823d33999	1779	*/
<>	149:156823d33999	1780	__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1781	{
<>	149:156823d33999	1782	/* Prevent unused argument(s) compilation warning */
<>	149:156823d33999	1783	UNUSED(hcryp);
<>	149:156823d33999	1784
<>	149:156823d33999	1785	/* NOTE : This function should not be modified; when the callback is needed,
<>	149:156823d33999	1786	the HAL_CRYP_OutCpltCallback can be implemented in the user file
<>	149:156823d33999	1787	*/
<>	149:156823d33999	1788	}
<>	149:156823d33999	1789
<>	149:156823d33999	1790	/**
<>	149:156823d33999	1791	* @}
<>	149:156823d33999	1792	*/
<>	149:156823d33999	1793
<>	149:156823d33999	1794	/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
<>	149:156823d33999	1795	* @brief CRYP IRQ handler.
<>	149:156823d33999	1796	*
<>	149:156823d33999	1797	@verbatim
<>	149:156823d33999	1798	==============================================================================
<>	149:156823d33999	1799	##### CRYP IRQ handler management #####
<>	149:156823d33999	1800	==============================================================================
<>	149:156823d33999	1801	[..] This section provides CRYP IRQ handler function.
<>	149:156823d33999	1802
<>	149:156823d33999	1803	@endverbatim
<>	149:156823d33999	1804	* @{
<>	149:156823d33999	1805	*/
<>	149:156823d33999	1806
<>	149:156823d33999	1807	/**
<>	149:156823d33999	1808	* @brief This function handles CRYP interrupt request.
<>	149:156823d33999	1809	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1810	* the configuration information for CRYP module
<>	149:156823d33999	1811	* @retval None
<>	149:156823d33999	1812	*/
<>	149:156823d33999	1813	void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1814	{
<>	149:156823d33999	1815	/* Check if error occurred*/
<>	149:156823d33999	1816	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
<>	149:156823d33999	1817	{
<>	149:156823d33999	1818	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
<>	149:156823d33999	1819	{
<>	149:156823d33999	1820	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
<>	149:156823d33999	1821	}
<>	149:156823d33999	1822
<>	149:156823d33999	1823	if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
<>	149:156823d33999	1824	{
<>	149:156823d33999	1825	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
<>	149:156823d33999	1826	}
<>	149:156823d33999	1827
<>	149:156823d33999	1828	if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_CCF) != RESET)
<>	149:156823d33999	1829	{
<>	149:156823d33999	1830	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1831	}
<>	149:156823d33999	1832
<>	149:156823d33999	1833	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	149:156823d33999	1834	/* Disable Computation Complete Interrupt */
<>	149:156823d33999	1835	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
<>	149:156823d33999	1836	__HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
<>	149:156823d33999	1837
<>	149:156823d33999	1838	HAL_CRYP_ErrorCallback(hcryp);
<>	149:156823d33999	1839
<>	149:156823d33999	1840	/* Process Unlocked */
<>	149:156823d33999	1841	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1842
<>	149:156823d33999	1843	return;
<>	149:156823d33999	1844	}
<>	149:156823d33999	1845
<>	149:156823d33999	1846	/* Check if computation complete interrupt was enabled*/
<>	149:156823d33999	1847	if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
<>	149:156823d33999	1848	{
<>	149:156823d33999	1849	/* Clear CCF Flag */
<>	149:156823d33999	1850	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1851
<>	149:156823d33999	1852	CRYP_EncryptDecrypt_IT(hcryp);
<>	149:156823d33999	1853	}
<>	149:156823d33999	1854	}
<>	149:156823d33999	1855
<>	149:156823d33999	1856	/**
<>	149:156823d33999	1857	* @}
<>	149:156823d33999	1858	*/
<>	149:156823d33999	1859
<>	149:156823d33999	1860	/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
<>	149:156823d33999	1861	* @brief Peripheral State functions.
<>	149:156823d33999	1862	*
<>	149:156823d33999	1863	@verbatim
<>	149:156823d33999	1864	==============================================================================
<>	149:156823d33999	1865	##### Peripheral State functions #####
<>	149:156823d33999	1866	==============================================================================
<>	149:156823d33999	1867	[..]
<>	149:156823d33999	1868	This subsection permits to get in run-time the status of the peripheral.
<>	149:156823d33999	1869
<>	149:156823d33999	1870	@endverbatim
<>	149:156823d33999	1871	* @{
<>	149:156823d33999	1872	*/
<>	149:156823d33999	1873
<>	149:156823d33999	1874	/**
<>	149:156823d33999	1875	* @brief Returns the CRYP state.
<>	149:156823d33999	1876	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1877	* the configuration information for CRYP module
<>	149:156823d33999	1878	* @retval HAL state
<>	149:156823d33999	1879	*/
<>	149:156823d33999	1880	HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1881	{
<>	149:156823d33999	1882	return hcryp->State;
<>	149:156823d33999	1883	}
<>	149:156823d33999	1884
<>	149:156823d33999	1885	/**
<>	149:156823d33999	1886	* @}
<>	149:156823d33999	1887	*/
<>	149:156823d33999	1888
<>	149:156823d33999	1889	/**
<>	149:156823d33999	1890	* @}
<>	149:156823d33999	1891	*/
<>	149:156823d33999	1892
<>	149:156823d33999	1893	/** @addtogroup CRYP_Private_Functions
<>	149:156823d33999	1894	* @{
<>	149:156823d33999	1895	*/
<>	149:156823d33999	1896
<>	149:156823d33999	1897	/**
<>	149:156823d33999	1898	* @brief IT function called under interruption context to continue encryption or decryption
<>	149:156823d33999	1899	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	1900	* the configuration information for CRYP module
<>	149:156823d33999	1901	* @retval HAL status
<>	149:156823d33999	1902	*/
<>	149:156823d33999	1903	static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
<>	149:156823d33999	1904	{
<>	149:156823d33999	1905	uint32_t inputaddr = 0, outputaddr = 0;
<>	149:156823d33999	1906
<>	149:156823d33999	1907	/* Get the last Output data adress */
<>	149:156823d33999	1908	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
<>	149:156823d33999	1909
<>	149:156823d33999	1910	/* Read the Output block from the Output Register */
<>	149:156823d33999	1911	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1912	outputaddr+=4;
<>	149:156823d33999	1913	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1914	outputaddr+=4;
<>	149:156823d33999	1915	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1916	outputaddr+=4;
<>	149:156823d33999	1917	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	1918
<>	149:156823d33999	1919	hcryp->pCrypOutBuffPtr += 16;
<>	149:156823d33999	1920	hcryp->CrypOutCount -= 16;
<>	149:156823d33999	1921
<>	149:156823d33999	1922	/* Check if all input text is encrypted or decrypted */
<>	149:156823d33999	1923	if(hcryp->CrypOutCount == 0)
<>	149:156823d33999	1924	{
<>	149:156823d33999	1925	/* Disable Computation Complete Interrupt */
<>	149:156823d33999	1926	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CC);
<>	149:156823d33999	1927	__HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_ERR);
<>	149:156823d33999	1928
<>	149:156823d33999	1929	/* Process Unlocked */
<>	149:156823d33999	1930	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	1931
<>	149:156823d33999	1932	/* Change the CRYP state */
<>	149:156823d33999	1933	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	1934
<>	149:156823d33999	1935	/* Call computation complete callback */
<>	149:156823d33999	1936	HAL_CRYPEx_ComputationCpltCallback(hcryp);
<>	149:156823d33999	1937	}
<>	149:156823d33999	1938	else /* Process the rest of input text */
<>	149:156823d33999	1939	{
<>	149:156823d33999	1940	/* Get the last Intput data adress */
<>	149:156823d33999	1941	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
<>	149:156823d33999	1942
<>	149:156823d33999	1943	/* Write the Input block in the Data Input register */
<>	149:156823d33999	1944	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1945	inputaddr+=4;
<>	149:156823d33999	1946	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1947	inputaddr+=4;
<>	149:156823d33999	1948	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1949	inputaddr+=4;
<>	149:156823d33999	1950	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	1951	hcryp->pCrypInBuffPtr += 16;
<>	149:156823d33999	1952	hcryp->CrypInCount -= 16;
<>	149:156823d33999	1953	}
<>	149:156823d33999	1954	return HAL_OK;
<>	149:156823d33999	1955	}
<>	149:156823d33999	1956	/**
<>	149:156823d33999	1957	* @brief DMA CRYP Input Data process complete callback.
<>	149:156823d33999	1958	* @param hdma: DMA handle
<>	149:156823d33999	1959	* @retval None
<>	149:156823d33999	1960	*/
<>	149:156823d33999	1961	static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	1962	{
<>	149:156823d33999	1963	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	1964
<>	149:156823d33999	1965	/* Disable the DMA transfer for input request */
<>	149:156823d33999	1966	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
<>	149:156823d33999	1967
<>	149:156823d33999	1968	/* Call input data transfer complete callback */
<>	149:156823d33999	1969	HAL_CRYP_InCpltCallback(hcryp);
<>	149:156823d33999	1970	}
<>	149:156823d33999	1971
<>	149:156823d33999	1972	/**
<>	149:156823d33999	1973	* @brief DMA CRYP Output Data process complete callback.
<>	149:156823d33999	1974	* @param hdma: DMA handle
<>	149:156823d33999	1975	* @retval None
<>	149:156823d33999	1976	*/
<>	149:156823d33999	1977	static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	1978	{
<>	149:156823d33999	1979	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	1980
<>	149:156823d33999	1981	/* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
<>	149:156823d33999	1982	in the DMACR register */
<>	149:156823d33999	1983	CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
<>	149:156823d33999	1984
<>	149:156823d33999	1985	/* Clear CCF Flag */
<>	149:156823d33999	1986	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	1987
<>	149:156823d33999	1988	/* Disable CRYP */
<>	149:156823d33999	1989	__HAL_CRYP_DISABLE(hcryp);
<>	149:156823d33999	1990
<>	149:156823d33999	1991	/* Change the CRYP state to ready */
<>	149:156823d33999	1992	hcryp->State = HAL_CRYP_STATE_READY;
<>	149:156823d33999	1993
<>	149:156823d33999	1994	/* Call output data transfer complete callback */
<>	149:156823d33999	1995	HAL_CRYP_OutCpltCallback(hcryp);
<>	149:156823d33999	1996	}
<>	149:156823d33999	1997
<>	149:156823d33999	1998	/**
<>	149:156823d33999	1999	* @brief DMA CRYP communication error callback.
<>	149:156823d33999	2000	* @param hdma: DMA handle
<>	149:156823d33999	2001	* @retval None
<>	149:156823d33999	2002	*/
<>	149:156823d33999	2003	static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
<>	149:156823d33999	2004	{
<>	149:156823d33999	2005	CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
<>	149:156823d33999	2006	hcryp->State= HAL_CRYP_STATE_ERROR;
<>	149:156823d33999	2007	HAL_CRYP_ErrorCallback(hcryp);
<>	149:156823d33999	2008	}
<>	149:156823d33999	2009
<>	149:156823d33999	2010	/**
<>	149:156823d33999	2011	* @brief Writes the Key in Key registers.
<>	149:156823d33999	2012	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2013	* the configuration information for CRYP module
<>	149:156823d33999	2014	* @param Key: Pointer to Key buffer
<>	149:156823d33999	2015	* @note Key must be written as little endian.
<>	149:156823d33999	2016	* If Key pointer points at address n,
<>	149:156823d33999	2017	* n[15:0] contains key[96:127],
<>	149:156823d33999	2018	* (n+4)[15:0] contains key[64:95],
<>	149:156823d33999	2019	* (n+8)[15:0] contains key[32:63] and
<>	149:156823d33999	2020	* (n+12)[15:0] contains key[0:31]
<>	149:156823d33999	2021	* @retval None
<>	149:156823d33999	2022	*/
<>	149:156823d33999	2023	static void CRYP_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key)
<>	149:156823d33999	2024	{
<>	149:156823d33999	2025	uint32_t keyaddr = (uint32_t)Key;
<>	149:156823d33999	2026
<>	149:156823d33999	2027	hcryp->Instance->KEYR3 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2028	keyaddr+=4;
<>	149:156823d33999	2029	hcryp->Instance->KEYR2 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2030	keyaddr+=4;
<>	149:156823d33999	2031	hcryp->Instance->KEYR1 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2032	keyaddr+=4;
<>	149:156823d33999	2033	hcryp->Instance->KEYR0 = __REV((uint32_t)(keyaddr));
<>	149:156823d33999	2034	}
<>	149:156823d33999	2035
<>	149:156823d33999	2036	/**
<>	149:156823d33999	2037	* @brief Writes the InitVector/InitCounter in IV registers.
<>	149:156823d33999	2038	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2039	* the configuration information for CRYP module
<>	149:156823d33999	2040	* @param InitVector: Pointer to InitVector/InitCounter buffer
<>	149:156823d33999	2041	* @note Init Vector must be written as little endian.
<>	149:156823d33999	2042	* If Init Vector pointer points at address n,
<>	149:156823d33999	2043	* n[15:0] contains Vector[96:127],
<>	149:156823d33999	2044	* (n+4)[15:0] contains Vector[64:95],
<>	149:156823d33999	2045	* (n+8)[15:0] contains Vector[32:63] and
<>	149:156823d33999	2046	* (n+12)[15:0] contains Vector[0:31]
<>	149:156823d33999	2047	* @retval None
<>	149:156823d33999	2048	*/
<>	149:156823d33999	2049	static void CRYP_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector)
<>	149:156823d33999	2050	{
<>	149:156823d33999	2051	uint32_t ivaddr = (uint32_t)InitVector;
<>	149:156823d33999	2052
<>	149:156823d33999	2053	hcryp->Instance->IVR3 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2054	ivaddr+=4;
<>	149:156823d33999	2055	hcryp->Instance->IVR2 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2056	ivaddr+=4;
<>	149:156823d33999	2057	hcryp->Instance->IVR1 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2058	ivaddr+=4;
<>	149:156823d33999	2059	hcryp->Instance->IVR0 = __REV((uint32_t)(ivaddr));
<>	149:156823d33999	2060	}
<>	149:156823d33999	2061
<>	149:156823d33999	2062	/**
<>	149:156823d33999	2063	* @brief Process Data: Writes Input data in polling mode and reads the output data
<>	149:156823d33999	2064	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2065	* the configuration information for CRYP module
<>	149:156823d33999	2066	* @param Input: Pointer to the Input buffer
<>	149:156823d33999	2067	* @param Ilength: Length of the Input buffer, must be a multiple of 16.
<>	149:156823d33999	2068	* @param Output: Pointer to the returned buffer
<>	149:156823d33999	2069	* @param Timeout: Specify Timeout value
<>	149:156823d33999	2070	* @retval None
<>	149:156823d33999	2071	*/
<>	149:156823d33999	2072	static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
<>	149:156823d33999	2073	{
<>	149:156823d33999	2074	uint32_t tickstart = 0;
<>	149:156823d33999	2075
<>	149:156823d33999	2076	uint32_t index = 0;
<>	149:156823d33999	2077	uint32_t inputaddr = (uint32_t)Input;
<>	149:156823d33999	2078	uint32_t outputaddr = (uint32_t)Output;
<>	149:156823d33999	2079
<>	149:156823d33999	2080	for(index=0; (index < Ilength); index += 16)
<>	149:156823d33999	2081	{
<>	149:156823d33999	2082	/* Write the Input block in the Data Input register */
<>	149:156823d33999	2083	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2084	inputaddr+=4;
<>	149:156823d33999	2085	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2086	inputaddr+=4;
<>	149:156823d33999	2087	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2088	inputaddr+=4;
<>	149:156823d33999	2089	hcryp->Instance->DINR = (uint32_t)(inputaddr);
<>	149:156823d33999	2090	inputaddr+=4;
<>	149:156823d33999	2091
<>	149:156823d33999	2092	/* Get timeout */
<>	149:156823d33999	2093	tickstart = HAL_GetTick();
<>	149:156823d33999	2094
<>	149:156823d33999	2095	while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
<>	149:156823d33999	2096	{
<>	149:156823d33999	2097	/* Check for the Timeout */
<>	149:156823d33999	2098	if(Timeout != HAL_MAX_DELAY)
<>	149:156823d33999	2099	{
<>	149:156823d33999	2100	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	149:156823d33999	2101	{
<>	149:156823d33999	2102	/* Change state */
<>	149:156823d33999	2103	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
<>	149:156823d33999	2104
<>	149:156823d33999	2105	/* Process Unlocked */
<>	149:156823d33999	2106	__HAL_UNLOCK(hcryp);
<>	149:156823d33999	2107
<>	149:156823d33999	2108	return HAL_TIMEOUT;
<>	149:156823d33999	2109	}
<>	149:156823d33999	2110	}
<>	149:156823d33999	2111	}
<>	149:156823d33999	2112	/* Clear CCF Flag */
<>	149:156823d33999	2113	__HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
<>	149:156823d33999	2114
<>	149:156823d33999	2115	/* Read the Output block from the Data Output Register */
<>	149:156823d33999	2116	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2117	outputaddr+=4;
<>	149:156823d33999	2118	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2119	outputaddr+=4;
<>	149:156823d33999	2120	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2121	outputaddr+=4;
<>	149:156823d33999	2122	(uint32_t)(outputaddr) = hcryp->Instance->DOUTR;
<>	149:156823d33999	2123	outputaddr+=4;
<>	149:156823d33999	2124	}
<>	149:156823d33999	2125	/* Return function status */
<>	149:156823d33999	2126	return HAL_OK;
<>	149:156823d33999	2127	}
<>	149:156823d33999	2128
<>	149:156823d33999	2129	/**
<>	149:156823d33999	2130	* @brief Set the DMA configuration and start the DMA transfer
<>	149:156823d33999	2131	* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
<>	149:156823d33999	2132	* the configuration information for CRYP module
<>	149:156823d33999	2133	* @param inputaddr: address of the Input buffer
<>	149:156823d33999	2134	* @param Size: Size of the Input buffer, must be a multiple of 16.
<>	149:156823d33999	2135	* @param outputaddr: address of the Output buffer
<>	149:156823d33999	2136	* @retval None
<>	149:156823d33999	2137	*/
<>	149:156823d33999	2138	static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
<>	149:156823d33999	2139	{
<>	149:156823d33999	2140	/* Set the CRYP DMA transfer complete callback */
<>	149:156823d33999	2141	hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
<>	149:156823d33999	2142	/* Set the DMA error callback */
<>	149:156823d33999	2143	hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
<>	149:156823d33999	2144
<>	149:156823d33999	2145	/* Set the CRYP DMA transfer complete callback */
<>	149:156823d33999	2146	hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
<>	149:156823d33999	2147	/* Set the DMA error callback */
<>	149:156823d33999	2148	hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
<>	149:156823d33999	2149
<>	149:156823d33999	2150	/* Enable the DMA In DMA Stream */
<>	149:156823d33999	2151	HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
<>	149:156823d33999	2152
<>	149:156823d33999	2153	/* Enable the DMA Out DMA Stream */
<>	149:156823d33999	2154	HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
<>	149:156823d33999	2155
<>	149:156823d33999	2156	/* Enable In and Out DMA requests */
<>	149:156823d33999	2157	SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN \| AES_CR_DMAOUTEN));
<>	149:156823d33999	2158
<>	149:156823d33999	2159	/* Enable CRYP */
<>	149:156823d33999	2160	__HAL_CRYP_ENABLE(hcryp);
<>	149:156823d33999	2161	}
<>	149:156823d33999	2162
<>	149:156823d33999	2163	/**
<>	149:156823d33999	2164	* @}
<>	149:156823d33999	2165	*/
<>	149:156823d33999	2166
<>	149:156823d33999	2167	#endif /* STM32L162xC \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L162xE \|\| STM32L162xDX*/
<>	149:156823d33999	2168
<>	149:156823d33999	2169	/**
<>	149:156823d33999	2170	* @}
<>	149:156823d33999	2171	*/
<>	149:156823d33999	2172
<>	149:156823d33999	2173	/**
<>	149:156823d33999	2174	* @}
<>	149:156823d33999	2175	*/
<>	149:156823d33999	2176
<>	149:156823d33999	2177	#endif /* HAL_CRYP_MODULE_ENABLED */
<>	149:156823d33999	2178
<>	149:156823d33999	2179	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/