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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
184:08ed48f1de7f
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_adc_ex.c
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @version V1.2.0
<> 149:156823d33999 6 * @date 01-July-2016
<> 149:156823d33999 7 * @brief This file provides firmware functions to manage the following
<> 149:156823d33999 8 * functionalities of the Analog to Digital Convertor (ADC)
<> 149:156823d33999 9 * peripheral:
<> 149:156823d33999 10 * + Operation functions
<> 149:156823d33999 11 * ++ Start, stop, get result of conversions of injected
<> 149:156823d33999 12 * group, using 2 possible modes: polling, interruption.
<> 149:156823d33999 13 * ++ Calibration (ADC automatic self-calibration)
<> 149:156823d33999 14 * + Control functions
<> 149:156823d33999 15 * ++ Channels configuration on injected group
<> 149:156823d33999 16 * Other functions (generic functions) are available in file
<> 149:156823d33999 17 * "stm32l1xx_hal_adc.c".
<> 149:156823d33999 18 *
<> 149:156823d33999 19 @verbatim
<> 149:156823d33999 20 [..]
<> 149:156823d33999 21 (@) Sections "ADC peripheral features" and "How to use this driver" are
<> 149:156823d33999 22 available in file of generic functions "stm32l1xx_hal_adc.c".
<> 149:156823d33999 23 [..]
<> 149:156823d33999 24 @endverbatim
<> 149:156823d33999 25 ******************************************************************************
<> 149:156823d33999 26 * @attention
<> 149:156823d33999 27 *
<> 149:156823d33999 28 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 149:156823d33999 29 *
<> 149:156823d33999 30 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 31 * are permitted provided that the following conditions are met:
<> 149:156823d33999 32 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 33 * this list of conditions and the following disclaimer.
<> 149:156823d33999 34 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 35 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 36 * and/or other materials provided with the distribution.
<> 149:156823d33999 37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 38 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 39 * without specific prior written permission.
<> 149:156823d33999 40 *
<> 149:156823d33999 41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 51 *
<> 149:156823d33999 52 ******************************************************************************
<> 149:156823d33999 53 */
<> 149:156823d33999 54
<> 149:156823d33999 55 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 56 #include "stm32l1xx_hal.h"
<> 149:156823d33999 57
<> 149:156823d33999 58 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 59 * @{
<> 149:156823d33999 60 */
<> 149:156823d33999 61
<> 149:156823d33999 62 /** @defgroup ADCEx ADCEx
<> 149:156823d33999 63 * @brief ADC Extension HAL module driver
<> 149:156823d33999 64 * @{
<> 149:156823d33999 65 */
<> 149:156823d33999 66
<> 149:156823d33999 67 #ifdef HAL_ADC_MODULE_ENABLED
<> 149:156823d33999 68
<> 149:156823d33999 69 /* Private typedef -----------------------------------------------------------*/
<> 149:156823d33999 70 /* Private define ------------------------------------------------------------*/
<> 149:156823d33999 71 /** @defgroup ADCEx_Private_Constants ADCEx Private Constants
<> 149:156823d33999 72 * @{
<> 149:156823d33999 73 */
<> 149:156823d33999 74
<> 149:156823d33999 75 /* ADC conversion cycles (unit: ADC clock cycles) */
<> 149:156823d33999 76 /* (selected sampling time + conversion time of 12 ADC clock cycles, with */
<> 149:156823d33999 77 /* resolution 12 bits) */
<> 149:156823d33999 78 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5 ((uint32_t) 16)
<> 149:156823d33999 79 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES ((uint32_t) 21)
<> 149:156823d33999 80 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES ((uint32_t) 28)
<> 149:156823d33999 81 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES ((uint32_t) 36)
<> 149:156823d33999 82 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES ((uint32_t) 60)
<> 149:156823d33999 83 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES ((uint32_t)108)
<> 149:156823d33999 84 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES ((uint32_t)204)
<> 149:156823d33999 85 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES ((uint32_t)396)
<> 149:156823d33999 86
<> 149:156823d33999 87 /* Delay for temperature sensor stabilization time. */
<> 149:156823d33999 88 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
<> 149:156823d33999 89 /* Unit: us */
<> 149:156823d33999 90 #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10)
<> 149:156823d33999 91
<> 149:156823d33999 92 /**
<> 149:156823d33999 93 * @}
<> 149:156823d33999 94 */
<> 149:156823d33999 95
<> 149:156823d33999 96 /* Private macro -------------------------------------------------------------*/
<> 149:156823d33999 97 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 98 /* Private function prototypes -----------------------------------------------*/
<> 149:156823d33999 99 /* Private functions ---------------------------------------------------------*/
<> 149:156823d33999 100
<> 149:156823d33999 101 /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
<> 149:156823d33999 102 * @{
<> 149:156823d33999 103 */
<> 149:156823d33999 104
<> 149:156823d33999 105 /** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
<> 149:156823d33999 106 * @brief ADC Extended Input and Output operation functions
<> 149:156823d33999 107 *
<> 149:156823d33999 108 @verbatim
<> 149:156823d33999 109 ===============================================================================
<> 149:156823d33999 110 ##### IO operation functions #####
<> 149:156823d33999 111 ===============================================================================
<> 149:156823d33999 112 [..] This section provides functions allowing to:
<> 149:156823d33999 113 (+) Start conversion of injected group.
<> 149:156823d33999 114 (+) Stop conversion of injected group.
<> 149:156823d33999 115 (+) Poll for conversion complete on injected group.
<> 149:156823d33999 116 (+) Get result of injected channel conversion.
<> 149:156823d33999 117 (+) Start conversion of injected group and enable interruptions.
<> 149:156823d33999 118 (+) Stop conversion of injected group and disable interruptions.
<> 149:156823d33999 119
<> 149:156823d33999 120 @endverbatim
<> 149:156823d33999 121 * @{
<> 149:156823d33999 122 */
<> 149:156823d33999 123
<> 149:156823d33999 124 /**
<> 149:156823d33999 125 * @brief Enables ADC, starts conversion of injected group.
<> 149:156823d33999 126 * Interruptions enabled in this function: None.
<> 149:156823d33999 127 * @param hadc: ADC handle
<> 149:156823d33999 128 * @retval HAL status
<> 149:156823d33999 129 */
<> 149:156823d33999 130 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
<> 149:156823d33999 131 {
<> 149:156823d33999 132 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 149:156823d33999 133
<> 149:156823d33999 134 /* Check the parameters */
<> 149:156823d33999 135 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 136
<> 149:156823d33999 137 /* Process locked */
<> 149:156823d33999 138 __HAL_LOCK(hadc);
<> 149:156823d33999 139
<> 149:156823d33999 140 /* Enable the ADC peripheral */
<> 149:156823d33999 141 tmp_hal_status = ADC_Enable(hadc);
<> 149:156823d33999 142
<> 149:156823d33999 143 /* Start conversion if ADC is effectively enabled */
<> 149:156823d33999 144 if (tmp_hal_status == HAL_OK)
<> 149:156823d33999 145 {
<> 149:156823d33999 146 /* Set ADC state */
<> 149:156823d33999 147 /* - Clear state bitfield related to injected group conversion results */
<> 149:156823d33999 148 /* - Set state bitfield related to injected operation */
<> 149:156823d33999 149 ADC_STATE_CLR_SET(hadc->State,
<> 149:156823d33999 150 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
<> 149:156823d33999 151 HAL_ADC_STATE_INJ_BUSY);
<> 149:156823d33999 152
<> 149:156823d33999 153 /* Check if a regular conversion is ongoing */
<> 149:156823d33999 154 /* Note: On this device, there is no ADC error code fields related to */
<> 149:156823d33999 155 /* conversions on group injected only. In case of conversion on */
<> 149:156823d33999 156 /* going on group regular, no error code is reset. */
<> 149:156823d33999 157 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
<> 149:156823d33999 158 {
<> 149:156823d33999 159 /* Reset ADC all error code fields */
<> 149:156823d33999 160 ADC_CLEAR_ERRORCODE(hadc);
<> 149:156823d33999 161 }
<> 149:156823d33999 162
<> 149:156823d33999 163 /* Process unlocked */
<> 149:156823d33999 164 /* Unlock before starting ADC conversions: in case of potential */
<> 149:156823d33999 165 /* interruption, to let the process to ADC IRQ Handler. */
<> 149:156823d33999 166 __HAL_UNLOCK(hadc);
<> 149:156823d33999 167
<> 149:156823d33999 168 /* Clear injected group conversion flag */
<> 149:156823d33999 169 /* (To ensure of no unknown state from potential previous ADC operations) */
<> 149:156823d33999 170 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
<> 149:156823d33999 171
<> 149:156823d33999 172 /* Enable conversion of injected group. */
<> 149:156823d33999 173 /* If software start has been selected, conversion starts immediately. */
<> 149:156823d33999 174 /* If external trigger has been selected, conversion will start at next */
<> 149:156823d33999 175 /* trigger event. */
<> 149:156823d33999 176 /* If automatic injected conversion is enabled, conversion will start */
<> 149:156823d33999 177 /* after next regular group conversion. */
<> 149:156823d33999 178 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
<> 149:156823d33999 179 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
<> 149:156823d33999 180 {
<> 149:156823d33999 181 /* Enable ADC software conversion for injected channels */
<> 149:156823d33999 182 SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
<> 149:156823d33999 183 }
<> 149:156823d33999 184 }
<> 149:156823d33999 185
<> 149:156823d33999 186 /* Return function status */
<> 149:156823d33999 187 return tmp_hal_status;
<> 149:156823d33999 188 }
<> 149:156823d33999 189
<> 149:156823d33999 190 /**
<> 149:156823d33999 191 * @brief Stop conversion of injected channels. Disable ADC peripheral if
<> 149:156823d33999 192 * no regular conversion is on going.
<> 149:156823d33999 193 * @note If ADC must be disabled and if conversion is on going on
<> 149:156823d33999 194 * regular group, function HAL_ADC_Stop must be used to stop both
<> 149:156823d33999 195 * injected and regular groups, and disable the ADC.
<> 149:156823d33999 196 * @note If injected group mode auto-injection is enabled,
<> 149:156823d33999 197 * function HAL_ADC_Stop must be used.
<> 149:156823d33999 198 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
<> 149:156823d33999 199 * @param hadc: ADC handle
<> 149:156823d33999 200 * @retval None
<> 149:156823d33999 201 */
<> 149:156823d33999 202 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
<> 149:156823d33999 203 {
<> 149:156823d33999 204 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 149:156823d33999 205
<> 149:156823d33999 206 /* Check the parameters */
<> 149:156823d33999 207 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 208
<> 149:156823d33999 209 /* Process locked */
<> 149:156823d33999 210 __HAL_LOCK(hadc);
<> 149:156823d33999 211
<> 149:156823d33999 212 /* Stop potential conversion and disable ADC peripheral */
<> 149:156823d33999 213 /* Conditioned to: */
<> 149:156823d33999 214 /* - No conversion on the other group (regular group) is intended to */
<> 149:156823d33999 215 /* continue (injected and regular groups stop conversion and ADC disable */
<> 149:156823d33999 216 /* are common) */
<> 149:156823d33999 217 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
<> 149:156823d33999 218 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
<> 149:156823d33999 219 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
<> 149:156823d33999 220 {
<> 149:156823d33999 221 /* Stop potential conversion on going, on regular and injected groups */
<> 149:156823d33999 222 /* Disable ADC peripheral */
<> 149:156823d33999 223 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
<> 149:156823d33999 224
<> 149:156823d33999 225 /* Check if ADC is effectively disabled */
<> 149:156823d33999 226 if (tmp_hal_status == HAL_OK)
<> 149:156823d33999 227 {
<> 149:156823d33999 228 /* Set ADC state */
<> 149:156823d33999 229 ADC_STATE_CLR_SET(hadc->State,
<> 149:156823d33999 230 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
<> 149:156823d33999 231 HAL_ADC_STATE_READY);
<> 149:156823d33999 232 }
<> 149:156823d33999 233 }
<> 149:156823d33999 234 else
<> 149:156823d33999 235 {
<> 149:156823d33999 236 /* Update ADC state machine to error */
<> 149:156823d33999 237 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 149:156823d33999 238
<> 149:156823d33999 239 tmp_hal_status = HAL_ERROR;
<> 149:156823d33999 240 }
<> 149:156823d33999 241
<> 149:156823d33999 242 /* Process unlocked */
<> 149:156823d33999 243 __HAL_UNLOCK(hadc);
<> 149:156823d33999 244
<> 149:156823d33999 245 /* Return function status */
<> 149:156823d33999 246 return tmp_hal_status;
<> 149:156823d33999 247 }
<> 149:156823d33999 248
<> 149:156823d33999 249 /**
<> 149:156823d33999 250 * @brief Wait for injected group conversion to be completed.
<> 149:156823d33999 251 * @param hadc: ADC handle
<> 149:156823d33999 252 * @param Timeout: Timeout value in millisecond.
<> 149:156823d33999 253 * @retval HAL status
<> 149:156823d33999 254 */
<> 149:156823d33999 255 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
<> 149:156823d33999 256 {
<> 149:156823d33999 257 uint32_t tickstart;
<> 149:156823d33999 258
<> 149:156823d33999 259 /* Variables for polling in case of scan mode enabled and polling for each */
<> 149:156823d33999 260 /* conversion. */
<> 149:156823d33999 261 /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU */
<> 149:156823d33999 262 /* cycles to compensate number of CPU cycles for processing of variable */
<> 149:156823d33999 263 /* "conversion_timeout_cpu_cycles_max" */
<> 149:156823d33999 264 uint32_t conversion_timeout_cpu_cycles = 28;
<> 149:156823d33999 265 uint32_t conversion_timeout_cpu_cycles_max = 0;
<> 149:156823d33999 266
<> 149:156823d33999 267 /* Check the parameters */
<> 149:156823d33999 268 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 269
<> 149:156823d33999 270 /* Get timeout */
<> 149:156823d33999 271 tickstart = HAL_GetTick();
<> 149:156823d33999 272
<> 149:156823d33999 273 /* Polling for end of conversion: differentiation if single/sequence */
<> 149:156823d33999 274 /* conversion. */
<> 149:156823d33999 275 /* For injected group, flag JEOC is set only at the end of the sequence, */
<> 149:156823d33999 276 /* not for each conversion within the sequence. */
<> 149:156823d33999 277 /* If setting "EOCSelection" is set to poll for each single conversion, */
<> 149:156823d33999 278 /* management of polling depends on setting of injected group sequencer: */
<> 149:156823d33999 279 /* - If single conversion for injected group (scan mode disabled or */
<> 149:156823d33999 280 /* InjectedNbrOfConversion ==1), flag JEOC is used to determine the */
<> 149:156823d33999 281 /* conversion completion. */
<> 149:156823d33999 282 /* - If sequence conversion for injected group (scan mode enabled and */
<> 149:156823d33999 283 /* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
<> 149:156823d33999 284 /* sequence. */
<> 149:156823d33999 285 /* To poll for each conversion, the maximum conversion time is computed */
<> 149:156823d33999 286 /* from ADC conversion time (selected sampling time + conversion time of */
<> 149:156823d33999 287 /* 12 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
<> 149:156823d33999 288 /* settings, conversion time range can vary from 8 to several thousands */
<> 149:156823d33999 289 /* of CPU cycles). */
<> 149:156823d33999 290
<> 149:156823d33999 291 /* Note: On STM32L1, setting "EOCSelection" is related to regular group */
<> 149:156823d33999 292 /* only, by hardware. For compatibility with other STM32 devices, */
<> 149:156823d33999 293 /* this setting is related also to injected group by software. */
<> 149:156823d33999 294 if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET) ||
<> 149:156823d33999 295 (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV) )
<> 149:156823d33999 296 {
<> 149:156823d33999 297 /* Wait until End of Conversion flag is raised */
<> 149:156823d33999 298 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
<> 149:156823d33999 299 {
<> 149:156823d33999 300 /* Check if timeout is disabled (set to infinite wait) */
<> 149:156823d33999 301 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 302 {
<> 149:156823d33999 303 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
<> 149:156823d33999 304 {
<> 149:156823d33999 305 /* Update ADC state machine to timeout */
<> 149:156823d33999 306 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
<> 149:156823d33999 307
<> 149:156823d33999 308 /* Process unlocked */
<> 149:156823d33999 309 __HAL_UNLOCK(hadc);
<> 149:156823d33999 310
<> 149:156823d33999 311 return HAL_TIMEOUT;
<> 149:156823d33999 312 }
<> 149:156823d33999 313 }
<> 149:156823d33999 314 }
<> 149:156823d33999 315 }
<> 149:156823d33999 316 else
<> 149:156823d33999 317 {
<> 149:156823d33999 318 /* Computation of CPU cycles corresponding to ADC conversion cycles. */
<> 149:156823d33999 319 /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
<> 149:156823d33999 320 /* channels. */
<> 149:156823d33999 321 conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
<> 149:156823d33999 322 conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
<> 149:156823d33999 323
<> 149:156823d33999 324 /* Poll with maximum conversion time */
<> 149:156823d33999 325 while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
<> 149:156823d33999 326 {
<> 149:156823d33999 327 /* Check if timeout is disabled (set to infinite wait) */
<> 149:156823d33999 328 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 329 {
<> 149:156823d33999 330 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
<> 149:156823d33999 331 {
<> 149:156823d33999 332 /* Update ADC state machine to timeout */
<> 149:156823d33999 333 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
<> 149:156823d33999 334
<> 149:156823d33999 335 /* Process unlocked */
<> 149:156823d33999 336 __HAL_UNLOCK(hadc);
<> 149:156823d33999 337
<> 149:156823d33999 338 return HAL_TIMEOUT;
<> 149:156823d33999 339 }
<> 149:156823d33999 340 }
<> 149:156823d33999 341 conversion_timeout_cpu_cycles ++;
<> 149:156823d33999 342 }
<> 149:156823d33999 343 }
<> 149:156823d33999 344
<> 149:156823d33999 345 /* Clear end of conversion flag of injected group if low power feature */
<> 149:156823d33999 346 /* "Auto Wait" is disabled, to not interfere with this feature until data */
<> 149:156823d33999 347 /* register is read using function HAL_ADCEx_InjectedGetValue(). */
<> 149:156823d33999 348 if (hadc->Init.LowPowerAutoWait == DISABLE)
<> 149:156823d33999 349 {
<> 149:156823d33999 350 /* Clear injected group conversion flag */
<> 149:156823d33999 351 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
<> 149:156823d33999 352 }
<> 149:156823d33999 353
<> 149:156823d33999 354 /* Update ADC state machine */
<> 149:156823d33999 355 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
<> 149:156823d33999 356
<> 149:156823d33999 357 /* Determine whether any further conversion upcoming on group injected */
<> 149:156823d33999 358 /* by external trigger, continuous mode or scan sequence on going. */
<> 149:156823d33999 359 /* Note: On STM32L1, there is no independent flag of end of sequence. */
<> 149:156823d33999 360 /* The test of scan sequence on going is done either with scan */
<> 149:156823d33999 361 /* sequence disabled or with end of conversion flag set to */
<> 149:156823d33999 362 /* of end of sequence. */
<> 149:156823d33999 363 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
<> 149:156823d33999 364 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
<> 149:156823d33999 365 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
<> 149:156823d33999 366 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
<> 149:156823d33999 367 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
<> 149:156823d33999 368 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
<> 149:156823d33999 369 {
<> 149:156823d33999 370 /* Set ADC state */
<> 149:156823d33999 371 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
<> 149:156823d33999 372
<> 149:156823d33999 373 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
<> 149:156823d33999 374 {
<> 149:156823d33999 375 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
<> 149:156823d33999 376 }
<> 149:156823d33999 377 }
<> 149:156823d33999 378
<> 149:156823d33999 379 /* Return ADC state */
<> 149:156823d33999 380 return HAL_OK;
<> 149:156823d33999 381 }
<> 149:156823d33999 382
<> 149:156823d33999 383 /**
<> 149:156823d33999 384 * @brief Enables ADC, starts conversion of injected group with interruption.
<> 149:156823d33999 385 * - JEOC (end of conversion of injected group)
<> 149:156823d33999 386 * Each of these interruptions has its dedicated callback function.
<> 149:156823d33999 387 * @param hadc: ADC handle
<> 149:156823d33999 388 * @retval HAL status.
<> 149:156823d33999 389 */
<> 149:156823d33999 390 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
<> 149:156823d33999 391 {
<> 149:156823d33999 392 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 149:156823d33999 393
<> 149:156823d33999 394 /* Check the parameters */
<> 149:156823d33999 395 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 396
<> 149:156823d33999 397 /* Process locked */
<> 149:156823d33999 398 __HAL_LOCK(hadc);
<> 149:156823d33999 399
<> 149:156823d33999 400 /* Enable the ADC peripheral */
<> 149:156823d33999 401 tmp_hal_status = ADC_Enable(hadc);
<> 149:156823d33999 402
<> 149:156823d33999 403 /* Start conversion if ADC is effectively enabled */
<> 149:156823d33999 404 if (tmp_hal_status == HAL_OK)
<> 149:156823d33999 405 {
<> 149:156823d33999 406 /* Set ADC state */
<> 149:156823d33999 407 /* - Clear state bitfield related to injected group conversion results */
<> 149:156823d33999 408 /* - Set state bitfield related to injected operation */
<> 149:156823d33999 409 ADC_STATE_CLR_SET(hadc->State,
<> 149:156823d33999 410 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
<> 149:156823d33999 411 HAL_ADC_STATE_INJ_BUSY);
<> 149:156823d33999 412
<> 149:156823d33999 413 /* Check if a regular conversion is ongoing */
<> 149:156823d33999 414 /* Note: On this device, there is no ADC error code fields related to */
<> 149:156823d33999 415 /* conversions on group injected only. In case of conversion on */
<> 149:156823d33999 416 /* going on group regular, no error code is reset. */
<> 149:156823d33999 417 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
<> 149:156823d33999 418 {
<> 149:156823d33999 419 /* Reset ADC all error code fields */
<> 149:156823d33999 420 ADC_CLEAR_ERRORCODE(hadc);
<> 149:156823d33999 421 }
<> 149:156823d33999 422
<> 149:156823d33999 423 /* Process unlocked */
<> 149:156823d33999 424 /* Unlock before starting ADC conversions: in case of potential */
<> 149:156823d33999 425 /* interruption, to let the process to ADC IRQ Handler. */
<> 149:156823d33999 426 __HAL_UNLOCK(hadc);
<> 149:156823d33999 427
<> 149:156823d33999 428 /* Clear injected group conversion flag */
<> 149:156823d33999 429 /* (To ensure of no unknown state from potential previous ADC operations) */
<> 149:156823d33999 430 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
<> 149:156823d33999 431
<> 149:156823d33999 432 /* Enable end of conversion interrupt for injected channels */
<> 149:156823d33999 433 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
<> 149:156823d33999 434
<> 149:156823d33999 435 /* Enable conversion of injected group. */
<> 149:156823d33999 436 /* If software start has been selected, conversion starts immediately. */
<> 149:156823d33999 437 /* If external trigger has been selected, conversion will start at next */
<> 149:156823d33999 438 /* trigger event. */
<> 149:156823d33999 439 /* If automatic injected conversion is enabled, conversion will start */
<> 149:156823d33999 440 /* after next regular group conversion. */
<> 149:156823d33999 441 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
<> 149:156823d33999 442 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
<> 149:156823d33999 443 {
<> 149:156823d33999 444 /* Enable ADC software conversion for injected channels */
<> 149:156823d33999 445 SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
<> 149:156823d33999 446 }
<> 149:156823d33999 447 }
<> 149:156823d33999 448
<> 149:156823d33999 449 /* Return function status */
<> 149:156823d33999 450 return tmp_hal_status;
<> 149:156823d33999 451 }
<> 149:156823d33999 452
<> 149:156823d33999 453 /**
<> 149:156823d33999 454 * @brief Stop conversion of injected channels, disable interruption of
<> 149:156823d33999 455 * end-of-conversion. Disable ADC peripheral if no regular conversion
<> 149:156823d33999 456 * is on going.
<> 149:156823d33999 457 * @note If ADC must be disabled and if conversion is on going on
<> 149:156823d33999 458 * regular group, function HAL_ADC_Stop must be used to stop both
<> 149:156823d33999 459 * injected and regular groups, and disable the ADC.
<> 149:156823d33999 460 * @note If injected group mode auto-injection is enabled,
<> 149:156823d33999 461 * function HAL_ADC_Stop must be used.
<> 149:156823d33999 462 * @param hadc: ADC handle
<> 149:156823d33999 463 * @retval None
<> 149:156823d33999 464 */
<> 149:156823d33999 465 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
<> 149:156823d33999 466 {
<> 149:156823d33999 467 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 149:156823d33999 468
<> 149:156823d33999 469 /* Check the parameters */
<> 149:156823d33999 470 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 471
<> 149:156823d33999 472 /* Process locked */
<> 149:156823d33999 473 __HAL_LOCK(hadc);
<> 149:156823d33999 474
<> 149:156823d33999 475 /* Stop potential conversion and disable ADC peripheral */
<> 149:156823d33999 476 /* Conditioned to: */
<> 149:156823d33999 477 /* - No conversion on the other group (regular group) is intended to */
<> 149:156823d33999 478 /* continue (injected and regular groups stop conversion and ADC disable */
<> 149:156823d33999 479 /* are common) */
<> 149:156823d33999 480 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
<> 149:156823d33999 481 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
<> 149:156823d33999 482 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
<> 149:156823d33999 483 {
<> 149:156823d33999 484 /* Stop potential conversion on going, on regular and injected groups */
<> 149:156823d33999 485 /* Disable ADC peripheral */
<> 149:156823d33999 486 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
<> 149:156823d33999 487
<> 149:156823d33999 488 /* Check if ADC is effectively disabled */
<> 149:156823d33999 489 if (tmp_hal_status == HAL_OK)
<> 149:156823d33999 490 {
<> 149:156823d33999 491 /* Disable ADC end of conversion interrupt for injected channels */
<> 149:156823d33999 492 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
<> 149:156823d33999 493
<> 149:156823d33999 494 /* Set ADC state */
<> 149:156823d33999 495 ADC_STATE_CLR_SET(hadc->State,
<> 149:156823d33999 496 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
<> 149:156823d33999 497 HAL_ADC_STATE_READY);
<> 149:156823d33999 498 }
<> 149:156823d33999 499 }
<> 149:156823d33999 500 else
<> 149:156823d33999 501 {
<> 149:156823d33999 502 /* Update ADC state machine to error */
<> 149:156823d33999 503 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 149:156823d33999 504
<> 149:156823d33999 505 tmp_hal_status = HAL_ERROR;
<> 149:156823d33999 506 }
<> 149:156823d33999 507
<> 149:156823d33999 508 /* Process unlocked */
<> 149:156823d33999 509 __HAL_UNLOCK(hadc);
<> 149:156823d33999 510
<> 149:156823d33999 511 /* Return function status */
<> 149:156823d33999 512 return tmp_hal_status;
<> 149:156823d33999 513 }
<> 149:156823d33999 514
<> 149:156823d33999 515 /**
<> 149:156823d33999 516 * @brief Get ADC injected group conversion result.
<> 149:156823d33999 517 * @note Reading register JDRx automatically clears ADC flag JEOC
<> 149:156823d33999 518 * (ADC group injected end of unitary conversion).
<> 149:156823d33999 519 * @note This function does not clear ADC flag JEOS
<> 149:156823d33999 520 * (ADC group injected end of sequence conversion)
<> 149:156823d33999 521 * Occurrence of flag JEOS rising:
<> 149:156823d33999 522 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
<> 149:156823d33999 523 * to flag JEOC.
<> 149:156823d33999 524 * - If sequencer is composed of several ranks, during the scan
<> 149:156823d33999 525 * sequence flag JEOC only is raised, at the end of the scan sequence
<> 149:156823d33999 526 * both flags JEOC and EOS are raised.
<> 149:156823d33999 527 * Flag JEOS must not be cleared by this function because
<> 149:156823d33999 528 * it would not be compliant with low power features
<> 149:156823d33999 529 * (feature low power auto-wait, not available on all STM32 families).
<> 149:156823d33999 530 * To clear this flag, either use function:
<> 149:156823d33999 531 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
<> 149:156823d33999 532 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
<> 149:156823d33999 533 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
<> 149:156823d33999 534 * @param hadc: ADC handle
<> 149:156823d33999 535 * @param InjectedRank: the converted ADC injected rank.
<> 149:156823d33999 536 * This parameter can be one of the following values:
<> 149:156823d33999 537 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
<> 149:156823d33999 538 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
<> 149:156823d33999 539 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
<> 149:156823d33999 540 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
<> 149:156823d33999 541 * @retval ADC group injected conversion data
<> 149:156823d33999 542 */
<> 149:156823d33999 543 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
<> 149:156823d33999 544 {
<> 149:156823d33999 545 uint32_t tmp_jdr = 0;
<> 149:156823d33999 546
<> 149:156823d33999 547 /* Check the parameters */
<> 149:156823d33999 548 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 549 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
<> 149:156823d33999 550
<> 149:156823d33999 551 /* Get ADC converted value */
<> 149:156823d33999 552 switch(InjectedRank)
<> 149:156823d33999 553 {
<> 149:156823d33999 554 case ADC_INJECTED_RANK_4:
<> 149:156823d33999 555 tmp_jdr = hadc->Instance->JDR4;
<> 149:156823d33999 556 break;
<> 149:156823d33999 557 case ADC_INJECTED_RANK_3:
<> 149:156823d33999 558 tmp_jdr = hadc->Instance->JDR3;
<> 149:156823d33999 559 break;
<> 149:156823d33999 560 case ADC_INJECTED_RANK_2:
<> 149:156823d33999 561 tmp_jdr = hadc->Instance->JDR2;
<> 149:156823d33999 562 break;
<> 149:156823d33999 563 case ADC_INJECTED_RANK_1:
<> 149:156823d33999 564 default:
<> 149:156823d33999 565 tmp_jdr = hadc->Instance->JDR1;
<> 149:156823d33999 566 break;
<> 149:156823d33999 567 }
<> 149:156823d33999 568
<> 149:156823d33999 569 /* Return ADC converted value */
<> 149:156823d33999 570 return tmp_jdr;
<> 149:156823d33999 571 }
<> 149:156823d33999 572
<> 149:156823d33999 573 /**
<> 149:156823d33999 574 * @brief Injected conversion complete callback in non blocking mode
<> 149:156823d33999 575 * @param hadc: ADC handle
<> 149:156823d33999 576 * @retval None
<> 149:156823d33999 577 */
<> 149:156823d33999 578 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
<> 149:156823d33999 579 {
<> 149:156823d33999 580 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 581 UNUSED(hadc);
<> 149:156823d33999 582
<> 149:156823d33999 583 /* NOTE : This function Should not be modified, when the callback is needed,
<> 149:156823d33999 584 the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
<> 149:156823d33999 585 */
<> 149:156823d33999 586 }
<> 149:156823d33999 587
<> 149:156823d33999 588 /**
<> 149:156823d33999 589 * @}
<> 149:156823d33999 590 */
<> 149:156823d33999 591
<> 149:156823d33999 592 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
<> 149:156823d33999 593 * @brief ADC Extended Peripheral Control functions
<> 149:156823d33999 594 *
<> 149:156823d33999 595 @verbatim
<> 149:156823d33999 596 ===============================================================================
<> 149:156823d33999 597 ##### Peripheral Control functions #####
<> 149:156823d33999 598 ===============================================================================
<> 149:156823d33999 599 [..] This section provides functions allowing to:
<> 149:156823d33999 600 (+) Configure channels on injected group
<> 149:156823d33999 601
<> 149:156823d33999 602 @endverbatim
<> 149:156823d33999 603 * @{
<> 149:156823d33999 604 */
<> 149:156823d33999 605
<> 149:156823d33999 606 /**
<> 149:156823d33999 607 * @brief Configures the ADC injected group and the selected channel to be
<> 149:156823d33999 608 * linked to the injected group.
<> 149:156823d33999 609 * @note Possibility to update parameters on the fly:
<> 149:156823d33999 610 * This function initializes injected group, following calls to this
<> 149:156823d33999 611 * function can be used to reconfigure some parameters of structure
<> 149:156823d33999 612 * "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
<> 149:156823d33999 613 * The setting of these parameters is conditioned to ADC state:
<> 149:156823d33999 614 * this function must be called when ADC is not under conversion.
<> 149:156823d33999 615 * @param hadc: ADC handle
<> 149:156823d33999 616 * @param sConfigInjected: Structure of ADC injected group and ADC channel for
<> 149:156823d33999 617 * injected group.
<> 149:156823d33999 618 * @retval None
<> 149:156823d33999 619 */
<> 149:156823d33999 620 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
<> 149:156823d33999 621 {
<> 149:156823d33999 622 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
<> 149:156823d33999 623 __IO uint32_t wait_loop_index = 0;
<> 149:156823d33999 624
<> 149:156823d33999 625 /* Check the parameters */
<> 149:156823d33999 626 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
<> 149:156823d33999 627 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
<> 149:156823d33999 628 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
<> 149:156823d33999 629 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
<> 149:156823d33999 630 assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
<> 149:156823d33999 631 assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
<> 149:156823d33999 632
<> 149:156823d33999 633 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
<> 149:156823d33999 634 {
<> 149:156823d33999 635 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
<> 149:156823d33999 636 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
<> 149:156823d33999 637 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
<> 149:156823d33999 638 }
<> 149:156823d33999 639
<> 149:156823d33999 640 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
<> 149:156823d33999 641 {
<> 149:156823d33999 642 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
<> 149:156823d33999 643 }
<> 149:156823d33999 644
<> 149:156823d33999 645 /* Process locked */
<> 149:156823d33999 646 __HAL_LOCK(hadc);
<> 149:156823d33999 647
<> 149:156823d33999 648 /* Configuration of injected group sequencer: */
<> 149:156823d33999 649 /* - if scan mode is disabled, injected channels sequence length is set to */
<> 149:156823d33999 650 /* 0x00: 1 channel converted (channel on regular rank 1) */
<> 149:156823d33999 651 /* Parameter "InjectedNbrOfConversion" is discarded. */
<> 149:156823d33999 652 /* Note: Scan mode is present by hardware on this device and, if */
<> 149:156823d33999 653 /* disabled, discards automatically nb of conversions. Anyway, nb of */
<> 149:156823d33999 654 /* conversions is forced to 0x00 for alignment over all STM32 devices. */
<> 149:156823d33999 655 /* - if scan mode is enabled, injected channels sequence length is set to */
<> 149:156823d33999 656 /* parameter ""InjectedNbrOfConversion". */
<> 149:156823d33999 657 if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
<> 149:156823d33999 658 {
<> 149:156823d33999 659 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
<> 149:156823d33999 660 {
<> 149:156823d33999 661 /* Clear the old SQx bits for all injected ranks */
<> 149:156823d33999 662 MODIFY_REG(hadc->Instance->JSQR ,
<> 149:156823d33999 663 ADC_JSQR_JL |
<> 149:156823d33999 664 ADC_JSQR_JSQ4 |
<> 149:156823d33999 665 ADC_JSQR_JSQ3 |
<> 149:156823d33999 666 ADC_JSQR_JSQ2 |
<> 149:156823d33999 667 ADC_JSQR_JSQ1 ,
<> 149:156823d33999 668 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
<> 149:156823d33999 669 ADC_INJECTED_RANK_1,
<> 149:156823d33999 670 0x01) );
<> 149:156823d33999 671 }
<> 149:156823d33999 672 /* If another injected rank than rank1 was intended to be set, and could */
<> 149:156823d33999 673 /* not due to ScanConvMode disabled, error is reported. */
<> 149:156823d33999 674 else
<> 149:156823d33999 675 {
<> 149:156823d33999 676 /* Update ADC state machine to error */
<> 149:156823d33999 677 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 149:156823d33999 678
<> 149:156823d33999 679 tmp_hal_status = HAL_ERROR;
<> 149:156823d33999 680 }
<> 149:156823d33999 681 }
<> 149:156823d33999 682 else
<> 149:156823d33999 683 {
<> 149:156823d33999 684 /* Since injected channels rank conv. order depends on total number of */
<> 149:156823d33999 685 /* injected conversions, selected rank must be below or equal to total */
<> 149:156823d33999 686 /* number of injected conversions to be updated. */
<> 149:156823d33999 687 if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
<> 149:156823d33999 688 {
<> 149:156823d33999 689 /* Clear the old SQx bits for the selected rank */
<> 149:156823d33999 690 /* Set the SQx bits for the selected rank */
<> 149:156823d33999 691 MODIFY_REG(hadc->Instance->JSQR ,
<> 149:156823d33999 692
<> 149:156823d33999 693 ADC_JSQR_JL |
<> 149:156823d33999 694 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
<> 149:156823d33999 695 sConfigInjected->InjectedRank,
<> 149:156823d33999 696 sConfigInjected->InjectedNbrOfConversion) ,
<> 149:156823d33999 697
<> 149:156823d33999 698 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
<> 149:156823d33999 699 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
<> 149:156823d33999 700 sConfigInjected->InjectedRank,
<> 149:156823d33999 701 sConfigInjected->InjectedNbrOfConversion) );
<> 149:156823d33999 702 }
<> 149:156823d33999 703 else
<> 149:156823d33999 704 {
<> 149:156823d33999 705 /* Clear the old SQx bits for the selected rank */
<> 149:156823d33999 706 MODIFY_REG(hadc->Instance->JSQR ,
<> 149:156823d33999 707
<> 149:156823d33999 708 ADC_JSQR_JL |
<> 149:156823d33999 709 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
<> 149:156823d33999 710 sConfigInjected->InjectedRank,
<> 149:156823d33999 711 sConfigInjected->InjectedNbrOfConversion) ,
<> 149:156823d33999 712
<> 149:156823d33999 713 0x00000000 );
<> 149:156823d33999 714 }
<> 149:156823d33999 715 }
<> 149:156823d33999 716
<> 149:156823d33999 717 /* Enable external trigger if trigger selection is different of software */
<> 149:156823d33999 718 /* start. */
<> 149:156823d33999 719 /* Note: This configuration keeps the hardware feature of parameter */
<> 149:156823d33999 720 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
<> 149:156823d33999 721 /* software start. */
<> 149:156823d33999 722
<> 149:156823d33999 723 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
<> 149:156823d33999 724 {
<> 149:156823d33999 725 MODIFY_REG(hadc->Instance->CR2 ,
<> 149:156823d33999 726 ADC_CR2_JEXTEN |
<> 149:156823d33999 727 ADC_CR2_JEXTSEL ,
<> 149:156823d33999 728 sConfigInjected->ExternalTrigInjecConv |
<> 149:156823d33999 729 sConfigInjected->ExternalTrigInjecConvEdge );
<> 149:156823d33999 730 }
<> 149:156823d33999 731 else
<> 149:156823d33999 732 {
<> 149:156823d33999 733 MODIFY_REG(hadc->Instance->CR2,
<> 149:156823d33999 734 ADC_CR2_JEXTEN |
<> 149:156823d33999 735 ADC_CR2_JEXTSEL ,
<> 149:156823d33999 736 0x00000000 );
<> 149:156823d33999 737 }
<> 149:156823d33999 738
<> 149:156823d33999 739 /* Configuration of injected group */
<> 149:156823d33999 740 /* Parameters update conditioned to ADC state: */
<> 149:156823d33999 741 /* Parameters that can be updated only when ADC is disabled: */
<> 149:156823d33999 742 /* - Automatic injected conversion */
<> 149:156823d33999 743 /* - Injected discontinuous mode */
<> 149:156823d33999 744 if ((ADC_IS_ENABLE(hadc) == RESET))
<> 149:156823d33999 745 {
<> 149:156823d33999 746 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO |
<> 149:156823d33999 747 ADC_CR1_JDISCEN );
<> 149:156823d33999 748
<> 149:156823d33999 749 /* Automatic injected conversion can be enabled if injected group */
<> 149:156823d33999 750 /* external triggers are disabled. */
<> 149:156823d33999 751 if (sConfigInjected->AutoInjectedConv == ENABLE)
<> 149:156823d33999 752 {
<> 149:156823d33999 753 if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
<> 149:156823d33999 754 {
<> 149:156823d33999 755 SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
<> 149:156823d33999 756 }
<> 149:156823d33999 757 else
<> 149:156823d33999 758 {
<> 149:156823d33999 759 /* Update ADC state machine to error */
<> 149:156823d33999 760 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 149:156823d33999 761
<> 149:156823d33999 762 tmp_hal_status = HAL_ERROR;
<> 149:156823d33999 763 }
<> 149:156823d33999 764 }
<> 149:156823d33999 765
<> 149:156823d33999 766 /* Injected discontinuous can be enabled only if auto-injected mode is */
<> 149:156823d33999 767 /* disabled. */
<> 149:156823d33999 768 if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
<> 149:156823d33999 769 {
<> 149:156823d33999 770 if (sConfigInjected->AutoInjectedConv == DISABLE)
<> 149:156823d33999 771 {
<> 149:156823d33999 772 SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
<> 149:156823d33999 773 }
<> 149:156823d33999 774 else
<> 149:156823d33999 775 {
<> 149:156823d33999 776 /* Update ADC state machine to error */
<> 149:156823d33999 777 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
<> 149:156823d33999 778
<> 149:156823d33999 779 tmp_hal_status = HAL_ERROR;
<> 149:156823d33999 780 }
<> 149:156823d33999 781 }
<> 149:156823d33999 782 }
<> 149:156823d33999 783
<> 149:156823d33999 784 /* Channel sampling time configuration */
<> 149:156823d33999 785 /* For InjectedChannels 0 to 9 */
<> 149:156823d33999 786 if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
<> 149:156823d33999 787 {
<> 149:156823d33999 788 MODIFY_REG(hadc->Instance->SMPR3,
<> 149:156823d33999 789 ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
<> 149:156823d33999 790 ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
<> 149:156823d33999 791 }
<> 149:156823d33999 792 /* For InjectedChannels 10 to 19 */
<> 149:156823d33999 793 else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
<> 149:156823d33999 794 {
<> 149:156823d33999 795 MODIFY_REG(hadc->Instance->SMPR2,
<> 149:156823d33999 796 ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
<> 149:156823d33999 797 ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
<> 149:156823d33999 798 }
<> 149:156823d33999 799 /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
<> 149:156823d33999 800 /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
<> 149:156823d33999 801 else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
<> 149:156823d33999 802 {
<> 149:156823d33999 803 MODIFY_REG(hadc->Instance->SMPR1,
<> 149:156823d33999 804 ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
<> 149:156823d33999 805 ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
<> 149:156823d33999 806 }
<> 149:156823d33999 807 /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
<> 149:156823d33999 808 else
<> 149:156823d33999 809 {
<> 149:156823d33999 810 ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
<> 149:156823d33999 811 }
<> 149:156823d33999 812
<> 149:156823d33999 813
<> 149:156823d33999 814 /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
<> 149:156823d33999 815 switch(sConfigInjected->InjectedRank)
<> 149:156823d33999 816 {
<> 149:156823d33999 817 case 1:
<> 149:156823d33999 818 /* Set injected channel 1 offset */
<> 149:156823d33999 819 MODIFY_REG(hadc->Instance->JOFR1,
<> 149:156823d33999 820 ADC_JOFR1_JOFFSET1,
<> 149:156823d33999 821 sConfigInjected->InjectedOffset);
<> 149:156823d33999 822 break;
<> 149:156823d33999 823 case 2:
<> 149:156823d33999 824 /* Set injected channel 2 offset */
<> 149:156823d33999 825 MODIFY_REG(hadc->Instance->JOFR2,
<> 149:156823d33999 826 ADC_JOFR2_JOFFSET2,
<> 149:156823d33999 827 sConfigInjected->InjectedOffset);
<> 149:156823d33999 828 break;
<> 149:156823d33999 829 case 3:
<> 149:156823d33999 830 /* Set injected channel 3 offset */
<> 149:156823d33999 831 MODIFY_REG(hadc->Instance->JOFR3,
<> 149:156823d33999 832 ADC_JOFR3_JOFFSET3,
<> 149:156823d33999 833 sConfigInjected->InjectedOffset);
<> 149:156823d33999 834 break;
<> 149:156823d33999 835 case 4:
<> 149:156823d33999 836 default:
<> 149:156823d33999 837 MODIFY_REG(hadc->Instance->JOFR4,
<> 149:156823d33999 838 ADC_JOFR4_JOFFSET4,
<> 149:156823d33999 839 sConfigInjected->InjectedOffset);
<> 149:156823d33999 840 break;
<> 149:156823d33999 841 }
<> 149:156823d33999 842
<> 149:156823d33999 843 /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
<> 149:156823d33999 844 /* and VREFINT measurement path. */
<> 149:156823d33999 845 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
<> 149:156823d33999 846 (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
<> 149:156823d33999 847 {
<> 149:156823d33999 848 SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
<> 149:156823d33999 849
<> 149:156823d33999 850 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
<> 149:156823d33999 851 {
<> 149:156823d33999 852 /* Delay for temperature sensor stabilization time */
<> 149:156823d33999 853 /* Compute number of CPU cycles to wait for */
<> 149:156823d33999 854 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
<> 149:156823d33999 855 while(wait_loop_index != 0)
<> 149:156823d33999 856 {
<> 149:156823d33999 857 wait_loop_index--;
<> 149:156823d33999 858 }
<> 149:156823d33999 859 }
<> 149:156823d33999 860 }
<> 149:156823d33999 861
<> 149:156823d33999 862 /* Process unlocked */
<> 149:156823d33999 863 __HAL_UNLOCK(hadc);
<> 149:156823d33999 864
<> 149:156823d33999 865 /* Return function status */
<> 149:156823d33999 866 return tmp_hal_status;
<> 149:156823d33999 867 }
<> 149:156823d33999 868
<> 149:156823d33999 869 /**
<> 149:156823d33999 870 * @}
<> 149:156823d33999 871 */
<> 149:156823d33999 872
<> 149:156823d33999 873 /**
<> 149:156823d33999 874 * @}
<> 149:156823d33999 875 */
<> 149:156823d33999 876
<> 149:156823d33999 877 #endif /* HAL_ADC_MODULE_ENABLED */
<> 149:156823d33999 878 /**
<> 149:156823d33999 879 * @}
<> 149:156823d33999 880 */
<> 149:156823d33999 881
<> 149:156823d33999 882 /**
<> 149:156823d33999 883 * @}
<> 149:156823d33999 884 */
<> 149:156823d33999 885
<> 149:156823d33999 886 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/