mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_uart_ex.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_uart_ex.h@144:ef7eb2e8f9f7
Child:
156:95d6b41a828b
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_uart_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.4.0
<> 144:ef7eb2e8f9f7 6 * @date 27-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of UART HAL Extension module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F0xx_HAL_UART_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F0xx_HAL_UART_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup UARTEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 59 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /**
<> 144:ef7eb2e8f9f7 64 * @brief UART wake up from stop mode parameters
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66 typedef struct
<> 144:ef7eb2e8f9f7 67 {
<> 144:ef7eb2e8f9f7 68 uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
<> 144:ef7eb2e8f9f7 69 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
<> 144:ef7eb2e8f9f7 70 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
<> 144:ef7eb2e8f9f7 71 be filled up. */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
<> 144:ef7eb2e8f9f7 74 This parameter can be a value of @ref UART_WakeUp_Address_Length */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint8_t Address; /*!< UART/USART node address (7-bit long max) */
<> 144:ef7eb2e8f9f7 77 } UART_WakeUpTypeDef;
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 /**
<> 144:ef7eb2e8f9f7 80 * @}
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 85 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
<> 144:ef7eb2e8f9f7 86 * @{
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /** @defgroup UARTEx_Word_Length UARTEx Word Length
<> 144:ef7eb2e8f9f7 90 * @{
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 93 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 94 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
<> 144:ef7eb2e8f9f7 95 #define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1)
<> 144:ef7eb2e8f9f7 96 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
<> 144:ef7eb2e8f9f7 97 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0)
<> 144:ef7eb2e8f9f7 98 #else
<> 144:ef7eb2e8f9f7 99 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
<> 144:ef7eb2e8f9f7 100 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 101 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 102 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 103 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
<> 144:ef7eb2e8f9f7 104 /**
<> 144:ef7eb2e8f9f7 105 * @}
<> 144:ef7eb2e8f9f7 106 */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 /** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
<> 144:ef7eb2e8f9f7 109 * @{
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 112 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 113 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
<> 144:ef7eb2e8f9f7 114 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /*!< Auto Baud rate detection on start bit */
<> 144:ef7eb2e8f9f7 115 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */
<> 144:ef7eb2e8f9f7 116 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /*!< Auto Baud rate detection on 0x7F frame detection */
<> 144:ef7eb2e8f9f7 117 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /*!< Auto Baud rate detection on 0x55 frame detection */
<> 144:ef7eb2e8f9f7 118 #else
<> 144:ef7eb2e8f9f7 119 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /*!< Auto Baud rate detection on start bit */
<> 144:ef7eb2e8f9f7 120 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */
<> 144:ef7eb2e8f9f7 121 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 122 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 123 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
<> 144:ef7eb2e8f9f7 124 /**
<> 144:ef7eb2e8f9f7 125 * @}
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 129 /** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
<> 144:ef7eb2e8f9f7 130 * @{
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132 #define UART_LIN_DISABLE ((uint32_t)0x00000000) /*!< Local Interconnect Network disable */
<> 144:ef7eb2e8f9f7 133 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /*!< Local Interconnect Network enable */
<> 144:ef7eb2e8f9f7 134 /**
<> 144:ef7eb2e8f9f7 135 * @}
<> 144:ef7eb2e8f9f7 136 */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
<> 144:ef7eb2e8f9f7 139 * @{
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) /*!< LIN 10-bit break detection length */
<> 144:ef7eb2e8f9f7 142 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /*!< LIN 11-bit break detection length */
<> 144:ef7eb2e8f9f7 143 /**
<> 144:ef7eb2e8f9f7 144 * @}
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /** @defgroup UART_Flags UARTEx Status Flags
<> 144:ef7eb2e8f9f7 149 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 150 * - 0xXXXX : Flag mask in the ISR register
<> 144:ef7eb2e8f9f7 151 * @{
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 154 #define UART_FLAG_REACK ((uint32_t)0x00400000)
<> 144:ef7eb2e8f9f7 155 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 156 #define UART_FLAG_TEACK ((uint32_t)0x00200000)
<> 144:ef7eb2e8f9f7 157 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 158 #define UART_FLAG_WUF ((uint32_t)0x00100000)
<> 144:ef7eb2e8f9f7 159 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 160 #define UART_FLAG_RWU ((uint32_t)0x00080000)
<> 144:ef7eb2e8f9f7 161 #define UART_FLAG_SBKF ((uint32_t)0x00040000)
<> 144:ef7eb2e8f9f7 162 #define UART_FLAG_CMF ((uint32_t)0x00020000)
<> 144:ef7eb2e8f9f7 163 #define UART_FLAG_BUSY ((uint32_t)0x00010000)
<> 144:ef7eb2e8f9f7 164 #define UART_FLAG_ABRF ((uint32_t)0x00008000)
<> 144:ef7eb2e8f9f7 165 #define UART_FLAG_ABRE ((uint32_t)0x00004000)
<> 144:ef7eb2e8f9f7 166 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 167 #define UART_FLAG_EOBF ((uint32_t)0x00001000)
<> 144:ef7eb2e8f9f7 168 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 169 #define UART_FLAG_RTOF ((uint32_t)0x00000800)
<> 144:ef7eb2e8f9f7 170 #define UART_FLAG_CTS ((uint32_t)0x00000400)
<> 144:ef7eb2e8f9f7 171 #define UART_FLAG_CTSIF ((uint32_t)0x00000200)
<> 144:ef7eb2e8f9f7 172 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 173 #define UART_FLAG_LBDF ((uint32_t)0x00000100)
<> 144:ef7eb2e8f9f7 174 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 175 #define UART_FLAG_TXE ((uint32_t)0x00000080)
<> 144:ef7eb2e8f9f7 176 #define UART_FLAG_TC ((uint32_t)0x00000040)
<> 144:ef7eb2e8f9f7 177 #define UART_FLAG_RXNE ((uint32_t)0x00000020)
<> 144:ef7eb2e8f9f7 178 #define UART_FLAG_IDLE ((uint32_t)0x00000010)
<> 144:ef7eb2e8f9f7 179 #define UART_FLAG_ORE ((uint32_t)0x00000008)
<> 144:ef7eb2e8f9f7 180 #define UART_FLAG_NE ((uint32_t)0x00000004)
<> 144:ef7eb2e8f9f7 181 #define UART_FLAG_FE ((uint32_t)0x00000002)
<> 144:ef7eb2e8f9f7 182 #define UART_FLAG_PE ((uint32_t)0x00000001)
<> 144:ef7eb2e8f9f7 183 /**
<> 144:ef7eb2e8f9f7 184 * @}
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
<> 144:ef7eb2e8f9f7 188 * Elements values convention: 0000ZZZZZ0XXYYYYYb
<> 144:ef7eb2e8f9f7 189 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 190 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 191 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 192 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 193 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 194 * - ZZZZZ : Flag position in the ISR register(5bits)
<> 144:ef7eb2e8f9f7 195 * @{
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197 #define UART_IT_PE ((uint16_t)0x0028)
<> 144:ef7eb2e8f9f7 198 #define UART_IT_TXE ((uint16_t)0x0727)
<> 144:ef7eb2e8f9f7 199 #define UART_IT_TC ((uint16_t)0x0626)
<> 144:ef7eb2e8f9f7 200 #define UART_IT_RXNE ((uint16_t)0x0525)
<> 144:ef7eb2e8f9f7 201 #define UART_IT_IDLE ((uint16_t)0x0424)
<> 144:ef7eb2e8f9f7 202 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 203 #define UART_IT_LBD ((uint16_t)0x0846)
<> 144:ef7eb2e8f9f7 204 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 205 #define UART_IT_CTS ((uint16_t)0x096A)
<> 144:ef7eb2e8f9f7 206 #define UART_IT_CM ((uint16_t)0x112E)
<> 144:ef7eb2e8f9f7 207 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 208 #define UART_IT_WUF ((uint16_t)0x1476)
<> 144:ef7eb2e8f9f7 209 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 210 /**
<> 144:ef7eb2e8f9f7 211 * @}
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
<> 144:ef7eb2e8f9f7 216 * @{
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
<> 144:ef7eb2e8f9f7 219 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
<> 144:ef7eb2e8f9f7 220 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
<> 144:ef7eb2e8f9f7 221 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
<> 144:ef7eb2e8f9f7 222 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
<> 144:ef7eb2e8f9f7 223 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
<> 144:ef7eb2e8f9f7 224 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 225 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag (not available on F030xx devices)*/
<> 144:ef7eb2e8f9f7 226 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 227 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
<> 144:ef7eb2e8f9f7 228 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
<> 144:ef7eb2e8f9f7 229 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 230 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
<> 144:ef7eb2e8f9f7 231 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 232 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
<> 144:ef7eb2e8f9f7 233 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 234 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
<> 144:ef7eb2e8f9f7 235 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 236 /**
<> 144:ef7eb2e8f9f7 237 * @}
<> 144:ef7eb2e8f9f7 238 */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /** @defgroup UART_Request_Parameters UARTEx Request Parameters
<> 144:ef7eb2e8f9f7 241 * @{
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
<> 144:ef7eb2e8f9f7 244 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
<> 144:ef7eb2e8f9f7 245 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
<> 144:ef7eb2e8f9f7 246 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
<> 144:ef7eb2e8f9f7 247 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 248 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
<> 144:ef7eb2e8f9f7 249 #else
<> 144:ef7eb2e8f9f7 250 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @}
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 256 /** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
<> 144:ef7eb2e8f9f7 257 * @{
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000) /*!< UART stop mode disable */
<> 144:ef7eb2e8f9f7 260 #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /*!< UART stop mode enable */
<> 144:ef7eb2e8f9f7 261 /**
<> 144:ef7eb2e8f9f7 262 * @}
<> 144:ef7eb2e8f9f7 263 */
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
<> 144:ef7eb2e8f9f7 266 * @{
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268 #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x00000000) /*!< UART wake-up on address */
<> 144:ef7eb2e8f9f7 269 #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /*!< UART wake-up on start bit */
<> 144:ef7eb2e8f9f7 270 #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /*!< UART wake-up on receive data register not empty */
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @}
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /**
<> 144:ef7eb2e8f9f7 277 * @}
<> 144:ef7eb2e8f9f7 278 */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* Exported macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 281 /** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
<> 144:ef7eb2e8f9f7 282 * @{
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /** @brief Flush the UART Data registers.
<> 144:ef7eb2e8f9f7 286 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 287 * @retval None
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289 #if !defined(STM32F030x6) && !defined(STM32F030x8)
<> 144:ef7eb2e8f9f7 290 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
<> 144:ef7eb2e8f9f7 291 do{ \
<> 144:ef7eb2e8f9f7 292 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 293 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 294 } while(0)
<> 144:ef7eb2e8f9f7 295 #else
<> 144:ef7eb2e8f9f7 296 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
<> 144:ef7eb2e8f9f7 297 do{ \
<> 144:ef7eb2e8f9f7 298 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 299 } while(0)
<> 144:ef7eb2e8f9f7 300 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @}
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 307 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros
<> 144:ef7eb2e8f9f7 308 * @{
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /** @brief Report the UART clock source.
<> 144:ef7eb2e8f9f7 312 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 313 * @param __CLOCKSOURCE__: output variable.
<> 144:ef7eb2e8f9f7 314 * @retval UART clocking source, written in __CLOCKSOURCE__.
<> 144:ef7eb2e8f9f7 315 */
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
<> 144:ef7eb2e8f9f7 319 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 320 do { \
<> 144:ef7eb2e8f9f7 321 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 322 { \
<> 144:ef7eb2e8f9f7 323 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 325 break; \
<> 144:ef7eb2e8f9f7 326 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 328 break; \
<> 144:ef7eb2e8f9f7 329 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 331 break; \
<> 144:ef7eb2e8f9f7 332 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 334 break; \
<> 144:ef7eb2e8f9f7 335 default: \
<> 144:ef7eb2e8f9f7 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 337 break; \
<> 144:ef7eb2e8f9f7 338 } \
<> 144:ef7eb2e8f9f7 339 } while(0)
<> 144:ef7eb2e8f9f7 340 #elif defined (STM32F030x8) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 341 defined (STM32F042x6) || defined (STM32F048xx) || \
<> 144:ef7eb2e8f9f7 342 defined (STM32F051x8) || defined (STM32F058xx)
<> 144:ef7eb2e8f9f7 343 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 344 do { \
<> 144:ef7eb2e8f9f7 345 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 346 { \
<> 144:ef7eb2e8f9f7 347 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 348 { \
<> 144:ef7eb2e8f9f7 349 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 350 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 351 break; \
<> 144:ef7eb2e8f9f7 352 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 353 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 354 break; \
<> 144:ef7eb2e8f9f7 355 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 356 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 357 break; \
<> 144:ef7eb2e8f9f7 358 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 359 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 360 break; \
<> 144:ef7eb2e8f9f7 361 default: \
<> 144:ef7eb2e8f9f7 362 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 363 break; \
<> 144:ef7eb2e8f9f7 364 } \
<> 144:ef7eb2e8f9f7 365 } \
<> 144:ef7eb2e8f9f7 366 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 367 { \
<> 144:ef7eb2e8f9f7 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 369 } \
<> 144:ef7eb2e8f9f7 370 else \
<> 144:ef7eb2e8f9f7 371 { \
<> 144:ef7eb2e8f9f7 372 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 373 } \
<> 144:ef7eb2e8f9f7 374 } while(0)
<> 144:ef7eb2e8f9f7 375 #elif defined(STM32F070xB)
<> 144:ef7eb2e8f9f7 376 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 377 do { \
<> 144:ef7eb2e8f9f7 378 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 379 { \
<> 144:ef7eb2e8f9f7 380 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 381 { \
<> 144:ef7eb2e8f9f7 382 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 383 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 384 break; \
<> 144:ef7eb2e8f9f7 385 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 387 break; \
<> 144:ef7eb2e8f9f7 388 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 390 break; \
<> 144:ef7eb2e8f9f7 391 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 393 break; \
<> 144:ef7eb2e8f9f7 394 default: \
<> 144:ef7eb2e8f9f7 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 396 break; \
<> 144:ef7eb2e8f9f7 397 } \
<> 144:ef7eb2e8f9f7 398 } \
<> 144:ef7eb2e8f9f7 399 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 400 { \
<> 144:ef7eb2e8f9f7 401 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 402 } \
<> 144:ef7eb2e8f9f7 403 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 404 { \
<> 144:ef7eb2e8f9f7 405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 406 } \
<> 144:ef7eb2e8f9f7 407 else if((__HANDLE__)->Instance == USART4) \
<> 144:ef7eb2e8f9f7 408 { \
<> 144:ef7eb2e8f9f7 409 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 410 } \
<> 144:ef7eb2e8f9f7 411 else \
<> 144:ef7eb2e8f9f7 412 { \
<> 144:ef7eb2e8f9f7 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 414 } \
<> 144:ef7eb2e8f9f7 415 } while(0)
<> 144:ef7eb2e8f9f7 416 #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
<> 144:ef7eb2e8f9f7 417 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 418 do { \
<> 144:ef7eb2e8f9f7 419 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 420 { \
<> 144:ef7eb2e8f9f7 421 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 422 { \
<> 144:ef7eb2e8f9f7 423 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 424 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 425 break; \
<> 144:ef7eb2e8f9f7 426 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 427 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 428 break; \
<> 144:ef7eb2e8f9f7 429 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 430 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 431 break; \
<> 144:ef7eb2e8f9f7 432 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 433 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 434 break; \
<> 144:ef7eb2e8f9f7 435 default: \
<> 144:ef7eb2e8f9f7 436 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 437 break; \
<> 144:ef7eb2e8f9f7 438 } \
<> 144:ef7eb2e8f9f7 439 } \
<> 144:ef7eb2e8f9f7 440 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 441 { \
<> 144:ef7eb2e8f9f7 442 switch(__HAL_RCC_GET_USART2_SOURCE()) \
<> 144:ef7eb2e8f9f7 443 { \
<> 144:ef7eb2e8f9f7 444 case RCC_USART2CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 445 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 446 break; \
<> 144:ef7eb2e8f9f7 447 case RCC_USART2CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 448 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 449 break; \
<> 144:ef7eb2e8f9f7 450 case RCC_USART2CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 451 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 452 break; \
<> 144:ef7eb2e8f9f7 453 case RCC_USART2CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 454 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 455 break; \
<> 144:ef7eb2e8f9f7 456 default: \
<> 144:ef7eb2e8f9f7 457 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 458 break; \
<> 144:ef7eb2e8f9f7 459 } \
<> 144:ef7eb2e8f9f7 460 } \
<> 144:ef7eb2e8f9f7 461 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 462 { \
<> 144:ef7eb2e8f9f7 463 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 464 } \
<> 144:ef7eb2e8f9f7 465 else if((__HANDLE__)->Instance == USART4) \
<> 144:ef7eb2e8f9f7 466 { \
<> 144:ef7eb2e8f9f7 467 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 468 } \
<> 144:ef7eb2e8f9f7 469 else \
<> 144:ef7eb2e8f9f7 470 { \
<> 144:ef7eb2e8f9f7 471 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 472 } \
<> 144:ef7eb2e8f9f7 473 } while(0)
<> 144:ef7eb2e8f9f7 474 #elif defined(STM32F091xC) || defined (STM32F098xx)
<> 144:ef7eb2e8f9f7 475 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 476 do { \
<> 144:ef7eb2e8f9f7 477 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 478 { \
<> 144:ef7eb2e8f9f7 479 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 480 { \
<> 144:ef7eb2e8f9f7 481 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 483 break; \
<> 144:ef7eb2e8f9f7 484 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 485 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 486 break; \
<> 144:ef7eb2e8f9f7 487 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 488 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 489 break; \
<> 144:ef7eb2e8f9f7 490 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 492 break; \
<> 144:ef7eb2e8f9f7 493 default: \
<> 144:ef7eb2e8f9f7 494 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 495 break; \
<> 144:ef7eb2e8f9f7 496 } \
<> 144:ef7eb2e8f9f7 497 } \
<> 144:ef7eb2e8f9f7 498 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 499 { \
<> 144:ef7eb2e8f9f7 500 switch(__HAL_RCC_GET_USART2_SOURCE()) \
<> 144:ef7eb2e8f9f7 501 { \
<> 144:ef7eb2e8f9f7 502 case RCC_USART2CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 503 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 504 break; \
<> 144:ef7eb2e8f9f7 505 case RCC_USART2CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 506 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 507 break; \
<> 144:ef7eb2e8f9f7 508 case RCC_USART2CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 509 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 510 break; \
<> 144:ef7eb2e8f9f7 511 case RCC_USART2CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 512 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 513 break; \
<> 144:ef7eb2e8f9f7 514 default: \
<> 144:ef7eb2e8f9f7 515 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 516 break; \
<> 144:ef7eb2e8f9f7 517 } \
<> 144:ef7eb2e8f9f7 518 } \
<> 144:ef7eb2e8f9f7 519 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 520 { \
<> 144:ef7eb2e8f9f7 521 switch(__HAL_RCC_GET_USART3_SOURCE()) \
<> 144:ef7eb2e8f9f7 522 { \
<> 144:ef7eb2e8f9f7 523 case RCC_USART3CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 524 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 525 break; \
<> 144:ef7eb2e8f9f7 526 case RCC_USART3CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 527 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 528 break; \
<> 144:ef7eb2e8f9f7 529 case RCC_USART3CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 530 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 531 break; \
<> 144:ef7eb2e8f9f7 532 case RCC_USART3CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 533 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 534 break; \
<> 144:ef7eb2e8f9f7 535 default: \
<> 144:ef7eb2e8f9f7 536 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 537 break; \
<> 144:ef7eb2e8f9f7 538 } \
<> 144:ef7eb2e8f9f7 539 } \
<> 144:ef7eb2e8f9f7 540 else if((__HANDLE__)->Instance == USART4) \
<> 144:ef7eb2e8f9f7 541 { \
<> 144:ef7eb2e8f9f7 542 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 543 } \
<> 144:ef7eb2e8f9f7 544 else if((__HANDLE__)->Instance == USART5) \
<> 144:ef7eb2e8f9f7 545 { \
<> 144:ef7eb2e8f9f7 546 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 547 } \
<> 144:ef7eb2e8f9f7 548 else if((__HANDLE__)->Instance == USART6) \
<> 144:ef7eb2e8f9f7 549 { \
<> 144:ef7eb2e8f9f7 550 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 551 } \
<> 144:ef7eb2e8f9f7 552 else if((__HANDLE__)->Instance == USART7) \
<> 144:ef7eb2e8f9f7 553 { \
<> 144:ef7eb2e8f9f7 554 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 555 } \
<> 144:ef7eb2e8f9f7 556 else if((__HANDLE__)->Instance == USART8) \
<> 144:ef7eb2e8f9f7 557 { \
<> 144:ef7eb2e8f9f7 558 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 559 } \
<> 144:ef7eb2e8f9f7 560 else \
<> 144:ef7eb2e8f9f7 561 { \
<> 144:ef7eb2e8f9f7 562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 563 } \
<> 144:ef7eb2e8f9f7 564 } while(0)
<> 144:ef7eb2e8f9f7 565 #elif defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 566 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 567 do { \
<> 144:ef7eb2e8f9f7 568 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 569 { \
<> 144:ef7eb2e8f9f7 570 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 571 { \
<> 144:ef7eb2e8f9f7 572 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 573 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 574 break; \
<> 144:ef7eb2e8f9f7 575 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 576 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 577 break; \
<> 144:ef7eb2e8f9f7 578 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 579 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 580 break; \
<> 144:ef7eb2e8f9f7 581 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 582 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 583 break; \
<> 144:ef7eb2e8f9f7 584 default: \
<> 144:ef7eb2e8f9f7 585 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 586 break; \
<> 144:ef7eb2e8f9f7 587 } \
<> 144:ef7eb2e8f9f7 588 } \
<> 144:ef7eb2e8f9f7 589 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 590 { \
<> 144:ef7eb2e8f9f7 591 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 592 } \
<> 144:ef7eb2e8f9f7 593 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 594 { \
<> 144:ef7eb2e8f9f7 595 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 596 } \
<> 144:ef7eb2e8f9f7 597 else if((__HANDLE__)->Instance == USART4) \
<> 144:ef7eb2e8f9f7 598 { \
<> 144:ef7eb2e8f9f7 599 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 600 } \
<> 144:ef7eb2e8f9f7 601 else if((__HANDLE__)->Instance == USART5) \
<> 144:ef7eb2e8f9f7 602 { \
<> 144:ef7eb2e8f9f7 603 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 604 } \
<> 144:ef7eb2e8f9f7 605 else if((__HANDLE__)->Instance == USART6) \
<> 144:ef7eb2e8f9f7 606 { \
<> 144:ef7eb2e8f9f7 607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 608 } \
<> 144:ef7eb2e8f9f7 609 else \
<> 144:ef7eb2e8f9f7 610 { \
<> 144:ef7eb2e8f9f7 611 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 612 } \
<> 144:ef7eb2e8f9f7 613 } while(0)
<> 144:ef7eb2e8f9f7 614
<> 144:ef7eb2e8f9f7 615 #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */
<> 144:ef7eb2e8f9f7 616
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /** @brief Compute the UART mask to apply to retrieve the received data
<> 144:ef7eb2e8f9f7 619 * according to the word length and to the parity bits activation.
<> 144:ef7eb2e8f9f7 620 * @note If PCE = 1, the parity bit is not included in the data extracted
<> 144:ef7eb2e8f9f7 621 * by the reception API().
<> 144:ef7eb2e8f9f7 622 * This masking operation is not carried out in the case of
<> 144:ef7eb2e8f9f7 623 * DMA transfers.
<> 144:ef7eb2e8f9f7 624 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 625 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
<> 144:ef7eb2e8f9f7 626 */
<> 144:ef7eb2e8f9f7 627 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 628 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 629 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
<> 144:ef7eb2e8f9f7 630 #define UART_MASK_COMPUTATION(__HANDLE__) \
<> 144:ef7eb2e8f9f7 631 do { \
<> 144:ef7eb2e8f9f7 632 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
<> 144:ef7eb2e8f9f7 633 { \
<> 144:ef7eb2e8f9f7 634 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 635 { \
<> 144:ef7eb2e8f9f7 636 (__HANDLE__)->Mask = 0x01FF ; \
<> 144:ef7eb2e8f9f7 637 } \
<> 144:ef7eb2e8f9f7 638 else \
<> 144:ef7eb2e8f9f7 639 { \
<> 144:ef7eb2e8f9f7 640 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 641 } \
<> 144:ef7eb2e8f9f7 642 } \
<> 144:ef7eb2e8f9f7 643 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
<> 144:ef7eb2e8f9f7 644 { \
<> 144:ef7eb2e8f9f7 645 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 646 { \
<> 144:ef7eb2e8f9f7 647 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 648 } \
<> 144:ef7eb2e8f9f7 649 else \
<> 144:ef7eb2e8f9f7 650 { \
<> 144:ef7eb2e8f9f7 651 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 652 } \
<> 144:ef7eb2e8f9f7 653 } \
<> 144:ef7eb2e8f9f7 654 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
<> 144:ef7eb2e8f9f7 655 { \
<> 144:ef7eb2e8f9f7 656 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 657 { \
<> 144:ef7eb2e8f9f7 658 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 659 } \
<> 144:ef7eb2e8f9f7 660 else \
<> 144:ef7eb2e8f9f7 661 { \
<> 144:ef7eb2e8f9f7 662 (__HANDLE__)->Mask = 0x003F ; \
<> 144:ef7eb2e8f9f7 663 } \
<> 144:ef7eb2e8f9f7 664 } \
<> 144:ef7eb2e8f9f7 665 } while(0)
<> 144:ef7eb2e8f9f7 666 #else
<> 144:ef7eb2e8f9f7 667 #define UART_MASK_COMPUTATION(__HANDLE__) \
<> 144:ef7eb2e8f9f7 668 do { \
<> 144:ef7eb2e8f9f7 669 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
<> 144:ef7eb2e8f9f7 670 { \
<> 144:ef7eb2e8f9f7 671 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 672 { \
<> 144:ef7eb2e8f9f7 673 (__HANDLE__)->Mask = 0x01FF ; \
<> 144:ef7eb2e8f9f7 674 } \
<> 144:ef7eb2e8f9f7 675 else \
<> 144:ef7eb2e8f9f7 676 { \
<> 144:ef7eb2e8f9f7 677 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 678 } \
<> 144:ef7eb2e8f9f7 679 } \
<> 144:ef7eb2e8f9f7 680 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
<> 144:ef7eb2e8f9f7 681 { \
<> 144:ef7eb2e8f9f7 682 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 683 { \
<> 144:ef7eb2e8f9f7 684 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 685 } \
<> 144:ef7eb2e8f9f7 686 else \
<> 144:ef7eb2e8f9f7 687 { \
<> 144:ef7eb2e8f9f7 688 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 689 } \
<> 144:ef7eb2e8f9f7 690 } \
<> 144:ef7eb2e8f9f7 691 } while(0)
<> 144:ef7eb2e8f9f7 692 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 693 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 694 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 /**
<> 144:ef7eb2e8f9f7 697 * @brief Ensure that UART frame length is valid.
<> 144:ef7eb2e8f9f7 698 * @param __LENGTH__: UART frame length.
<> 144:ef7eb2e8f9f7 699 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
<> 144:ef7eb2e8f9f7 700 */
<> 144:ef7eb2e8f9f7 701 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 702 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 703 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
<> 144:ef7eb2e8f9f7 704 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
<> 144:ef7eb2e8f9f7 705 ((__LENGTH__) == UART_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 706 ((__LENGTH__) == UART_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 707 #else
<> 144:ef7eb2e8f9f7 708 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 709 ((__LENGTH__) == UART_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 710 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 711 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 712 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 /**
<> 144:ef7eb2e8f9f7 715 * @brief Ensure that UART auto Baud rate detection mode is valid.
<> 144:ef7eb2e8f9f7 716 * @param __MODE__: UART auto Baud rate detection mode.
<> 144:ef7eb2e8f9f7 717 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
<> 144:ef7eb2e8f9f7 718 */
<> 144:ef7eb2e8f9f7 719 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 720 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 721 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
<> 144:ef7eb2e8f9f7 722 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
<> 144:ef7eb2e8f9f7 723 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
<> 144:ef7eb2e8f9f7 724 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
<> 144:ef7eb2e8f9f7 725 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
<> 144:ef7eb2e8f9f7 726 #else
<> 144:ef7eb2e8f9f7 727 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
<> 144:ef7eb2e8f9f7 728 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
<> 144:ef7eb2e8f9f7 729 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
<> 144:ef7eb2e8f9f7 730 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
<> 144:ef7eb2e8f9f7 731 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
<> 144:ef7eb2e8f9f7 732
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 735 /**
<> 144:ef7eb2e8f9f7 736 * @brief Ensure that UART LIN state is valid.
<> 144:ef7eb2e8f9f7 737 * @param __LIN__: UART LIN state.
<> 144:ef7eb2e8f9f7 738 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
<> 144:ef7eb2e8f9f7 739 */
<> 144:ef7eb2e8f9f7 740 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
<> 144:ef7eb2e8f9f7 741 ((__LIN__) == UART_LIN_ENABLE))
<> 144:ef7eb2e8f9f7 742
<> 144:ef7eb2e8f9f7 743 /**
<> 144:ef7eb2e8f9f7 744 * @brief Ensure that UART LIN break detection length is valid.
<> 144:ef7eb2e8f9f7 745 * @param __LENGTH__: UART LIN break detection length.
<> 144:ef7eb2e8f9f7 746 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
<> 144:ef7eb2e8f9f7 747 */
<> 144:ef7eb2e8f9f7 748 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
<> 144:ef7eb2e8f9f7 749 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
<> 144:ef7eb2e8f9f7 750 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 751
<> 144:ef7eb2e8f9f7 752 /**
<> 144:ef7eb2e8f9f7 753 * @brief Ensure that UART request parameter is valid.
<> 144:ef7eb2e8f9f7 754 * @param __PARAM__: UART request parameter.
<> 144:ef7eb2e8f9f7 755 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
<> 144:ef7eb2e8f9f7 756 */
<> 144:ef7eb2e8f9f7 757 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 758 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
<> 144:ef7eb2e8f9f7 759 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
<> 144:ef7eb2e8f9f7 760 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
<> 144:ef7eb2e8f9f7 761 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
<> 144:ef7eb2e8f9f7 762 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
<> 144:ef7eb2e8f9f7 763 #else
<> 144:ef7eb2e8f9f7 764 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
<> 144:ef7eb2e8f9f7 765 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
<> 144:ef7eb2e8f9f7 766 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
<> 144:ef7eb2e8f9f7 767 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST))
<> 144:ef7eb2e8f9f7 768 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 769
<> 144:ef7eb2e8f9f7 770 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 771 /**
<> 144:ef7eb2e8f9f7 772 * @brief Ensure that UART stop mode state is valid.
<> 144:ef7eb2e8f9f7 773 * @param __STOPMODE__: UART stop mode state.
<> 144:ef7eb2e8f9f7 774 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
<> 144:ef7eb2e8f9f7 777 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779 /**
<> 144:ef7eb2e8f9f7 780 * @brief Ensure that UART wake-up selection is valid.
<> 144:ef7eb2e8f9f7 781 * @param __WAKE__: UART wake-up selection.
<> 144:ef7eb2e8f9f7 782 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
<> 144:ef7eb2e8f9f7 783 */
<> 144:ef7eb2e8f9f7 784 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
<> 144:ef7eb2e8f9f7 785 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
<> 144:ef7eb2e8f9f7 786 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
<> 144:ef7eb2e8f9f7 787 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 788
<> 144:ef7eb2e8f9f7 789 /**
<> 144:ef7eb2e8f9f7 790 * @}
<> 144:ef7eb2e8f9f7 791 */
<> 144:ef7eb2e8f9f7 792
<> 144:ef7eb2e8f9f7 793 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 794 /** @addtogroup UARTEx_Exported_Functions
<> 144:ef7eb2e8f9f7 795 * @{
<> 144:ef7eb2e8f9f7 796 */
<> 144:ef7eb2e8f9f7 797
<> 144:ef7eb2e8f9f7 798 /** @addtogroup UARTEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 799 * @brief Extended Initialization and Configuration Functions
<> 144:ef7eb2e8f9f7 800 * @{
<> 144:ef7eb2e8f9f7 801 */
<> 144:ef7eb2e8f9f7 802 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 803 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
<> 144:ef7eb2e8f9f7 804 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 805 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
<> 144:ef7eb2e8f9f7 806 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 807 /**
<> 144:ef7eb2e8f9f7 808 * @}
<> 144:ef7eb2e8f9f7 809 */
<> 144:ef7eb2e8f9f7 810
<> 144:ef7eb2e8f9f7 811 /** @addtogroup UARTEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 812 * @brief Extended UART Interrupt handling function
<> 144:ef7eb2e8f9f7 813 * @{
<> 144:ef7eb2e8f9f7 814 */
<> 144:ef7eb2e8f9f7 815
<> 144:ef7eb2e8f9f7 816 /* IO operation functions ***************************************************/
<> 144:ef7eb2e8f9f7 817 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 818 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 819 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 820 /**
<> 144:ef7eb2e8f9f7 821 * @}
<> 144:ef7eb2e8f9f7 822 */
<> 144:ef7eb2e8f9f7 823
<> 144:ef7eb2e8f9f7 824 /** @addtogroup UARTEx_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 825 * @brief Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 826 * @{
<> 144:ef7eb2e8f9f7 827 */
<> 144:ef7eb2e8f9f7 828
<> 144:ef7eb2e8f9f7 829 /* Peripheral Control functions **********************************************/
<> 144:ef7eb2e8f9f7 830 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
<> 144:ef7eb2e8f9f7 831 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 832 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
<> 144:ef7eb2e8f9f7 833 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 834 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 835 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 836 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 837 /**
<> 144:ef7eb2e8f9f7 838 * @}
<> 144:ef7eb2e8f9f7 839 */
<> 144:ef7eb2e8f9f7 840 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 841
<> 144:ef7eb2e8f9f7 842 /**
<> 144:ef7eb2e8f9f7 843 * @}
<> 144:ef7eb2e8f9f7 844 */
<> 144:ef7eb2e8f9f7 845
<> 144:ef7eb2e8f9f7 846 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 847
<> 144:ef7eb2e8f9f7 848 /**
<> 144:ef7eb2e8f9f7 849 * @}
<> 144:ef7eb2e8f9f7 850 */
<> 144:ef7eb2e8f9f7 851
<> 144:ef7eb2e8f9f7 852 /**
<> 144:ef7eb2e8f9f7 853 * @}
<> 144:ef7eb2e8f9f7 854 */
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 857 }
<> 144:ef7eb2e8f9f7 858 #endif
<> 144:ef7eb2e8f9f7 859
<> 144:ef7eb2e8f9f7 860 #endif /* __STM32F0xx_HAL_UART_EX_H */
<> 144:ef7eb2e8f9f7 861
<> 144:ef7eb2e8f9f7 862 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 863