mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NXP/TARGET_LPC15XX/i2c_api.c@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/hal/TARGET_NXP/TARGET_LPC15XX/i2c_api.c@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "i2c_api.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 19 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | static uint8_t repeated_start = 0; |
<> | 144:ef7eb2e8f9f7 | 22 | |
<> | 144:ef7eb2e8f9f7 | 23 | #define I2C_STAT(x) ((LPC_I2C0->STAT >> 1) & (0x07)) |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | static inline int i2c_status(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 26 | return I2C_STAT(obj); |
<> | 144:ef7eb2e8f9f7 | 27 | } |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | // Wait until the Serial Interrupt (SI) is set |
<> | 144:ef7eb2e8f9f7 | 30 | static int i2c_wait_SI(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 31 | volatile int timeout = 0; |
<> | 144:ef7eb2e8f9f7 | 32 | while (!(LPC_I2C0->STAT & (1 << 0))) { |
<> | 144:ef7eb2e8f9f7 | 33 | timeout++; |
<> | 144:ef7eb2e8f9f7 | 34 | if (timeout > 100000) return -1; |
<> | 144:ef7eb2e8f9f7 | 35 | } |
<> | 144:ef7eb2e8f9f7 | 36 | return 0; |
<> | 144:ef7eb2e8f9f7 | 37 | } |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | static inline void i2c_interface_enable(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 40 | LPC_I2C0->CFG |= (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 41 | } |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | void i2c_init(i2c_t *obj, PinName sda, PinName scl) { |
<> | 144:ef7eb2e8f9f7 | 44 | MBED_ASSERT((sda == P0_23) && (scl == P0_22)); |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | // Enables clock for I2C0 |
<> | 144:ef7eb2e8f9f7 | 47 | LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 13); |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | LPC_SYSCON->PRESETCTRL1 |= (1 << 13); |
<> | 144:ef7eb2e8f9f7 | 50 | LPC_SYSCON->PRESETCTRL1 &= ~(1 << 13); |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | // pin enable |
<> | 144:ef7eb2e8f9f7 | 53 | LPC_SWM->PINENABLE1 &= ~(0x3 << 3); |
<> | 144:ef7eb2e8f9f7 | 54 | |
<> | 144:ef7eb2e8f9f7 | 55 | // set default frequency at 100kHz |
<> | 144:ef7eb2e8f9f7 | 56 | i2c_frequency(obj, 100000); |
<> | 144:ef7eb2e8f9f7 | 57 | i2c_interface_enable(obj); |
<> | 144:ef7eb2e8f9f7 | 58 | } |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | inline int i2c_start(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 61 | int status = 0; |
<> | 144:ef7eb2e8f9f7 | 62 | if (repeated_start) { |
<> | 144:ef7eb2e8f9f7 | 63 | LPC_I2C0->MSTCTL = (1 << 1) | (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 64 | repeated_start = 0; |
<> | 144:ef7eb2e8f9f7 | 65 | } else { |
<> | 144:ef7eb2e8f9f7 | 66 | LPC_I2C0->MSTCTL = (1 << 1); |
<> | 144:ef7eb2e8f9f7 | 67 | } |
<> | 144:ef7eb2e8f9f7 | 68 | return status; |
<> | 144:ef7eb2e8f9f7 | 69 | } |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | inline int i2c_stop(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 72 | volatile int timeout = 0; |
<> | 144:ef7eb2e8f9f7 | 73 | |
<> | 144:ef7eb2e8f9f7 | 74 | LPC_I2C0->MSTCTL = (1 << 2) | (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 75 | while ((LPC_I2C0->STAT & ((1 << 0) | (7 << 1))) != ((1 << 0) | (0 << 1))) { |
<> | 144:ef7eb2e8f9f7 | 76 | timeout ++; |
<> | 144:ef7eb2e8f9f7 | 77 | if (timeout > 100000) return 1; |
<> | 144:ef7eb2e8f9f7 | 78 | } |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | return 0; |
<> | 144:ef7eb2e8f9f7 | 81 | } |
<> | 144:ef7eb2e8f9f7 | 82 | |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) { |
<> | 144:ef7eb2e8f9f7 | 85 | // write the data |
<> | 144:ef7eb2e8f9f7 | 86 | LPC_I2C0->MSTDAT = value; |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | if (!addr) |
<> | 144:ef7eb2e8f9f7 | 89 | LPC_I2C0->MSTCTL = (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | // wait and return status |
<> | 144:ef7eb2e8f9f7 | 92 | i2c_wait_SI(obj); |
<> | 144:ef7eb2e8f9f7 | 93 | return i2c_status(obj); |
<> | 144:ef7eb2e8f9f7 | 94 | } |
<> | 144:ef7eb2e8f9f7 | 95 | |
<> | 144:ef7eb2e8f9f7 | 96 | static inline int i2c_do_read(i2c_t *obj, int last) { |
<> | 144:ef7eb2e8f9f7 | 97 | // wait for it to arrive |
<> | 144:ef7eb2e8f9f7 | 98 | i2c_wait_SI(obj); |
<> | 144:ef7eb2e8f9f7 | 99 | if (!last) |
<> | 144:ef7eb2e8f9f7 | 100 | LPC_I2C0->MSTCTL = (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | // return the data |
<> | 144:ef7eb2e8f9f7 | 103 | return (LPC_I2C0->MSTDAT & 0xFF); |
<> | 144:ef7eb2e8f9f7 | 104 | } |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | void i2c_frequency(i2c_t *obj, int hz) { |
<> | 144:ef7eb2e8f9f7 | 107 | // No peripheral clock divider on the M0 |
<> | 144:ef7eb2e8f9f7 | 108 | uint32_t PCLK = SystemCoreClock; |
<> | 144:ef7eb2e8f9f7 | 109 | uint32_t clkdiv = PCLK / (hz * 4) - 1; |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | LPC_I2C0->DIV = clkdiv; |
<> | 144:ef7eb2e8f9f7 | 112 | LPC_I2C0->MSTTIME = 0; |
<> | 144:ef7eb2e8f9f7 | 113 | } |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { |
<> | 144:ef7eb2e8f9f7 | 116 | int count, status; |
<> | 144:ef7eb2e8f9f7 | 117 | |
<> | 144:ef7eb2e8f9f7 | 118 | i2c_start(obj); |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | LPC_I2C0->MSTDAT = (address | 0x01); |
<> | 144:ef7eb2e8f9f7 | 121 | LPC_I2C0->MSTCTL |= 0x20; |
<> | 144:ef7eb2e8f9f7 | 122 | if (i2c_wait_SI(obj) == -1) |
<> | 144:ef7eb2e8f9f7 | 123 | return -1; |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | status = ((LPC_I2C0->STAT >> 1) & (0x07)); |
<> | 144:ef7eb2e8f9f7 | 126 | if (status != 0x01) { |
<> | 144:ef7eb2e8f9f7 | 127 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 128 | return I2C_ERROR_NO_SLAVE; |
<> | 144:ef7eb2e8f9f7 | 129 | } |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | // Read in all except last byte |
<> | 144:ef7eb2e8f9f7 | 132 | for (count = 0; count < (length - 1); count++) { |
<> | 144:ef7eb2e8f9f7 | 133 | if (i2c_wait_SI(obj) == -1) |
<> | 144:ef7eb2e8f9f7 | 134 | return -1; |
<> | 144:ef7eb2e8f9f7 | 135 | LPC_I2C0->MSTCTL = (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 136 | data[count] = (LPC_I2C0->MSTDAT & 0xFF); |
<> | 144:ef7eb2e8f9f7 | 137 | status = ((LPC_I2C0->STAT >> 1) & (0x07)); |
<> | 144:ef7eb2e8f9f7 | 138 | if (status != 0x01) { |
<> | 144:ef7eb2e8f9f7 | 139 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 140 | return count; |
<> | 144:ef7eb2e8f9f7 | 141 | } |
<> | 144:ef7eb2e8f9f7 | 142 | } |
<> | 144:ef7eb2e8f9f7 | 143 | |
<> | 144:ef7eb2e8f9f7 | 144 | // read in last byte |
<> | 144:ef7eb2e8f9f7 | 145 | if (i2c_wait_SI(obj) == -1) |
<> | 144:ef7eb2e8f9f7 | 146 | return -1; |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | data[count] = (LPC_I2C0->MSTDAT & 0xFF); |
<> | 144:ef7eb2e8f9f7 | 149 | status = i2c_status(obj); |
<> | 144:ef7eb2e8f9f7 | 150 | if (status != 0x01) { |
<> | 144:ef7eb2e8f9f7 | 151 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 152 | return length - 1; |
<> | 144:ef7eb2e8f9f7 | 153 | } |
<> | 144:ef7eb2e8f9f7 | 154 | // If not repeated start, send stop. |
<> | 144:ef7eb2e8f9f7 | 155 | if (stop) { |
<> | 144:ef7eb2e8f9f7 | 156 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 157 | } else { |
<> | 144:ef7eb2e8f9f7 | 158 | repeated_start = 1; |
<> | 144:ef7eb2e8f9f7 | 159 | } |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | return length; |
<> | 144:ef7eb2e8f9f7 | 162 | } |
<> | 144:ef7eb2e8f9f7 | 163 | |
<> | 144:ef7eb2e8f9f7 | 164 | int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { |
<> | 144:ef7eb2e8f9f7 | 165 | int i, status; |
<> | 144:ef7eb2e8f9f7 | 166 | |
<> | 144:ef7eb2e8f9f7 | 167 | i2c_start(obj); |
<> | 144:ef7eb2e8f9f7 | 168 | |
<> | 144:ef7eb2e8f9f7 | 169 | LPC_I2C0->MSTDAT = (address & 0xFE); |
<> | 144:ef7eb2e8f9f7 | 170 | LPC_I2C0->MSTCTL |= 0x20; |
<> | 144:ef7eb2e8f9f7 | 171 | if (i2c_wait_SI(obj) == -1) |
<> | 144:ef7eb2e8f9f7 | 172 | return -1; |
<> | 144:ef7eb2e8f9f7 | 173 | |
<> | 144:ef7eb2e8f9f7 | 174 | status = ((LPC_I2C0->STAT >> 1) & (0x07)); |
<> | 144:ef7eb2e8f9f7 | 175 | if (status != 0x02) { |
<> | 144:ef7eb2e8f9f7 | 176 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 177 | return I2C_ERROR_NO_SLAVE; |
<> | 144:ef7eb2e8f9f7 | 178 | } |
<> | 144:ef7eb2e8f9f7 | 179 | |
<> | 144:ef7eb2e8f9f7 | 180 | for (i=0; i<length; i++) { |
<> | 144:ef7eb2e8f9f7 | 181 | LPC_I2C0->MSTDAT = data[i]; |
<> | 144:ef7eb2e8f9f7 | 182 | LPC_I2C0->MSTCTL = (1 << 0); |
<> | 144:ef7eb2e8f9f7 | 183 | if (i2c_wait_SI(obj) == -1) |
<> | 144:ef7eb2e8f9f7 | 184 | return -1; |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | status = ((LPC_I2C0->STAT >> 1) & (0x07)); |
<> | 144:ef7eb2e8f9f7 | 187 | if (status != 0x02) { |
<> | 144:ef7eb2e8f9f7 | 188 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 189 | return i; |
<> | 144:ef7eb2e8f9f7 | 190 | } |
<> | 144:ef7eb2e8f9f7 | 191 | } |
<> | 144:ef7eb2e8f9f7 | 192 | |
<> | 144:ef7eb2e8f9f7 | 193 | // If not repeated start, send stop. |
<> | 144:ef7eb2e8f9f7 | 194 | if (stop) { |
<> | 144:ef7eb2e8f9f7 | 195 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 196 | } else { |
<> | 144:ef7eb2e8f9f7 | 197 | repeated_start = 1; |
<> | 144:ef7eb2e8f9f7 | 198 | } |
<> | 144:ef7eb2e8f9f7 | 199 | |
<> | 144:ef7eb2e8f9f7 | 200 | return length; |
<> | 144:ef7eb2e8f9f7 | 201 | } |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | void i2c_reset(i2c_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 204 | i2c_stop(obj); |
<> | 144:ef7eb2e8f9f7 | 205 | } |
<> | 144:ef7eb2e8f9f7 | 206 | |
<> | 144:ef7eb2e8f9f7 | 207 | int i2c_byte_read(i2c_t *obj, int last) { |
<> | 144:ef7eb2e8f9f7 | 208 | return (i2c_do_read(obj, last) & 0xFF); |
<> | 144:ef7eb2e8f9f7 | 209 | } |
<> | 144:ef7eb2e8f9f7 | 210 | |
<> | 144:ef7eb2e8f9f7 | 211 | int i2c_byte_write(i2c_t *obj, int data) { |
<> | 144:ef7eb2e8f9f7 | 212 | if (i2c_do_write(obj, (data & 0xFF), 0) == 2) { |
<> | 144:ef7eb2e8f9f7 | 213 | return 1; |
<> | 144:ef7eb2e8f9f7 | 214 | } else { |
<> | 144:ef7eb2e8f9f7 | 215 | return 0; |
<> | 144:ef7eb2e8f9f7 | 216 | } |
<> | 144:ef7eb2e8f9f7 | 217 | } |