mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/lp_ticker.c@187:0387e8f68319, 2018-09-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Sep 06 13:40:20 2018 +0100
Revision:
187:0387e8f68319
Parent:
186:707f6e361f3e
Child:
188:bcfe06ba3d64
mbed-dev library. Release version 163

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /* mbed Microcontroller Library
<> 154:37f96f9d4de2 2 *******************************************************************************
Anna Bridge 186:707f6e361f3e 3 * Copyright (c) 2018, STMicroelectronics
<> 154:37f96f9d4de2 4 * All rights reserved.
<> 154:37f96f9d4de2 5 *
<> 154:37f96f9d4de2 6 * Redistribution and use in source and binary forms, with or without
<> 154:37f96f9d4de2 7 * modification, are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 8 *
<> 154:37f96f9d4de2 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 154:37f96f9d4de2 10 * this list of conditions and the following disclaimer.
<> 154:37f96f9d4de2 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 154:37f96f9d4de2 12 * this list of conditions and the following disclaimer in the documentation
<> 154:37f96f9d4de2 13 * and/or other materials provided with the distribution.
<> 154:37f96f9d4de2 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 154:37f96f9d4de2 15 * may be used to endorse or promote products derived from this software
<> 154:37f96f9d4de2 16 * without specific prior written permission.
<> 154:37f96f9d4de2 17 *
<> 154:37f96f9d4de2 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 154:37f96f9d4de2 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 154:37f96f9d4de2 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 154:37f96f9d4de2 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 154:37f96f9d4de2 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 154:37f96f9d4de2 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 154:37f96f9d4de2 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 154:37f96f9d4de2 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 154:37f96f9d4de2 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 28 *******************************************************************************
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30
Anna Bridge 186:707f6e361f3e 31 #if DEVICE_LPTICKER
<> 154:37f96f9d4de2 32
Anna Bridge 186:707f6e361f3e 33 /***********************************************************************/
Anna Bridge 186:707f6e361f3e 34 /* lpticker_lptim config is 1 in json config file */
Anna Bridge 186:707f6e361f3e 35 /* LPTICKER is based on LPTIM feature from ST drivers. RTC is not used */
Anna Bridge 186:707f6e361f3e 36 #if MBED_CONF_TARGET_LPTICKER_LPTIM
<> 154:37f96f9d4de2 37
Anna Bridge 186:707f6e361f3e 38 #include "lp_ticker_api.h"
Anna Bridge 186:707f6e361f3e 39 #include "mbed_error.h"
AnnaBridge 181:57724642e740 40
AnnaBridge 181:57724642e740 41 LPTIM_HandleTypeDef LptimHandle;
AnnaBridge 181:57724642e740 42
AnnaBridge 187:0387e8f68319 43 const ticker_info_t *lp_ticker_get_info()
Anna Bridge 186:707f6e361f3e 44 {
Anna Bridge 186:707f6e361f3e 45 static const ticker_info_t info = {
Anna Bridge 186:707f6e361f3e 46 #if MBED_CONF_TARGET_LSE_AVAILABLE
Anna Bridge 186:707f6e361f3e 47 LSE_VALUE,
Anna Bridge 186:707f6e361f3e 48 #else
Anna Bridge 186:707f6e361f3e 49 LSI_VALUE,
Anna Bridge 186:707f6e361f3e 50 #endif
Anna Bridge 186:707f6e361f3e 51 16
Anna Bridge 186:707f6e361f3e 52 };
Anna Bridge 186:707f6e361f3e 53 return &info;
Anna Bridge 186:707f6e361f3e 54 }
Anna Bridge 186:707f6e361f3e 55
AnnaBridge 181:57724642e740 56 volatile uint8_t lp_Fired = 0;
AnnaBridge 181:57724642e740 57
AnnaBridge 181:57724642e740 58 static void LPTIM1_IRQHandler(void);
AnnaBridge 181:57724642e740 59 static void (*irq_handler)(void);
AnnaBridge 181:57724642e740 60
AnnaBridge 181:57724642e740 61 void lp_ticker_init(void)
AnnaBridge 181:57724642e740 62 {
AnnaBridge 181:57724642e740 63 /* Check if LPTIM is already configured */
AnnaBridge 187:0387e8f68319 64 if (__HAL_RCC_LPTIM1_IS_CLK_ENABLED()) {
AnnaBridge 187:0387e8f68319 65 lp_ticker_disable_interrupt();
AnnaBridge 181:57724642e740 66 return;
AnnaBridge 181:57724642e740 67 }
AnnaBridge 181:57724642e740 68
AnnaBridge 181:57724642e740 69 RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
AnnaBridge 181:57724642e740 70 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
AnnaBridge 181:57724642e740 71
AnnaBridge 181:57724642e740 72 #if MBED_CONF_TARGET_LSE_AVAILABLE
AnnaBridge 181:57724642e740 73
AnnaBridge 181:57724642e740 74 /* Enable LSE clock */
AnnaBridge 181:57724642e740 75 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
AnnaBridge 181:57724642e740 76 RCC_OscInitStruct.LSEState = RCC_LSE_ON;
AnnaBridge 181:57724642e740 77 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
AnnaBridge 181:57724642e740 78
AnnaBridge 181:57724642e740 79 /* Select the LSE clock as LPTIM peripheral clock */
AnnaBridge 181:57724642e740 80 RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
AnnaBridge 181:57724642e740 81 #if (TARGET_STM32L0)
AnnaBridge 181:57724642e740 82 RCC_PeriphCLKInitStruct.LptimClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
AnnaBridge 181:57724642e740 83 #else
AnnaBridge 181:57724642e740 84 RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
AnnaBridge 181:57724642e740 85 #endif
AnnaBridge 181:57724642e740 86
AnnaBridge 181:57724642e740 87 #else /* MBED_CONF_TARGET_LSE_AVAILABLE */
AnnaBridge 181:57724642e740 88
AnnaBridge 181:57724642e740 89 /* Enable LSI clock */
AnnaBridge 181:57724642e740 90 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
AnnaBridge 181:57724642e740 91 RCC_OscInitStruct.LSIState = RCC_LSI_ON;
AnnaBridge 181:57724642e740 92 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
AnnaBridge 181:57724642e740 93
AnnaBridge 181:57724642e740 94 /* Select the LSI clock as LPTIM peripheral clock */
AnnaBridge 181:57724642e740 95 RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
AnnaBridge 181:57724642e740 96 #if (TARGET_STM32L0)
AnnaBridge 181:57724642e740 97 RCC_PeriphCLKInitStruct.LptimClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
AnnaBridge 181:57724642e740 98 #else
AnnaBridge 181:57724642e740 99 RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
AnnaBridge 181:57724642e740 100 #endif
AnnaBridge 181:57724642e740 101
AnnaBridge 181:57724642e740 102 #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
AnnaBridge 181:57724642e740 103
AnnaBridge 181:57724642e740 104 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
AnnaBridge 181:57724642e740 105 error("HAL_RCC_OscConfig ERROR\n");
AnnaBridge 181:57724642e740 106 return;
AnnaBridge 181:57724642e740 107 }
AnnaBridge 181:57724642e740 108
AnnaBridge 181:57724642e740 109 if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
AnnaBridge 181:57724642e740 110 error("HAL_RCCEx_PeriphCLKConfig ERROR\n");
AnnaBridge 181:57724642e740 111 return;
AnnaBridge 181:57724642e740 112 }
AnnaBridge 181:57724642e740 113
AnnaBridge 181:57724642e740 114 __HAL_RCC_LPTIM1_CLK_ENABLE();
AnnaBridge 181:57724642e740 115 __HAL_RCC_LPTIM1_FORCE_RESET();
AnnaBridge 181:57724642e740 116 __HAL_RCC_LPTIM1_RELEASE_RESET();
AnnaBridge 181:57724642e740 117
AnnaBridge 181:57724642e740 118 /* Initialize the LPTIM peripheral */
AnnaBridge 181:57724642e740 119 LptimHandle.Instance = LPTIM1;
AnnaBridge 181:57724642e740 120 LptimHandle.State = HAL_LPTIM_STATE_RESET;
AnnaBridge 181:57724642e740 121 LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
Anna Bridge 186:707f6e361f3e 122 LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
AnnaBridge 181:57724642e740 123
AnnaBridge 181:57724642e740 124 LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
AnnaBridge 181:57724642e740 125 LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
AnnaBridge 181:57724642e740 126 LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
AnnaBridge 181:57724642e740 127 LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
AnnaBridge 181:57724642e740 128 #if (TARGET_STM32L4)
AnnaBridge 181:57724642e740 129 LptimHandle.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
AnnaBridge 181:57724642e740 130 LptimHandle.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
AnnaBridge 181:57724642e740 131 #endif /* TARGET_STM32L4 */
AnnaBridge 181:57724642e740 132
AnnaBridge 181:57724642e740 133 if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK) {
AnnaBridge 181:57724642e740 134 error("HAL_LPTIM_Init ERROR\n");
AnnaBridge 181:57724642e740 135 return;
AnnaBridge 181:57724642e740 136 }
AnnaBridge 181:57724642e740 137
AnnaBridge 181:57724642e740 138 NVIC_SetVector(LPTIM1_IRQn, (uint32_t)LPTIM1_IRQHandler);
AnnaBridge 181:57724642e740 139
AnnaBridge 181:57724642e740 140 #if !(TARGET_STM32L4)
AnnaBridge 181:57724642e740 141 /* EXTI lines are not configured by default */
AnnaBridge 181:57724642e740 142 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
AnnaBridge 181:57724642e740 143 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
AnnaBridge 181:57724642e740 144 #endif
AnnaBridge 181:57724642e740 145
AnnaBridge 181:57724642e740 146 __HAL_LPTIM_ENABLE_IT(&LptimHandle, LPTIM_IT_CMPM);
AnnaBridge 181:57724642e740 147 HAL_LPTIM_Counter_Start(&LptimHandle, 0xFFFF);
Anna Bridge 186:707f6e361f3e 148
AnnaBridge 187:0387e8f68319 149 /* Need to write a compare value in order to get LPTIM_FLAG_CMPOK in set_interrupt */
Anna Bridge 186:707f6e361f3e 150 __HAL_LPTIM_COMPARE_SET(&LptimHandle, 0);
AnnaBridge 181:57724642e740 151 }
AnnaBridge 181:57724642e740 152
AnnaBridge 181:57724642e740 153 static void LPTIM1_IRQHandler(void)
AnnaBridge 181:57724642e740 154 {
AnnaBridge 181:57724642e740 155 LptimHandle.Instance = LPTIM1;
AnnaBridge 181:57724642e740 156
AnnaBridge 181:57724642e740 157 if (lp_Fired) {
AnnaBridge 181:57724642e740 158 lp_Fired = 0;
AnnaBridge 181:57724642e740 159 if (irq_handler) {
AnnaBridge 181:57724642e740 160 irq_handler();
AnnaBridge 181:57724642e740 161 }
AnnaBridge 181:57724642e740 162 }
AnnaBridge 181:57724642e740 163
AnnaBridge 181:57724642e740 164 /* Compare match interrupt */
AnnaBridge 181:57724642e740 165 if (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPM) != RESET) {
AnnaBridge 181:57724642e740 166 if (__HAL_LPTIM_GET_IT_SOURCE(&LptimHandle, LPTIM_IT_CMPM) != RESET) {
AnnaBridge 181:57724642e740 167 /* Clear Compare match flag */
AnnaBridge 181:57724642e740 168 __HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
AnnaBridge 181:57724642e740 169
Anna Bridge 186:707f6e361f3e 170 if (irq_handler) {
Anna Bridge 186:707f6e361f3e 171 irq_handler();
AnnaBridge 181:57724642e740 172 }
AnnaBridge 181:57724642e740 173 }
AnnaBridge 181:57724642e740 174 }
AnnaBridge 181:57724642e740 175
AnnaBridge 181:57724642e740 176 #if !(TARGET_STM32L4)
AnnaBridge 181:57724642e740 177 __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
AnnaBridge 181:57724642e740 178 #endif
AnnaBridge 181:57724642e740 179 }
AnnaBridge 181:57724642e740 180
AnnaBridge 181:57724642e740 181 uint32_t lp_ticker_read(void)
AnnaBridge 181:57724642e740 182 {
Anna Bridge 186:707f6e361f3e 183 uint32_t lp_time = LPTIM1->CNT;
Anna Bridge 186:707f6e361f3e 184 /* Reading the LPTIM_CNT register may return unreliable values.
Anna Bridge 186:707f6e361f3e 185 It is necessary to perform two consecutive read accesses and verify that the two returned values are identical */
Anna Bridge 186:707f6e361f3e 186 while (lp_time != LPTIM1->CNT) {
Anna Bridge 186:707f6e361f3e 187 lp_time = LPTIM1->CNT;
Anna Bridge 186:707f6e361f3e 188 }
Anna Bridge 186:707f6e361f3e 189 return lp_time;
AnnaBridge 181:57724642e740 190 }
AnnaBridge 181:57724642e740 191
AnnaBridge 181:57724642e740 192 void lp_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 181:57724642e740 193 {
AnnaBridge 181:57724642e740 194 LptimHandle.Instance = LPTIM1;
AnnaBridge 181:57724642e740 195 irq_handler = (void (*)(void))lp_ticker_irq_handler;
AnnaBridge 181:57724642e740 196
Anna Bridge 186:707f6e361f3e 197 /* CMPOK is set by hardware to inform application that the APB bus write operation to the LPTIM_CMP register has been successfully completed */
AnnaBridge 187:0387e8f68319 198 /* Any successive write before the CMPOK flag be set, will lead to unpredictable results */
Anna Bridge 186:707f6e361f3e 199 while (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK) == RESET) {
Anna Bridge 186:707f6e361f3e 200 }
Anna Bridge 186:707f6e361f3e 201
AnnaBridge 181:57724642e740 202 __HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK);
AnnaBridge 181:57724642e740 203 __HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
Anna Bridge 186:707f6e361f3e 204 __HAL_LPTIM_COMPARE_SET(&LptimHandle, timestamp);
AnnaBridge 181:57724642e740 205
Anna Bridge 186:707f6e361f3e 206 NVIC_EnableIRQ(LPTIM1_IRQn);
AnnaBridge 181:57724642e740 207 }
AnnaBridge 181:57724642e740 208
AnnaBridge 181:57724642e740 209 void lp_ticker_fire_interrupt(void)
AnnaBridge 181:57724642e740 210 {
AnnaBridge 181:57724642e740 211 lp_Fired = 1;
AnnaBridge 181:57724642e740 212 NVIC_SetPendingIRQ(LPTIM1_IRQn);
Anna Bridge 186:707f6e361f3e 213 NVIC_EnableIRQ(LPTIM1_IRQn);
AnnaBridge 181:57724642e740 214 }
AnnaBridge 181:57724642e740 215
AnnaBridge 181:57724642e740 216 void lp_ticker_disable_interrupt(void)
AnnaBridge 181:57724642e740 217 {
AnnaBridge 187:0387e8f68319 218 NVIC_DisableIRQ(LPTIM1_IRQn);
AnnaBridge 181:57724642e740 219 LptimHandle.Instance = LPTIM1;
AnnaBridge 187:0387e8f68319 220 /* Waiting last write operation completion */
AnnaBridge 187:0387e8f68319 221 while (__HAL_LPTIM_GET_FLAG(&LptimHandle, LPTIM_FLAG_CMPOK) == RESET) {
AnnaBridge 187:0387e8f68319 222 }
AnnaBridge 181:57724642e740 223 }
AnnaBridge 181:57724642e740 224
AnnaBridge 181:57724642e740 225 void lp_ticker_clear_interrupt(void)
AnnaBridge 181:57724642e740 226 {
AnnaBridge 181:57724642e740 227 LptimHandle.Instance = LPTIM1;
AnnaBridge 181:57724642e740 228 __HAL_LPTIM_CLEAR_FLAG(&LptimHandle, LPTIM_FLAG_CMPM);
Anna Bridge 186:707f6e361f3e 229 NVIC_ClearPendingIRQ(LPTIM1_IRQn);
AnnaBridge 181:57724642e740 230 }
AnnaBridge 181:57724642e740 231
Anna Bridge 186:707f6e361f3e 232
Anna Bridge 186:707f6e361f3e 233
Anna Bridge 186:707f6e361f3e 234 /*****************************************************************/
Anna Bridge 186:707f6e361f3e 235 /* lpticker_lptim config is 0 or not defined in json config file */
Anna Bridge 186:707f6e361f3e 236 /* LPTICKER is based on RTC wake up feature from ST drivers */
Anna Bridge 186:707f6e361f3e 237 #else /* MBED_CONF_TARGET_LPTICKER_LPTIM */
Anna Bridge 186:707f6e361f3e 238
Anna Bridge 186:707f6e361f3e 239 #include "rtc_api_hal.h"
Anna Bridge 186:707f6e361f3e 240
AnnaBridge 187:0387e8f68319 241 const ticker_info_t *lp_ticker_get_info()
Anna Bridge 186:707f6e361f3e 242 {
Anna Bridge 186:707f6e361f3e 243 static const ticker_info_t info = {
AnnaBridge 187:0387e8f68319 244 RTC_CLOCK / 4, // RTC_WAKEUPCLOCK_RTCCLK_DIV4
Anna Bridge 186:707f6e361f3e 245 32
Anna Bridge 186:707f6e361f3e 246 };
Anna Bridge 186:707f6e361f3e 247 return &info;
Anna Bridge 186:707f6e361f3e 248 }
AnnaBridge 181:57724642e740 249
<> 154:37f96f9d4de2 250 void lp_ticker_init(void)
<> 154:37f96f9d4de2 251 {
<> 154:37f96f9d4de2 252 rtc_init();
Anna Bridge 186:707f6e361f3e 253 lp_ticker_disable_interrupt();
<> 154:37f96f9d4de2 254 }
<> 154:37f96f9d4de2 255
<> 154:37f96f9d4de2 256 uint32_t lp_ticker_read(void)
<> 154:37f96f9d4de2 257 {
Anna Bridge 186:707f6e361f3e 258 return rtc_read_lp();
<> 154:37f96f9d4de2 259 }
<> 154:37f96f9d4de2 260
<> 154:37f96f9d4de2 261 void lp_ticker_set_interrupt(timestamp_t timestamp)
<> 154:37f96f9d4de2 262 {
AnnaBridge 187:0387e8f68319 263 lp_ticker_disable_interrupt();
Anna Bridge 186:707f6e361f3e 264 rtc_set_wake_up_timer(timestamp);
<> 154:37f96f9d4de2 265 }
<> 154:37f96f9d4de2 266
AnnaBridge 174:b96e65c34a4d 267 void lp_ticker_fire_interrupt(void)
AnnaBridge 174:b96e65c34a4d 268 {
Anna Bridge 186:707f6e361f3e 269 rtc_fire_interrupt();
AnnaBridge 174:b96e65c34a4d 270 }
AnnaBridge 174:b96e65c34a4d 271
<> 154:37f96f9d4de2 272 void lp_ticker_disable_interrupt(void)
<> 154:37f96f9d4de2 273 {
<> 154:37f96f9d4de2 274 rtc_deactivate_wake_up_timer();
<> 154:37f96f9d4de2 275 }
<> 154:37f96f9d4de2 276
<> 154:37f96f9d4de2 277 void lp_ticker_clear_interrupt(void)
<> 154:37f96f9d4de2 278 {
Anna Bridge 186:707f6e361f3e 279 NVIC_DisableIRQ(RTC_WKUP_IRQn);
<> 154:37f96f9d4de2 280 }
<> 154:37f96f9d4de2 281
Anna Bridge 186:707f6e361f3e 282 #endif /* MBED_CONF_TARGET_LPTICKER_LPTIM */
AnnaBridge 181:57724642e740 283
Anna Bridge 186:707f6e361f3e 284 #endif /* DEVICE_LPTICKER */