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/*
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Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#ifndef USB_INC_H
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#define USB_INC_H
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#include "mbed.h"
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#define MIN(a,b) ((a)<(b)?(a):(b))
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#define MAX(a,b) ((a)>(b)?(a):(b))
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//typedef int32_t RC;
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typedef uint8_t byte;
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typedef uint16_t word;
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enum UsbErr
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{
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__USBERR_MIN = -0xFFFF,
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USBERR_DISCONNECTED,
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USBERR_NOTFOUND,
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USBERR_BADCONFIG,
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USBERR_PROCESSING,
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USBERR_HALTED, //Transfer on an ep is stalled
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USBERR_BUSY,
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USBERR_TDFAIL,
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USBERR_ERROR,
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USBERR_OK = 0
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};
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/* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
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/* Only the types names have been changed to avoid unecessary typedefs */
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/*
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**************************************************************************************************************
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* NXP USB Host Stack
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*
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* (c) Copyright 2008, NXP SemiConductors
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* (c) Copyright 2008, OnChip Technologies LLC
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* All Rights Reserved
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*
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* www.nxp.com
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* www.onchiptech.com
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*
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* File : usbhost_lpc17xx.h
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* Programmer(s) : Ravikanth.P
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* Version :
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*
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**************************************************************************************************************
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*/
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/*
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**************************************************************************************************************
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* OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
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**************************************************************************************************************
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*/
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/* ------------------ HcControl Register --------------------- */
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#define OR_CONTROL_CLE 0x00000010
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#define OR_CONTROL_BLE 0x00000020
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#define OR_CONTROL_HCFS 0x000000C0
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#define OR_CONTROL_HC_OPER 0x00000080
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/* ----------------- HcCommandStatus Register ----------------- */
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#define OR_CMD_STATUS_HCR 0x00000001
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#define OR_CMD_STATUS_CLF 0x00000002
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#define OR_CMD_STATUS_BLF 0x00000004
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/* --------------- HcInterruptStatus Register ----------------- */
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#define OR_INTR_STATUS_WDH 0x00000002
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#define OR_INTR_STATUS_RHSC 0x00000040
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#define OR_INTR_STATUS_UE 0x00000010
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/* --------------- HcInterruptEnable Register ----------------- */
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#define OR_INTR_ENABLE_WDH 0x00000002
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#define OR_INTR_ENABLE_RHSC 0x00000040
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#define OR_INTR_ENABLE_MIE 0x80000000
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/* ---------------- HcRhDescriptorA Register ------------------ */
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#define OR_RH_STATUS_LPSC 0x00010000
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#define OR_RH_STATUS_DRWE 0x00008000
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/* -------------- HcRhPortStatus[1:NDP] Register -------------- */
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#define OR_RH_PORT_CCS 0x00000001
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#define OR_RH_PORT_PRS 0x00000010
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#define OR_RH_PORT_CSC 0x00010000
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#define OR_RH_PORT_PRSC 0x00100000
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/*
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**************************************************************************************************************
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* FRAME INTERVAL
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*/
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#define FI 0x2EDF /* 12000 bits per frame (-1) */
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#define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
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/*
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**************************************************************************************************************
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* ENDPOINT DESCRIPTOR CONTROL FIELDS
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*/
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#define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
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/*
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**************************************************************************************************************
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* TRANSFER DESCRIPTOR CONTROL FIELDS
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*/
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#define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
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#define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
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#define TD_IN (uint32_t)(0x00100000) /* Direction In */
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#define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
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#define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
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#define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
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#define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
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#define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
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/*
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* USB STANDARD REQUEST DEFINITIONS
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*/
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#define USB_DESCRIPTOR_TYPE_DEVICE 1
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#define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
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#define USB_DESCRIPTOR_TYPE_INTERFACE 4
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#define USB_DESCRIPTOR_TYPE_ENDPOINT 5
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/* ----------- Control RequestType Fields ----------- */
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#define USB_DEVICE_TO_HOST 0x80
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#define USB_HOST_TO_DEVICE 0x00
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#define USB_REQUEST_TYPE_CLASS 0x20
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#define USB_RECIPIENT_DEVICE 0x00
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#define USB_RECIPIENT_INTERFACE 0x01
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/* -------------- USB Standard Requests -------------- */
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#define SET_ADDRESS 5
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#define GET_DESCRIPTOR 6
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#define SET_CONFIGURATION 9
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#define SET_INTERFACE 11
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/*
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**************************************************************************************************************
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* TYPE DEFINITIONS
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**************************************************************************************************************
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*/
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typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
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volatile uint32_t Control; /* Endpoint descriptor control */
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volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
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volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
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volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
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} HCED;
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typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
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volatile uint32_t Control; /* Transfer descriptor control */
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volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
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volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
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volatile uint32_t BufEnd; /* Physical address of end of buffer */
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} HCTD;
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typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
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volatile uint32_t IntTable[32]; /* Interrupt Table */
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volatile uint32_t FrameNumber; /* Frame Number */
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volatile uint32_t DoneHead; /* Done Head */
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volatile uint8_t Reserved[116]; /* Reserved for future use */
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volatile uint8_t Unknown[4]; /* Unused */
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} HCCA;
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#endif
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Daniel Peter