mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c
Dependents: Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay
Fork of mbed-dev by
targets/TARGET_TOSHIBA/TARGET_TMPM066/sleep.c@177:619788de047e, 2017-11-07 (annotated)
- Committer:
- maxxir
- Date:
- Tue Nov 07 16:46:29 2017 +0000
- Revision:
- 177:619788de047e
- Parent:
- 172:7d866c31b3c5
To fix broken RTC on Nucleo_F103RB / STM32F103 BluePill etc..; Used direct RTC register manipulation for STM32F1xx; rtc_read() && rtc_write() (native rtc_init() - works good); also added stub for non-working on STM32F1xx rtc_read_subseconds().
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:7d866c31b3c5 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 172:7d866c31b3c5 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved |
AnnaBridge | 172:7d866c31b3c5 | 3 | * |
AnnaBridge | 172:7d866c31b3c5 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 172:7d866c31b3c5 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 172:7d866c31b3c5 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 172:7d866c31b3c5 | 9 | * |
AnnaBridge | 172:7d866c31b3c5 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 172:7d866c31b3c5 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 172:7d866c31b3c5 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 172:7d866c31b3c5 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 172:7d866c31b3c5 | 14 | * limitations under the License. |
AnnaBridge | 172:7d866c31b3c5 | 15 | */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | #include "sleep_api.h" |
AnnaBridge | 172:7d866c31b3c5 | 17 | |
AnnaBridge | 172:7d866c31b3c5 | 18 | // number of warm-up cycle = warm-up time to set / input frequency cycle (s) |
AnnaBridge | 172:7d866c31b3c5 | 19 | // number of 3*10^-6 (s) / (1/12 (MHz)) = 60000 = 0xea60 |
AnnaBridge | 172:7d866c31b3c5 | 20 | #define CG_WUODR_INT ((uint16_t)0xea60) |
AnnaBridge | 172:7d866c31b3c5 | 21 | |
AnnaBridge | 172:7d866c31b3c5 | 22 | void external_losc_enable(void); |
AnnaBridge | 172:7d866c31b3c5 | 23 | |
AnnaBridge | 172:7d866c31b3c5 | 24 | void hal_sleep(void) |
AnnaBridge | 172:7d866c31b3c5 | 25 | { |
AnnaBridge | 172:7d866c31b3c5 | 26 | // Set low power consumption mode IDLE |
AnnaBridge | 172:7d866c31b3c5 | 27 | CG_SetSTBYMode(CG_STBY_MODE_IDLE); |
AnnaBridge | 172:7d866c31b3c5 | 28 | // Enter idle mode |
AnnaBridge | 172:7d866c31b3c5 | 29 | __WFI(); |
AnnaBridge | 172:7d866c31b3c5 | 30 | } |
AnnaBridge | 172:7d866c31b3c5 | 31 | |
AnnaBridge | 172:7d866c31b3c5 | 32 | void hal_deepsleep(void) |
AnnaBridge | 172:7d866c31b3c5 | 33 | { |
AnnaBridge | 172:7d866c31b3c5 | 34 | // Set low power consumption mode STOP1 |
AnnaBridge | 172:7d866c31b3c5 | 35 | CG_SetSTBYMode(CG_STBY_MODE_STOP1); |
AnnaBridge | 172:7d866c31b3c5 | 36 | // Setup warm up time |
AnnaBridge | 172:7d866c31b3c5 | 37 | CG_SetWarmUpTime(CG_WARM_UP_SRC_OSC_EXT_HIGH, CG_WUODR_INT); |
AnnaBridge | 172:7d866c31b3c5 | 38 | // Enter stop1 mode |
AnnaBridge | 172:7d866c31b3c5 | 39 | __WFI(); |
AnnaBridge | 172:7d866c31b3c5 | 40 | // Switch over from IHOSC to EHOSC |
AnnaBridge | 172:7d866c31b3c5 | 41 | external_losc_enable(); |
AnnaBridge | 172:7d866c31b3c5 | 42 | } |
AnnaBridge | 172:7d866c31b3c5 | 43 | |
AnnaBridge | 172:7d866c31b3c5 | 44 | void external_losc_enable(void) |
AnnaBridge | 172:7d866c31b3c5 | 45 | { |
AnnaBridge | 172:7d866c31b3c5 | 46 | // Enable high-speed oscillator |
AnnaBridge | 172:7d866c31b3c5 | 47 | CG_SetFoscSrc(CG_FOSC_OSC_EXT); |
AnnaBridge | 172:7d866c31b3c5 | 48 | // Select internal(fIHOSC) as warm-up clock |
AnnaBridge | 172:7d866c31b3c5 | 49 | CG_SetWarmUpTime(CG_WARM_UP_SRC_OSC_INT_HIGH, CG_WUODR_INT); |
AnnaBridge | 172:7d866c31b3c5 | 50 | // Start warm-up |
AnnaBridge | 172:7d866c31b3c5 | 51 | CG_StartWarmUp(); |
AnnaBridge | 172:7d866c31b3c5 | 52 | // Wait until EHOSC become stable |
AnnaBridge | 172:7d866c31b3c5 | 53 | while (CG_GetWarmUpState() != DONE) { |
AnnaBridge | 172:7d866c31b3c5 | 54 | // Do nothing |
AnnaBridge | 172:7d866c31b3c5 | 55 | } |
AnnaBridge | 172:7d866c31b3c5 | 56 | |
AnnaBridge | 172:7d866c31b3c5 | 57 | // Set fosc source |
AnnaBridge | 172:7d866c31b3c5 | 58 | CG_SetFoscSrc(CG_FOSC_OSC_EXT); |
AnnaBridge | 172:7d866c31b3c5 | 59 | // Wait for <OSCSEL> to become "1" |
AnnaBridge | 172:7d866c31b3c5 | 60 | while (CG_GetFoscSrc() != CG_FOSC_OSC_EXT) { |
AnnaBridge | 172:7d866c31b3c5 | 61 | // Do nothing |
AnnaBridge | 172:7d866c31b3c5 | 62 | } |
AnnaBridge | 172:7d866c31b3c5 | 63 | |
AnnaBridge | 172:7d866c31b3c5 | 64 | // Stop IHOSC |
AnnaBridge | 172:7d866c31b3c5 | 65 | CG_SetFoscSrc(CG_FOSC_OSC_INT); |
AnnaBridge | 172:7d866c31b3c5 | 66 | } |